drm/i915: save/restore BLC histogram control reg across suspend/resume

Turns out some machines, like the ThinkPad X40 don't come back if you
don't save/restore this register.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 24e154e..f6a3587 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -304,6 +304,7 @@ typedef struct drm_i915_private {
        u32 saveDSPASURF;
        u32 saveDSPATILEOFF;
        u32 savePFIT_PGM_RATIOS;
+       u32 saveBLC_HIST_CTL;
        u32 saveBLC_PWM_CTL;
        u32 saveBLC_PWM_CTL2;
        u32 saveFPB0;

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0dd87a7..b481358 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1080,6 +1080,8 @@
 #define   BACKLIGHT_DUTY_CYCLE_SHIFT           (0)
 #define   BACKLIGHT_DUTY_CYCLE_MASK            (0xffff)
 
+#define BLC_HIST_CTL           0x61260
+
 /* TV port control */
 #define TV_CTL                 0x68000
 /** Enables the TV encoder */

diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 660c5f3..75c5bed 100644 (file)
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -410,6 +410,7 @@ void i915_save_display(struct drm_device *dev)
        dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL);
        dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS);
        dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL);
+       dev_priv->saveBLC_HIST_CTL = I915_READ(BLC_HIST_CTL);
        if (IS_I965G(dev))
                dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
        if (IS_MOBILE(dev) && !IS_I830(dev))
@@ -501,6 +502,7 @@ void i915_restore_display(struct drm_device *dev)
 
        I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
        I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);
+       I915_WRITE(BLC_HIST_CTL, dev_priv->saveBLC_HIST_CTL);
        I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
        I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
        I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);