2 * spi_bitbang.c - polling/bitbanging SPI master controller driver utilities
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 #include <linux/init.h>
20 #include <linux/spinlock.h>
21 #include <linux/workqueue.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/errno.h>
25 #include <linux/platform_device.h>
27 #include <linux/spi/spi.h>
28 #include <linux/spi/spi_bitbang.h>
31 /*----------------------------------------------------------------------*/
34 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
35 * Use this for GPIO or shift-register level hardware APIs.
37 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
38 * to glue code. These bitbang setup() and cleanup() routines are always
39 * used, though maybe they're called from controller-aware code.
41 * chipselect() and friends may use use spi_device->controller_data and
42 * controller registers as appropriate.
45 * NOTE: SPI controller pins can often be used as GPIO pins instead,
46 * which means you could use a bitbang driver either to get hardware
47 * working quickly, or testing for differences that aren't speed related.
50 struct spi_bitbang_cs {
51 unsigned nsecs; /* (clock cycle time)/2 */
52 u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
54 unsigned (*txrx_bufs)(struct spi_device *,
56 struct spi_device *spi,
59 unsigned, struct spi_transfer *);
62 static unsigned bitbang_txrx_8(
63 struct spi_device *spi,
64 u32 (*txrx_word)(struct spi_device *spi,
68 struct spi_transfer *t
70 unsigned bits = spi->bits_per_word;
71 unsigned count = t->len;
72 const u8 *tx = t->tx_buf;
75 while (likely(count > 0)) {
80 word = txrx_word(spi, ns, word, bits);
85 return t->len - count;
88 static unsigned bitbang_txrx_16(
89 struct spi_device *spi,
90 u32 (*txrx_word)(struct spi_device *spi,
94 struct spi_transfer *t
96 unsigned bits = spi->bits_per_word;
97 unsigned count = t->len;
98 const u16 *tx = t->tx_buf;
101 while (likely(count > 1)) {
106 word = txrx_word(spi, ns, word, bits);
111 return t->len - count;
114 static unsigned bitbang_txrx_32(
115 struct spi_device *spi,
116 u32 (*txrx_word)(struct spi_device *spi,
120 struct spi_transfer *t
122 unsigned bits = spi->bits_per_word;
123 unsigned count = t->len;
124 const u32 *tx = t->tx_buf;
127 while (likely(count > 3)) {
132 word = txrx_word(spi, ns, word, bits);
137 return t->len - count;
140 int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
142 struct spi_bitbang_cs *cs = spi->controller_state;
147 bits_per_word = t->bits_per_word;
154 /* spi_transfer level calls that work per-word */
156 bits_per_word = spi->bits_per_word;
157 if (bits_per_word <= 8)
158 cs->txrx_bufs = bitbang_txrx_8;
159 else if (bits_per_word <= 16)
160 cs->txrx_bufs = bitbang_txrx_16;
161 else if (bits_per_word <= 32)
162 cs->txrx_bufs = bitbang_txrx_32;
166 /* nsecs = (clock period)/2 */
168 hz = spi->max_speed_hz;
170 cs->nsecs = (1000000000/2) / hz;
171 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
177 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
180 * spi_bitbang_setup - default setup for per-word I/O loops
182 int spi_bitbang_setup(struct spi_device *spi)
184 struct spi_bitbang_cs *cs = spi->controller_state;
185 struct spi_bitbang *bitbang;
189 bitbang = spi_master_get_devdata(spi->master);
191 /* Bitbangers can support SPI_CS_HIGH, SPI_3WIRE, and so on;
192 * add those to master->flags, and provide the other support.
194 if ((spi->mode & ~(SPI_CPOL|SPI_CPHA|bitbang->flags)) != 0)
198 cs = kzalloc(sizeof *cs, GFP_KERNEL);
201 spi->controller_state = cs;
204 /* per-word shift register access, in hardware or bitbanging */
205 cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
209 retval = bitbang->setup_transfer(spi, NULL);
213 dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
215 /* NOTE we _need_ to call chipselect() early, ideally with adapter
216 * setup, unless the hardware defaults cooperate to avoid confusion
217 * between normal (active low) and inverted chipselects.
220 /* deselect chip (low or high) */
221 spin_lock_irqsave(&bitbang->lock, flags);
222 if (!bitbang->busy) {
223 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
226 spin_unlock_irqrestore(&bitbang->lock, flags);
230 EXPORT_SYMBOL_GPL(spi_bitbang_setup);
233 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
235 void spi_bitbang_cleanup(struct spi_device *spi)
237 kfree(spi->controller_state);
239 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
241 static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
243 struct spi_bitbang_cs *cs = spi->controller_state;
244 unsigned nsecs = cs->nsecs;
246 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t);
249 /*----------------------------------------------------------------------*/
252 * SECOND PART ... simple transfer queue runner.
254 * This costs a task context per controller, running the queue by
255 * performing each transfer in sequence. Smarter hardware can queue
256 * several DMA transfers at once, and process several controller queues
257 * in parallel; this driver doesn't match such hardware very well.
259 * Drivers can provide word-at-a-time i/o primitives, or provide
260 * transfer-at-a-time ones to leverage dma or fifo hardware.
262 static void bitbang_work(struct work_struct *work)
264 struct spi_bitbang *bitbang =
265 container_of(work, struct spi_bitbang, work);
268 spin_lock_irqsave(&bitbang->lock, flags);
270 while (!list_empty(&bitbang->queue)) {
271 struct spi_message *m;
272 struct spi_device *spi;
274 struct spi_transfer *t = NULL;
278 int (*setup_transfer)(struct spi_device *,
279 struct spi_transfer *);
281 m = container_of(bitbang->queue.next, struct spi_message,
283 list_del_init(&m->queue);
284 spin_unlock_irqrestore(&bitbang->lock, flags);
286 /* FIXME this is made-up ... the correct value is known to
287 * word-at-a-time bitbang code, and presumably chipselect()
288 * should enforce these requirements too?
296 setup_transfer = NULL;
298 list_for_each_entry (t, &m->transfers, transfer_list) {
300 /* override or restore speed and wordsize */
301 if (t->speed_hz || t->bits_per_word) {
302 setup_transfer = bitbang->setup_transfer;
303 if (!setup_transfer) {
304 status = -ENOPROTOOPT;
308 if (setup_transfer) {
309 status = setup_transfer(spi, t);
314 /* set up default clock polarity, and activate chip;
315 * this implicitly updates clock and spi modes as
316 * previously recorded for this device via setup().
317 * (and also deselects any other chip that might be
321 bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
324 cs_change = t->cs_change;
325 if (!t->tx_buf && !t->rx_buf && t->len) {
330 /* transfer data. the lower level code handles any
331 * new dma mappings it needs. our caller always gave
332 * us dma-safe buffers.
335 /* REVISIT dma API still needs a designated
336 * DMA_ADDR_INVALID; ~0 might be better.
338 if (!m->is_dma_mapped)
339 t->rx_dma = t->tx_dma = 0;
340 status = bitbang->txrx_bufs(spi, t);
343 m->actual_length += status;
344 if (status != t->len) {
345 /* always report some kind of error */
352 /* protocol tweaks before next transfer */
354 udelay(t->delay_usecs);
358 if (t->transfer_list.next == &m->transfers)
361 /* sometimes a short mid-message deselect of the chip
362 * may be needed to terminate a mode or command
365 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
370 m->complete(m->context);
372 /* restore speed and wordsize */
374 setup_transfer(spi, NULL);
376 /* normally deactivate chipselect ... unless no error and
377 * cs_change has hinted that the next message will probably
378 * be for this chip too.
380 if (!(status == 0 && cs_change)) {
382 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
386 spin_lock_irqsave(&bitbang->lock, flags);
389 spin_unlock_irqrestore(&bitbang->lock, flags);
393 * spi_bitbang_transfer - default submit to transfer queue
395 int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m)
397 struct spi_bitbang *bitbang;
401 m->actual_length = 0;
402 m->status = -EINPROGRESS;
404 bitbang = spi_master_get_devdata(spi->master);
406 spin_lock_irqsave(&bitbang->lock, flags);
407 if (!spi->max_speed_hz)
410 list_add_tail(&m->queue, &bitbang->queue);
411 queue_work(bitbang->workqueue, &bitbang->work);
413 spin_unlock_irqrestore(&bitbang->lock, flags);
417 EXPORT_SYMBOL_GPL(spi_bitbang_transfer);
419 /*----------------------------------------------------------------------*/
422 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
423 * @bitbang: driver handle
425 * Caller should have zero-initialized all parts of the structure, and then
426 * provided callbacks for chip selection and I/O loops. If the master has
427 * a transfer method, its final step should call spi_bitbang_transfer; or,
428 * that's the default if the transfer routine is not initialized. It should
429 * also set up the bus number and number of chipselects.
431 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
432 * hardware that basically exposes a shift register) or per-spi_transfer
433 * (which takes better advantage of hardware like fifos or DMA engines).
435 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
436 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
437 * master methods. Those methods are the defaults if the bitbang->txrx_bufs
438 * routine isn't initialized.
440 * This routine registers the spi_master, which will process requests in a
441 * dedicated task, keeping IRQs unblocked most of the time. To stop
442 * processing those requests, call spi_bitbang_stop().
444 int spi_bitbang_start(struct spi_bitbang *bitbang)
448 if (!bitbang->master || !bitbang->chipselect)
451 INIT_WORK(&bitbang->work, bitbang_work);
452 spin_lock_init(&bitbang->lock);
453 INIT_LIST_HEAD(&bitbang->queue);
455 if (!bitbang->master->transfer)
456 bitbang->master->transfer = spi_bitbang_transfer;
457 if (!bitbang->txrx_bufs) {
458 bitbang->use_dma = 0;
459 bitbang->txrx_bufs = spi_bitbang_bufs;
460 if (!bitbang->master->setup) {
461 if (!bitbang->setup_transfer)
462 bitbang->setup_transfer =
463 spi_bitbang_setup_transfer;
464 bitbang->master->setup = spi_bitbang_setup;
465 bitbang->master->cleanup = spi_bitbang_cleanup;
467 } else if (!bitbang->master->setup)
470 /* this task is the only thing to touch the SPI bits */
472 bitbang->workqueue = create_singlethread_workqueue(
473 dev_name(bitbang->master->dev.parent));
474 if (bitbang->workqueue == NULL) {
479 /* driver may get busy before register() returns, especially
480 * if someone registered boardinfo for devices
482 status = spi_register_master(bitbang->master);
489 destroy_workqueue(bitbang->workqueue);
493 EXPORT_SYMBOL_GPL(spi_bitbang_start);
496 * spi_bitbang_stop - stops the task providing spi communication
498 int spi_bitbang_stop(struct spi_bitbang *bitbang)
500 spi_unregister_master(bitbang->master);
502 WARN_ON(!list_empty(&bitbang->queue));
504 destroy_workqueue(bitbang->workqueue);
508 EXPORT_SYMBOL_GPL(spi_bitbang_stop);
510 MODULE_LICENSE("GPL");