powerpc/boot/dts: drop obsolete 'fsl5200-clocking'
authorWolfram Sang <w.sang@pengutronix.de>
Thu, 15 Oct 2009 15:58:27 +0000 (09:58 -0600)
committerGrant Likely <grant.likely@secretlab.ca>
Thu, 15 Oct 2009 15:58:27 +0000 (09:58 -0600)
The 'fsl5200-clocking'-property was dropped since
0d1cde235874b00905bce23f659690d060ebf475. Remove all occurences
in dts-files.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
arch/powerpc/boot/dts/cm5200.dts
arch/powerpc/boot/dts/digsy_mtc.dts
arch/powerpc/boot/dts/lite5200.dts
arch/powerpc/boot/dts/lite5200b.dts
arch/powerpc/boot/dts/media5200.dts
arch/powerpc/boot/dts/motionpro.dts
arch/powerpc/boot/dts/mpc5121ads.dts
arch/powerpc/boot/dts/pcm030.dts
arch/powerpc/boot/dts/pcm032.dts
arch/powerpc/boot/dts/tqm5200.dts

index cee8080..dd38608 100644 (file)
                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d40 0x40>;
                        interrupts = <2 16 0>;
-                       fsl5200-clocking;
                };
 
                sram@8000 {
index 4c36186..8e9be6b 100644 (file)
                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d00 0x40>;
                        interrupts = <2 15 0>;
-                       fsl5200-clocking;
 
                        rtc@50 {
                                compatible = "at,24c08";
index de30b3f..82ff2b1 100644 (file)
                        compatible = "fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d00 0x40>;
                        interrupts = <2 15 0>;
-                       fsl5200-clocking;
                };
 
                i2c@3d40 {
                        compatible = "fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d40 0x40>;
                        interrupts = <2 16 0>;
-                       fsl5200-clocking;
                };
                sram@8000 {
                        compatible = "fsl,mpc5200-sram";
index d13cb11..e45a63b 100644 (file)
                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d00 0x40>;
                        interrupts = <2 15 0>;
-                       fsl5200-clocking;
                };
 
                i2c@3d40 {
                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d40 0x40>;
                        interrupts = <2 16 0>;
-                       fsl5200-clocking;
                };
 
                sram@8000 {
index e297d8b..0c3902b 100644 (file)
                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d00 0x40>;
                        interrupts = <2 15 0>;
-                       fsl5200-clocking;
                };
 
                i2c@3d40 {
                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d40 0x40>;
                        interrupts = <2 16 0>;
-                       fsl5200-clocking;
                };
 
                sram@8000 {
index 7be8ca0..6ca4fc1 100644 (file)
                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d40 0x40>;
                        interrupts = <2 16 0>;
-                       fsl5200-clocking;
 
                        rtc@68 {
                                compatible = "dallas,ds1339";
index c2b8dbf..c353dac 100644 (file)
                        reg = <0x1700 0x20>;
                        interrupts = <9 0x8>;
                        interrupt-parent = < &ipic >;
-                       fsl5200-clocking;
                };
 
                i2c@1720 {
                        reg = <0x1720 0x20>;
                        interrupts = <10 0x8>;
                        interrupt-parent = < &ipic >;
-                       fsl5200-clocking;
                };
 
                i2c@1740 {
                        reg = <0x1740 0x20>;
                        interrupts = <11 0x8>;
                        interrupt-parent = < &ipic >;
-                       fsl5200-clocking;
                };
 
                i2ccontrol@1760 {
index 30bfdc0..8a4ec30 100644 (file)
                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d00 0x40>;
                        interrupts = <2 15 0>;
-                       fsl5200-clocking;
                };
 
                i2c@3d40 {
                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d40 0x40>;
                        interrupts = <2 16 0>;
-                       fsl5200-clocking;
                        rtc@51 {
                                compatible = "nxp,pcf8563";
                                reg = <0x51>;
index 0300426..85d857a 100644 (file)
                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d00 0x40>;
                        interrupts = <2 15 0>;
-                       fsl5200-clocking;
                };
 
                i2c@3d40 {
                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d40 0x40>;
                        interrupts = <2 16 0>;
-                       fsl5200-clocking;
                        rtc@51 {
                                compatible = "nxp,pcf8563";
                                reg = <0x51>;
index c9590b5..1db07f6 100644 (file)
                        compatible = "fsl,mpc5200-i2c","fsl-i2c";
                        reg = <0x3d40 0x40>;
                        interrupts = <2 16 0>;
-                       fsl5200-clocking;
 
                         rtc@68 {
                                compatible = "dallas,ds1307";