ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig

Add ARM_L1_CACHE_SHIFT_6 to arch/arm/Kconfig to allow CPUs with
L1 cache lines which are 64bytes to indicate this without having to
alter the arch/arm/mm/Kconfig entry each time.

Update the mm Kconfig so that ARM_L1_CACHE_SHIFT default value
uses this and change OMAP3 and S5PC1XX to select ARM_L1_CACHE_SHIFT_6.

Acked-by: Ben Dooks <ben-linux@fluff.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0f1ad74..04247ba 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -165,6 +165,11 @@ config ARCH_MTD_XIP
 config GENERIC_HARDIRQS_NO__DO_IRQ
        def_bool y
 
+config ARM_L1_CACHE_SHIFT_6
+       bool
+       help
+         Setting ARM L1 cache line size to 64 Bytes.
+
 if OPROFILE
 
 config OPROFILE_ARMV6
@@ -642,6 +647,7 @@ config ARCH_S5PC1XX
        select GENERIC_GPIO
        select HAVE_CLK
        select CPU_V7
+       select ARM_L1_CACHE_SHIFT_6
        help
          Samsung S5PC1XX series based systems
 

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index e859743..c4ed9f9 100644 (file)
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -779,5 +779,5 @@ config CACHE_XSC3L2
 
 config ARM_L1_CACHE_SHIFT
        int
-       default 6 if ARCH_OMAP3 || ARCH_S5PC1XX
+       default 6 if ARM_L1_CACHE_SHIFT_6
        default 5

diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index e2ea04a..2e3eec6 100644 (file)
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -22,6 +22,7 @@ config ARCH_OMAP3
        bool "TI OMAP3"
        select CPU_V7
        select COMMON_CLKDEV
+       select ARM_L1_CACHE_SHIFT_6
 
 config ARCH_OMAP4
        bool "TI OMAP4"