Use hardware mechanism to deal with cache aliases in the 24K.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index c08fa36..1466c49 100644 (file)
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1011,9 +1011,17 @@ static void __init probe_pcache(void)
         * normally they'd suffer from aliases but magic in the hardware deals
         * with that for us so we don't need to take care ourselves.
         */
-       if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
+       switch (c->cputype) {
                if (c->dcache.waysize > PAGE_SIZE)
-                       c->dcache.flags |= MIPS_CACHE_ALIASES;
+
+       case CPU_R10000:
+       case CPU_R12000:
+               break;
+       case CPU_24K:
+               if (!(read_c0_config7() & (1 << 16)))
+       default:
+                       c->dcache.flags |= MIPS_CACHE_ALIASES;
+       }
 
        switch (c->cputype) {
        case CPU_20KC: