[POWERPC] spufs: Add bit definition

Add a bit define from book, and replace one hex number with a
symbol, for clarity.

Signed-off-by: Sebastian Siewior <bigeasy@linux.vnet.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>

diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c
index 6625ed2..3ba30ce 100644 (file)
--- a/arch/powerpc/platforms/cell/spufs/run.c
+++ b/arch/powerpc/platforms/cell/spufs/run.c
@@ -29,7 +29,8 @@ static inline int spu_stopped(struct spu_context *ctx, u32 * stat)
        spu = ctx->spu;
        pte_fault = spu->dsisr &
            (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED);
-       return (!(*stat & 0x1) || pte_fault || spu->class_0_pending) ? 1 : 0;
+       return (!(*stat & SPU_STATUS_RUNNING) || pte_fault || spu->class_0_pending) ?
+               1 : 0;
 }
 
 static int spu_setup_isolated(struct spu_context *ctx)

diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index 31d5054..5f894b6 100644 (file)
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -448,6 +448,7 @@ struct spu_priv1 {
 #define MFC_STATE1_PROBLEM_STATE_MASK          0x08ull
 #define MFC_STATE1_RELOCATE_MASK               0x10ull
 #define MFC_STATE1_MASTER_RUN_CONTROL_MASK     0x20ull
+#define MFC_STATE1_TABLE_SEARCH_MASK           0x40ull
        u64 mfc_lpid_RW;                                        /* 0x008 */
        u64 spu_idr_RW;                                         /* 0x010 */
        u64 mfc_vr_RO;                                          /* 0x018 */