system.c: runtime base address

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

diff --git a/arch/arm/mach-mx1/generic.c b/arch/arm/mach-mx1/generic.c
index 7622c9b..bbb6c7b 100644 (file)
--- a/arch/arm/mach-mx1/generic.c
+++ b/arch/arm/mach-mx1/generic.c
@@ -41,6 +41,7 @@ static struct map_desc imx_io_desc[] __initdata = {
 void __init mx1_map_io(void)
 {
        mxc_set_cpu_type(MXC_CPU_MX1);
+       mxc_arch_reset_init(IO_ADDRESS(WDT_BASE_ADDR));
 
        iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
 }

diff --git a/arch/arm/mach-mx2/generic.c b/arch/arm/mach-mx2/generic.c
index 169372f..bdc5a6e 100644 (file)
--- a/arch/arm/mach-mx2/generic.c
+++ b/arch/arm/mach-mx2/generic.c
@@ -72,6 +72,7 @@ static struct map_desc mxc_io_desc[] __initdata = {
 void __init mx21_map_io(void)
 {
        mxc_set_cpu_type(MXC_CPU_MX21);
+       mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
 
        iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
 }
@@ -79,6 +80,7 @@ void __init mx21_map_io(void)
 void __init mx27_map_io(void)
 {
        mxc_set_cpu_type(MXC_CPU_MX27);
+       mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
 
        iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
 }

diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c
index 1f5fdd4..f0d5ae5 100644 (file)
--- a/arch/arm/mach-mx3/mm.c
+++ b/arch/arm/mach-mx3/mm.c
@@ -75,6 +75,7 @@ static struct map_desc mxc_io_desc[] __initdata = {
 void __init mx31_map_io(void)
 {
        mxc_set_cpu_type(MXC_CPU_MX31);
+       mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
 
        iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
 }
@@ -82,6 +83,7 @@ void __init mx31_map_io(void)
 void __init mx35_map_io(void)
 {
        mxc_set_cpu_type(MXC_CPU_MX35);
+       mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
 
        iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
 }

diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 1c48aef..1dc31d6 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -29,5 +29,6 @@ extern int mx35_clocks_init(void);
 extern int mxc_register_gpios(void);
 extern int mxc_register_device(struct platform_device *pdev, void *data);
 extern void mxc_set_cpu_type(unsigned int type);
+extern void mxc_arch_reset_init(void __iomem *);
 
 #endif

diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 79c3757..15e3053 100644 (file)
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -30,29 +30,28 @@
 #include <asm/proc-fns.h>
 #include <asm/system.h>
 
-#ifdef CONFIG_ARCH_MX1
-#define WDOG_WCR_REG           IO_ADDRESS(WDT_BASE_ADDR)
-#define WDOG_WCR_ENABLE                (1 << 0)
-#else
-#define WDOG_WCR_REG           IO_ADDRESS(WDOG_BASE_ADDR)
-#define WDOG_WCR_ENABLE                (1 << 2)
-#endif
+static void __iomem *wdog_base;
 
 /*
  * Reset the system. It is called by machine_restart().
  */
 void arch_reset(char mode, const char *cmd)
 {
-       if (!cpu_is_mx1()) {
+       unsigned int wcr_enable;
+
+       if (cpu_is_mx1()) {
+               wcr_enable = (1 << 0);
+       } else {
                struct clk *clk;
 
                clk = clk_get_sys("imx-wdt.0", NULL);
                if (!IS_ERR(clk))
                        clk_enable(clk);
+               wcr_enable = (1 << 2);
        }
 
        /* Assert SRS signal */
-       __raw_writew(WDOG_WCR_ENABLE, WDOG_WCR_REG);
+       __raw_writew(wcr_enable, wdog_base);
 
        /* wait for reset to assert... */
        mdelay(500);
@@ -65,3 +64,8 @@ void arch_reset(char mode, const char *cmd)
        /* we'll take a jump through zero as a poor second */
        cpu_reset(0);
 }
+
+void mxc_arch_reset_init(void __iomem *base)
+{
+       wdog_base = base;
+}