[S390] s390: fix single stepping on svc0
authorChristian Borntraeger <borntraeger@de.ibm.com>
Fri, 13 Nov 2009 14:43:54 +0000 (15:43 +0100)
committerMartin Schwidefsky <sky@mschwide.boeblingen.de.ibm.com>
Fri, 13 Nov 2009 14:45:03 +0000 (15:45 +0100)
On s390 there are two ways of specifying the system call number for
the svc instruction. The standard way is to use the immediate field
in the instruction (or to use EXecute for values unknown during
assemble time). This can encode 256 system calls.
The kernel ABI also allows to put the system call number in r1 and
then execute svc 0 to enable system call numbers > 255.

It turns out that single stepping svc 0 is broken, since the PER
program check handler uses r1. We have to use a different register.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
arch/s390/kernel/entry.S
arch/s390/kernel/entry64.S

index f43d2ee..48215d1 100644 (file)
@@ -565,10 +565,10 @@ pgm_svcper:
        lh      %r7,0x8a                # get svc number from lowcore
        l       %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
        TRACE_IRQS_OFF
-       l       %r1,__TI_task(%r9)
-       mvc     __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
-       mvc     __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
-       mvc     __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
+       l       %r8,__TI_task(%r9)
+       mvc     __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
+       mvc     __THREAD_per+__PER_address(4,%r8),__LC_PER_ADDRESS
+       mvc     __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
        oi      __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
        TRACE_IRQS_ON
        stosm   __SF_EMPTY(%r15),0x03   # reenable interrupts
index a6f7b20..9aff1d4 100644 (file)
@@ -543,10 +543,10 @@ pgm_svcper:
        mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
        llgh    %r7,__LC_SVC_INT_CODE   # get svc number from lowcore
        lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
-       lg      %r1,__TI_task(%r9)
-       mvc     __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
-       mvc     __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
-       mvc     __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
+       lg      %r8,__TI_task(%r9)
+       mvc     __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
+       mvc     __THREAD_per+__PER_address(8,%r8),__LC_PER_ADDRESS
+       mvc     __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
        oi      __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
        TRACE_IRQS_ON
        stosm   __SF_EMPTY(%r15),0x03   # reenable interrupts