V4L/DVB (6856): zl10353: improve tuning parameters and update register map

Some more I2C traces and a experimentation with register values on
both the ZL10353 and MT352 mean that I can now guess at what more
of the ZL10353 registers do.

Guess at the registers' names (based on the equivalent names in MT352)
and update set_parameters/get_parameters with the new knowledge.

Signed-off-by: Chris Pascoe <c.pascoe@itee.uq.edu.au>
Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>

diff --git a/drivers/media/dvb/frontends/zl10353.c b/drivers/media/dvb/frontends/zl10353.c
index e874ec8..276e3b6 100644 (file)
--- a/drivers/media/dvb/frontends/zl10353.c
+++ b/drivers/media/dvb/frontends/zl10353.c
@@ -36,6 +36,8 @@ struct zl10353_state {
        struct dvb_frontend frontend;
 
        struct zl10353_config config;
+
+       enum fe_bandwidth bandwidth;
 };
 
 static int debug;
@@ -195,27 +197,156 @@ static int zl10353_set_parameters(struct dvb_frontend *fe,
 {
        struct zl10353_state *state = fe->demodulator_priv;
        u16 nominal_rate, input_freq;
-       u8 pllbuf[6] = { 0x67 };
+       u8 pllbuf[6] = { 0x67 }, acq_ctl = 0;
+       u16 tps = 0;
+       struct dvb_ofdm_parameters *op = &param->u.ofdm;
 
-       /* These settings set "auto-everything" and start the FSM. */
-       zl10353_single_write(fe, 0x55, 0x80);
+       zl10353_single_write(fe, RESET, 0x80);
        udelay(200);
        zl10353_single_write(fe, 0xEA, 0x01);
        udelay(200);
        zl10353_single_write(fe, 0xEA, 0x00);
 
-       zl10353_single_write(fe, 0x56, 0x28);
-       zl10353_single_write(fe, 0x89, 0x20);
-       zl10353_single_write(fe, 0x5E, 0x00);
+       zl10353_single_write(fe, AGC_TARGET, 0x28);
+
+       if (op->transmission_mode != TRANSMISSION_MODE_AUTO)
+               acq_ctl |= (1 << 0);
+       if (op->guard_interval != GUARD_INTERVAL_AUTO)
+               acq_ctl |= (1 << 1);
+       zl10353_single_write(fe, ACQ_CTL, acq_ctl);
 
-       zl10353_calc_nominal_rate(fe, param->u.ofdm.bandwidth, &nominal_rate);
+       switch (op->bandwidth) {
+       case BANDWIDTH_6_MHZ:
+               /* These are extrapolated from the 7 and 8MHz values */
+               zl10353_single_write(fe, MCLK_RATIO, 0x97);
+               zl10353_single_write(fe, 0x64, 0x34);
+               break;
+       case BANDWIDTH_7_MHZ:
+               zl10353_single_write(fe, MCLK_RATIO, 0x86);
+               zl10353_single_write(fe, 0x64, 0x35);
+               break;
+       case BANDWIDTH_8_MHZ:
+       default:
+               zl10353_single_write(fe, MCLK_RATIO, 0x75);
+               zl10353_single_write(fe, 0x64, 0x36);
+       }
+
+       zl10353_calc_nominal_rate(fe, op->bandwidth, &nominal_rate);
        zl10353_single_write(fe, TRL_NOMINAL_RATE_1, msb(nominal_rate));
        zl10353_single_write(fe, TRL_NOMINAL_RATE_0, lsb(nominal_rate));
+       state->bandwidth = op->bandwidth;
 
        zl10353_calc_input_freq(fe, &input_freq);
        zl10353_single_write(fe, INPUT_FREQ_1, msb(input_freq));
        zl10353_single_write(fe, INPUT_FREQ_0, lsb(input_freq));
 
+       /* Hint at TPS settings */
+       switch (op->code_rate_HP) {
+       case FEC_2_3:
+               tps |= (1 << 7);
+               break;
+       case FEC_3_4:
+               tps |= (2 << 7);
+               break;
+       case FEC_5_6:
+               tps |= (3 << 7);
+               break;
+       case FEC_7_8:
+               tps |= (4 << 7);
+               break;
+       case FEC_1_2:
+       case FEC_AUTO:
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       switch (op->code_rate_LP) {
+       case FEC_2_3:
+               tps |= (1 << 4);
+               break;
+       case FEC_3_4:
+               tps |= (2 << 4);
+               break;
+       case FEC_5_6:
+               tps |= (3 << 4);
+               break;
+       case FEC_7_8:
+               tps |= (4 << 4);
+               break;
+       case FEC_1_2:
+       case FEC_AUTO:
+               break;
+       case FEC_NONE:
+               if (op->hierarchy_information == HIERARCHY_AUTO ||
+                   op->hierarchy_information == HIERARCHY_NONE)
+                       break;
+       default:
+               return -EINVAL;
+       }
+
+       switch (op->constellation) {
+       case QPSK:
+               break;
+       case QAM_AUTO:
+       case QAM_16:
+               tps |= (1 << 13);
+               break;
+       case QAM_64:
+               tps |= (2 << 13);
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       switch (op->transmission_mode) {
+       case TRANSMISSION_MODE_2K:
+       case TRANSMISSION_MODE_AUTO:
+               break;
+       case TRANSMISSION_MODE_8K:
+               tps |= (1 << 0);
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       switch (op->guard_interval) {
+       case GUARD_INTERVAL_1_32:
+       case GUARD_INTERVAL_AUTO:
+               break;
+       case GUARD_INTERVAL_1_16:
+               tps |= (1 << 2);
+               break;
+       case GUARD_INTERVAL_1_8:
+               tps |= (2 << 2);
+               break;
+       case GUARD_INTERVAL_1_4:
+               tps |= (3 << 2);
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       switch (op->hierarchy_information) {
+       case HIERARCHY_AUTO:
+       case HIERARCHY_NONE:
+               break;
+       case HIERARCHY_1:
+               tps |= (1 << 10);
+               break;
+       case HIERARCHY_2:
+               tps |= (2 << 10);
+               break;
+       case HIERARCHY_4:
+               tps |= (3 << 10);
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       zl10353_single_write(fe, TPS_GIVEN_1, msb(tps));
+       zl10353_single_write(fe, TPS_GIVEN_0, lsb(tps));
+
        if (fe->ops.i2c_gate_ctrl)
                fe->ops.i2c_gate_ctrl(fe, 0);
 
@@ -244,12 +375,97 @@ static int zl10353_set_parameters(struct dvb_frontend *fe,
        else
                zl10353_single_write(fe, TUNER_GO, 0x01);
 
-       udelay(250);
-       zl10353_single_write(fe, 0xE4, 0x00);
-       zl10353_single_write(fe, 0xE5, 0x2A);
-       zl10353_single_write(fe, 0xE9, 0x02);
-       zl10353_single_write(fe, 0xE7, 0x40);
-       zl10353_single_write(fe, 0xE8, 0x10);
+       return 0;
+}
+
+static int zl10353_get_parameters(struct dvb_frontend *fe,
+                                 struct dvb_frontend_parameters *param)
+{
+       struct zl10353_state *state = fe->demodulator_priv;
+       struct dvb_ofdm_parameters *op = &param->u.ofdm;
+       int s6, s9;
+       u16 tps;
+       static const u8 tps_fec_to_api[8] = {
+               FEC_1_2,
+               FEC_2_3,
+               FEC_3_4,
+               FEC_5_6,
+               FEC_7_8,
+               FEC_AUTO,
+               FEC_AUTO,
+               FEC_AUTO
+       };
+
+       s6 = zl10353_read_register(state, STATUS_6);
+       s9 = zl10353_read_register(state, STATUS_9);
+       if (s6 < 0 || s9 < 0)
+               return -EREMOTEIO;
+       if ((s6 & (1 << 5)) == 0 || (s9 & (1 << 4)) == 0)
+               return -EINVAL; /* no FE or TPS lock */
+
+       tps = zl10353_read_register(state, TPS_RECEIVED_1) << 8 |
+             zl10353_read_register(state, TPS_RECEIVED_0);
+
+       op->code_rate_HP = tps_fec_to_api[(tps >> 7) & 7];
+       op->code_rate_LP = tps_fec_to_api[(tps >> 4) & 7];
+
+       switch ((tps >> 13) & 3) {
+       case 0:
+               op->constellation = QPSK;
+               break;
+       case 1:
+               op->constellation = QAM_16;
+               break;
+       case 2:
+               op->constellation = QAM_64;
+               break;
+       default:
+               op->constellation = QAM_AUTO;
+               break;
+       }
+
+       op->transmission_mode = (tps & 0x01) ? TRANSMISSION_MODE_8K :
+                                              TRANSMISSION_MODE_2K;
+
+       switch ((tps >> 2) & 3) {
+       case 0:
+               op->guard_interval = GUARD_INTERVAL_1_32;
+               break;
+       case 1:
+               op->guard_interval = GUARD_INTERVAL_1_16;
+               break;
+       case 2:
+               op->guard_interval = GUARD_INTERVAL_1_8;
+               break;
+       case 3:
+               op->guard_interval = GUARD_INTERVAL_1_4;
+               break;
+       default:
+               op->guard_interval = GUARD_INTERVAL_AUTO;
+               break;
+       }
+
+       switch ((tps >> 10) & 7) {
+       case 0:
+               op->hierarchy_information = HIERARCHY_NONE;
+               break;
+       case 1:
+               op->hierarchy_information = HIERARCHY_1;
+               break;
+       case 2:
+               op->hierarchy_information = HIERARCHY_2;
+               break;
+       case 3:
+               op->hierarchy_information = HIERARCHY_4;
+               break;
+       default:
+               op->hierarchy_information = HIERARCHY_AUTO;
+               break;
+       }
+
+       param->frequency = 0;
+       op->bandwidth = state->bandwidth;
+       param->inversion = INVERSION_AUTO;
 
        return 0;
 }
@@ -438,6 +654,7 @@ static struct dvb_frontend_ops zl10353_ops = {
        .write = zl10353_write,
 
        .set_frontend = zl10353_set_parameters,
+       .get_frontend = zl10353_get_parameters,
        .get_tune_settings = zl10353_get_tune_settings,
 
        .read_status = zl10353_read_status,

diff --git a/drivers/media/dvb/frontends/zl10353_priv.h b/drivers/media/dvb/frontends/zl10353_priv.h
index fcad922..055ff1f 100644 (file)
--- a/drivers/media/dvb/frontends/zl10353_priv.h
+++ b/drivers/media/dvb/frontends/zl10353_priv.h
@@ -46,13 +46,28 @@ enum zl10353_reg_addr {
        RS_ERR_CNT_0       = 0x13,
        RS_UBC_1           = 0x14,
        RS_UBC_0           = 0x15,
+       TPS_RECEIVED_1     = 0x1D,
+       TPS_RECEIVED_0     = 0x1E,
+       TPS_CURRENT_1      = 0x1F,
+       TPS_CURRENT_0      = 0x20,
+       RESET              = 0x55,
+       AGC_TARGET         = 0x56,
+       MCLK_RATIO         = 0x5C,
+       ACQ_CTL            = 0x5E,
        TRL_NOMINAL_RATE_1 = 0x65,
        TRL_NOMINAL_RATE_0 = 0x66,
        INPUT_FREQ_1       = 0x6C,
        INPUT_FREQ_0       = 0x6D,
+       TPS_GIVEN_1        = 0x6E,
+       TPS_GIVEN_0        = 0x6F,
        TUNER_GO           = 0x70,
        FSM_GO             = 0x71,
        CHIP_ID            = 0x7F,
+       CHAN_STEP_1        = 0xE4,
+       CHAN_STEP_0        = 0xE5,
+       OFDM_LOCK_TIME     = 0xE7,
+       FEC_LOCK_TIME      = 0xE8,
+       ACQ_DELAY          = 0xE9,
 };
 
 #endif                          /* _ZL10353_PRIV_ */