OMAP3: Setup MUX settings for SDRC CKE signals
authorJean Pihet <jpihet@mvista.com>
Sat, 25 Jul 2009 01:43:25 +0000 (19:43 -0600)
committerpaul <paul@twilight.(none)>
Sat, 25 Jul 2009 01:43:25 +0000 (19:43 -0600)
This patches ensures the MUX settings are correct for the SDRC
CKE signals to SDRAM. This allows the self-refresh to work when
2 chip-selects are in use.

A warning is thrown away in case the initial muxing is incorrect,
in order to track faulty or old-dated bootloaders.
Note: The CONFIG_OMAP_MUX and CONFIG_OMAP_MUX_WARNINGS options
must be enabled for the mux code to have effect.

Signed-off-by: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/board-omap3beagle.c
arch/arm/mach-omap2/board-omap3pandora.c
arch/arm/mach-omap2/board-overo.c
arch/arm/mach-omap2/board-rx51.c
arch/arm/mach-omap2/mux.c
arch/arm/plat-omap/include/mach/mux.h

index 4abefd9..e00ba12 100644 (file)
@@ -409,6 +409,10 @@ static void __init omap3_beagle_init(void)
 
        usb_musb_init();
        omap3beagle_flash_init();
+
+       /* Ensure SDRC pins are mux'd for self-refresh */
+       omap_cfg_reg(H16_34XX_SDRC_CKE0);
+       omap_cfg_reg(H17_34XX_SDRC_CKE1);
 }
 
 static void __init omap3_beagle_map_io(void)
index 9b991ce..864ee3d 100644 (file)
@@ -40,6 +40,7 @@
 #include <mach/mcspi.h>
 #include <mach/usb.h>
 #include <mach/keypad.h>
+#include <mach/mux.h>
 
 #include "sdram-micron-mt46h32m32lf-6.h"
 #include "mmc-twl4030.h"
@@ -398,6 +399,10 @@ static void __init omap3pandora_init(void)
        omap3pandora_ads7846_init();
        pandora_keys_gpio_init();
        usb_musb_init();
+
+       /* Ensure SDRC pins are mux'd for self-refresh */
+       omap_cfg_reg(H16_34XX_SDRC_CKE0);
+       omap_cfg_reg(H17_34XX_SDRC_CKE1);
 }
 
 static void __init omap3pandora_map_io(void)
index 44bc1c5..6b171b3 100644 (file)
@@ -44,6 +44,7 @@
 #include <mach/gpmc.h>
 #include <mach/hardware.h>
 #include <mach/nand.h>
+#include <mach/mux.h>
 #include <mach/usb.h>
 
 #include "sdram-micron-mt46h32m32lf-6.h"
@@ -396,6 +397,10 @@ static void __init overo_init(void)
        overo_ads7846_init();
        overo_init_smsc911x();
 
+       /* Ensure SDRC pins are mux'd for self-refresh */
+       omap_cfg_reg(H16_34XX_SDRC_CKE0);
+       omap_cfg_reg(H17_34XX_SDRC_CKE1);
+
        if ((gpio_request(OVERO_GPIO_W2W_NRESET,
                          "OVERO_GPIO_W2W_NRESET") == 0) &&
            (gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) {
index 591ae8a..1c9e07f 100644 (file)
@@ -75,6 +75,10 @@ static void __init rx51_init(void)
        omap_serial_init();
        usb_musb_init();
        rx51_peripherals_init();
+
+       /* Ensure SDRC pins are mux'd for self-refresh */
+       omap_cfg_reg(H16_34XX_SDRC_CKE0);
+       omap_cfg_reg(H17_34XX_SDRC_CKE1);
 }
 
 static void __init rx51_map_io(void)
index 026c4fc..43d6b92 100644 (file)
@@ -486,6 +486,12 @@ MUX_CFG_34XX("H19_34XX_GPIO164_OUT", 0x19c,
                OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
 MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6,
                OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
+
+/* OMAP3 SDRC CKE signals to SDR/DDR ram chips */
+MUX_CFG_34XX("H16_34XX_SDRC_CKE0", 0x262,
+               OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
+MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264,
+               OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
 };
 
 #define OMAP34XX_PINS_SZ       ARRAY_SIZE(omap34xx_pins)
index 85a6217..80281c4 100644 (file)
@@ -853,6 +853,10 @@ enum omap34xx_index {
        AE5_34XX_GPIO143,
        H19_34XX_GPIO164_OUT,
        J25_34XX_GPIO170,
+
+       /* OMAP3 SDRC CKE signals to SDR/DDR ram chips */
+       H16_34XX_SDRC_CKE0,
+       H17_34XX_SDRC_CKE1,
 };
 
 struct omap_mux_cfg {