[MIPS] Cobalt: Fix IRQ comment; the Cobalt kernel uses CP0 counter now.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/include/asm-mips/mach-cobalt/irq.h b/include/asm-mips/mach-cobalt/irq.h
index 179d0e8..57c8c9a 100644 (file)
--- a/include/asm-mips/mach-cobalt/irq.h
+++ b/include/asm-mips/mach-cobalt/irq.h
@@ -35,7 +35,7 @@
  *     4 - ethernet
  *     5 - 16550 UART
  *     6 - cascade i8259
- *     7 - CP0 counter (unused)
+ *     7 - CP0 counter
  */
 #define MIPS_CPU_IRQ_BASE              16
 
@@ -48,7 +48,6 @@
 #define SCSI_IRQ                       (MIPS_CPU_IRQ_BASE + 5)
 #define I8259_CASCADE_IRQ              (MIPS_CPU_IRQ_BASE + 6)
 
-
 #define GT641XX_IRQ_BASE               24
 
 #include <asm/irq_gt641xx.h>