MXC iomux-v3: Fix defines for PAD_CTL registers

The old defines leaked in from an old version of the patch.
Change the defines to match the register layout of the iomuxer.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h
index 7cd8454..cd06df9 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/iomux-v3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h
@@ -68,28 +68,24 @@ struct pad_desc {
 /*
  * Use to set PAD control
  */
-#define PAD_CTL_DRIVE_VOLTAGE_3_3_V    0
-#define PAD_CTL_DRIVE_VOLTAGE_1_8_V    1
 
-#define PAD_CTL_NO_HYSTERESIS          0
-#define PAD_CTL_HYSTERESIS             1
+#define PAD_CTL_DVS                    (1 << 13)
+#define PAD_CTL_HYS                    (1 << 8)
 
-#define PAD_CTL_PULL_DISABLED          0x0
-#define PAD_CTL_PULL_KEEPER            0xa
-#define PAD_CTL_PULL_DOWN_100K         0xc
-#define PAD_CTL_PULL_UP_47K            0xd
-#define PAD_CTL_PULL_UP_100K           0xe
-#define PAD_CTL_PULL_UP_22K            0xf
+#define PAD_CTL_PKE                    (1 << 7)
+#define PAD_CTL_PUE                    (1 << 6)
+#define PAD_CTL_PUS_100K_DOWN          (0 << 4)
+#define PAD_CTL_PUS_47K_UP             (1 << 4)
+#define PAD_CTL_PUS_100K_UP            (2 << 4)
+#define PAD_CTL_PUS_22K_UP             (3 << 4)
 
-#define PAD_CTL_OUTPUT_CMOS            0
-#define PAD_CTL_OUTPUT_OPEN_DRAIN      1
+#define PAD_CTL_ODE                    (1 << 3)
 
-#define PAD_CTL_DRIVE_STRENGTH_NORM    0
-#define PAD_CTL_DRIVE_STRENGTH_HIGH    1
-#define PAD_CTL_DRIVE_STRENGTH_MAX     2
+#define PAD_CTL_DSE_STANDARD           (0 << 1)
+#define PAD_CTL_DSE_HIGH               (1 << 1)
+#define PAD_CTL_DSE_MAX                        (2 << 1)
 
-#define PAD_CTL_SLEW_RATE_SLOW         0
-#define PAD_CTL_SLEW_RATE_FAST         1
+#define PAD_CTL_SRE_FAST               (1 << 0)
 
 /*
  * setups a single pad: