Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt...

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel:
  drm/i915: Select CONFIG_SHMEM
  drm/i915: Fix CRT hotplug detect by checking really no channels attached
  agp/intel: new host bridge support
  drm/i915: Add more registers save/restore for Ironlake suspend
  drm/i915: Fix IRQ stall issue on Ironlake
  drm/i915: HDMI hardware workaround for Ironlake
  drm/i915: Fix and cleanup DPLL calculation for Ironlake
  drm/i915: Avoid potential sleep whilst holding spinlock

diff --combined drivers/char/agp/intel-agp.c
index 10e1f03,1d32d5c..3cb56a0
--- 1/drivers/char/agp/intel-agp.c
--- 2/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@@ -62,6 -62,7 +62,7 @@@
  #define PCI_DEVICE_ID_INTEL_IGDNG_D_IG            0x0042
  #define PCI_DEVICE_ID_INTEL_IGDNG_M_HB            0x0044
  #define PCI_DEVICE_ID_INTEL_IGDNG_MA_HB           0x0062
+ #define PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB    0x006a
  #define PCI_DEVICE_ID_INTEL_IGDNG_M_IG            0x0046
  
  /* cover 915 and 945 variants */
@@@ -96,7 -97,8 +97,8 @@@
                agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_B43_HB || \
                agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_D_HB || \
                agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_M_HB || \
-               agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MA_HB)
+               agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MA_HB || \
+               agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB)
  
  extern int agp_memory_reserved;
  
@@@ -1161,6 -1163,12 +1163,6 @@@ static int intel_i915_configure(void
  
        intel_i9xx_setup_flush();
  
 -#ifdef USE_PCI_DMA_API 
 -      if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36)))
 -              dev_err(&intel_private.pcidev->dev,
 -                      "set gfx device dma mask 36bit failed!\n");
 -#endif
 -
        return 0;
  }
  
@@@ -1358,6 -1366,7 +1360,7 @@@ static void intel_i965_get_gtt_range(in
        case PCI_DEVICE_ID_INTEL_IGDNG_D_HB:
        case PCI_DEVICE_ID_INTEL_IGDNG_M_HB:
        case PCI_DEVICE_ID_INTEL_IGDNG_MA_HB:
+       case PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB:
                *gtt_offset = *gtt_size = MB(2);
                break;
        default:
@@@ -2359,6 -2368,8 +2362,8 @@@ static const struct intel_driver_descri
            "IGDNG/M", NULL, &intel_i965_driver },
        { PCI_DEVICE_ID_INTEL_IGDNG_MA_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,
            "IGDNG/MA", NULL, &intel_i965_driver },
+       { PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB, PCI_DEVICE_ID_INTEL_IGDNG_M_IG, 0,
+           "IGDNG/MC2", NULL, &intel_i965_driver },
        { 0, 0, 0, NULL, NULL, NULL }
  };
  
@@@ -2450,11 -2461,6 +2455,11 @@@ static int __devinit agp_intel_probe(st
                                &bridge->mode);
        }
  
 +      if (bridge->driver->mask_memory == intel_i965_mask_memory)
 +              if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36)))
 +                      dev_err(&intel_private.pcidev->dev,
 +                              "set gfx device dma mask 36bit failed!\n");
 +
        pci_set_drvdata(pdev, bridge);
        return agp_add_bridge(bridge);
  }
@@@ -2560,6 -2566,7 +2565,7 @@@ static struct pci_device_id agp_intel_p
        ID(PCI_DEVICE_ID_INTEL_IGDNG_D_HB),
        ID(PCI_DEVICE_ID_INTEL_IGDNG_M_HB),
        ID(PCI_DEVICE_ID_INTEL_IGDNG_MA_HB),
+       ID(PCI_DEVICE_ID_INTEL_IGDNG_MC2_HB),
        { }
  };