drm/radeon/kms: remove HDP flushes from fence emit (v2)
authorAlex Deucher <alexdeucher@gmail.com>
Thu, 11 Feb 2010 15:47:52 +0000 (10:47 -0500)
committerDave Airlie <airlied@redhat.com>
Thu, 18 Feb 2010 04:31:56 +0000 (14:31 +1000)
r600_ioctl_wait_idle() now handles this.

v2: update blit fence counts

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/r600.c
drivers/gpu/drm/radeon/r600_blit_kms.c

index 6434d6a..f040ee6 100644 (file)
@@ -1804,8 +1804,6 @@ void r600_fence_ring_emit(struct radeon_device *rdev,
        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1));
        radeon_ring_write(rdev, ((rdev->fence_drv.scratch_reg - PACKET3_SET_CONFIG_REG_OFFSET) >> 2));
        radeon_ring_write(rdev, fence->seq);
-       radeon_ring_write(rdev, PACKET0(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0));
-       radeon_ring_write(rdev, 1);
        /* CP_INTERRUPT packet 3 no longer exists, use packet 0 */
        radeon_ring_write(rdev, PACKET0(CP_INT_STATUS, 0));
        radeon_ring_write(rdev, RB_INT_STAT);
index ec49dad..de8bbbc 100644 (file)
@@ -576,9 +576,9 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes)
        ring_size = num_loops * dwords_per_loop;
        /* set default  + shaders */
        ring_size += 40; /* shaders + def state */
-       ring_size += 12; /* fence emit for VB IB */
+       ring_size += 10; /* fence emit for VB IB */
        ring_size += 5; /* done copy */
-       ring_size += 12; /* fence emit for done copy */
+       ring_size += 10; /* fence emit for done copy */
        r = radeon_ring_lock(rdev, ring_size);
        if (r)
                return r;