ath9k_hw: update EEPROM data structure for AR9280

Adds read access for the 5 GHz fast clock flag

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

diff --git a/drivers/net/wireless/ath/ath9k/eeprom.h b/drivers/net/wireless/ath/ath9k/eeprom.h
index fb9c8c9..21354c1 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
@@ -300,7 +300,8 @@ struct base_eep_header {
        u32 binBuildNumber;
        u8 deviceType;
        u8 pwdclkind;
-       u8 futureBase_1[2];
+       u8 fastClk5g;
+       u8 divChain;
        u8 rxGainType;
        u8 dacHiPwrMode_5G;
        u8 openLoopPwrCntl;

diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c
index cf59799..e591ad6 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
@@ -274,6 +274,8 @@ static u32 ath9k_hw_def_get_eeprom(struct ath_hw *ah,
                return pBase->txMask;
        case EEP_RX_MASK:
                return pBase->rxMask;
+       case EEP_FSTCLK_5G:
+               return pBase->fastClk5g;
        case EEP_RXGAIN_TYPE:
                return pBase->rxGainType;
        case EEP_TXGAIN_TYPE: