drm/radeon/kms: fix divide by 0 in clocks code
authorDave Airlie <airlied@redhat.com>
Mon, 30 Nov 2009 23:13:40 +0000 (09:13 +1000)
committerDave Airlie <airlied@redhat.com>
Wed, 2 Dec 2009 01:37:16 +0000 (11:37 +1000)
If the chip isn't initialised properly this can happen.
also fix return value in combios clocks function.

Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/radeon_clocks.c
drivers/gpu/drm/radeon/radeon_combios.c

index a813541..2c541e0 100644 (file)
@@ -44,6 +44,10 @@ uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev)
 
        ref_div =
            RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK;
+
+       if (ref_div == 0)
+               return 0;
+
        sclk = fb_div / ref_div;
 
        post_div = RREG32_PLL(RADEON_SCLK_CNTL) & RADEON_SCLK_SRC_SEL_MASK;
@@ -70,6 +74,10 @@ static uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev)
 
        ref_div =
            RREG32_PLL(RADEON_M_SPLL_REF_FB_DIV) & RADEON_M_SPLL_REF_DIV_MASK;
+
+       if (ref_div == 0)
+               return 0;
+
        mclk = fb_div / ref_div;
 
        post_div = RREG32_PLL(RADEON_MCLK_CNTL) & 0x7;
index adc4743..14d3555 100644 (file)
@@ -495,7 +495,7 @@ bool radeon_combios_get_clock_info(struct drm_device *dev)
        uint16_t sclk, mclk;
 
        if (rdev->bios == NULL)
-               return NULL;
+               return false;
 
        pll_info = combios_get_table_offset(dev, COMBIOS_PLL_INFO_TABLE);
        if (pll_info) {