powerpc: Document FSL eSDHC bindings
authorAnton Vorontsov <avorontsov@ru.mvista.com>
Thu, 5 Feb 2009 19:04:47 +0000 (22:04 +0300)
committerKumar Gala <galak@kernel.crashing.org>
Fri, 6 Feb 2009 16:48:44 +0000 (10:48 -0600)
This patch documents OF bindings for the Freescale Enhanced Secure
Digital Host Controller.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Documentation/powerpc/dts-bindings/fsl/esdhc.txt [new file with mode: 0644]

diff --git a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
new file mode 100644 (file)
index 0000000..6008465
--- /dev/null
@@ -0,0 +1,24 @@
+* Freescale Enhanced Secure Digital Host Controller (eSDHC)
+
+The Enhanced Secure Digital Host Controller provides an interface
+for MMC, SD, and SDIO types of memory cards.
+
+Required properties:
+  - compatible : should be
+    "fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors.
+    "fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors.
+  - reg : should contain eSDHC registers location and length.
+  - interrupts : should contain eSDHC interrupt.
+  - interrupt-parent : interrupt source phandle.
+  - clock-frequency : specifies eSDHC base clock frequency.
+
+Example:
+
+sdhci@2e000 {
+       compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
+       reg = <0x2e000 0x1000>;
+       interrupts = <42 0x8>;
+       interrupt-parent = <&ipic>;
+       /* Filled in by U-Boot */
+       clock-frequency = <0>;
+};