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   1 /* sound/soc/s3c24xx/s3c2412-i2s.c
   2  *
   3  * ALSA Soc Audio Layer - S3C2412 I2S driver
   4  *
   5  * Copyright (c) 2006 Wolfson Microelectronics PLC.
   6  *      Graeme Gregory graeme.gregory@wolfsonmicro.com
   7  *      linux@wolfsonmicro.com
   8  *
   9  * Copyright (c) 2007, 2004-2005 Simtec Electronics
  10  *      http://armlinux.simtec.co.uk/
  11  *      Ben Dooks <ben@simtec.co.uk>
  12  *
  13  * This program is free software; you can redistribute  it and/or modify it
  14  * under  the terms of  the GNU General  Public License as published by the
  15  * Free Software Foundation;  either version 2 of the  License, or (at your
  16  * option) any later version.
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/module.h>
  21 #include <linux/device.h>
  22 #include <linux/delay.h>
  23 #include <linux/gpio.h>
  24 #include <linux/clk.h>
  25 #include <linux/kernel.h>
  26 #include <linux/io.h>
  27
  28 #include <sound/core.h>
  29 #include <sound/pcm.h>
  30 #include <sound/pcm_params.h>
  31 #include <sound/initval.h>
  32 #include <sound/soc.h>
  33 #include <mach/hardware.h>
  34
  35 #include <mach/regs-gpio.h>
  36 #include <mach/dma.h>
  37
  38 #include "s3c-dma.h"
  39 #include "regs-i2s-v2.h"
  40 #include "s3c2412-i2s.h"
  41
  42 #define S3C2412_I2S_DEBUG 0
  43
  44 static struct s3c2410_dma_client s3c2412_dma_client_out = {
  45         .name           = "I2S PCM Stereo out"
  46 };
  47
  48 static struct s3c2410_dma_client s3c2412_dma_client_in = {
  49         .name           = "I2S PCM Stereo in"
  50 };
  51
  52 static struct s3c_dma_params s3c2412_i2s_pcm_stereo_out = {
  53         .client         = &s3c2412_dma_client_out,
  54         .channel        = DMACH_I2S_OUT,
  55         .dma_addr       = S3C2410_PA_IIS + S3C2412_IISTXD,
  56         .dma_size       = 4,
  57 };
  58
  59 static struct s3c_dma_params s3c2412_i2s_pcm_stereo_in = {
  60         .client         = &s3c2412_dma_client_in,
  61         .channel        = DMACH_I2S_IN,
  62         .dma_addr       = S3C2410_PA_IIS + S3C2412_IISRXD,
  63         .dma_size       = 4,
  64 };
  65
  66 static struct s3c_i2sv2_info s3c2412_i2s;
  67
  68 static inline struct s3c_i2sv2_info *to_info(struct snd_soc_dai *cpu_dai)
  69 {
  70         return cpu_dai->private_data;
  71 }
  72
  73 static int s3c2412_i2s_probe(struct platform_device *pdev,
  74                              struct snd_soc_dai *dai)
  75 {
  76         int ret;
  77
  78         pr_debug("Entered %s\n", __func__);
  79
  80         ret = s3c_i2sv2_probe(pdev, dai, &s3c2412_i2s, S3C2410_PA_IIS);
  81         if (ret)
  82                 return ret;
  83
  84         s3c2412_i2s.dma_capture = &s3c2412_i2s_pcm_stereo_in;
  85         s3c2412_i2s.dma_playback = &s3c2412_i2s_pcm_stereo_out;
  86
  87         s3c2412_i2s.iis_cclk = clk_get(&pdev->dev, "i2sclk");
  88         if (s3c2412_i2s.iis_cclk == NULL) {
  89                 pr_err("failed to get i2sclk clock\n");
  90                 iounmap(s3c2412_i2s.regs);
  91                 return -ENODEV;
  92         }
  93
  94         /* Set MPLL as the source for IIS CLK */
  95
  96         clk_set_parent(s3c2412_i2s.iis_cclk, clk_get(NULL, "mpll"));
  97         clk_enable(s3c2412_i2s.iis_cclk);
  98
  99         s3c2412_i2s.iis_cclk = s3c2412_i2s.iis_pclk;
 100
 101         /* Configure the I2S pins in correct mode */
 102         s3c2410_gpio_cfgpin(S3C2410_GPE0, S3C2410_GPE0_I2SLRCK);
 103         s3c2410_gpio_cfgpin(S3C2410_GPE1, S3C2410_GPE1_I2SSCLK);
 104         s3c2410_gpio_cfgpin(S3C2410_GPE2, S3C2410_GPE2_CDCLK);
 105         s3c2410_gpio_cfgpin(S3C2410_GPE3, S3C2410_GPE3_I2SSDI);
 106         s3c2410_gpio_cfgpin(S3C2410_GPE4, S3C2410_GPE4_I2SSDO);
 107
 108         return 0;
 109 }
 110
 111 static int s3c2412_i2s_hw_params(struct snd_pcm_substream *substream,
 112                                  struct snd_pcm_hw_params *params,
 113                                  struct snd_soc_dai *cpu_dai)
 114 {
 115         struct s3c_i2sv2_info *i2s = to_info(cpu_dai);
 116         struct s3c_dma_params *dma_data;
 117         u32 iismod;
 118
 119         pr_debug("Entered %s\n", __func__);
 120
 121         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 122                 dma_data = i2s->dma_playback;
 123         else
 124                 dma_data = i2s->dma_capture;
 125
 126         snd_soc_dai_set_dma_data(cpu_dai, substream, dma_data);
 127
 128         iismod = readl(i2s->regs + S3C2412_IISMOD);
 129         pr_debug("%s: r: IISMOD: %x\n", __func__, iismod);
 130
 131         switch (params_format(params)) {
 132         case SNDRV_PCM_FORMAT_S8:
 133                 iismod |= S3C2412_IISMOD_8BIT;
 134                 break;
 135         case SNDRV_PCM_FORMAT_S16_LE:
 136                 iismod &= ~S3C2412_IISMOD_8BIT;
 137                 break;
 138         }
 139
 140         writel(iismod, i2s->regs + S3C2412_IISMOD);
 141         pr_debug("%s: w: IISMOD: %x\n", __func__, iismod);
 142
 143         return 0;
 144 }
 145
 146 #define S3C2412_I2S_RATES \
 147         (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \
 148         SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
 149         SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
 150
 151 static struct snd_soc_dai_ops s3c2412_i2s_dai_ops = {
 152         .hw_params      = s3c2412_i2s_hw_params,
 153 };
 154
 155 struct snd_soc_dai s3c2412_i2s_dai = {
 156         .name           = "s3c2412-i2s",
 157         .id             = 0,
 158         .probe          = s3c2412_i2s_probe,
 159         .playback = {
 160                 .channels_min   = 2,
 161                 .channels_max   = 2,
 162                 .rates          = S3C2412_I2S_RATES,
 163                 .formats        = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE,
 164         },
 165         .capture = {
 166                 .channels_min   = 2,
 167                 .channels_max   = 2,
 168                 .rates          = S3C2412_I2S_RATES,
 169                 .formats        = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE,
 170         },
 171         .ops = &s3c2412_i2s_dai_ops,
 172 };
 173 EXPORT_SYMBOL_GPL(s3c2412_i2s_dai);
 174
 175 static int __init s3c2412_i2s_init(void)
 176 {
 177         return  s3c_i2sv2_register_dai(&s3c2412_i2s_dai);
 178 }
 179 module_init(s3c2412_i2s_init);
 180
 181 static void __exit s3c2412_i2s_exit(void)
 182 {
 183         snd_soc_unregister_dai(&s3c2412_i2s_dai);
 184 }
 185 module_exit(s3c2412_i2s_exit);
 186
 187 /* Module information */
 188 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
 189 MODULE_DESCRIPTION("S3C2412 I2S SoC Interface");
 190 MODULE_LICENSE("GPL");