[ALSA] Add PCXHR driver
[safe/jmp/linux-2.6] / sound / pci / pcxhr / pcxhr.c
1 /*
2  * Driver for Digigram pcxhr compatible soundcards
3  *
4  * main file with alsa callbacks
5  *
6  * Copyright (c) 2004 by Digigram <alsa@digigram.com>
7  *
8  *   This program is free software; you can redistribute it and/or modify
9  *   it under the terms of the GNU General Public License as published by
10  *   the Free Software Foundation; either version 2 of the License, or
11  *   (at your option) any later version.
12  *
13  *   This program is distributed in the hope that it will be useful,
14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *   GNU General Public License for more details.
17  *
18  *   You should have received a copy of the GNU General Public License
19  *   along with this program; if not, write to the Free Software
20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
21  */
22
23
24 #include <sound/driver.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/slab.h>
28 #include <linux/pci.h>
29 #include <linux/delay.h>
30 #include <linux/moduleparam.h>
31 #include <sound/core.h>
32 #include <sound/initval.h>
33 #include <sound/info.h>
34 #include <sound/control.h>
35 #include <sound/pcm.h>
36 #include <sound/pcm_params.h>
37 #include "pcxhr.h"
38 #include "pcxhr_mixer.h"
39 #include "pcxhr_hwdep.h"
40 #include "pcxhr_core.h"
41
42 #define DRIVER_NAME "pcxhr"
43
44 MODULE_AUTHOR("Markus Bollinger <bollinger@digigram.com>");
45 MODULE_DESCRIPTION("Digigram " DRIVER_NAME " " PCXHR_DRIVER_VERSION_STRING);
46 MODULE_LICENSE("GPL");
47 MODULE_SUPPORTED_DEVICE("{{Digigram," DRIVER_NAME "}}");
48
49 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;              /* Index 0-MAX */
50 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;               /* ID for this card */
51 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
52 static int mono[SNDRV_CARDS];                                   /* capture in mono only */
53
54 module_param_array(index, int, NULL, 0444);
55 MODULE_PARM_DESC(index, "Index value for Digigram " DRIVER_NAME " soundcard");
56 module_param_array(id, charp, NULL, 0444);
57 MODULE_PARM_DESC(id, "ID string for Digigram " DRIVER_NAME " soundcard");
58 module_param_array(enable, bool, NULL, 0444);
59 MODULE_PARM_DESC(enable, "Enable Digigram " DRIVER_NAME " soundcard");
60 module_param_array(mono, bool, NULL, 0444);
61 MODULE_PARM_DESC(mono, "Mono capture mode (default is stereo)");
62
63 enum {
64         PCI_ID_VX882HR,
65         PCI_ID_PCX882HR,
66         PCI_ID_VX881HR,
67         PCI_ID_PCX881HR,
68         PCI_ID_PCX1222HR,
69         PCI_ID_PCX1221HR,
70         PCI_ID_LAST
71 };
72
73 static struct pci_device_id pcxhr_ids[] = {
74         { 0x10b5, 0x9656, 0x1369, 0xb001, 0, 0, PCI_ID_VX882HR, },   /* VX882HR */
75         { 0x10b5, 0x9656, 0x1369, 0xb101, 0, 0, PCI_ID_PCX882HR, },  /* PCX882HR */
76         { 0x10b5, 0x9656, 0x1369, 0xb201, 0, 0, PCI_ID_VX881HR, },   /* VX881HR */
77         { 0x10b5, 0x9656, 0x1369, 0xb301, 0, 0, PCI_ID_PCX881HR, },  /* PCX881HR */
78         { 0x10b5, 0x9656, 0x1369, 0xb501, 0, 0, PCI_ID_PCX1222HR, }, /* PCX1222HR */
79         { 0x10b5, 0x9656, 0x1369, 0xb701, 0, 0, PCI_ID_PCX1221HR, }, /* PCX1221HR */
80         { 0, }
81 };
82
83 MODULE_DEVICE_TABLE(pci, pcxhr_ids);
84
85 struct board_parameters {
86         char* board_name;
87         short playback_chips;
88         short capture_chips;
89         short firmware_num;
90 };
91 static struct board_parameters pcxhr_board_params[] = {
92 [PCI_ID_VX882HR] =      { "VX882HR",   4, 4, 41, },
93 [PCI_ID_PCX882HR] =     { "PCX882HR",  4, 4, 41, },
94 [PCI_ID_VX881HR] =      { "VX881HR",   4, 4, 41, },
95 [PCI_ID_PCX881HR] =     { "PCX881HR",  4, 4, 41, },
96 [PCI_ID_PCX1222HR] =    { "PCX1222HR", 6, 1, 42, },
97 [PCI_ID_PCX1221HR] =    { "PCX1221HR", 6, 1, 42, },
98 };
99
100
101 static int pcxhr_pll_freq_register(unsigned int freq, unsigned int* pllreg,
102                                    unsigned int* realfreq)
103 {
104         unsigned int reg;
105
106         if (freq < 6900 || freq > 110250)
107                 return -EINVAL;
108         reg = (28224000 * 10) / freq;
109         reg = (reg + 5) / 10;
110         if (reg < 0x200)
111                 *pllreg = reg + 0x800;
112         else if (reg < 0x400)
113                 *pllreg = reg & 0x1ff;
114         else if (reg < 0x800) {
115                 *pllreg = ((reg >> 1) & 0x1ff) + 0x200;
116                 reg &= ~1;
117         } else {
118                 *pllreg = ((reg >> 2) & 0x1ff) + 0x400;
119                 reg &= ~3;
120         }
121         if (realfreq)
122                 *realfreq = ((28224000 * 10) / reg + 5) / 10;
123         return 0;
124 }
125
126
127 #define PCXHR_FREQ_REG_MASK             0x1f
128 #define PCXHR_FREQ_QUARTZ_48000         0x00
129 #define PCXHR_FREQ_QUARTZ_24000         0x01
130 #define PCXHR_FREQ_QUARTZ_12000         0x09
131 #define PCXHR_FREQ_QUARTZ_32000         0x08
132 #define PCXHR_FREQ_QUARTZ_16000         0x04
133 #define PCXHR_FREQ_QUARTZ_8000          0x0c
134 #define PCXHR_FREQ_QUARTZ_44100         0x02
135 #define PCXHR_FREQ_QUARTZ_22050         0x0a
136 #define PCXHR_FREQ_QUARTZ_11025         0x06
137 #define PCXHR_FREQ_PLL                  0x05
138 #define PCXHR_FREQ_QUARTZ_192000        0x10
139 #define PCXHR_FREQ_QUARTZ_96000         0x18
140 #define PCXHR_FREQ_QUARTZ_176400        0x14
141 #define PCXHR_FREQ_QUARTZ_88200         0x1c
142 #define PCXHR_FREQ_QUARTZ_128000        0x12
143 #define PCXHR_FREQ_QUARTZ_64000         0x1a
144
145 #define PCXHR_FREQ_WORD_CLOCK           0x0f
146 #define PCXHR_FREQ_SYNC_AES             0x0e
147 #define PCXHR_FREQ_AES_1                0x07
148 #define PCXHR_FREQ_AES_2                0x0b
149 #define PCXHR_FREQ_AES_3                0x03
150 #define PCXHR_FREQ_AES_4                0x0d
151
152 #define PCXHR_MODIFY_CLOCK_S_BIT        0x04
153
154 #define PCXHR_IRQ_TIMER_FREQ            92000
155 #define PCXHR_IRQ_TIMER_PERIOD          48
156
157 static int pcxhr_get_clock_reg(struct pcxhr_mgr *mgr, unsigned int rate,
158                                unsigned int *reg, unsigned int *freq)
159 {
160         unsigned int val, realfreq, pllreg;
161         struct pcxhr_rmh rmh;
162         int err;
163
164         realfreq = rate;
165         switch (mgr->use_clock_type) {
166         case PCXHR_CLOCK_TYPE_INTERNAL :        /* clock by quartz or pll */
167                 switch (rate) {
168                 case 48000 :    val = PCXHR_FREQ_QUARTZ_48000;  break;
169                 case 24000 :    val = PCXHR_FREQ_QUARTZ_24000;  break;
170                 case 12000 :    val = PCXHR_FREQ_QUARTZ_12000;  break;
171                 case 32000 :    val = PCXHR_FREQ_QUARTZ_32000;  break;
172                 case 16000 :    val = PCXHR_FREQ_QUARTZ_16000;  break;
173                 case 8000 :     val = PCXHR_FREQ_QUARTZ_8000;   break;
174                 case 44100 :    val = PCXHR_FREQ_QUARTZ_44100;  break;
175                 case 22050 :    val = PCXHR_FREQ_QUARTZ_22050;  break;
176                 case 11025 :    val = PCXHR_FREQ_QUARTZ_11025;  break;
177                 case 192000 :   val = PCXHR_FREQ_QUARTZ_192000; break;
178                 case 96000 :    val = PCXHR_FREQ_QUARTZ_96000;  break;
179                 case 176400 :   val = PCXHR_FREQ_QUARTZ_176400; break;
180                 case 88200 :    val = PCXHR_FREQ_QUARTZ_88200;  break;
181                 case 128000 :   val = PCXHR_FREQ_QUARTZ_128000; break;
182                 case 64000 :    val = PCXHR_FREQ_QUARTZ_64000;  break;
183                 default :
184                         val = PCXHR_FREQ_PLL;
185                         /* get the value for the pll register */
186                         err = pcxhr_pll_freq_register(rate, &pllreg, &realfreq);
187                         if (err)
188                                 return err;
189                         pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);
190                         rmh.cmd[0] |= IO_NUM_REG_GENCLK;
191                         rmh.cmd[1]  = pllreg & MASK_DSP_WORD;
192                         rmh.cmd[2]  = pllreg >> 24;
193                         rmh.cmd_len = 3;
194                         err = pcxhr_send_msg(mgr, &rmh);
195                         if (err < 0) {
196                                 snd_printk(KERN_ERR
197                                            "error CMD_ACCESS_IO_WRITE for PLL register : %x!\n",
198                                            err );
199                                 return err;
200                         }
201                 }
202                 break;
203         case PCXHR_CLOCK_TYPE_WORD_CLOCK :      val = PCXHR_FREQ_WORD_CLOCK;    break;
204         case PCXHR_CLOCK_TYPE_AES_SYNC :        val = PCXHR_FREQ_SYNC_AES;      break;
205         case PCXHR_CLOCK_TYPE_AES_1 :           val = PCXHR_FREQ_AES_1;         break;
206         case PCXHR_CLOCK_TYPE_AES_2 :           val = PCXHR_FREQ_AES_2;         break;
207         case PCXHR_CLOCK_TYPE_AES_3 :           val = PCXHR_FREQ_AES_3;         break;
208         case PCXHR_CLOCK_TYPE_AES_4 :           val = PCXHR_FREQ_AES_4;         break;
209         default : return -EINVAL;
210         }
211         *reg = val;
212         *freq = realfreq;
213         return 0;
214 }
215
216
217 int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate)
218 {
219         unsigned int val, realfreq, speed;
220         struct pcxhr_rmh rmh;
221         int err, changed;
222
223         if (rate == 0)
224                 return 0; /* nothing to do */
225
226         err = pcxhr_get_clock_reg(mgr, rate, &val, &realfreq);
227         if (err)
228                 return err;
229
230         /* codec speed modes */
231         if (rate < 55000)
232                 speed = 0;      /* single speed */
233         else if (rate < 100000)
234                 speed = 1;      /* dual speed */
235         else
236                 speed = 2;      /* quad speed */
237         if (mgr->codec_speed != speed) {
238                 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);      /* mute outputs */
239                 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
240                 err = pcxhr_send_msg(mgr, &rmh);
241                 if (err)
242                         return err;
243
244                 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);      /* set speed ratio */
245                 rmh.cmd[0] |= IO_NUM_SPEED_RATIO;
246                 rmh.cmd[1] = speed;
247                 rmh.cmd_len = 2;
248                 err = pcxhr_send_msg(mgr, &rmh);
249                 if (err)
250                         return err;
251         }
252         /* set the new frequency */
253         snd_printdd("clock register : set %x\n", val);
254         err = pcxhr_write_io_num_reg_cont(mgr, PCXHR_FREQ_REG_MASK, val, &changed);
255         if (err)
256                 return err;
257         mgr->sample_rate_real = realfreq;
258         mgr->cur_clock_type = mgr->use_clock_type;
259
260         /* unmute after codec speed modes */
261         if (mgr->codec_speed != speed) {
262                 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);       /* unmute outputs */
263                 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
264                 err = pcxhr_send_msg(mgr, &rmh);
265                 if (err)
266                         return err;
267                 mgr->codec_speed = speed;                       /* save new codec speed */
268         }
269
270         if (changed) {
271                 pcxhr_init_rmh(&rmh, CMD_MODIFY_CLOCK);
272                 rmh.cmd[0] |= PCXHR_MODIFY_CLOCK_S_BIT;         /* resync fifos  */
273                 if (rate < PCXHR_IRQ_TIMER_FREQ)
274                         rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD;
275                 else
276                         rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD * 2;
277                 rmh.cmd[2] = rate;
278                 rmh.cmd_len = 3;
279                 err = pcxhr_send_msg(mgr, &rmh);
280                 if (err)
281                         return err;
282         }
283         snd_printdd("pcxhr_set_clock to %dHz (realfreq=%d)\n", rate, realfreq);
284         return 0;
285 }
286
287
288 int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, enum pcxhr_clock_type clock_type,
289                              int *sample_rate)
290 {
291         struct pcxhr_rmh rmh;
292         unsigned char reg;
293         int err, rate;
294
295         switch (clock_type) {
296         case PCXHR_CLOCK_TYPE_WORD_CLOCK :      reg = REG_STATUS_WORD_CLOCK;    break;
297         case PCXHR_CLOCK_TYPE_AES_SYNC :        reg = REG_STATUS_AES_SYNC;      break;
298         case PCXHR_CLOCK_TYPE_AES_1 :           reg = REG_STATUS_AES_1;         break;
299         case PCXHR_CLOCK_TYPE_AES_2 :           reg = REG_STATUS_AES_2;         break;
300         case PCXHR_CLOCK_TYPE_AES_3 :           reg = REG_STATUS_AES_3;         break;
301         case PCXHR_CLOCK_TYPE_AES_4 :           reg = REG_STATUS_AES_4;         break;
302         default : return -EINVAL;
303         }
304         pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);
305         rmh.cmd_len = 2;
306         rmh.cmd[0] |= IO_NUM_REG_STATUS;
307         if (mgr->last_reg_stat != reg) {
308                 rmh.cmd[1]  = reg;
309                 err = pcxhr_send_msg(mgr, &rmh);
310                 if (err)
311                         return err;
312                 udelay(100);            /* wait minimum 2 sample_frames at 32kHz ! */
313                 mgr->last_reg_stat = reg;
314         }
315         rmh.cmd[1]  = REG_STATUS_CURRENT;
316         err = pcxhr_send_msg(mgr, &rmh);
317         if (err)
318                 return err;
319         switch (rmh.stat[1] & 0x0f) {
320         case REG_STATUS_SYNC_32000 :    rate = 32000; break;
321         case REG_STATUS_SYNC_44100 :    rate = 44100; break;
322         case REG_STATUS_SYNC_48000 :    rate = 48000; break;
323         case REG_STATUS_SYNC_64000 :    rate = 64000; break;
324         case REG_STATUS_SYNC_88200 :    rate = 88200; break;
325         case REG_STATUS_SYNC_96000 :    rate = 96000; break;
326         case REG_STATUS_SYNC_128000 :   rate = 128000; break;
327         case REG_STATUS_SYNC_176400 :   rate = 176400; break;
328         case REG_STATUS_SYNC_192000 :   rate = 192000; break;
329         default: rate = 0;
330         }
331         snd_printdd("External clock is at %d Hz\n", rate);
332         *sample_rate = rate;
333         return 0;
334 }
335
336
337 /*
338  *  start or stop playback/capture substream
339  */
340 static int pcxhr_set_stream_state(struct pcxhr_stream *stream)
341 {
342         int err;
343         struct snd_pcxhr *chip;
344         struct pcxhr_rmh rmh;
345         int stream_mask, start;
346
347         if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN)
348                 start = 1;
349         else {
350                 if (stream->status != PCXHR_STREAM_STATUS_SCHEDULE_STOP) {
351                         snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state CANNOT be stopped\n");
352                         return -EINVAL;
353                 }
354                 start = 0;
355         }
356         if (!stream->substream)
357                 return -EINVAL;
358
359         stream->timer_abs_periods = 0;
360         stream->timer_period_frag = 0;            /* reset theoretical stream pos */
361         stream->timer_buf_periods = 0;
362         stream->timer_is_synced = 0;
363
364         stream_mask = stream->pipe->is_capture ? 1 : 1<<stream->substream->number;
365
366         pcxhr_init_rmh(&rmh, start ? CMD_START_STREAM : CMD_STOP_STREAM);
367         pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture,
368                                   stream->pipe->first_audio, 0, stream_mask);
369
370         chip = snd_pcm_substream_chip(stream->substream);
371
372         err = pcxhr_send_msg(chip->mgr, &rmh);
373         if (err)
374                 snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state err=%x;\n", err);
375         stream->status = start ? PCXHR_STREAM_STATUS_STARTED : PCXHR_STREAM_STATUS_STOPPED;
376         return err;
377 }
378
379 #define HEADER_FMT_BASE_LIN             0xfed00000
380 #define HEADER_FMT_BASE_FLOAT           0xfad00000
381 #define HEADER_FMT_INTEL                0x00008000
382 #define HEADER_FMT_24BITS               0x00004000
383 #define HEADER_FMT_16BITS               0x00002000
384 #define HEADER_FMT_UPTO11               0x00000200
385 #define HEADER_FMT_UPTO32               0x00000100
386 #define HEADER_FMT_MONO                 0x00000080
387
388 static int pcxhr_set_format(struct pcxhr_stream *stream)
389 {
390         int err, is_capture, sample_rate, stream_num;
391         struct snd_pcxhr *chip;
392         struct pcxhr_rmh rmh;
393         unsigned int header;
394
395         switch (stream->format) {
396         case SNDRV_PCM_FORMAT_U8:
397                 header = HEADER_FMT_BASE_LIN;
398                 break;
399         case SNDRV_PCM_FORMAT_S16_LE:
400                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS | HEADER_FMT_INTEL;
401                 break;
402         case SNDRV_PCM_FORMAT_S16_BE:
403                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS;
404                 break;
405         case SNDRV_PCM_FORMAT_S24_3LE:
406                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS | HEADER_FMT_INTEL;
407                 break;
408         case SNDRV_PCM_FORMAT_S24_3BE:
409                 header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS;
410                 break;
411         case SNDRV_PCM_FORMAT_FLOAT_LE:
412                 header = HEADER_FMT_BASE_FLOAT | HEADER_FMT_INTEL;
413                 break;
414         default:
415                 snd_printk(KERN_ERR "error pcxhr_set_format() : unknown format\n");
416                 return -EINVAL;
417         }
418         chip = snd_pcm_substream_chip(stream->substream);
419
420         sample_rate = chip->mgr->sample_rate;
421         if (sample_rate <= 32000 && sample_rate !=0) {
422                 if (sample_rate <= 11025)
423                         header |= HEADER_FMT_UPTO11;
424                 else
425                         header |= HEADER_FMT_UPTO32;
426         }
427         if (stream->channels == 1)
428                 header |= HEADER_FMT_MONO;
429
430         is_capture = stream->pipe->is_capture;
431         stream_num = is_capture ? 0 : stream->substream->number;
432
433         pcxhr_init_rmh(&rmh, is_capture ? CMD_FORMAT_STREAM_IN : CMD_FORMAT_STREAM_OUT);
434         pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, stream_num, 0);
435         if (is_capture)
436                 rmh.cmd[0] |= 1<<12;
437         rmh.cmd[1] = 0;
438         rmh.cmd[2] = header >> 8;
439         rmh.cmd[3] = (header & 0xff) << 16;
440         rmh.cmd_len = 4;
441         err = pcxhr_send_msg(chip->mgr, &rmh);
442         if (err)
443                 snd_printk(KERN_ERR "ERROR pcxhr_set_format err=%x;\n", err);
444         return err;
445 }
446
447 static int pcxhr_update_r_buffer(struct pcxhr_stream *stream)
448 {
449         int err, is_capture, stream_num;
450         struct pcxhr_rmh rmh;
451         struct snd_pcm_substream *subs = stream->substream;
452         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
453
454         is_capture = (subs->stream == SNDRV_PCM_STREAM_CAPTURE);
455         stream_num = is_capture ? 0 : subs->number;
456
457         snd_printdd("pcxhr_update_r_buffer(pcm%c%d) : addr(%p) bytes(%x) subs(%d)\n",
458                     is_capture ? 'c' : 'p',
459                     chip->chip_idx, (void*)subs->runtime->dma_addr,
460                     subs->runtime->dma_bytes, subs->number);
461
462         pcxhr_init_rmh(&rmh, CMD_UPDATE_R_BUFFERS);
463         pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, stream_num, 0);
464
465         snd_assert(subs->runtime->dma_bytes < 0x200000);        /* max buffer size is 2 MByte */
466         rmh.cmd[1] = subs->runtime->dma_bytes * 8;              /* size in bits */
467         rmh.cmd[2] = subs->runtime->dma_addr >> 24;             /* most significant byte */
468         rmh.cmd[2] |= 1<<19;                                    /* this is a circular buffer */
469         rmh.cmd[3] = subs->runtime->dma_addr & MASK_DSP_WORD;   /* least 3 significant bytes */
470         rmh.cmd_len = 4;
471         err = pcxhr_send_msg(chip->mgr, &rmh);
472         if (err)
473                 snd_printk(KERN_ERR "ERROR CMD_UPDATE_R_BUFFERS err=%x;\n", err);
474         return err;
475 }
476
477
478 #if 0
479 static int pcxhr_pipe_sample_count(struct pcxhr_stream *stream, snd_pcm_uframes_t *sample_count)
480 {
481         struct pcxhr_rmh rmh;
482         int err;
483         pcxhr_t *chip = snd_pcm_substream_chip(stream->substream);
484         pcxhr_init_rmh(&rmh, CMD_PIPE_SAMPLE_COUNT);
485         pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, 0, 0,
486                                   1<<stream->pipe->first_audio);
487         err = pcxhr_send_msg(chip->mgr, &rmh);
488         if (err == 0) {
489                 *sample_count = ((snd_pcm_uframes_t)rmh.stat[0]) << 24;
490                 *sample_count += (snd_pcm_uframes_t)rmh.stat[1];
491         }
492         snd_printdd("PIPE_SAMPLE_COUNT = %lx\n", *sample_count);
493         return err;
494 }
495 #endif
496
497 static inline int pcxhr_stream_scheduled_get_pipe(struct pcxhr_stream *stream,
498                                                   struct pcxhr_pipe **pipe)
499 {
500         if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN) {
501                 *pipe = stream->pipe;
502                 return 1;
503         }
504         return 0;
505 }
506
507 static void pcxhr_trigger_tasklet(unsigned long arg)
508 {
509         unsigned long flags;
510         int i, j, err;
511         struct pcxhr_pipe *pipe;
512         struct snd_pcxhr *chip;
513         struct pcxhr_mgr *mgr = (struct pcxhr_mgr*)(arg);
514         int capture_mask = 0;
515         int playback_mask = 0;
516
517 #ifdef CONFIG_SND_DEBUG_DETECT
518         struct timeval my_tv1, my_tv2;
519         do_gettimeofday(&my_tv1);
520 #endif
521         down(&mgr->setup_mutex);
522
523         /* check the pipes concerned and build pipe_array */
524         for (i = 0; i < mgr->num_cards; i++) {
525                 chip = mgr->chip[i];
526                 for (j = 0; j < chip->nb_streams_capt; j++) {
527                         if (pcxhr_stream_scheduled_get_pipe(&chip->capture_stream[j], &pipe))
528                                 capture_mask |= (1 << pipe->first_audio);
529                 }
530                 for (j = 0; j < chip->nb_streams_play; j++) {
531                         if (pcxhr_stream_scheduled_get_pipe(&chip->playback_stream[j], &pipe)) {
532                                 playback_mask |= (1 << pipe->first_audio);
533                                 break;  /* add only once, as all playback streams of
534                                          * one chip use the same pipe
535                                          */
536                         }
537                 }
538         }
539         if (capture_mask == 0 && playback_mask == 0) {
540                 up(&mgr->setup_mutex);
541                 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : no pipes\n");
542                 return;
543         }
544
545         snd_printdd("pcxhr_trigger_tasklet : playback_mask=%x capture_mask=%x\n",
546                     playback_mask, capture_mask);
547
548         /* synchronous stop of all the pipes concerned */
549         err = pcxhr_set_pipe_state(mgr,  playback_mask, capture_mask, 0);
550         if (err) {
551                 up(&mgr->setup_mutex);
552                 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : error stop pipes (P%x C%x)\n",
553                            playback_mask, capture_mask);
554                 return;
555         }
556
557         /* unfortunately the dsp lost format and buffer info with the stop pipe */
558         for (i = 0; i < mgr->num_cards; i++) {
559                 struct pcxhr_stream *stream;
560                 chip = mgr->chip[i];
561                 for (j = 0; j < chip->nb_streams_capt; j++) {
562                         stream = &chip->capture_stream[j];
563                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) {
564                                 err = pcxhr_set_format(stream);
565                                 err = pcxhr_update_r_buffer(stream);
566                         }
567                 }
568                 for (j = 0; j < chip->nb_streams_play; j++) {
569                         stream = &chip->playback_stream[j];
570                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) {
571                                 err = pcxhr_set_format(stream);
572                                 err = pcxhr_update_r_buffer(stream);
573                         }
574                 }
575         }
576         /* start all the streams */
577         for (i = 0; i < mgr->num_cards; i++) {
578                 struct pcxhr_stream *stream;
579                 chip = mgr->chip[i];
580                 for (j = 0; j < chip->nb_streams_capt; j++) {
581                         stream = &chip->capture_stream[j];
582                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe))
583                                 err = pcxhr_set_stream_state(stream);
584                 }
585                 for (j = 0; j < chip->nb_streams_play; j++) {
586                         stream = &chip->playback_stream[j];
587                         if (pcxhr_stream_scheduled_get_pipe(stream, &pipe))
588                                 err = pcxhr_set_stream_state(stream);
589                 }
590         }
591
592         /* synchronous start of all the pipes concerned */
593         err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 1);
594         if (err) {
595                 up(&mgr->setup_mutex);
596                 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : error start pipes (P%x C%x)\n",
597                            playback_mask, capture_mask);
598                 return;
599         }
600
601         /* put the streams into the running state now (increment pointer by interrupt) */
602         spin_lock_irqsave(&mgr->lock, flags);
603         for ( i =0; i < mgr->num_cards; i++) {
604                 struct pcxhr_stream *stream;
605                 chip = mgr->chip[i];
606                 for(j = 0; j < chip->nb_streams_capt; j++) {
607                         stream = &chip->capture_stream[j];
608                         if(stream->status == PCXHR_STREAM_STATUS_STARTED)
609                                 stream->status = PCXHR_STREAM_STATUS_RUNNING;
610                 }
611                 for (j = 0; j < chip->nb_streams_play; j++) {
612                         stream = &chip->playback_stream[j];
613                         if (stream->status == PCXHR_STREAM_STATUS_STARTED) {
614                                 /* playback will already have advanced ! */
615                                 stream->timer_period_frag += PCXHR_GRANULARITY;
616                                 stream->status = PCXHR_STREAM_STATUS_RUNNING;
617                         }
618                 }
619         }
620         spin_unlock_irqrestore(&mgr->lock, flags);
621
622         up(&mgr->setup_mutex);
623
624 #ifdef CONFIG_SND_DEBUG_DETECT
625         do_gettimeofday(&my_tv2);
626         snd_printdd("***TRIGGER TASKLET*** TIME = %ld (err = %x)\n",
627                     my_tv2.tv_usec - my_tv1.tv_usec, err);
628 #endif
629 }
630
631
632 /*
633  *  trigger callback
634  */
635 static int pcxhr_trigger(struct snd_pcm_substream *subs, int cmd)
636 {
637         struct pcxhr_stream *stream;
638         struct list_head *pos;
639         struct snd_pcm_substream *s;
640         int i;
641
642         switch (cmd) {
643         case SNDRV_PCM_TRIGGER_START:
644                 snd_printdd("SNDRV_PCM_TRIGGER_START\n");
645                 i = 0;
646                 snd_pcm_group_for_each(pos, subs) {
647                         s = snd_pcm_group_substream_entry(pos);
648                         stream = s->runtime->private_data;
649                         stream->status = PCXHR_STREAM_STATUS_SCHEDULE_RUN;
650                         snd_pcm_trigger_done(s, subs);
651                         i++;
652                 }
653                 if (i==1) {
654                         snd_printdd("Only one Substream %c %d\n",
655                                     stream->pipe->is_capture ? 'C' : 'P',
656                                     stream->pipe->first_audio);
657                         if (pcxhr_set_format(stream))
658                                 return -EINVAL;
659                         if (pcxhr_update_r_buffer(stream))
660                                 return -EINVAL;
661
662                         if (pcxhr_set_stream_state(stream))
663                                 return -EINVAL;
664                         stream->status = PCXHR_STREAM_STATUS_RUNNING;
665                 } else {
666                         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
667                         tasklet_hi_schedule(&chip->mgr->trigger_taskq);
668                 }
669                 break;
670         case SNDRV_PCM_TRIGGER_STOP:
671                 snd_printdd("SNDRV_PCM_TRIGGER_STOP\n");
672                 snd_pcm_group_for_each(pos, subs) {
673                         s = snd_pcm_group_substream_entry(pos);
674                         stream = s->runtime->private_data;
675                         stream->status = PCXHR_STREAM_STATUS_SCHEDULE_STOP;
676                         if (pcxhr_set_stream_state(stream))
677                                 return -EINVAL;
678                         snd_pcm_trigger_done(s, subs);
679                 }
680                 break;
681         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
682         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
683                 /* TODO */
684         default:
685                 return -EINVAL;
686         }
687         return 0;
688 }
689
690
691 static int pcxhr_hardware_timer(struct pcxhr_mgr *mgr, int start)
692 {
693         struct pcxhr_rmh rmh;
694         int err;
695
696         pcxhr_init_rmh(&rmh, CMD_SET_TIMER_INTERRUPT);
697         if (start) {
698                 mgr->dsp_time_last = PCXHR_DSP_TIME_INVALID;    /* last dsp time invalid */
699                 rmh.cmd[0] |= PCXHR_GRANULARITY;
700         }
701         err = pcxhr_send_msg(mgr, &rmh);
702         if (err < 0)
703                 snd_printk(KERN_ERR "error pcxhr_hardware_timer err(%x)\n", err);
704         return err;
705 }
706
707 /*
708  *  prepare callback for all pcms
709  */
710 static int pcxhr_prepare(struct snd_pcm_substream *subs)
711 {
712         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
713         struct pcxhr_mgr *mgr = chip->mgr;
714         /*
715         struct pcxhr_stream *stream = (pcxhr_stream_t*)subs->runtime->private_data;
716         */
717         int err = 0;
718
719         snd_printdd("pcxhr_prepare : period_size(%lx) periods(%x) buffer_size(%lx)\n",
720                     subs->runtime->period_size, subs->runtime->periods,
721                     subs->runtime->buffer_size);
722
723         /*
724         if(subs->runtime->period_size <= PCXHR_GRANULARITY) {
725                 snd_printk(KERN_ERR "pcxhr_prepare : error period_size too small (%x)\n",
726                            (unsigned int)subs->runtime->period_size);
727                 return -EINVAL;
728         }
729         */
730
731         down(&mgr->setup_mutex);
732
733         do {
734                 /* if the stream was stopped before, format and buffer were reset */
735                 /*
736                 if(stream->status == PCXHR_STREAM_STATUS_STOPPED) {
737                         err = pcxhr_set_format(stream);
738                         if(err) break;
739                         err = pcxhr_update_r_buffer(stream);
740                         if(err) break;
741                 }
742                 */
743
744                 /* only the first stream can choose the sample rate */
745                 /* the further opened streams will be limited to its frequency (see open) */
746                 /* set the clock only once (first stream) */
747                 if (mgr->sample_rate == 0) {
748                         err = pcxhr_set_clock(mgr, subs->runtime->rate);
749                         if (err)
750                                 break;
751                         mgr->sample_rate = subs->runtime->rate;
752
753                         err = pcxhr_hardware_timer(mgr, 1);     /* start the DSP-timer */
754                 }
755         } while(0);     /* do only once (so we can use break instead of goto) */
756
757         up(&mgr->setup_mutex);
758
759         return err;
760 }
761
762
763 /*
764  *  HW_PARAMS callback for all pcms
765  */
766 static int pcxhr_hw_params(struct snd_pcm_substream *subs,
767                            struct snd_pcm_hw_params *hw)
768 {
769         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
770         struct pcxhr_mgr *mgr = chip->mgr;
771         struct pcxhr_stream *stream = subs->runtime->private_data;
772         snd_pcm_format_t format;
773         int err;
774         int channels;
775
776         /* set up channels */
777         channels = params_channels(hw);
778
779         /*  set up format for the stream */
780         format = params_format(hw);
781
782         down(&mgr->setup_mutex);
783
784         stream->channels = channels;
785         stream->format = format;
786
787         /* set the format to the board */
788         /*
789         err = pcxhr_set_format(stream);
790         if(err) {
791                 up(&mgr->setup_mutex);
792                 return err;
793         }
794         */
795         /* allocate buffer */
796         err = snd_pcm_lib_malloc_pages(subs, params_buffer_bytes(hw));
797
798         /*
799         if (err > 0) {
800                 err = pcxhr_update_r_buffer(stream);
801         }
802         */
803         up(&mgr->setup_mutex);
804
805         return err;
806 }
807
808 static int pcxhr_hw_free(struct snd_pcm_substream *subs)
809 {
810         snd_pcm_lib_free_pages(subs);
811         return 0;
812 }
813
814
815 /*
816  *  CONFIGURATION SPACE for all pcms, mono pcm must update channels_max
817  */
818 static struct snd_pcm_hardware pcxhr_caps =
819 {
820         .info             = ( SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
821                               SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START |
822                               0 /*SNDRV_PCM_INFO_PAUSE*/),
823         .formats          = ( SNDRV_PCM_FMTBIT_U8 |
824                               SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |
825                               SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |
826                               SNDRV_PCM_FMTBIT_FLOAT_LE ),
827         .rates            = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_192000,
828         .rate_min         = 8000,
829         .rate_max         = 192000,
830         .channels_min     = 1,
831         .channels_max     = 2,
832         .buffer_bytes_max = (32*1024),
833         /* 1 byte == 1 frame U8 mono (PCXHR_GRANULARITY is frames!) */
834         .period_bytes_min = (2*PCXHR_GRANULARITY),
835         .period_bytes_max = (16*1024),
836         .periods_min      = 2,
837         .periods_max      = (32*1024/PCXHR_GRANULARITY),
838 };
839
840
841 static int pcxhr_open(struct snd_pcm_substream *subs)
842 {
843         struct snd_pcxhr       *chip = snd_pcm_substream_chip(subs);
844         struct pcxhr_mgr       *mgr = chip->mgr;
845         struct snd_pcm_runtime *runtime = subs->runtime;
846         struct pcxhr_stream    *stream;
847         int                 is_capture;
848
849         down(&mgr->setup_mutex);
850
851         /* copy the struct snd_pcm_hardware struct */
852         runtime->hw = pcxhr_caps;
853
854         if( subs->stream == SNDRV_PCM_STREAM_PLAYBACK ) {
855                 snd_printdd("pcxhr_open playback chip%d subs%d\n",
856                             chip->chip_idx, subs->number);
857                 is_capture = 0;
858                 stream = &chip->playback_stream[subs->number];
859         } else {
860                 snd_printdd("pcxhr_open capture chip%d subs%d\n",
861                             chip->chip_idx, subs->number);
862                 is_capture = 1;
863                 if (mgr->mono_capture)
864                         runtime->hw.channels_max = 1;
865                 else
866                         runtime->hw.channels_min = 2;
867                 stream = &chip->capture_stream[subs->number];
868         }
869         if (stream->status != PCXHR_STREAM_STATUS_FREE){
870                 /* streams in use */
871                 snd_printk(KERN_ERR "pcxhr_open chip%d subs%d in use\n",
872                            chip->chip_idx, subs->number);
873                 up(&mgr->setup_mutex);
874                 return -EBUSY;
875         }
876
877         /* if a sample rate is already used or fixed by external clock,
878          * the stream cannot change
879          */
880         if (mgr->sample_rate)
881                 runtime->hw.rate_min = runtime->hw.rate_max = mgr->sample_rate;
882         else {
883                 if (mgr->use_clock_type != PCXHR_CLOCK_TYPE_INTERNAL) {
884                         int external_rate;
885                         if (pcxhr_get_external_clock(mgr, mgr->use_clock_type,
886                                                      &external_rate) ||
887                             external_rate == 0) {
888                                 /* cannot detect the external clock rate */
889                                 up(&mgr->setup_mutex);
890                                 return -EBUSY;
891                         }
892                         runtime->hw.rate_min = runtime->hw.rate_max = external_rate;
893                 }
894         }
895
896         stream->status      = PCXHR_STREAM_STATUS_OPEN;
897         stream->substream   = subs;
898         stream->channels    = 0; /* not configured yet */
899
900         runtime->private_data = stream;
901
902         snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 4);
903         snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 4);
904
905         mgr->ref_count_rate++;
906
907         up(&mgr->setup_mutex);
908         return 0;
909 }
910
911
912 static int pcxhr_close(struct snd_pcm_substream *subs)
913 {
914         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
915         struct pcxhr_mgr *mgr = chip->mgr;
916         struct pcxhr_stream *stream = subs->runtime->private_data;
917
918         down(&mgr->setup_mutex);
919
920         snd_printdd("pcxhr_close chip%d subs%d\n", chip->chip_idx, subs->number);
921
922         /* sample rate released */
923         if (--mgr->ref_count_rate == 0) {
924                 mgr->sample_rate = 0;           /* the sample rate is no more locked */
925                 pcxhr_hardware_timer(mgr, 0);   /* stop the DSP-timer */
926         }
927
928         stream->status    = PCXHR_STREAM_STATUS_FREE;
929         stream->substream = NULL;
930
931         up(&mgr->setup_mutex);
932
933         return 0;
934 }
935
936
937 static snd_pcm_uframes_t pcxhr_stream_pointer(struct snd_pcm_substream *subs)
938 {
939         unsigned long flags;
940         u_int32_t timer_period_frag;
941         int timer_buf_periods;
942         struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
943         struct snd_pcm_runtime *runtime = subs->runtime;
944         struct pcxhr_stream *stream  = runtime->private_data;
945
946         spin_lock_irqsave(&chip->mgr->lock, flags);
947
948         /* get the period fragment and the nb of periods in the buffer */
949         timer_period_frag = stream->timer_period_frag;
950         timer_buf_periods = stream->timer_buf_periods;
951
952         spin_unlock_irqrestore(&chip->mgr->lock, flags);
953
954         return (snd_pcm_uframes_t)((timer_buf_periods * runtime->period_size) +
955                                    timer_period_frag);
956 }
957
958
959 static struct snd_pcm_ops pcxhr_ops = {
960         .open      = pcxhr_open,
961         .close     = pcxhr_close,
962         .ioctl     = snd_pcm_lib_ioctl,
963         .prepare   = pcxhr_prepare,
964         .hw_params = pcxhr_hw_params,
965         .hw_free   = pcxhr_hw_free,
966         .trigger   = pcxhr_trigger,
967         .pointer   = pcxhr_stream_pointer,
968 };
969
970 /*
971  */
972 int pcxhr_create_pcm(struct snd_pcxhr *chip)
973 {
974         int err;
975         struct snd_pcm *pcm;
976         char name[32];
977
978         sprintf(name, "pcxhr %d", chip->chip_idx);
979         if ((err = snd_pcm_new(chip->card, name, 0,
980                                chip->nb_streams_play,
981                                chip->nb_streams_capt, &pcm)) < 0) {
982                 snd_printk(KERN_ERR "cannot create pcm %s\n", name);
983                 return err;
984         }
985         pcm->private_data = chip;
986
987         if (chip->nb_streams_play)
988                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &pcxhr_ops);
989         if (chip->nb_streams_capt)
990                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &pcxhr_ops);
991
992         pcm->info_flags = 0;
993         strcpy(pcm->name, name);
994
995         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
996                                               snd_dma_pci_data(chip->mgr->pci),
997                                               32*1024, 32*1024);
998         chip->pcm = pcm;
999         return 0;
1000 }
1001
1002 static int pcxhr_chip_free(struct snd_pcxhr *chip)
1003 {
1004         kfree(chip);
1005         return 0;
1006 }
1007
1008 static int pcxhr_chip_dev_free(struct snd_device *device)
1009 {
1010         struct snd_pcxhr *chip = device->device_data;
1011         return pcxhr_chip_free(chip);
1012 }
1013
1014
1015 /*
1016  */
1017 static int __devinit pcxhr_create(struct pcxhr_mgr *mgr, struct snd_card *card, int idx)
1018 {
1019         int err;
1020         struct snd_pcxhr *chip;
1021         static struct snd_device_ops ops = {
1022                 .dev_free = pcxhr_chip_dev_free,
1023         };
1024
1025         mgr->chip[idx] = chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1026         if (! chip) {
1027                 snd_printk(KERN_ERR "cannot allocate chip\n");
1028                 return -ENOMEM;
1029         }
1030
1031         chip->card = card;
1032         chip->chip_idx = idx;
1033         chip->mgr = mgr;
1034
1035         if (idx < mgr->playback_chips)
1036                 /* stereo or mono streams */
1037                 chip->nb_streams_play = PCXHR_PLAYBACK_STREAMS;
1038
1039         if (idx < mgr->capture_chips) {
1040                 if (mgr->mono_capture)
1041                         chip->nb_streams_capt = 2;      /* 2 mono streams (left+right) */
1042                 else
1043                         chip->nb_streams_capt = 1;      /* or 1 stereo stream */
1044         }
1045
1046         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1047                 pcxhr_chip_free(chip);
1048                 return err;
1049         }
1050
1051         snd_card_set_dev(card, &mgr->pci->dev);
1052
1053         return 0;
1054 }
1055
1056 /* proc interface */
1057 static void pcxhr_proc_info(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1058 {
1059         struct snd_pcxhr *chip = entry->private_data;
1060         struct pcxhr_mgr *mgr = chip->mgr;
1061
1062         snd_iprintf(buffer, "\n%s\n", mgr->longname);
1063
1064         /* stats available when embedded DSP is running */
1065         if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) {
1066                 struct pcxhr_rmh rmh;
1067                 short ver_maj = (mgr->dsp_version >> 16) & 0xff;
1068                 short ver_min = (mgr->dsp_version >> 8) & 0xff;
1069                 short ver_build = mgr->dsp_version & 0xff;
1070                 snd_iprintf(buffer, "module version %s\n", PCXHR_DRIVER_VERSION_STRING);
1071                 snd_iprintf(buffer, "dsp version %d.%d.%d\n", ver_maj, ver_min, ver_build);
1072                 if (mgr->board_has_analog)
1073                         snd_iprintf(buffer, "analog io available\n");
1074                 else
1075                         snd_iprintf(buffer, "digital only board\n");
1076
1077                 /* calc cpu load of the dsp */
1078                 pcxhr_init_rmh(&rmh, CMD_GET_DSP_RESOURCES);
1079                 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1080                         int cur = rmh.stat[0];
1081                         int ref = rmh.stat[1];
1082                         if (ref > 0) {
1083                                 if (mgr->sample_rate_real != 0 &&
1084                                     mgr->sample_rate_real != 48000) {
1085                                         ref = (ref * 48000) / mgr->sample_rate_real;
1086                                         if (mgr->sample_rate_real >= PCXHR_IRQ_TIMER_FREQ)
1087                                                 ref *= 2;
1088                                 }
1089                                 cur = 100 - (100 * cur) / ref;
1090                                 snd_iprintf(buffer, "cpu load    %d%%\n", cur);
1091                                 snd_iprintf(buffer, "buffer pool %d/%d kWords\n",
1092                                             rmh.stat[2], rmh.stat[3]);
1093                         }
1094                 }
1095                 snd_iprintf(buffer, "dma granularity : %d\n", PCXHR_GRANULARITY);
1096                 snd_iprintf(buffer, "dsp time errors : %d\n", mgr->dsp_time_err);
1097                 snd_iprintf(buffer, "dsp async pipe xrun errors : %d\n",
1098                             mgr->async_err_pipe_xrun);
1099                 snd_iprintf(buffer, "dsp async stream xrun errors : %d\n",
1100                             mgr->async_err_stream_xrun);
1101                 snd_iprintf(buffer, "dsp async last other error : %x\n",
1102                             mgr->async_err_other_last);
1103                 /* debug zone dsp */
1104                 rmh.cmd[0] = 0x4200 + PCXHR_SIZE_MAX_STATUS;
1105                 rmh.cmd_len = 1;
1106                 rmh.stat_len = PCXHR_SIZE_MAX_STATUS;
1107                 rmh.dsp_stat = 0;
1108                 rmh.cmd_idx = CMD_LAST_INDEX;
1109                 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1110                         int i;
1111                         for (i = 0; i < rmh.stat_len; i++)
1112                                 snd_iprintf(buffer, "debug[%02d] = %06x\n", i,  rmh.stat[i]);
1113                 }
1114         } else
1115                 snd_iprintf(buffer, "no firmware loaded\n");
1116         snd_iprintf(buffer, "\n");
1117 }
1118 static void pcxhr_proc_sync(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1119 {
1120         struct snd_pcxhr *chip = entry->private_data;
1121         struct pcxhr_mgr *mgr = chip->mgr;
1122         static char *texts[7] = {
1123                 "Internal", "Word", "AES Sync", "AES 1", "AES 2", "AES 3", "AES 4"
1124         };
1125
1126         snd_iprintf(buffer, "\n%s\n", mgr->longname);
1127         snd_iprintf(buffer, "Current Sample Clock\t: %s\n", texts[mgr->cur_clock_type]);
1128         snd_iprintf(buffer, "Current Sample Rate\t= %d\n", mgr->sample_rate_real);
1129
1130         /* commands available when embedded DSP is running */
1131         if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) {
1132                 int i, err, sample_rate;
1133                 for (i = PCXHR_CLOCK_TYPE_WORD_CLOCK; i< (3 + mgr->capture_chips); i++) {
1134                         err = pcxhr_get_external_clock(mgr, i, &sample_rate);
1135                         if (err)
1136                                 break;
1137                         snd_iprintf(buffer, "%s Clock\t\t= %d\n", texts[i], sample_rate);
1138                 }
1139         } else
1140                 snd_iprintf(buffer, "no firmware loaded\n");
1141         snd_iprintf(buffer, "\n");
1142 }
1143
1144 static void __devinit pcxhr_proc_init(struct snd_pcxhr *chip)
1145 {
1146         struct snd_info_entry *entry;
1147
1148         if (! snd_card_proc_new(chip->card, "info", &entry))
1149                 snd_info_set_text_ops(entry, chip, 1024, pcxhr_proc_info);
1150         if (! snd_card_proc_new(chip->card, "sync", &entry))
1151                 snd_info_set_text_ops(entry, chip, 1024, pcxhr_proc_sync);
1152 }
1153 /* end of proc interface */
1154
1155 /*
1156  * release all the cards assigned to a manager instance
1157  */
1158 static int pcxhr_free(struct pcxhr_mgr *mgr)
1159 {
1160         unsigned int i;
1161
1162         for (i = 0; i < mgr->num_cards; i++) {
1163                 if (mgr->chip[i])
1164                         snd_card_free(mgr->chip[i]->card);
1165         }
1166
1167         /* reset board if some firmware was loaded */
1168         if(mgr->dsp_loaded) {
1169                 pcxhr_reset_board(mgr);
1170                 snd_printdd("reset pcxhr !\n");
1171         }
1172
1173         /* release irq  */
1174         if (mgr->irq >= 0)
1175                 free_irq(mgr->irq, mgr);
1176
1177         pci_release_regions(mgr->pci);
1178
1179         /* free hostport purgebuffer */
1180         if (mgr->hostport.area) {
1181                 snd_dma_free_pages(&mgr->hostport);
1182                 mgr->hostport.area = NULL;
1183         }
1184
1185         kfree(mgr->prmh);
1186
1187         pci_disable_device(mgr->pci);
1188         kfree(mgr);
1189         return 0;
1190 }
1191
1192 /*
1193  *    probe function - creates the card manager
1194  */
1195 static int __devinit pcxhr_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1196 {
1197         static int dev;
1198         struct pcxhr_mgr *mgr;
1199         unsigned int i;
1200         int err;
1201         size_t size;
1202         char *card_name;
1203
1204         if (dev >= SNDRV_CARDS)
1205                 return -ENODEV;
1206         if (! enable[dev]) {
1207                 dev++;
1208                 return -ENOENT;
1209         }
1210
1211         /* enable PCI device */
1212         if ((err = pci_enable_device(pci)) < 0)
1213                 return err;
1214         pci_set_master(pci);
1215
1216         /* check if we can restrict PCI DMA transfers to 32 bits */
1217         if (pci_set_dma_mask(pci, 0xffffffff) < 0) {
1218                 snd_printk(KERN_ERR "architecture does not support 32bit PCI busmaster DMA\n");
1219                 pci_disable_device(pci);
1220                 return -ENXIO;
1221         }
1222
1223         /* alloc card manager */
1224         mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
1225         if (! mgr) {
1226                 pci_disable_device(pci);
1227                 return -ENOMEM;
1228         }
1229
1230         snd_assert(pci_id->driver_data < PCI_ID_LAST, return -ENODEV);
1231         card_name = pcxhr_board_params[pci_id->driver_data].board_name;
1232         mgr->playback_chips = pcxhr_board_params[pci_id->driver_data].playback_chips;
1233         mgr->capture_chips  = pcxhr_board_params[pci_id->driver_data].capture_chips;
1234         mgr->firmware_num  = pcxhr_board_params[pci_id->driver_data].firmware_num;
1235         mgr->mono_capture = mono[dev];
1236
1237         /* resource assignment */
1238         if ((err = pci_request_regions(pci, card_name)) < 0) {
1239                 kfree(mgr);
1240                 pci_disable_device(pci);
1241                 return err;
1242         }
1243         for (i = 0; i < 3; i++)
1244                 mgr->port[i] = pci_resource_start(pci, i);
1245
1246         mgr->pci = pci;
1247         mgr->irq = -1;
1248
1249         if (request_irq(pci->irq, pcxhr_interrupt, SA_INTERRUPT|SA_SHIRQ,
1250                         card_name, mgr)) {
1251                 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1252                 pcxhr_free(mgr);
1253                 return -EBUSY;
1254         }
1255         mgr->irq = pci->irq;
1256
1257         sprintf(mgr->shortname, "Digigram %s", card_name);
1258         sprintf(mgr->longname, "%s at 0x%lx & 0x%lx, 0x%lx irq %i", mgr->shortname,
1259                 mgr->port[0], mgr->port[1], mgr->port[2], mgr->irq);
1260
1261         /* ISR spinlock  */
1262         spin_lock_init(&mgr->lock);
1263         spin_lock_init(&mgr->msg_lock);
1264
1265         /* init setup mutex*/
1266         init_MUTEX(&mgr->setup_mutex);
1267
1268         /* init taslket */
1269         tasklet_init(&mgr->msg_taskq, pcxhr_msg_tasklet, (unsigned long) mgr);
1270         tasklet_init(&mgr->trigger_taskq, pcxhr_trigger_tasklet, (unsigned long) mgr);
1271         mgr->prmh = kmalloc(sizeof(*mgr->prmh) + 
1272                             sizeof(u32) * (PCXHR_SIZE_MAX_LONG_STATUS - PCXHR_SIZE_MAX_STATUS),
1273                             GFP_KERNEL);
1274         if (! mgr->prmh) {
1275                 pcxhr_free(mgr);
1276                 return -ENOMEM;
1277         }
1278
1279         for (i=0; i < PCXHR_MAX_CARDS; i++) {
1280                 struct snd_card *card;
1281                 char tmpid[16];
1282                 int idx;
1283
1284                 if (i >= max(mgr->playback_chips, mgr->capture_chips))
1285                         break;
1286                 mgr->num_cards++;
1287
1288                 if (index[dev] < 0)
1289                         idx = index[dev];
1290                 else
1291                         idx = index[dev] + i;
1292
1293                 snprintf(tmpid, sizeof(tmpid), "%s-%d", id[dev] ? id[dev] : card_name, i);
1294                 card = snd_card_new(idx, tmpid, THIS_MODULE, 0);
1295
1296                 if (! card) {
1297                         snd_printk(KERN_ERR "cannot allocate the card %d\n", i);
1298                         pcxhr_free(mgr);
1299                         return -ENOMEM;
1300                 }
1301
1302                 strcpy(card->driver, DRIVER_NAME);
1303                 sprintf(card->shortname, "%s [PCM #%d]", mgr->shortname, i);
1304                 sprintf(card->longname, "%s [PCM #%d]", mgr->longname, i);
1305
1306                 if ((err = pcxhr_create(mgr, card, i)) < 0) {
1307                         pcxhr_free(mgr);
1308                         return err;
1309                 }
1310
1311                 if (i == 0)
1312                         /* init proc interface only for chip0 */
1313                         pcxhr_proc_init(mgr->chip[i]);
1314
1315                 if ((err = snd_card_register(card)) < 0) {
1316                         pcxhr_free(mgr);
1317                         return err;
1318                 }
1319         }
1320
1321         /* create hostport purgebuffer */
1322         size = PAGE_ALIGN(sizeof(struct pcxhr_hostport));
1323         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1324                                 size, &mgr->hostport) < 0) {
1325                 pcxhr_free(mgr);
1326                 return -ENOMEM;
1327         }
1328         /* init purgebuffer */
1329         memset(mgr->hostport.area, 0, size);
1330
1331         /* create a DSP loader */
1332         err = pcxhr_setup_firmware(mgr);
1333         if (err < 0) {
1334                 pcxhr_free(mgr);
1335                 return err;
1336         }
1337
1338         pci_set_drvdata(pci, mgr);
1339         dev++;
1340         return 0;
1341 }
1342
1343 static void __devexit pcxhr_remove(struct pci_dev *pci)
1344 {
1345         pcxhr_free(pci_get_drvdata(pci));
1346         pci_set_drvdata(pci, NULL);
1347 }
1348
1349 static struct pci_driver driver = {
1350         .name = "Digigram pcxhr",
1351         .id_table = pcxhr_ids,
1352         .probe = pcxhr_probe,
1353         .remove = __devexit_p(pcxhr_remove),
1354 };
1355
1356 static int __init pcxhr_module_init(void)
1357 {
1358         return pci_register_driver(&driver);
1359 }
1360
1361 static void __exit pcxhr_module_exit(void)
1362 {
1363         pci_unregister_driver(&driver);
1364 }
1365
1366 module_init(pcxhr_module_init)
1367 module_exit(pcxhr_module_exit)