SAFE public projects git trees. - safe/jmp/linux-2.6/blob - sound/pci/oxygen/xonar_cs43xx.c

   1 /*
   2  * card driver for models with CS4398/CS4362A DACs (Xonar D1/DX)
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  *
   6  *
   7  *  This driver is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License, version 2.
   9  *
  10  *  This driver is distributed in the hope that it will be useful,
  11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *  GNU General Public License for more details.
  14  *
  15  *  You should have received a copy of the GNU General Public License
  16  *  along with this driver; if not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19 /*
  20  * Xonar D1/DX
  21  * -----------
  22  *
  23  * CMI8788:
  24  *
  25  * I²C <-> CS4398 (front)
  26  *     <-> CS4362A (surround, center/LFE, back)
  27  *
  28  * GPI 0 <- external power present (DX only)
  29  *
  30  * GPIO 0 -> enable output to speakers
  31  * GPIO 1 -> enable front panel I/O
  32  * GPIO 2 -> M0 of CS5361
  33  * GPIO 3 -> M1 of CS5361
  34  * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
  35  *
  36  * CS4398:
  37  *
  38  * AD0 <- 1
  39  * AD1 <- 1
  40  *
  41  * CS4362A:
  42  *
  43  * AD0 <- 0
  44  *
  45  * CM9780:
  46  *
  47  * GPO 0 -> route line-in (0) or AC97 output (1) to CS5361 input
  48  */
  49
  50 #include <linux/pci.h>
  51 #include <linux/delay.h>
  52 #include <sound/ac97_codec.h>
  53 #include <sound/control.h>
  54 #include <sound/core.h>
  55 #include <sound/pcm.h>
  56 #include <sound/pcm_params.h>
  57 #include <sound/tlv.h>
  58 #include "xonar.h"
  59 #include "cs4398.h"
  60 #include "cs4362a.h"
  61
  62 #define GPI_EXT_POWER           0x01
  63 #define GPIO_D1_OUTPUT_ENABLE   0x0001
  64 #define GPIO_D1_FRONT_PANEL     0x0002
  65 #define GPIO_D1_INPUT_ROUTE     0x0100
  66
  67 #define I2C_DEVICE_CS4398       0x9e    /* 10011, AD1=1, AD0=1, /W=0 */
  68 #define I2C_DEVICE_CS4362A      0x30    /* 001100, AD0=0, /W=0 */
  69
  70 struct xonar_cs43xx {
  71         struct xonar_generic generic;
  72         u8 cs4398_regs[7];
  73         u8 cs4362a_regs[15];
  74 };
  75
  76 static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
  77 {
  78         struct xonar_cs43xx *data = chip->model_data;
  79
  80         oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
  81         if (reg < ARRAY_SIZE(data->cs4398_regs))
  82                 data->cs4398_regs[reg] = value;
  83 }
  84
  85 static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value)
  86 {
  87         struct xonar_cs43xx *data = chip->model_data;
  88
  89         if (value != data->cs4398_regs[reg])
  90                 cs4398_write(chip, reg, value);
  91 }
  92
  93 static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
  94 {
  95         struct xonar_cs43xx *data = chip->model_data;
  96
  97         oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
  98         if (reg < ARRAY_SIZE(data->cs4362a_regs))
  99                 data->cs4362a_regs[reg] = value;
 100 }
 101
 102 static void cs4362a_write_cached(struct oxygen *chip, u8 reg, u8 value)
 103 {
 104         struct xonar_cs43xx *data = chip->model_data;
 105
 106         if (value != data->cs4362a_regs[reg])
 107                 cs4362a_write(chip, reg, value);
 108 }
 109
 110 static void cs43xx_registers_init(struct oxygen *chip)
 111 {
 112         struct xonar_cs43xx *data = chip->model_data;
 113         unsigned int i;
 114
 115         /* set CPEN (control port mode) and power down */
 116         cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
 117         cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
 118         /* configure */
 119         cs4398_write(chip, 2, data->cs4398_regs[2]);
 120         cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
 121         cs4398_write(chip, 4, data->cs4398_regs[4]);
 122         cs4398_write(chip, 5, data->cs4398_regs[5]);
 123         cs4398_write(chip, 6, data->cs4398_regs[6]);
 124         cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP |
 125                      CS4398_ZERO_CROSS | CS4398_SOFT_RAMP);
 126         cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
 127         cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
 128                       CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
 129         cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE);
 130         cs4362a_write(chip, 0x05, 0);
 131         for (i = 6; i <= 14; ++i)
 132                 cs4362a_write(chip, i, data->cs4362a_regs[i]);
 133         /* clear power down */
 134         cs4398_write(chip, 8, CS4398_CPEN);
 135         cs4362a_write(chip, 0x01, CS4362A_CPEN);
 136 }
 137
 138 static void xonar_d1_init(struct oxygen *chip)
 139 {
 140         struct xonar_cs43xx *data = chip->model_data;
 141
 142         data->generic.anti_pop_delay = 800;
 143         data->generic.output_enable_bit = GPIO_D1_OUTPUT_ENABLE;
 144         data->cs4398_regs[2] =
 145                 CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
 146         data->cs4398_regs[4] = CS4398_MUTEP_LOW |
 147                 CS4398_MUTE_B | CS4398_MUTE_A | CS4398_PAMUTE;
 148         data->cs4398_regs[5] = 60 * 2;
 149         data->cs4398_regs[6] = 60 * 2;
 150         data->cs4362a_regs[6] = CS4362A_FM_SINGLE |
 151                 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
 152         data->cs4362a_regs[7] = 60 | CS4362A_MUTE;
 153         data->cs4362a_regs[8] = 60 | CS4362A_MUTE;
 154         data->cs4362a_regs[9] = data->cs4362a_regs[6];
 155         data->cs4362a_regs[10] = 60 | CS4362A_MUTE;
 156         data->cs4362a_regs[11] = 60 | CS4362A_MUTE;
 157         data->cs4362a_regs[12] = data->cs4362a_regs[6];
 158         data->cs4362a_regs[13] = 60 | CS4362A_MUTE;
 159         data->cs4362a_regs[14] = 60 | CS4362A_MUTE;
 160
 161         oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
 162                        OXYGEN_2WIRE_LENGTH_8 |
 163                        OXYGEN_2WIRE_INTERRUPT_MASK |
 164                        OXYGEN_2WIRE_SPEED_FAST);
 165
 166         cs43xx_registers_init(chip);
 167
 168         oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
 169                           GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
 170         oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
 171                             GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
 172
 173         xonar_init_cs53x1(chip);
 174         xonar_enable_output(chip);
 175
 176         snd_component_add(chip->card, "CS4398");
 177         snd_component_add(chip->card, "CS4362A");
 178         snd_component_add(chip->card, "CS5361");
 179 }
 180
 181 static void xonar_dx_init(struct oxygen *chip)
 182 {
 183         struct xonar_cs43xx *data = chip->model_data;
 184
 185         data->generic.ext_power_reg = OXYGEN_GPI_DATA;
 186         data->generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
 187         data->generic.ext_power_bit = GPI_EXT_POWER;
 188         xonar_init_ext_power(chip);
 189         xonar_d1_init(chip);
 190 }
 191
 192 static void xonar_d1_cleanup(struct oxygen *chip)
 193 {
 194         xonar_disable_output(chip);
 195         cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
 196         oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
 197 }
 198
 199 static void xonar_d1_suspend(struct oxygen *chip)
 200 {
 201         xonar_d1_cleanup(chip);
 202 }
 203
 204 static void xonar_d1_resume(struct oxygen *chip)
 205 {
 206         oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
 207         msleep(1);
 208         cs43xx_registers_init(chip);
 209         xonar_enable_output(chip);
 210 }
 211
 212 static void set_cs43xx_params(struct oxygen *chip,
 213                               struct snd_pcm_hw_params *params)
 214 {
 215         struct xonar_cs43xx *data = chip->model_data;
 216         u8 cs4398_fm, cs4362a_fm;
 217
 218         if (params_rate(params) <= 50000) {
 219                 cs4398_fm = CS4398_FM_SINGLE;
 220                 cs4362a_fm = CS4362A_FM_SINGLE;
 221         } else if (params_rate(params) <= 100000) {
 222                 cs4398_fm = CS4398_FM_DOUBLE;
 223                 cs4362a_fm = CS4362A_FM_DOUBLE;
 224         } else {
 225                 cs4398_fm = CS4398_FM_QUAD;
 226                 cs4362a_fm = CS4362A_FM_QUAD;
 227         }
 228         cs4398_fm |= CS4398_DEM_NONE | CS4398_DIF_LJUST;
 229         cs4398_write_cached(chip, 2, cs4398_fm);
 230         cs4362a_fm |= data->cs4362a_regs[6] & ~CS4362A_FM_MASK;
 231         cs4362a_write_cached(chip, 6, cs4362a_fm);
 232         cs4362a_write_cached(chip, 12, cs4362a_fm);
 233         cs4362a_fm &= CS4362A_FM_MASK;
 234         cs4362a_fm |= data->cs4362a_regs[9] & ~CS4362A_FM_MASK;
 235         cs4362a_write_cached(chip, 9, cs4362a_fm);
 236 }
 237
 238 static void update_cs4362a_volumes(struct oxygen *chip)
 239 {
 240         unsigned int i;
 241         u8 mute;
 242
 243         mute = chip->dac_mute ? CS4362A_MUTE : 0;
 244         for (i = 0; i < 6; ++i)
 245                 cs4362a_write_cached(chip, 7 + i + i / 2,
 246                                      (127 - chip->dac_volume[2 + i]) | mute);
 247 }
 248
 249 static void update_cs43xx_volume(struct oxygen *chip)
 250 {
 251         cs4398_write_cached(chip, 5, (127 - chip->dac_volume[0]) * 2);
 252         cs4398_write_cached(chip, 6, (127 - chip->dac_volume[1]) * 2);
 253         update_cs4362a_volumes(chip);
 254 }
 255
 256 static void update_cs43xx_mute(struct oxygen *chip)
 257 {
 258         u8 reg;
 259
 260         reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
 261         if (chip->dac_mute)
 262                 reg |= CS4398_MUTE_B | CS4398_MUTE_A;
 263         cs4398_write_cached(chip, 4, reg);
 264         update_cs4362a_volumes(chip);
 265 }
 266
 267 static void update_cs43xx_center_lfe_mix(struct oxygen *chip, bool mixed)
 268 {
 269         struct xonar_cs43xx *data = chip->model_data;
 270         u8 reg;
 271
 272         reg = data->cs4362a_regs[9] & ~CS4362A_ATAPI_MASK;
 273         if (mixed)
 274                 reg |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR;
 275         else
 276                 reg |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
 277         cs4362a_write_cached(chip, 9, reg);
 278 }
 279
 280 static const struct snd_kcontrol_new front_panel_switch = {
 281         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
 282         .name = "Front Panel Switch",
 283         .info = snd_ctl_boolean_mono_info,
 284         .get = xonar_gpio_bit_switch_get,
 285         .put = xonar_gpio_bit_switch_put,
 286         .private_value = GPIO_D1_FRONT_PANEL,
 287 };
 288
 289 static void xonar_d1_line_mic_ac97_switch(struct oxygen *chip,
 290                                           unsigned int reg, unsigned int mute)
 291 {
 292         if (reg == AC97_LINE) {
 293                 spin_lock_irq(&chip->reg_lock);
 294                 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
 295                                       mute ? GPIO_D1_INPUT_ROUTE : 0,
 296                                       GPIO_D1_INPUT_ROUTE);
 297                 spin_unlock_irq(&chip->reg_lock);
 298         }
 299 }
 300
 301 static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -6000, 100, 0);
 302
 303 static int xonar_d1_control_filter(struct snd_kcontrol_new *template)
 304 {
 305         if (!strncmp(template->name, "CD Capture ", 11))
 306                 return 1; /* no CD input */
 307         return 0;
 308 }
 309
 310 static int xonar_d1_mixer_init(struct oxygen *chip)
 311 {
 312         return snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip));
 313 }
 314
 315 static const struct oxygen_model model_xonar_d1 = {
 316         .longname = "Asus Virtuoso 100",
 317         .chip = "AV200",
 318         .init = xonar_d1_init,
 319         .control_filter = xonar_d1_control_filter,
 320         .mixer_init = xonar_d1_mixer_init,
 321         .cleanup = xonar_d1_cleanup,
 322         .suspend = xonar_d1_suspend,
 323         .resume = xonar_d1_resume,
 324         .get_i2s_mclk = oxygen_default_i2s_mclk,
 325         .set_dac_params = set_cs43xx_params,
 326         .set_adc_params = xonar_set_cs53x1_params,
 327         .update_dac_volume = update_cs43xx_volume,
 328         .update_dac_mute = update_cs43xx_mute,
 329         .update_center_lfe_mix = update_cs43xx_center_lfe_mix,
 330         .ac97_switch = xonar_d1_line_mic_ac97_switch,
 331         .dac_tlv = cs4362a_db_scale,
 332         .model_data_size = sizeof(struct xonar_cs43xx),
 333         .device_config = PLAYBACK_0_TO_I2S |
 334                          PLAYBACK_1_TO_SPDIF |
 335                          CAPTURE_0_FROM_I2S_2,
 336         .dac_channels = 8,
 337         .dac_volume_min = 127 - 60,
 338         .dac_volume_max = 127,
 339         .function_flags = OXYGEN_FUNCTION_2WIRE,
 340         .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
 341         .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
 342 };
 343
 344 int __devinit get_xonar_cs43xx_model(struct oxygen *chip,
 345                                      const struct pci_device_id *id)
 346 {
 347         switch (id->subdevice) {
 348         case 0x834f:
 349                 chip->model = model_xonar_d1;
 350                 chip->model.shortname = "Xonar D1";
 351                 break;
 352         case 0x8275:
 353         case 0x8327:
 354                 chip->model = model_xonar_d1;
 355                 chip->model.shortname = "Xonar DX";
 356                 chip->model.init = xonar_dx_init;
 357                 break;
 358         default:
 359                 return -EINVAL;
 360         }
 361         return 0;
 362 }