2 * C-Media CMI8788 driver for C-Media's reference design and similar models
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 * SPI 0 -> 1st AK4396 (front)
24 * SPI 1 -> 2nd AK4396 (surround)
25 * SPI 2 -> 3rd AK4396 (center/LFE)
27 * SPI 4 -> 4th AK4396 (back)
29 * GPIO 0 -> DFS0 of AK5385
30 * GPIO 1 -> DFS1 of AK5385
31 * GPIO 8 -> enable headphone amplifier on HT-Omega models
35 * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
38 #include <linux/delay.h>
39 #include <linux/mutex.h>
40 #include <linux/pci.h>
41 #include <sound/ac97_codec.h>
42 #include <sound/control.h>
43 #include <sound/core.h>
44 #include <sound/initval.h>
45 #include <sound/pcm.h>
46 #include <sound/pcm_params.h>
47 #include <sound/tlv.h>
52 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
53 MODULE_DESCRIPTION("C-Media CMI8788 driver");
54 MODULE_LICENSE("GPL v2");
55 MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
57 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
58 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
59 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
61 module_param_array(index, int, NULL, 0444);
62 MODULE_PARM_DESC(index, "card index");
63 module_param_array(id, charp, NULL, 0444);
64 MODULE_PARM_DESC(id, "ID string");
65 module_param_array(enable, bool, NULL, 0444);
66 MODULE_PARM_DESC(enable, "enable card");
69 MODEL_CMEDIA_REF, /* C-Media's reference design */
70 MODEL_MERIDIAN, /* AuzenTech X-Meridian */
71 MODEL_CLARO, /* HT-Omega Claro */
72 MODEL_CLARO_HALO, /* HT-Omega Claro halo */
75 static struct pci_device_id oxygen_ids[] __devinitdata = {
76 { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
77 { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
78 { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
79 { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
80 { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
81 { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
82 { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
83 { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
84 { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
85 { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
86 { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
89 MODULE_DEVICE_TABLE(pci, oxygen_ids);
92 #define GPIO_AK5385_DFS_MASK 0x0003
93 #define GPIO_AK5385_DFS_NORMAL 0x0000
94 #define GPIO_AK5385_DFS_DOUBLE 0x0001
95 #define GPIO_AK5385_DFS_QUAD 0x0002
97 #define GPIO_CLARO_HP 0x0100
100 u8 ak4396_regs[4][5];
104 static void ak4396_write(struct oxygen *chip, unsigned int codec,
107 /* maps ALSA channel pair number to SPI output */
108 static const u8 codec_spi_map[4] = {
111 struct generic_data *data = chip->model_data;
113 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
114 OXYGEN_SPI_DATA_LENGTH_2 |
115 OXYGEN_SPI_CLOCK_160 |
116 (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
117 OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
118 AK4396_WRITE | (reg << 8) | value);
119 data->ak4396_regs[codec][reg] = value;
122 static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
125 struct generic_data *data = chip->model_data;
127 if (value != data->ak4396_regs[codec][reg])
128 ak4396_write(chip, codec, reg, value);
131 static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
133 struct generic_data *data = chip->model_data;
135 oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
136 OXYGEN_SPI_DATA_LENGTH_2 |
137 OXYGEN_SPI_CLOCK_160 |
138 (3 << OXYGEN_SPI_CODEC_SHIFT) |
139 OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
141 if (reg < ARRAY_SIZE(data->wm8785_regs))
142 data->wm8785_regs[reg] = value;
145 static void ak4396_registers_init(struct oxygen *chip)
147 struct generic_data *data = chip->model_data;
150 for (i = 0; i < 4; ++i) {
151 ak4396_write(chip, i, AK4396_CONTROL_1,
152 AK4396_DIF_24_MSB | AK4396_RSTN);
153 ak4396_write(chip, i, AK4396_CONTROL_2,
154 data->ak4396_regs[0][AK4396_CONTROL_2]);
155 ak4396_write(chip, i, AK4396_CONTROL_3,
157 ak4396_write(chip, i, AK4396_LCH_ATT,
158 chip->dac_volume[i * 2]);
159 ak4396_write(chip, i, AK4396_RCH_ATT,
160 chip->dac_volume[i * 2 + 1]);
164 static void ak4396_init(struct oxygen *chip)
166 struct generic_data *data = chip->model_data;
168 data->ak4396_regs[0][AK4396_CONTROL_2] =
169 AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
170 ak4396_registers_init(chip);
171 snd_component_add(chip->card, "AK4396");
174 static void ak5385_init(struct oxygen *chip)
176 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
177 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
178 snd_component_add(chip->card, "AK5385");
181 static void wm8785_registers_init(struct oxygen *chip)
183 struct generic_data *data = chip->model_data;
185 wm8785_write(chip, WM8785_R7, 0);
186 wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
189 static void wm8785_init(struct oxygen *chip)
191 struct generic_data *data = chip->model_data;
193 data->wm8785_regs[0] =
194 WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
195 wm8785_registers_init(chip);
196 snd_component_add(chip->card, "WM8785");
199 static void generic_init(struct oxygen *chip)
205 static void meridian_init(struct oxygen *chip)
211 static void claro_enable_hp(struct oxygen *chip)
214 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
215 oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
218 static void claro_init(struct oxygen *chip)
222 claro_enable_hp(chip);
225 static void claro_halo_init(struct oxygen *chip)
229 claro_enable_hp(chip);
232 static void generic_cleanup(struct oxygen *chip)
236 static void claro_disable_hp(struct oxygen *chip)
238 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
241 static void claro_cleanup(struct oxygen *chip)
243 claro_disable_hp(chip);
246 static void claro_suspend(struct oxygen *chip)
248 claro_disable_hp(chip);
251 static void generic_resume(struct oxygen *chip)
253 ak4396_registers_init(chip);
254 wm8785_registers_init(chip);
257 static void meridian_resume(struct oxygen *chip)
259 ak4396_registers_init(chip);
262 static void claro_resume(struct oxygen *chip)
264 ak4396_registers_init(chip);
265 claro_enable_hp(chip);
268 static void set_ak4396_params(struct oxygen *chip,
269 struct snd_pcm_hw_params *params)
271 struct generic_data *data = chip->model_data;
275 value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
276 if (params_rate(params) <= 54000)
277 value |= AK4396_DFS_NORMAL;
278 else if (params_rate(params) <= 108000)
279 value |= AK4396_DFS_DOUBLE;
281 value |= AK4396_DFS_QUAD;
283 msleep(1); /* wait for the new MCLK to become stable */
285 if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
286 for (i = 0; i < 4; ++i) {
287 ak4396_write(chip, i, AK4396_CONTROL_1,
289 ak4396_write(chip, i, AK4396_CONTROL_2, value);
290 ak4396_write(chip, i, AK4396_CONTROL_1,
291 AK4396_DIF_24_MSB | AK4396_RSTN);
296 static void update_ak4396_volume(struct oxygen *chip)
300 for (i = 0; i < 4; ++i) {
301 ak4396_write_cached(chip, i, AK4396_LCH_ATT,
302 chip->dac_volume[i * 2]);
303 ak4396_write_cached(chip, i, AK4396_RCH_ATT,
304 chip->dac_volume[i * 2 + 1]);
308 static void update_ak4396_mute(struct oxygen *chip)
310 struct generic_data *data = chip->model_data;
314 value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
316 value |= AK4396_SMUTE;
317 for (i = 0; i < 4; ++i)
318 ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
321 static void set_wm8785_params(struct oxygen *chip,
322 struct snd_pcm_hw_params *params)
324 struct generic_data *data = chip->model_data;
327 value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
328 if (params_rate(params) <= 48000)
329 value |= WM8785_OSR_SINGLE;
330 else if (params_rate(params) <= 96000)
331 value |= WM8785_OSR_DOUBLE;
333 value |= WM8785_OSR_QUAD;
334 if (value != data->wm8785_regs[0]) {
335 wm8785_write(chip, WM8785_R7, 0);
336 wm8785_write(chip, WM8785_R0, value);
340 static void set_ak5385_params(struct oxygen *chip,
341 struct snd_pcm_hw_params *params)
345 if (params_rate(params) <= 54000)
346 value = GPIO_AK5385_DFS_NORMAL;
347 else if (params_rate(params) <= 108000)
348 value = GPIO_AK5385_DFS_DOUBLE;
350 value = GPIO_AK5385_DFS_QUAD;
351 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
352 value, GPIO_AK5385_DFS_MASK);
355 static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
357 static const struct oxygen_model model_generic = {
358 .shortname = "C-Media CMI8788",
359 .longname = "C-Media Oxygen HD Audio",
361 .init = generic_init,
362 .cleanup = generic_cleanup,
363 .resume = generic_resume,
364 .get_i2s_mclk = oxygen_default_i2s_mclk,
365 .set_dac_params = set_ak4396_params,
366 .set_adc_params = set_wm8785_params,
367 .update_dac_volume = update_ak4396_volume,
368 .update_dac_mute = update_ak4396_mute,
369 .dac_tlv = ak4396_db_scale,
370 .model_data_size = sizeof(struct generic_data),
371 .device_config = PLAYBACK_0_TO_I2S |
372 PLAYBACK_1_TO_SPDIF |
373 PLAYBACK_2_TO_AC97_1 |
374 CAPTURE_0_FROM_I2S_1 |
375 CAPTURE_1_FROM_SPDIF |
376 CAPTURE_2_FROM_AC97_1,
379 .dac_volume_max = 255,
380 .function_flags = OXYGEN_FUNCTION_SPI |
381 OXYGEN_FUNCTION_ENABLE_SPI_4_5,
382 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
383 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
386 static int __devinit get_oxygen_model(struct oxygen *chip,
387 const struct pci_device_id *id)
389 chip->model = model_generic;
390 switch (id->driver_data) {
392 chip->model.init = meridian_init;
393 chip->model.resume = meridian_resume;
394 chip->model.set_adc_params = set_ak5385_params;
395 chip->model.device_config = PLAYBACK_0_TO_I2S |
396 PLAYBACK_1_TO_SPDIF |
397 CAPTURE_0_FROM_I2S_2 |
398 CAPTURE_1_FROM_SPDIF;
401 chip->model.init = claro_init;
402 chip->model.cleanup = claro_cleanup;
403 chip->model.suspend = claro_suspend;
404 chip->model.resume = claro_resume;
406 case MODEL_CLARO_HALO:
407 chip->model.init = claro_halo_init;
408 chip->model.cleanup = claro_cleanup;
409 chip->model.suspend = claro_suspend;
410 chip->model.resume = claro_resume;
411 chip->model.set_adc_params = set_ak5385_params;
414 if (id->driver_data == MODEL_MERIDIAN ||
415 id->driver_data == MODEL_CLARO_HALO) {
416 chip->model.misc_flags = OXYGEN_MISC_MIDI;
417 chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
422 static int __devinit generic_oxygen_probe(struct pci_dev *pci,
423 const struct pci_device_id *pci_id)
428 if (dev >= SNDRV_CARDS)
434 err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
435 oxygen_ids, get_oxygen_model);
441 static struct pci_driver oxygen_driver = {
443 .id_table = oxygen_ids,
444 .probe = generic_oxygen_probe,
445 .remove = __devexit_p(oxygen_pci_remove),
447 .suspend = oxygen_pci_suspend,
448 .resume = oxygen_pci_resume,
452 static int __init alsa_card_oxygen_init(void)
454 return pci_register_driver(&oxygen_driver);
457 static void __exit alsa_card_oxygen_exit(void)
459 pci_unregister_driver(&oxygen_driver);
462 module_init(alsa_card_oxygen_init)
463 module_exit(alsa_card_oxygen_exit)