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   1 /*
   2  * C-Media CMI8788 driver for C-Media's reference design and similar models
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  *
   6  *
   7  *  This driver is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License, version 2.
   9  *
  10  *  This driver is distributed in the hope that it will be useful,
  11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *  GNU General Public License for more details.
  14  *
  15  *  You should have received a copy of the GNU General Public License
  16  *  along with this driver; if not, write to the Free Software
  17  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18  */
  19
  20 /*
  21  * CMI8788:
  22  *
  23  * SPI 0 -> 1st AK4396 (front)
  24  * SPI 1 -> 2nd AK4396 (surround)
  25  * SPI 2 -> 3rd AK4396 (center/LFE)
  26  * SPI 3 -> WM8785
  27  * SPI 4 -> 4th AK4396 (back)
  28  *
  29  * GPIO 0 -> DFS0 of AK5385
  30  * GPIO 1 -> DFS1 of AK5385
  31  * GPIO 8 -> enable headphone amplifier on HT-Omega models
  32  *
  33  * CM9780:
  34  *
  35  * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
  36  */
  37
  38 #include <linux/delay.h>
  39 #include <linux/mutex.h>
  40 #include <linux/pci.h>
  41 #include <sound/ac97_codec.h>
  42 #include <sound/control.h>
  43 #include <sound/core.h>
  44 #include <sound/initval.h>
  45 #include <sound/pcm.h>
  46 #include <sound/pcm_params.h>
  47 #include <sound/tlv.h>
  48 #include "oxygen.h"
  49 #include "ak4396.h"
  50 #include "wm8785.h"
  51
  52 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  53 MODULE_DESCRIPTION("C-Media CMI8788 driver");
  54 MODULE_LICENSE("GPL v2");
  55 MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
  56
  57 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  58 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  59 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  60
  61 module_param_array(index, int, NULL, 0444);
  62 MODULE_PARM_DESC(index, "card index");
  63 module_param_array(id, charp, NULL, 0444);
  64 MODULE_PARM_DESC(id, "ID string");
  65 module_param_array(enable, bool, NULL, 0444);
  66 MODULE_PARM_DESC(enable, "enable card");
  67
  68 enum {
  69         MODEL_CMEDIA_REF,       /* C-Media's reference design */
  70         MODEL_MERIDIAN,         /* AuzenTech X-Meridian */
  71         MODEL_CLARO,            /* HT-Omega Claro */
  72         MODEL_CLARO_HALO,       /* HT-Omega Claro halo */
  73 };
  74
  75 static struct pci_device_id oxygen_ids[] __devinitdata = {
  76         { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
  77         { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
  78         { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
  79         { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
  80         { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
  81         { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
  82         { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
  83         { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
  84         { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
  85         { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
  86         { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
  87         { }
  88 };
  89 MODULE_DEVICE_TABLE(pci, oxygen_ids);
  90
  91
  92 #define GPIO_AK5385_DFS_MASK    0x0003
  93 #define GPIO_AK5385_DFS_NORMAL  0x0000
  94 #define GPIO_AK5385_DFS_DOUBLE  0x0001
  95 #define GPIO_AK5385_DFS_QUAD    0x0002
  96
  97 #define GPIO_CLARO_HP           0x0100
  98
  99 struct generic_data {
 100         u8 ak4396_regs[4][5];
 101         u16 wm8785_regs[1];
 102 };
 103
 104 static void ak4396_write(struct oxygen *chip, unsigned int codec,
 105                          u8 reg, u8 value)
 106 {
 107         /* maps ALSA channel pair number to SPI output */
 108         static const u8 codec_spi_map[4] = {
 109                 0, 1, 2, 4
 110         };
 111         struct generic_data *data = chip->model_data;
 112
 113         oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
 114                          OXYGEN_SPI_DATA_LENGTH_2 |
 115                          OXYGEN_SPI_CLOCK_160 |
 116                          (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
 117                          OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
 118                          AK4396_WRITE | (reg << 8) | value);
 119         data->ak4396_regs[codec][reg] = value;
 120 }
 121
 122 static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
 123                                 u8 reg, u8 value)
 124 {
 125         struct generic_data *data = chip->model_data;
 126
 127         if (value != data->ak4396_regs[codec][reg])
 128                 ak4396_write(chip, codec, reg, value);
 129 }
 130
 131 static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
 132 {
 133         struct generic_data *data = chip->model_data;
 134
 135         oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
 136                          OXYGEN_SPI_DATA_LENGTH_2 |
 137                          OXYGEN_SPI_CLOCK_160 |
 138                          (3 << OXYGEN_SPI_CODEC_SHIFT) |
 139                          OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
 140                          (reg << 9) | value);
 141         if (reg < ARRAY_SIZE(data->wm8785_regs))
 142                 data->wm8785_regs[reg] = value;
 143 }
 144
 145 static void ak4396_registers_init(struct oxygen *chip)
 146 {
 147         struct generic_data *data = chip->model_data;
 148         unsigned int i;
 149
 150         for (i = 0; i < 4; ++i) {
 151                 ak4396_write(chip, i, AK4396_CONTROL_1,
 152                              AK4396_DIF_24_MSB | AK4396_RSTN);
 153                 ak4396_write(chip, i, AK4396_CONTROL_2,
 154                              data->ak4396_regs[0][AK4396_CONTROL_2]);
 155                 ak4396_write(chip, i, AK4396_CONTROL_3,
 156                              AK4396_PCM);
 157                 ak4396_write(chip, i, AK4396_LCH_ATT,
 158                              chip->dac_volume[i * 2]);
 159                 ak4396_write(chip, i, AK4396_RCH_ATT,
 160                              chip->dac_volume[i * 2 + 1]);
 161         }
 162 }
 163
 164 static void ak4396_init(struct oxygen *chip)
 165 {
 166         struct generic_data *data = chip->model_data;
 167
 168         data->ak4396_regs[0][AK4396_CONTROL_2] =
 169                 AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
 170         ak4396_registers_init(chip);
 171         snd_component_add(chip->card, "AK4396");
 172 }
 173
 174 static void ak5385_init(struct oxygen *chip)
 175 {
 176         oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
 177         oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
 178         snd_component_add(chip->card, "AK5385");
 179 }
 180
 181 static void wm8785_registers_init(struct oxygen *chip)
 182 {
 183         struct generic_data *data = chip->model_data;
 184
 185         wm8785_write(chip, WM8785_R7, 0);
 186         wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
 187 }
 188
 189 static void wm8785_init(struct oxygen *chip)
 190 {
 191         struct generic_data *data = chip->model_data;
 192
 193         data->wm8785_regs[0] =
 194                 WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
 195         wm8785_registers_init(chip);
 196         snd_component_add(chip->card, "WM8785");
 197 }
 198
 199 static void generic_init(struct oxygen *chip)
 200 {
 201         ak4396_init(chip);
 202         wm8785_init(chip);
 203 }
 204
 205 static void meridian_init(struct oxygen *chip)
 206 {
 207         ak4396_init(chip);
 208         ak5385_init(chip);
 209 }
 210
 211 static void claro_enable_hp(struct oxygen *chip)
 212 {
 213         msleep(300);
 214         oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
 215         oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
 216 }
 217
 218 static void claro_init(struct oxygen *chip)
 219 {
 220         ak4396_init(chip);
 221         wm8785_init(chip);
 222         claro_enable_hp(chip);
 223 }
 224
 225 static void claro_halo_init(struct oxygen *chip)
 226 {
 227         ak4396_init(chip);
 228         ak5385_init(chip);
 229         claro_enable_hp(chip);
 230 }
 231
 232 static void generic_cleanup(struct oxygen *chip)
 233 {
 234 }
 235
 236 static void claro_disable_hp(struct oxygen *chip)
 237 {
 238         oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
 239 }
 240
 241 static void claro_cleanup(struct oxygen *chip)
 242 {
 243         claro_disable_hp(chip);
 244 }
 245
 246 static void claro_suspend(struct oxygen *chip)
 247 {
 248         claro_disable_hp(chip);
 249 }
 250
 251 static void generic_resume(struct oxygen *chip)
 252 {
 253         ak4396_registers_init(chip);
 254         wm8785_registers_init(chip);
 255 }
 256
 257 static void meridian_resume(struct oxygen *chip)
 258 {
 259         ak4396_registers_init(chip);
 260 }
 261
 262 static void claro_resume(struct oxygen *chip)
 263 {
 264         ak4396_registers_init(chip);
 265         claro_enable_hp(chip);
 266 }
 267
 268 static void set_ak4396_params(struct oxygen *chip,
 269                               struct snd_pcm_hw_params *params)
 270 {
 271         struct generic_data *data = chip->model_data;
 272         unsigned int i;
 273         u8 value;
 274
 275         value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
 276         if (params_rate(params) <= 54000)
 277                 value |= AK4396_DFS_NORMAL;
 278         else if (params_rate(params) <= 108000)
 279                 value |= AK4396_DFS_DOUBLE;
 280         else
 281                 value |= AK4396_DFS_QUAD;
 282
 283         msleep(1); /* wait for the new MCLK to become stable */
 284
 285         if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
 286                 for (i = 0; i < 4; ++i) {
 287                         ak4396_write(chip, i, AK4396_CONTROL_1,
 288                                      AK4396_DIF_24_MSB);
 289                         ak4396_write(chip, i, AK4396_CONTROL_2, value);
 290                         ak4396_write(chip, i, AK4396_CONTROL_1,
 291                                      AK4396_DIF_24_MSB | AK4396_RSTN);
 292                 }
 293         }
 294 }
 295
 296 static void update_ak4396_volume(struct oxygen *chip)
 297 {
 298         unsigned int i;
 299
 300         for (i = 0; i < 4; ++i) {
 301                 ak4396_write_cached(chip, i, AK4396_LCH_ATT,
 302                                     chip->dac_volume[i * 2]);
 303                 ak4396_write_cached(chip, i, AK4396_RCH_ATT,
 304                                     chip->dac_volume[i * 2 + 1]);
 305         }
 306 }
 307
 308 static void update_ak4396_mute(struct oxygen *chip)
 309 {
 310         struct generic_data *data = chip->model_data;
 311         unsigned int i;
 312         u8 value;
 313
 314         value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
 315         if (chip->dac_mute)
 316                 value |= AK4396_SMUTE;
 317         for (i = 0; i < 4; ++i)
 318                 ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
 319 }
 320
 321 static void set_wm8785_params(struct oxygen *chip,
 322                               struct snd_pcm_hw_params *params)
 323 {
 324         struct generic_data *data = chip->model_data;
 325         unsigned int value;
 326
 327         value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
 328         if (params_rate(params) <= 48000)
 329                 value |= WM8785_OSR_SINGLE;
 330         else if (params_rate(params) <= 96000)
 331                 value |= WM8785_OSR_DOUBLE;
 332         else
 333                 value |= WM8785_OSR_QUAD;
 334         if (value != data->wm8785_regs[0]) {
 335                 wm8785_write(chip, WM8785_R7, 0);
 336                 wm8785_write(chip, WM8785_R0, value);
 337         }
 338 }
 339
 340 static void set_ak5385_params(struct oxygen *chip,
 341                               struct snd_pcm_hw_params *params)
 342 {
 343         unsigned int value;
 344
 345         if (params_rate(params) <= 54000)
 346                 value = GPIO_AK5385_DFS_NORMAL;
 347         else if (params_rate(params) <= 108000)
 348                 value = GPIO_AK5385_DFS_DOUBLE;
 349         else
 350                 value = GPIO_AK5385_DFS_QUAD;
 351         oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
 352                               value, GPIO_AK5385_DFS_MASK);
 353 }
 354
 355 static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
 356
 357 static const struct oxygen_model model_generic = {
 358         .shortname = "C-Media CMI8788",
 359         .longname = "C-Media Oxygen HD Audio",
 360         .chip = "CMI8788",
 361         .init = generic_init,
 362         .cleanup = generic_cleanup,
 363         .resume = generic_resume,
 364         .set_dac_params = set_ak4396_params,
 365         .set_adc_params = set_wm8785_params,
 366         .update_dac_volume = update_ak4396_volume,
 367         .update_dac_mute = update_ak4396_mute,
 368         .dac_tlv = ak4396_db_scale,
 369         .model_data_size = sizeof(struct generic_data),
 370         .device_config = PLAYBACK_0_TO_I2S |
 371                          PLAYBACK_1_TO_SPDIF |
 372                          PLAYBACK_2_TO_AC97_1 |
 373                          CAPTURE_0_FROM_I2S_1 |
 374                          CAPTURE_1_FROM_SPDIF |
 375                          CAPTURE_2_FROM_AC97_1,
 376         .dac_channels = 8,
 377         .dac_volume_min = 0,
 378         .dac_volume_max = 255,
 379         .function_flags = OXYGEN_FUNCTION_SPI |
 380                           OXYGEN_FUNCTION_ENABLE_SPI_4_5,
 381         .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
 382         .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
 383 };
 384
 385 static int __devinit get_oxygen_model(struct oxygen *chip,
 386                                       const struct pci_device_id *id)
 387 {
 388         chip->model = model_generic;
 389         switch (id->driver_data) {
 390         case MODEL_MERIDIAN:
 391                 chip->model.init = meridian_init;
 392                 chip->model.resume = meridian_resume;
 393                 chip->model.set_adc_params = set_ak5385_params;
 394                 chip->model.device_config = PLAYBACK_0_TO_I2S |
 395                                             PLAYBACK_1_TO_SPDIF |
 396                                             CAPTURE_0_FROM_I2S_2 |
 397                                             CAPTURE_1_FROM_SPDIF;
 398                 break;
 399         case MODEL_CLARO:
 400                 chip->model.init = claro_init;
 401                 chip->model.cleanup = claro_cleanup;
 402                 chip->model.suspend = claro_suspend;
 403                 chip->model.resume = claro_resume;
 404                 break;
 405         case MODEL_CLARO_HALO:
 406                 chip->model.init = claro_halo_init;
 407                 chip->model.cleanup = claro_cleanup;
 408                 chip->model.suspend = claro_suspend;
 409                 chip->model.resume = claro_resume;
 410                 chip->model.set_adc_params = set_ak5385_params;
 411                 break;
 412         }
 413         if (id->driver_data == MODEL_MERIDIAN ||
 414             id->driver_data == MODEL_CLARO_HALO) {
 415                 chip->model.misc_flags = OXYGEN_MISC_MIDI;
 416                 chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
 417         }
 418         return 0;
 419 }
 420
 421 static int __devinit generic_oxygen_probe(struct pci_dev *pci,
 422                                           const struct pci_device_id *pci_id)
 423 {
 424         static int dev;
 425         int err;
 426
 427         if (dev >= SNDRV_CARDS)
 428                 return -ENODEV;
 429         if (!enable[dev]) {
 430                 ++dev;
 431                 return -ENOENT;
 432         }
 433         err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
 434                                oxygen_ids, get_oxygen_model);
 435         if (err >= 0)
 436                 ++dev;
 437         return err;
 438 }
 439
 440 static struct pci_driver oxygen_driver = {
 441         .name = "CMI8788",
 442         .id_table = oxygen_ids,
 443         .probe = generic_oxygen_probe,
 444         .remove = __devexit_p(oxygen_pci_remove),
 445 #ifdef CONFIG_PM
 446         .suspend = oxygen_pci_suspend,
 447         .resume = oxygen_pci_resume,
 448 #endif
 449 };
 450
 451 static int __init alsa_card_oxygen_init(void)
 452 {
 453         return pci_register_driver(&oxygen_driver);
 454 }
 455
 456 static void __exit alsa_card_oxygen_exit(void)
 457 {
 458         pci_unregister_driver(&oxygen_driver);
 459 }
 460
 461 module_init(alsa_card_oxygen_init)
 462 module_exit(alsa_card_oxygen_exit)