2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Documentation: ARM DDI 0173B
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
23 #include <sound/core.h>
24 #include <sound/initval.h>
25 #include <sound/ac97_codec.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
31 #define DRIVER_NAME "aaci-pl041"
34 * PM support is not complete. Turn it off.
38 static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
40 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num);
43 * Ensure that the slot 1/2 RX registers are empty.
45 v = readl(aaci->base + AACI_SLFR);
47 readl(aaci->base + AACI_SL2RX);
49 readl(aaci->base + AACI_SL1RX);
51 writel(maincr, aaci->base + AACI_MAINCR);
56 * The recommended use of programming the external codec through slot 1
57 * and slot 2 data is to use the channels during setup routines and the
58 * slot register at any other time. The data written into slot 1, slot 2
59 * and slot 12 registers is transmitted only when their corresponding
60 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
63 static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
66 struct aaci *aaci = ac97->private_data;
73 mutex_lock(&aaci->ac97_sem);
75 aaci_ac97_select_codec(aaci, ac97);
78 * P54: You must ensure that AACI_SL2TX is always written
79 * to, if required, before data is written to AACI_SL1TX.
81 writel(val << 4, aaci->base + AACI_SL2TX);
82 writel(reg << 12, aaci->base + AACI_SL1TX);
85 * Wait for the transmission of both slots to complete.
88 v = readl(aaci->base + AACI_SLFR);
89 } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout);
92 dev_err(&aaci->dev->dev,
93 "timeout waiting for write to complete\n");
95 mutex_unlock(&aaci->ac97_sem);
99 * Read an AC'97 register.
101 static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
103 struct aaci *aaci = ac97->private_data;
111 mutex_lock(&aaci->ac97_sem);
113 aaci_ac97_select_codec(aaci, ac97);
116 * Write the register address to slot 1.
118 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
121 * Wait for the transmission to complete.
124 v = readl(aaci->base + AACI_SLFR);
125 } while ((v & SLFR_1TXB) && --timeout);
128 dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n");
134 * Give the AC'97 codec more than enough time
135 * to respond. (42us = ~2 frames at 48kHz.)
140 * Wait for slot 2 to indicate data.
145 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
146 } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout);
149 dev_err(&aaci->dev->dev, "timeout on RX valid\n");
155 v = readl(aaci->base + AACI_SL1RX) >> 12;
157 v = readl(aaci->base + AACI_SL2RX) >> 4;
159 } else if (--retries) {
160 dev_warn(&aaci->dev->dev,
161 "ac97 read back fail. retry\n");
164 dev_warn(&aaci->dev->dev,
165 "wrong ac97 register read back (%x != %x)\n",
171 mutex_unlock(&aaci->ac97_sem);
175 static inline void aaci_chan_wait_ready(struct aaci_runtime *aacirun)
181 val = readl(aacirun->base + AACI_SR);
182 } while (val & (SR_TXB|SR_RXB) && timeout--);
190 static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
192 if (mask & ISR_ORINTR) {
193 dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel);
194 writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
197 if (mask & ISR_RXTOINTR) {
198 dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel);
199 writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
202 if (mask & ISR_RXINTR) {
203 struct aaci_runtime *aacirun = &aaci->capture;
206 if (!aacirun->substream || !aacirun->start) {
207 dev_warn(&aaci->dev->dev, "RX interrupt???\n");
208 writel(0, aacirun->base + AACI_IE);
214 unsigned int len = aacirun->fifosz;
217 if (aacirun->bytes <= 0) {
218 aacirun->bytes += aacirun->period;
220 spin_unlock(&aaci->lock);
221 snd_pcm_period_elapsed(aacirun->substream);
222 spin_lock(&aaci->lock);
224 if (!(aacirun->cr & CR_EN))
227 val = readl(aacirun->base + AACI_SR);
228 if (!(val & SR_RXHF))
230 if (!(val & SR_RXFF))
233 aacirun->bytes -= len;
235 /* reading 16 bytes at a time */
236 for( ; len > 0; len -= 16) {
238 "ldmia %1, {r0, r1, r2, r3}\n\t"
239 "stmia %0!, {r0, r1, r2, r3}"
241 : "r" (aacirun->fifo)
242 : "r0", "r1", "r2", "r3", "cc");
244 if (ptr >= aacirun->end)
245 ptr = aacirun->start;
251 if (mask & ISR_URINTR) {
252 dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel);
253 writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
256 if (mask & ISR_TXINTR) {
257 struct aaci_runtime *aacirun = &aaci->playback;
260 if (!aacirun->substream || !aacirun->start) {
261 dev_warn(&aaci->dev->dev, "TX interrupt???\n");
262 writel(0, aacirun->base + AACI_IE);
268 unsigned int len = aacirun->fifosz;
271 if (aacirun->bytes <= 0) {
272 aacirun->bytes += aacirun->period;
274 spin_unlock(&aaci->lock);
275 snd_pcm_period_elapsed(aacirun->substream);
276 spin_lock(&aaci->lock);
278 if (!(aacirun->cr & CR_EN))
281 val = readl(aacirun->base + AACI_SR);
282 if (!(val & SR_TXHE))
284 if (!(val & SR_TXFE))
287 aacirun->bytes -= len;
289 /* writing 16 bytes at a time */
290 for ( ; len > 0; len -= 16) {
292 "ldmia %0!, {r0, r1, r2, r3}\n\t"
293 "stmia %1, {r0, r1, r2, r3}"
295 : "r" (aacirun->fifo)
296 : "r0", "r1", "r2", "r3", "cc");
298 if (ptr >= aacirun->end)
299 ptr = aacirun->start;
307 static irqreturn_t aaci_irq(int irq, void *devid)
309 struct aaci *aaci = devid;
313 spin_lock(&aaci->lock);
314 mask = readl(aaci->base + AACI_ALLINTS);
317 for (i = 0; i < 4; i++, m >>= 7) {
319 aaci_fifo_irq(aaci, i, m);
323 spin_unlock(&aaci->lock);
325 return mask ? IRQ_HANDLED : IRQ_NONE;
333 static struct snd_pcm_hardware aaci_hw_info = {
334 .info = SNDRV_PCM_INFO_MMAP |
335 SNDRV_PCM_INFO_MMAP_VALID |
336 SNDRV_PCM_INFO_INTERLEAVED |
337 SNDRV_PCM_INFO_BLOCK_TRANSFER |
338 SNDRV_PCM_INFO_RESUME,
341 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
342 * words. It also doesn't support 12-bit at all.
344 .formats = SNDRV_PCM_FMTBIT_S16_LE,
346 /* rates are setup from the AC'97 codec */
349 .buffer_bytes_max = 64 * 1024,
350 .period_bytes_min = 256,
351 .period_bytes_max = PAGE_SIZE,
353 .periods_max = PAGE_SIZE / 16,
356 static int __aaci_pcm_open(struct aaci *aaci,
357 struct snd_pcm_substream *substream,
358 struct aaci_runtime *aacirun)
360 struct snd_pcm_runtime *runtime = substream->runtime;
363 aacirun->substream = substream;
364 runtime->private_data = aacirun;
365 runtime->hw = aaci_hw_info;
366 runtime->hw.rates = aacirun->pcm->rates;
367 snd_pcm_limit_hw_rates(runtime);
370 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
371 * mode, each 32-bit word contains one sample. If we're in
372 * compact mode, each 32-bit word contains two samples, effectively
373 * halving the FIFO size. However, we don't know for sure which
374 * we'll be using at this point. We set this to the lower limit.
376 runtime->hw.fifo_size = aaci->fifosize * 2;
378 ret = request_irq(aaci->dev->irq[0], aaci_irq, IRQF_SHARED|IRQF_DISABLED,
393 static int aaci_pcm_close(struct snd_pcm_substream *substream)
395 struct aaci *aaci = substream->private_data;
396 struct aaci_runtime *aacirun = substream->runtime->private_data;
398 WARN_ON(aacirun->cr & CR_EN);
400 aacirun->substream = NULL;
401 free_irq(aaci->dev->irq[0], aaci);
406 static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
408 struct aaci_runtime *aacirun = substream->runtime->private_data;
411 * This must not be called with the device enabled.
413 WARN_ON(aacirun->cr & CR_EN);
415 if (aacirun->pcm_open)
416 snd_ac97_pcm_close(aacirun->pcm);
417 aacirun->pcm_open = 0;
420 * Clear out the DMA and any allocated buffers.
422 snd_pcm_lib_free_pages(substream);
427 static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
428 struct aaci_runtime *aacirun,
429 struct snd_pcm_hw_params *params)
433 aaci_pcm_hw_free(substream);
434 if (aacirun->pcm_open) {
435 snd_ac97_pcm_close(aacirun->pcm);
436 aacirun->pcm_open = 0;
439 err = snd_pcm_lib_malloc_pages(substream,
440 params_buffer_bytes(params));
444 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
445 params_channels(params),
446 aacirun->pcm->r[0].slots);
450 aacirun->pcm_open = 1;
456 static int aaci_pcm_prepare(struct snd_pcm_substream *substream)
458 struct snd_pcm_runtime *runtime = substream->runtime;
459 struct aaci_runtime *aacirun = runtime->private_data;
461 aacirun->start = (void *)runtime->dma_area;
462 aacirun->end = aacirun->start + snd_pcm_lib_buffer_bytes(substream);
463 aacirun->ptr = aacirun->start;
465 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size);
470 static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream)
472 struct snd_pcm_runtime *runtime = substream->runtime;
473 struct aaci_runtime *aacirun = runtime->private_data;
474 ssize_t bytes = aacirun->ptr - aacirun->start;
476 return bytes_to_frames(runtime, bytes);
481 * Playback specific ALSA stuff
483 static const u32 channels_to_txmask[] = {
484 [2] = CR_SL3 | CR_SL4,
485 [4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8,
486 [6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9,
490 * We can support two and four channel audio. Unfortunately
491 * six channel audio requires a non-standard channel ordering:
493 * 4 -> FL(3), FR(4), SL(7), SR(8)
494 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
495 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
496 * This requires an ALSA configuration file to correct.
498 static unsigned int channel_list[] = { 2, 4, 6 };
501 aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
503 struct aaci *aaci = rule->private;
504 unsigned int chan_mask = 1 << 0, slots;
507 * pcms[0] is the our 5.1 PCM instance.
509 slots = aaci->ac97_bus->pcms[0].r[0].slots;
510 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) {
512 if (slots & (1 << AC97_SLOT_LFE))
516 return snd_interval_list(hw_param_interval(p, rule->var),
517 ARRAY_SIZE(channel_list), channel_list,
521 static int aaci_pcm_open(struct snd_pcm_substream *substream)
523 struct aaci *aaci = substream->private_data;
527 * Add rule describing channel dependency.
529 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
530 SNDRV_PCM_HW_PARAM_CHANNELS,
531 aaci_rule_channels, aaci,
532 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
536 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
537 ret = __aaci_pcm_open(aaci, substream, &aaci->playback);
539 ret = __aaci_pcm_open(aaci, substream, &aaci->capture);
544 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
545 struct snd_pcm_hw_params *params)
547 struct aaci *aaci = substream->private_data;
548 struct aaci_runtime *aacirun = substream->runtime->private_data;
549 unsigned int channels = params_channels(params);
552 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) ||
553 !channels_to_txmask[channels]);
555 ret = aaci_pcm_hw_params(substream, aacirun, params);
558 * Enable FIFO, compact mode, 16 bits per sample.
559 * FIXME: double rate slots?
562 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
563 aacirun->cr |= channels_to_txmask[channels];
565 aacirun->fifosz = aaci->fifosize * 4;
566 if (aacirun->cr & CR_COMPACT)
567 aacirun->fifosz >>= 1;
572 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
576 ie = readl(aacirun->base + AACI_IE);
577 ie &= ~(IE_URIE|IE_TXIE);
578 writel(ie, aacirun->base + AACI_IE);
579 aacirun->cr &= ~CR_EN;
580 aaci_chan_wait_ready(aacirun);
581 writel(aacirun->cr, aacirun->base + AACI_TXCR);
584 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
588 aaci_chan_wait_ready(aacirun);
589 aacirun->cr |= CR_EN;
591 ie = readl(aacirun->base + AACI_IE);
592 ie |= IE_URIE | IE_TXIE;
593 writel(ie, aacirun->base + AACI_IE);
594 writel(aacirun->cr, aacirun->base + AACI_TXCR);
597 static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
599 struct aaci *aaci = substream->private_data;
600 struct aaci_runtime *aacirun = substream->runtime->private_data;
604 spin_lock_irqsave(&aaci->lock, flags);
606 case SNDRV_PCM_TRIGGER_START:
607 aaci_pcm_playback_start(aacirun);
610 case SNDRV_PCM_TRIGGER_RESUME:
611 aaci_pcm_playback_start(aacirun);
614 case SNDRV_PCM_TRIGGER_STOP:
615 aaci_pcm_playback_stop(aacirun);
618 case SNDRV_PCM_TRIGGER_SUSPEND:
619 aaci_pcm_playback_stop(aacirun);
622 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
625 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
631 spin_unlock_irqrestore(&aaci->lock, flags);
636 static struct snd_pcm_ops aaci_playback_ops = {
637 .open = aaci_pcm_open,
638 .close = aaci_pcm_close,
639 .ioctl = snd_pcm_lib_ioctl,
640 .hw_params = aaci_pcm_playback_hw_params,
641 .hw_free = aaci_pcm_hw_free,
642 .prepare = aaci_pcm_prepare,
643 .trigger = aaci_pcm_playback_trigger,
644 .pointer = aaci_pcm_pointer,
647 static int aaci_pcm_capture_hw_params(struct snd_pcm_substream *substream,
648 struct snd_pcm_hw_params *params)
650 struct aaci *aaci = substream->private_data;
651 struct aaci_runtime *aacirun = substream->runtime->private_data;
654 ret = aaci_pcm_hw_params(substream, aacirun, params);
657 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
659 /* Line in record: slot 3 and 4 */
660 aacirun->cr |= CR_SL3 | CR_SL4;
662 aacirun->fifosz = aaci->fifosize * 4;
664 if (aacirun->cr & CR_COMPACT)
665 aacirun->fifosz >>= 1;
670 static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun)
674 aaci_chan_wait_ready(aacirun);
676 ie = readl(aacirun->base + AACI_IE);
677 ie &= ~(IE_ORIE | IE_RXIE);
678 writel(ie, aacirun->base+AACI_IE);
680 aacirun->cr &= ~CR_EN;
682 writel(aacirun->cr, aacirun->base + AACI_RXCR);
685 static void aaci_pcm_capture_start(struct aaci_runtime *aacirun)
689 aaci_chan_wait_ready(aacirun);
692 /* RX Timeout value: bits 28:17 in RXCR */
693 aacirun->cr |= 0xf << 17;
696 aacirun->cr |= CR_EN;
697 writel(aacirun->cr, aacirun->base + AACI_RXCR);
699 ie = readl(aacirun->base + AACI_IE);
700 ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full
701 writel(ie, aacirun->base + AACI_IE);
704 static int aaci_pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd)
706 struct aaci *aaci = substream->private_data;
707 struct aaci_runtime *aacirun = substream->runtime->private_data;
711 spin_lock_irqsave(&aaci->lock, flags);
714 case SNDRV_PCM_TRIGGER_START:
715 aaci_pcm_capture_start(aacirun);
718 case SNDRV_PCM_TRIGGER_RESUME:
719 aaci_pcm_capture_start(aacirun);
722 case SNDRV_PCM_TRIGGER_STOP:
723 aaci_pcm_capture_stop(aacirun);
726 case SNDRV_PCM_TRIGGER_SUSPEND:
727 aaci_pcm_capture_stop(aacirun);
730 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
733 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
740 spin_unlock_irqrestore(&aaci->lock, flags);
745 static int aaci_pcm_capture_prepare(struct snd_pcm_substream *substream)
747 struct snd_pcm_runtime *runtime = substream->runtime;
748 struct aaci *aaci = substream->private_data;
750 aaci_pcm_prepare(substream);
752 /* allow changing of sample rate */
753 aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */
754 aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
755 aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate);
757 /* Record select: Mic: 0, Aux: 3, Line: 4 */
758 aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404);
763 static struct snd_pcm_ops aaci_capture_ops = {
764 .open = aaci_pcm_open,
765 .close = aaci_pcm_close,
766 .ioctl = snd_pcm_lib_ioctl,
767 .hw_params = aaci_pcm_capture_hw_params,
768 .hw_free = aaci_pcm_hw_free,
769 .prepare = aaci_pcm_capture_prepare,
770 .trigger = aaci_pcm_capture_trigger,
771 .pointer = aaci_pcm_pointer,
778 static int aaci_do_suspend(struct snd_card *card, unsigned int state)
780 struct aaci *aaci = card->private_data;
781 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
782 snd_pcm_suspend_all(aaci->pcm);
786 static int aaci_do_resume(struct snd_card *card, unsigned int state)
788 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
792 static int aaci_suspend(struct amba_device *dev, pm_message_t state)
794 struct snd_card *card = amba_get_drvdata(dev);
795 return card ? aaci_do_suspend(card) : 0;
798 static int aaci_resume(struct amba_device *dev)
800 struct snd_card *card = amba_get_drvdata(dev);
801 return card ? aaci_do_resume(card) : 0;
804 #define aaci_do_suspend NULL
805 #define aaci_do_resume NULL
806 #define aaci_suspend NULL
807 #define aaci_resume NULL
811 static struct ac97_pcm ac97_defs[] __devinitdata = {
812 [0] = { /* Front PCM */
816 .slots = (1 << AC97_SLOT_PCM_LEFT) |
817 (1 << AC97_SLOT_PCM_RIGHT) |
818 (1 << AC97_SLOT_PCM_CENTER) |
819 (1 << AC97_SLOT_PCM_SLEFT) |
820 (1 << AC97_SLOT_PCM_SRIGHT) |
821 (1 << AC97_SLOT_LFE),
830 .slots = (1 << AC97_SLOT_PCM_LEFT) |
831 (1 << AC97_SLOT_PCM_RIGHT),
840 .slots = (1 << AC97_SLOT_MIC),
846 static struct snd_ac97_bus_ops aaci_bus_ops = {
847 .write = aaci_ac97_write,
848 .read = aaci_ac97_read,
851 static int __devinit aaci_probe_ac97(struct aaci *aaci)
853 struct snd_ac97_template ac97_template;
854 struct snd_ac97_bus *ac97_bus;
855 struct snd_ac97 *ac97;
858 writel(0, aaci->base + AC97_POWERDOWN);
860 * Assert AACIRESET for 2us
862 writel(0, aaci->base + AACI_RESET);
864 writel(RESET_NRST, aaci->base + AACI_RESET);
867 * Give the AC'97 codec more than enough time
868 * to wake up. (42us = ~2 frames at 48kHz.)
872 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus);
876 ac97_bus->clock = 48000;
877 aaci->ac97_bus = ac97_bus;
879 memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
880 ac97_template.private_data = aaci;
881 ac97_template.num = 0;
882 ac97_template.scaps = AC97_SCAP_SKIP_MODEM;
884 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
890 * Disable AC97 PC Beep input on audio codecs.
892 if (ac97_is_audio(ac97))
893 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e);
895 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs);
899 aaci->playback.pcm = &ac97_bus->pcms[0];
900 aaci->capture.pcm = &ac97_bus->pcms[1];
906 static void aaci_free_card(struct snd_card *card)
908 struct aaci *aaci = card->private_data;
913 static struct aaci * __devinit aaci_init_card(struct amba_device *dev)
916 struct snd_card *card;
919 err = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
920 THIS_MODULE, sizeof(struct aaci), &card);
924 card->private_free = aaci_free_card;
926 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
927 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname));
928 snprintf(card->longname, sizeof(card->longname),
929 "%s at 0x%016llx, irq %d",
930 card->shortname, (unsigned long long)dev->res.start,
933 aaci = card->private_data;
934 mutex_init(&aaci->ac97_sem);
935 spin_lock_init(&aaci->lock);
939 /* Set MAINCR to allow slot 1 and 2 data IO */
940 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN |
941 MAINCR_SL2RXEN | MAINCR_SL2TXEN;
946 static int __devinit aaci_init_pcm(struct aaci *aaci)
951 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm);
954 pcm->private_data = aaci;
957 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
959 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
960 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops);
961 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
968 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
970 struct aaci_runtime *aacirun = &aaci->playback;
973 writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
975 for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
976 writel(0, aacirun->fifo);
978 writel(0, aacirun->base + AACI_TXCR);
981 * Re-initialise the AACI after the FIFO depth test, to
982 * ensure that the FIFOs are empty. Unfortunately, merely
983 * disabling the channel doesn't clear the FIFO.
985 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
986 writel(aaci->maincr, aaci->base + AACI_MAINCR);
989 * If we hit 4096, we failed. Go back to the specified
998 static int __devinit aaci_probe(struct amba_device *dev, struct amba_id *id)
1003 ret = amba_request_regions(dev, NULL);
1007 aaci = aaci_init_card(dev);
1013 aaci->base = ioremap(dev->res.start, resource_size(&dev->res));
1020 * Playback uses AACI channel 0
1022 aaci->playback.base = aaci->base + AACI_CSCH1;
1023 aaci->playback.fifo = aaci->base + AACI_DR1;
1026 * Capture uses AACI channel 0
1028 aaci->capture.base = aaci->base + AACI_CSCH1;
1029 aaci->capture.fifo = aaci->base + AACI_DR1;
1031 for (i = 0; i < 4; i++) {
1032 void __iomem *base = aaci->base + i * 0x14;
1034 writel(0, base + AACI_IE);
1035 writel(0, base + AACI_TXCR);
1036 writel(0, base + AACI_RXCR);
1039 writel(0x1fff, aaci->base + AACI_INTCLR);
1040 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1042 ret = aaci_probe_ac97(aaci);
1047 * Size the FIFOs (must be multiple of 16).
1049 aaci->fifosize = aaci_size_fifo(aaci);
1050 if (aaci->fifosize & 15) {
1051 printk(KERN_WARNING "AACI: fifosize = %d not supported\n",
1057 ret = aaci_init_pcm(aaci);
1061 snd_card_set_dev(aaci->card, &dev->dev);
1063 ret = snd_card_register(aaci->card);
1065 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
1067 amba_set_drvdata(dev, aaci->card);
1073 snd_card_free(aaci->card);
1074 amba_release_regions(dev);
1078 static int __devexit aaci_remove(struct amba_device *dev)
1080 struct snd_card *card = amba_get_drvdata(dev);
1082 amba_set_drvdata(dev, NULL);
1085 struct aaci *aaci = card->private_data;
1086 writel(0, aaci->base + AACI_MAINCR);
1088 snd_card_free(card);
1089 amba_release_regions(dev);
1095 static struct amba_id aaci_ids[] = {
1103 static struct amba_driver aaci_driver = {
1105 .name = DRIVER_NAME,
1107 .probe = aaci_probe,
1108 .remove = __devexit_p(aaci_remove),
1109 .suspend = aaci_suspend,
1110 .resume = aaci_resume,
1111 .id_table = aaci_ids,
1114 static int __init aaci_init(void)
1116 return amba_driver_register(&aaci_driver);
1119 static void __exit aaci_exit(void)
1121 amba_driver_unregister(&aaci_driver);
1124 module_init(aaci_init);
1125 module_exit(aaci_exit);
1127 MODULE_LICENSE("GPL");
1128 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");