2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #include <linux/cache.h>
21 #include <linux/dma-mapping.h>
23 #include <linux/module.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/swiotlb.h>
27 #include <linux/pfn.h>
28 #include <linux/types.h>
29 #include <linux/ctype.h>
30 #include <linux/highmem.h>
34 #include <asm/scatterlist.h>
36 #include <linux/init.h>
37 #include <linux/bootmem.h>
38 #include <linux/iommu-helper.h>
40 #define OFFSET(val,align) ((unsigned long) \
41 ( (val) & ( (align) - 1)))
43 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
46 * Minimum IO TLB size to bother booting with. Systems with mainly
47 * 64bit capable cards will only lightly use the swiotlb. If we can't
48 * allocate a contiguous 1MB, we're probably in trouble anyway.
50 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
53 * Enumeration for sync targets
55 enum dma_sync_target {
63 * Used to do a quick range check in unmap_single and
64 * sync_single_*, to see if the memory was in fact allocated by this
67 static char *io_tlb_start, *io_tlb_end;
70 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
71 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
73 static unsigned long io_tlb_nslabs;
76 * When the IOMMU overflows we return a fallback buffer. This sets the size.
78 static unsigned long io_tlb_overflow = 32*1024;
80 void *io_tlb_overflow_buffer;
83 * This is a free list describing the number of free entries available from
86 static unsigned int *io_tlb_list;
87 static unsigned int io_tlb_index;
90 * We need to save away the original address corresponding to a mapped entry
91 * for the sync operations.
93 static phys_addr_t *io_tlb_orig_addr;
96 * Protect the above data structures in the map and unmap calls
98 static DEFINE_SPINLOCK(io_tlb_lock);
100 static int late_alloc;
103 setup_io_tlb_npages(char *str)
106 io_tlb_nslabs = simple_strtoul(str, &str, 0);
107 /* avoid tail segment of size < IO_TLB_SEGSIZE */
108 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
112 if (!strcmp(str, "force"))
116 __setup("swiotlb=", setup_io_tlb_npages);
117 /* make io_tlb_overflow tunable too? */
119 /* Note that this doesn't work with highmem page */
120 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
121 volatile void *address)
123 return phys_to_dma(hwdev, virt_to_phys(address));
126 void swiotlb_print_info(void)
128 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
129 phys_addr_t pstart, pend;
131 pstart = virt_to_phys(io_tlb_start);
132 pend = virt_to_phys(io_tlb_end);
134 printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
135 bytes >> 20, io_tlb_start, io_tlb_end);
136 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
137 (unsigned long long)pstart,
138 (unsigned long long)pend);
142 * Statically reserve bounce buffer space and initialize bounce buffer data
143 * structures for the software IO TLB used to implement the DMA API.
146 swiotlb_init_with_default_size(size_t default_size, int verbose)
148 unsigned long i, bytes;
150 if (!io_tlb_nslabs) {
151 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
152 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
155 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
158 * Get IO TLB memory from the low pages
160 io_tlb_start = alloc_bootmem_low_pages(bytes);
162 panic("Cannot allocate SWIOTLB buffer");
163 io_tlb_end = io_tlb_start + bytes;
166 * Allocate and initialize the free list array. This array is used
167 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
168 * between io_tlb_start and io_tlb_end.
170 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
171 for (i = 0; i < io_tlb_nslabs; i++)
172 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
174 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t));
177 * Get the overflow emergency buffer
179 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
180 if (!io_tlb_overflow_buffer)
181 panic("Cannot allocate SWIOTLB overflow buffer!\n");
183 swiotlb_print_info();
187 swiotlb_init(int verbose)
189 swiotlb_init_with_default_size(64 * (1<<20), verbose); /* default to 64MB */
193 * Systems with larger DMA zones (those that don't support ISA) can
194 * initialize the swiotlb later using the slab allocator if needed.
195 * This should be just like above, but with some error catching.
198 swiotlb_late_init_with_default_size(size_t default_size)
200 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
203 if (!io_tlb_nslabs) {
204 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
205 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
209 * Get IO TLB memory from the low pages
211 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
212 io_tlb_nslabs = SLABS_PER_PAGE << order;
213 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
215 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
216 io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
226 if (order != get_order(bytes)) {
227 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
228 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
229 io_tlb_nslabs = SLABS_PER_PAGE << order;
230 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
232 io_tlb_end = io_tlb_start + bytes;
233 memset(io_tlb_start, 0, bytes);
236 * Allocate and initialize the free list array. This array is used
237 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
238 * between io_tlb_start and io_tlb_end.
240 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
241 get_order(io_tlb_nslabs * sizeof(int)));
245 for (i = 0; i < io_tlb_nslabs; i++)
246 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
249 io_tlb_orig_addr = (phys_addr_t *)
250 __get_free_pages(GFP_KERNEL,
251 get_order(io_tlb_nslabs *
252 sizeof(phys_addr_t)));
253 if (!io_tlb_orig_addr)
256 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
259 * Get the overflow emergency buffer
261 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
262 get_order(io_tlb_overflow));
263 if (!io_tlb_overflow_buffer)
266 swiotlb_print_info();
273 free_pages((unsigned long)io_tlb_orig_addr,
274 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
275 io_tlb_orig_addr = NULL;
277 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
282 free_pages((unsigned long)io_tlb_start, order);
285 io_tlb_nslabs = req_nslabs;
289 void __init swiotlb_free(void)
291 if (!io_tlb_overflow_buffer)
295 free_pages((unsigned long)io_tlb_overflow_buffer,
296 get_order(io_tlb_overflow));
297 free_pages((unsigned long)io_tlb_orig_addr,
298 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
299 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
301 free_pages((unsigned long)io_tlb_start,
302 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
304 free_bootmem_late(__pa(io_tlb_overflow_buffer),
306 free_bootmem_late(__pa(io_tlb_orig_addr),
307 io_tlb_nslabs * sizeof(phys_addr_t));
308 free_bootmem_late(__pa(io_tlb_list),
309 io_tlb_nslabs * sizeof(int));
310 free_bootmem_late(__pa(io_tlb_start),
311 io_tlb_nslabs << IO_TLB_SHIFT);
315 static int is_swiotlb_buffer(phys_addr_t paddr)
317 return paddr >= virt_to_phys(io_tlb_start) &&
318 paddr < virt_to_phys(io_tlb_end);
322 * Bounce: copy the swiotlb buffer back to the original dma location
324 static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
325 enum dma_data_direction dir)
327 unsigned long pfn = PFN_DOWN(phys);
329 if (PageHighMem(pfn_to_page(pfn))) {
330 /* The buffer does not have a mapping. Map it in and copy */
331 unsigned int offset = phys & ~PAGE_MASK;
337 sz = min_t(size_t, PAGE_SIZE - offset, size);
339 local_irq_save(flags);
340 buffer = kmap_atomic(pfn_to_page(pfn),
342 if (dir == DMA_TO_DEVICE)
343 memcpy(dma_addr, buffer + offset, sz);
345 memcpy(buffer + offset, dma_addr, sz);
346 kunmap_atomic(buffer, KM_BOUNCE_READ);
347 local_irq_restore(flags);
355 if (dir == DMA_TO_DEVICE)
356 memcpy(dma_addr, phys_to_virt(phys), size);
358 memcpy(phys_to_virt(phys), dma_addr, size);
363 * Allocates bounce buffer and returns its kernel virtual address.
366 map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir)
370 unsigned int nslots, stride, index, wrap;
372 unsigned long start_dma_addr;
374 unsigned long offset_slots;
375 unsigned long max_slots;
377 mask = dma_get_seg_boundary(hwdev);
378 start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask;
380 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
383 * Carefully handle integer overflow which can occur when mask == ~0UL.
386 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
387 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
390 * For mappings greater than a page, we limit the stride (and
391 * hence alignment) to a page size.
393 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
394 if (size > PAGE_SIZE)
395 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
402 * Find suitable number of IO TLB entries size that will fit this
403 * request and allocate a buffer from that IO TLB pool.
405 spin_lock_irqsave(&io_tlb_lock, flags);
406 index = ALIGN(io_tlb_index, stride);
407 if (index >= io_tlb_nslabs)
412 while (iommu_is_span_boundary(index, nslots, offset_slots,
415 if (index >= io_tlb_nslabs)
422 * If we find a slot that indicates we have 'nslots' number of
423 * contiguous buffers, we allocate the buffers from that slot
424 * and mark the entries as '0' indicating unavailable.
426 if (io_tlb_list[index] >= nslots) {
429 for (i = index; i < (int) (index + nslots); i++)
431 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
432 io_tlb_list[i] = ++count;
433 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
436 * Update the indices to avoid searching in the next
439 io_tlb_index = ((index + nslots) < io_tlb_nslabs
440 ? (index + nslots) : 0);
445 if (index >= io_tlb_nslabs)
447 } while (index != wrap);
450 spin_unlock_irqrestore(&io_tlb_lock, flags);
453 spin_unlock_irqrestore(&io_tlb_lock, flags);
456 * Save away the mapping from the original address to the DMA address.
457 * This is needed when we sync the memory. Then we sync the buffer if
460 for (i = 0; i < nslots; i++)
461 io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
462 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
463 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
469 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
472 do_unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
475 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
476 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
477 phys_addr_t phys = io_tlb_orig_addr[index];
480 * First, sync the memory before unmapping the entry
482 if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
483 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
486 * Return the buffer to the free list by setting the corresponding
487 * entries to indicate the number of contigous entries available.
488 * While returning the entries to the free list, we merge the entries
489 * with slots below and above the pool being returned.
491 spin_lock_irqsave(&io_tlb_lock, flags);
493 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
494 io_tlb_list[index + nslots] : 0);
496 * Step 1: return the slots to the free list, merging the
497 * slots with superceeding slots
499 for (i = index + nslots - 1; i >= index; i--)
500 io_tlb_list[i] = ++count;
502 * Step 2: merge the returned slots with the preceding slots,
503 * if available (non zero)
505 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
506 io_tlb_list[i] = ++count;
508 spin_unlock_irqrestore(&io_tlb_lock, flags);
512 sync_single(struct device *hwdev, char *dma_addr, size_t size,
515 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
516 phys_addr_t phys = io_tlb_orig_addr[index];
518 phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
522 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
523 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
525 BUG_ON(dir != DMA_TO_DEVICE);
527 case SYNC_FOR_DEVICE:
528 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
529 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
531 BUG_ON(dir != DMA_FROM_DEVICE);
539 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
540 dma_addr_t *dma_handle, gfp_t flags)
544 int order = get_order(size);
545 u64 dma_mask = DMA_BIT_MASK(32);
547 if (hwdev && hwdev->coherent_dma_mask)
548 dma_mask = hwdev->coherent_dma_mask;
550 ret = (void *)__get_free_pages(flags, order);
551 if (ret && swiotlb_virt_to_bus(hwdev, ret) + size > dma_mask) {
553 * The allocated memory isn't reachable by the device.
555 free_pages((unsigned long) ret, order);
560 * We are either out of memory or the device can't DMA
561 * to GFP_DMA memory; fall back on map_single(), which
562 * will grab memory from the lowest available address range.
564 ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
569 memset(ret, 0, size);
570 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
572 /* Confirm address can be DMA'd by device */
573 if (dev_addr + size > dma_mask) {
574 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
575 (unsigned long long)dma_mask,
576 (unsigned long long)dev_addr);
578 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
579 do_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
582 *dma_handle = dev_addr;
585 EXPORT_SYMBOL(swiotlb_alloc_coherent);
588 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
591 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
593 WARN_ON(irqs_disabled());
594 if (!is_swiotlb_buffer(paddr))
595 free_pages((unsigned long)vaddr, get_order(size));
597 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
598 do_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
600 EXPORT_SYMBOL(swiotlb_free_coherent);
603 swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
606 * Ran out of IOMMU space for this operation. This is very bad.
607 * Unfortunately the drivers cannot handle this operation properly.
608 * unless they check for dma_mapping_error (most don't)
609 * When the mapping is small enough return a static buffer to limit
610 * the damage, or panic when the transfer is too big.
612 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
613 "device %s\n", size, dev ? dev_name(dev) : "?");
615 if (size <= io_tlb_overflow || !do_panic)
618 if (dir == DMA_BIDIRECTIONAL)
619 panic("DMA: Random memory could be DMA accessed\n");
620 if (dir == DMA_FROM_DEVICE)
621 panic("DMA: Random memory could be DMA written\n");
622 if (dir == DMA_TO_DEVICE)
623 panic("DMA: Random memory could be DMA read\n");
627 * Map a single buffer of the indicated size for DMA in streaming mode. The
628 * physical address to use is returned.
630 * Once the device is given the dma address, the device owns this memory until
631 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
633 dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
634 unsigned long offset, size_t size,
635 enum dma_data_direction dir,
636 struct dma_attrs *attrs)
638 phys_addr_t phys = page_to_phys(page) + offset;
639 dma_addr_t dev_addr = phys_to_dma(dev, phys);
642 BUG_ON(dir == DMA_NONE);
644 * If the address happens to be in the device's DMA window,
645 * we can safely return the device addr and not worry about bounce
648 if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
652 * Oh well, have to allocate and map a bounce buffer.
654 map = map_single(dev, phys, size, dir);
656 swiotlb_full(dev, size, dir, 1);
657 map = io_tlb_overflow_buffer;
660 dev_addr = swiotlb_virt_to_bus(dev, map);
663 * Ensure that the address returned is DMA'ble
665 if (!dma_capable(dev, dev_addr, size))
666 panic("map_single: bounce buffer is not DMA'ble");
670 EXPORT_SYMBOL_GPL(swiotlb_map_page);
673 * Unmap a single streaming mode DMA translation. The dma_addr and size must
674 * match what was provided for in a previous swiotlb_map_page call. All
675 * other usages are undefined.
677 * After this call, reads by the cpu to the buffer are guaranteed to see
678 * whatever the device wrote there.
680 static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
681 size_t size, int dir)
683 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
685 BUG_ON(dir == DMA_NONE);
687 if (is_swiotlb_buffer(paddr)) {
688 do_unmap_single(hwdev, phys_to_virt(paddr), size, dir);
692 if (dir != DMA_FROM_DEVICE)
696 * phys_to_virt doesn't work with hihgmem page but we could
697 * call dma_mark_clean() with hihgmem page here. However, we
698 * are fine since dma_mark_clean() is null on POWERPC. We can
699 * make dma_mark_clean() take a physical address if necessary.
701 dma_mark_clean(phys_to_virt(paddr), size);
704 void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
705 size_t size, enum dma_data_direction dir,
706 struct dma_attrs *attrs)
708 unmap_single(hwdev, dev_addr, size, dir);
710 EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
713 * Make physical memory consistent for a single streaming mode DMA translation
716 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
717 * using the cpu, yet do not wish to teardown the dma mapping, you must
718 * call this function before doing so. At the next point you give the dma
719 * address back to the card, you must first perform a
720 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
723 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
724 size_t size, int dir, int target)
726 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
728 BUG_ON(dir == DMA_NONE);
730 if (is_swiotlb_buffer(paddr)) {
731 sync_single(hwdev, phys_to_virt(paddr), size, dir, target);
735 if (dir != DMA_FROM_DEVICE)
738 dma_mark_clean(phys_to_virt(paddr), size);
742 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
743 size_t size, enum dma_data_direction dir)
745 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
747 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
750 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
751 size_t size, enum dma_data_direction dir)
753 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
755 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
758 * Same as above, but for a sub-range of the mapping.
761 swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
762 unsigned long offset, size_t size,
765 swiotlb_sync_single(hwdev, dev_addr + offset, size, dir, target);
769 swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
770 unsigned long offset, size_t size,
771 enum dma_data_direction dir)
773 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
776 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
779 swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
780 unsigned long offset, size_t size,
781 enum dma_data_direction dir)
783 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
786 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
789 * Map a set of buffers described by scatterlist in streaming mode for DMA.
790 * This is the scatter-gather version of the above swiotlb_map_page
791 * interface. Here the scatter gather list elements are each tagged with the
792 * appropriate dma address and length. They are obtained via
793 * sg_dma_{address,length}(SG).
795 * NOTE: An implementation may be able to use a smaller number of
796 * DMA address/length pairs than there are SG table elements.
797 * (for example via virtual mapping capabilities)
798 * The routine returns the number of addr/length pairs actually
799 * used, at most nents.
801 * Device ownership issues as mentioned above for swiotlb_map_page are the
805 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
806 enum dma_data_direction dir, struct dma_attrs *attrs)
808 struct scatterlist *sg;
811 BUG_ON(dir == DMA_NONE);
813 for_each_sg(sgl, sg, nelems, i) {
814 phys_addr_t paddr = sg_phys(sg);
815 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
818 !dma_capable(hwdev, dev_addr, sg->length)) {
819 void *map = map_single(hwdev, sg_phys(sg),
822 /* Don't panic here, we expect map_sg users
823 to do proper error handling. */
824 swiotlb_full(hwdev, sg->length, dir, 0);
825 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
827 sgl[0].dma_length = 0;
830 sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
832 sg->dma_address = dev_addr;
833 sg->dma_length = sg->length;
837 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
840 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
843 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
845 EXPORT_SYMBOL(swiotlb_map_sg);
848 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
849 * concerning calls here are the same as for swiotlb_unmap_page() above.
852 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
853 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
855 struct scatterlist *sg;
858 BUG_ON(dir == DMA_NONE);
860 for_each_sg(sgl, sg, nelems, i)
861 unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
864 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
867 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
870 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
872 EXPORT_SYMBOL(swiotlb_unmap_sg);
875 * Make physical memory consistent for a set of streaming mode DMA translations
878 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
882 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
883 int nelems, int dir, int target)
885 struct scatterlist *sg;
888 for_each_sg(sgl, sg, nelems, i)
889 swiotlb_sync_single(hwdev, sg->dma_address,
890 sg->dma_length, dir, target);
894 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
895 int nelems, enum dma_data_direction dir)
897 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
899 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
902 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
903 int nelems, enum dma_data_direction dir)
905 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
907 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
910 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
912 return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
914 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
917 * Return whether the given device DMA address mask can be supported
918 * properly. For example, if your device can only drive the low 24-bits
919 * during bus mastering, then you would pass 0x00ffffff as the mask to
923 swiotlb_dma_supported(struct device *hwdev, u64 mask)
925 return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
927 EXPORT_SYMBOL(swiotlb_dma_supported);