4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
20 #include <linux/pci_regs.h> /* The pci register defines */
23 * The PCI interface treats multi-function devices as independent
24 * devices. The slot/function address of each device is encoded
25 * in a single byte as follows:
30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 #define PCI_FUNC(devfn) ((devfn) & 0x07)
34 /* Ioctls for /proc/bus/pci/X/Y nodes. */
35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
43 #include <linux/mod_devicetable.h>
45 #include <linux/types.h>
46 #include <linux/init.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <linux/kobject.h>
52 #include <asm/atomic.h>
53 #include <linux/device.h>
55 #include <linux/irqreturn.h>
57 /* Include the ID list */
58 #include <linux/pci_ids.h>
60 /* pci_slot represents a physical slot */
62 struct pci_bus *bus; /* The bus this slot is on */
63 struct list_head list; /* node in list of slots on this bus */
64 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
65 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
69 static inline const char *pci_slot_name(const struct pci_slot *slot)
71 return kobject_name(&slot->kobj);
74 /* File state for mmap()s on /proc/bus/pci/X/Y */
80 /* This defines the direction arg to the DMA mapping routines. */
81 #define PCI_DMA_BIDIRECTIONAL 0
82 #define PCI_DMA_TODEVICE 1
83 #define PCI_DMA_FROMDEVICE 2
84 #define PCI_DMA_NONE 3
87 * For PCI devices, the region numbers are assigned this way:
90 /* #0-5: standard PCI resources */
92 PCI_STD_RESOURCE_END = 5,
94 /* #6: expansion ROM resource */
97 /* device specific resources */
100 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
103 /* resources assigned to buses behind the bridge */
104 #define PCI_BRIDGE_RESOURCE_NUM 4
106 PCI_BRIDGE_RESOURCES,
107 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
108 PCI_BRIDGE_RESOURCE_NUM - 1,
110 /* total resources associated with a PCI device */
113 /* preserve this for compatibility */
114 DEVICE_COUNT_RESOURCE
117 typedef int __bitwise pci_power_t;
119 #define PCI_D0 ((pci_power_t __force) 0)
120 #define PCI_D1 ((pci_power_t __force) 1)
121 #define PCI_D2 ((pci_power_t __force) 2)
122 #define PCI_D3hot ((pci_power_t __force) 3)
123 #define PCI_D3cold ((pci_power_t __force) 4)
124 #define PCI_UNKNOWN ((pci_power_t __force) 5)
125 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
127 /* Remember to update this when the list above changes! */
128 extern const char *pci_power_names[];
130 static inline const char *pci_power_name(pci_power_t state)
132 return pci_power_names[1 + (int) state];
135 #define PCI_PM_D2_DELAY 200
136 #define PCI_PM_D3_WAIT 10
137 #define PCI_PM_BUS_WAIT 50
139 /** The pci_channel state describes connectivity between the CPU and
140 * the pci device. If some PCI bus between here and the pci device
141 * has crashed or locked up, this info is reflected here.
143 typedef unsigned int __bitwise pci_channel_state_t;
145 enum pci_channel_state {
146 /* I/O channel is in normal state */
147 pci_channel_io_normal = (__force pci_channel_state_t) 1,
149 /* I/O to channel is blocked */
150 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
152 /* PCI card is dead */
153 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
156 typedef unsigned int __bitwise pcie_reset_state_t;
158 enum pcie_reset_state {
159 /* Reset is NOT asserted (Use to deassert reset) */
160 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
162 /* Use #PERST to reset PCI-E device */
163 pcie_warm_reset = (__force pcie_reset_state_t) 2,
165 /* Use PCI-E Hot Reset to reset device */
166 pcie_hot_reset = (__force pcie_reset_state_t) 3
169 typedef unsigned short __bitwise pci_dev_flags_t;
171 /* INTX_DISABLE in PCI_COMMAND register disables MSI
174 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
175 /* Device configuration is irrevocably lost if disabled into D3 */
176 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
179 enum pci_irq_reroute_variant {
180 INTEL_IRQ_REROUTE_VARIANT = 1,
181 MAX_IRQ_REROUTE_VARIANTS = 3
184 typedef unsigned short __bitwise pci_bus_flags_t;
186 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
187 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
190 struct pci_cap_saved_state {
191 struct hlist_node next;
196 struct pcie_link_state;
202 * The pci_dev structure is used to describe PCI devices.
205 struct list_head bus_list; /* node in per-bus list */
206 struct pci_bus *bus; /* bus this device is on */
207 struct pci_bus *subordinate; /* bus this device bridges to */
209 void *sysdata; /* hook for sys-specific extension */
210 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
211 struct pci_slot *slot; /* Physical slot this device is in */
213 unsigned int devfn; /* encoded device & function index */
214 unsigned short vendor;
215 unsigned short device;
216 unsigned short subsystem_vendor;
217 unsigned short subsystem_device;
218 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
219 u8 revision; /* PCI revision, low byte of class word */
220 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
221 u8 pcie_type; /* PCI-E device/port type */
222 u8 rom_base_reg; /* which config register controls the ROM */
223 u8 pin; /* which interrupt pin this device uses */
225 struct pci_driver *driver; /* which driver has allocated this device */
226 u64 dma_mask; /* Mask of the bits of bus address this
227 device implements. Normally this is
228 0xffffffff. You only need to change
229 this if your device has broken DMA
230 or supports 64-bit transfers. */
232 struct device_dma_parameters dma_parms;
234 pci_power_t current_state; /* Current operating state. In ACPI-speak,
235 this is D0-D3, D0 being fully functional,
237 int pm_cap; /* PM capability offset in the
238 configuration space */
239 unsigned int pme_support:5; /* Bitmask of states from which PME#
241 unsigned int d1_support:1; /* Low power state D1 is supported */
242 unsigned int d2_support:1; /* Low power state D2 is supported */
243 unsigned int no_d1d2:1; /* Only allow D0 and D3 */
245 #ifdef CONFIG_PCIEASPM
246 struct pcie_link_state *link_state; /* ASPM link state. */
249 pci_channel_state_t error_state; /* current connectivity state */
250 struct device dev; /* Generic device interface */
252 int cfg_size; /* Size of configuration space */
255 * Instead of touching interrupt line and base address registers
256 * directly, use the values stored here. They might be different!
259 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
261 /* These fields are used by common fixups */
262 unsigned int transparent:1; /* Transparent PCI bridge */
263 unsigned int multifunction:1;/* Part of multi-function device */
264 /* keep track of device state */
265 unsigned int is_added:1;
266 unsigned int is_busmaster:1; /* device is busmaster */
267 unsigned int no_msi:1; /* device may not use msi */
268 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
269 unsigned int broken_parity_status:1; /* Device generates false positive parity */
270 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
271 unsigned int msi_enabled:1;
272 unsigned int msix_enabled:1;
273 unsigned int ari_enabled:1; /* ARI forwarding */
274 unsigned int is_managed:1;
275 unsigned int is_pcie:1;
276 unsigned int needs_freset:1; /* Dev requires fundamental reset */
277 unsigned int state_saved:1;
278 unsigned int is_physfn:1;
279 unsigned int is_virtfn:1;
280 unsigned int reset_fn:1;
281 pci_dev_flags_t dev_flags;
282 atomic_t enable_cnt; /* pci_enable_device has been called */
284 u32 saved_config_space[16]; /* config space saved at suspend time */
285 struct hlist_head saved_cap_space;
286 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
287 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
288 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
289 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
290 #ifdef CONFIG_PCI_MSI
291 struct list_head msi_list;
294 #ifdef CONFIG_PCI_IOV
296 struct pci_sriov *sriov; /* SR-IOV capability related */
297 struct pci_dev *physfn; /* the PF this VF is associated with */
299 struct pci_ats *ats; /* Address Translation Service */
303 extern struct pci_dev *alloc_pci_dev(void);
305 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
306 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
307 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
309 static inline int pci_channel_offline(struct pci_dev *pdev)
311 return (pdev->error_state != pci_channel_io_normal);
314 static inline struct pci_cap_saved_state *pci_find_saved_cap(
315 struct pci_dev *pci_dev, char cap)
317 struct pci_cap_saved_state *tmp;
318 struct hlist_node *pos;
320 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
321 if (tmp->cap_nr == cap)
327 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
328 struct pci_cap_saved_state *new_cap)
330 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
333 #ifndef PCI_BUS_NUM_RESOURCES
334 #define PCI_BUS_NUM_RESOURCES 16
337 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
340 struct list_head node; /* node in list of buses */
341 struct pci_bus *parent; /* parent bus this bridge is on */
342 struct list_head children; /* list of child buses */
343 struct list_head devices; /* list of devices on this bus */
344 struct pci_dev *self; /* bridge device as seen by parent */
345 struct list_head slots; /* list of slots on this bus */
346 struct resource *resource[PCI_BUS_NUM_RESOURCES];
347 /* address space routed to this bus */
349 struct pci_ops *ops; /* configuration access functions */
350 void *sysdata; /* hook for sys-specific extension */
351 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
353 unsigned char number; /* bus number */
354 unsigned char primary; /* number of primary bridge */
355 unsigned char secondary; /* number of secondary bridge */
356 unsigned char subordinate; /* max number of subordinate buses */
360 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
361 pci_bus_flags_t bus_flags; /* Inherited by child busses */
362 struct device *bridge;
364 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
365 struct bin_attribute *legacy_mem; /* legacy mem */
366 unsigned int is_added:1;
369 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
370 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
373 * Returns true if the pci bus is root (behind host-pci bridge),
376 static inline bool pci_is_root_bus(struct pci_bus *pbus)
378 return !(pbus->parent);
381 #ifdef CONFIG_PCI_MSI
382 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
384 return pci_dev->msi_enabled || pci_dev->msix_enabled;
387 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
391 * Error values that may be returned by PCI functions.
393 #define PCIBIOS_SUCCESSFUL 0x00
394 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
395 #define PCIBIOS_BAD_VENDOR_ID 0x83
396 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
397 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
398 #define PCIBIOS_SET_FAILED 0x88
399 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
401 /* Low-level architecture-dependent routines */
404 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
405 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
409 * ACPI needs to be able to access PCI config space before we've done a
410 * PCI bus scan and created pci_bus structures.
412 extern int raw_pci_read(unsigned int domain, unsigned int bus,
413 unsigned int devfn, int reg, int len, u32 *val);
414 extern int raw_pci_write(unsigned int domain, unsigned int bus,
415 unsigned int devfn, int reg, int len, u32 val);
417 struct pci_bus_region {
418 resource_size_t start;
423 spinlock_t lock; /* protects list, index */
424 struct list_head list; /* for IDs added at runtime */
427 /* ---------------------------------------------------------------- */
428 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
429 * a set of callbacks in struct pci_error_handlers, then that device driver
430 * will be notified of PCI bus errors, and will be driven to recovery
431 * when an error occurs.
434 typedef unsigned int __bitwise pci_ers_result_t;
436 enum pci_ers_result {
437 /* no result/none/not supported in device driver */
438 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
440 /* Device driver can recover without slot reset */
441 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
443 /* Device driver wants slot to be reset. */
444 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
446 /* Device has completely failed, is unrecoverable */
447 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
449 /* Device driver is fully recovered and operational */
450 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
453 /* PCI bus error event callbacks */
454 struct pci_error_handlers {
455 /* PCI bus error detected on this device */
456 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
457 enum pci_channel_state error);
459 /* MMIO has been re-enabled, but not DMA */
460 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
462 /* PCI Express link has been reset */
463 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
465 /* PCI slot has been reset */
466 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
468 /* Device driver may resume normal operations */
469 void (*resume)(struct pci_dev *dev);
472 /* ---------------------------------------------------------------- */
476 struct list_head node;
478 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
479 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
480 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
481 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
482 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
483 int (*resume_early) (struct pci_dev *dev);
484 int (*resume) (struct pci_dev *dev); /* Device woken up */
485 void (*shutdown) (struct pci_dev *dev);
486 struct pci_error_handlers *err_handler;
487 struct device_driver driver;
488 struct pci_dynids dynids;
491 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
494 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
495 * @_table: device table name
497 * This macro is used to create a struct pci_device_id array (a device table)
498 * in a generic manner.
500 #define DEFINE_PCI_DEVICE_TABLE(_table) \
501 const struct pci_device_id _table[] __devinitconst
504 * PCI_DEVICE - macro used to describe a specific pci device
505 * @vend: the 16 bit PCI Vendor ID
506 * @dev: the 16 bit PCI Device ID
508 * This macro is used to create a struct pci_device_id that matches a
509 * specific device. The subvendor and subdevice fields will be set to
512 #define PCI_DEVICE(vend,dev) \
513 .vendor = (vend), .device = (dev), \
514 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
517 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
518 * @dev_class: the class, subclass, prog-if triple for this device
519 * @dev_class_mask: the class mask for this device
521 * This macro is used to create a struct pci_device_id that matches a
522 * specific PCI class. The vendor, device, subvendor, and subdevice
523 * fields will be set to PCI_ANY_ID.
525 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
526 .class = (dev_class), .class_mask = (dev_class_mask), \
527 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
528 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
531 * PCI_VDEVICE - macro used to describe a specific pci device in short form
532 * @vendor: the vendor name
533 * @device: the 16 bit PCI Device ID
535 * This macro is used to create a struct pci_device_id that matches a
536 * specific PCI device. The subvendor, and subdevice fields will be set
537 * to PCI_ANY_ID. The macro allows the next field to follow as the device
541 #define PCI_VDEVICE(vendor, device) \
542 PCI_VENDOR_ID_##vendor, (device), \
543 PCI_ANY_ID, PCI_ANY_ID, 0, 0
545 /* these external functions are only available when PCI support is enabled */
548 extern struct bus_type pci_bus_type;
550 /* Do NOT directly access these two variables, unless you are arch specific pci
551 * code, or pci core code. */
552 extern struct list_head pci_root_buses; /* list of all known PCI buses */
553 /* Some device drivers need know if pci is initiated */
554 extern int no_pci_devices(void);
556 void pcibios_fixup_bus(struct pci_bus *);
557 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
558 char *pcibios_setup(char *str);
560 /* Used only when drivers/pci/setup.c is used */
561 void pcibios_align_resource(void *, struct resource *, resource_size_t,
563 void pcibios_update_irq(struct pci_dev *, int irq);
565 /* Generic PCI functions used internally */
567 extern struct pci_bus *pci_find_bus(int domain, int busnr);
568 void pci_bus_add_devices(const struct pci_bus *bus);
569 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
570 struct pci_ops *ops, void *sysdata);
571 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
574 struct pci_bus *root_bus;
575 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
577 pci_bus_add_devices(root_bus);
580 struct pci_bus *pci_create_bus(struct device *parent, int bus,
581 struct pci_ops *ops, void *sysdata);
582 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
584 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
586 struct hotplug_slot *hotplug);
587 void pci_destroy_slot(struct pci_slot *slot);
588 void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
589 int pci_scan_slot(struct pci_bus *bus, int devfn);
590 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
591 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
592 unsigned int pci_scan_child_bus(struct pci_bus *bus);
593 int __must_check pci_bus_add_device(struct pci_dev *dev);
594 void pci_read_bridge_bases(struct pci_bus *child);
595 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
596 struct resource *res);
597 u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin);
598 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
599 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
600 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
601 extern void pci_dev_put(struct pci_dev *dev);
602 extern void pci_remove_bus(struct pci_bus *b);
603 extern void pci_remove_bus_device(struct pci_dev *dev);
604 extern void pci_stop_bus_device(struct pci_dev *dev);
605 void pci_setup_cardbus(struct pci_bus *bus);
606 extern void pci_sort_breadthfirst(void);
608 /* Generic PCI functions exported to card drivers */
610 #ifdef CONFIG_PCI_LEGACY
611 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
613 struct pci_dev *from);
614 #endif /* CONFIG_PCI_LEGACY */
616 enum pci_lost_interrupt_reason {
617 PCI_LOST_IRQ_NO_INFORMATION = 0,
618 PCI_LOST_IRQ_DISABLE_MSI,
619 PCI_LOST_IRQ_DISABLE_MSIX,
620 PCI_LOST_IRQ_DISABLE_ACPI,
622 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
623 int pci_find_capability(struct pci_dev *dev, int cap);
624 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
625 int pci_find_ext_capability(struct pci_dev *dev, int cap);
626 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
627 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
628 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
630 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
631 struct pci_dev *from);
632 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
633 unsigned int ss_vendor, unsigned int ss_device,
634 struct pci_dev *from);
635 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
636 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
637 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
638 int pci_dev_present(const struct pci_device_id *ids);
640 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
642 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
643 int where, u16 *val);
644 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
645 int where, u32 *val);
646 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
648 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
650 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
652 struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
654 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
656 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
658 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
660 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
662 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
665 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
667 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
669 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
671 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
673 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
675 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
678 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
681 int __must_check pci_enable_device(struct pci_dev *dev);
682 int __must_check pci_enable_device_io(struct pci_dev *dev);
683 int __must_check pci_enable_device_mem(struct pci_dev *dev);
684 int __must_check pci_reenable_device(struct pci_dev *);
685 int __must_check pcim_enable_device(struct pci_dev *pdev);
686 void pcim_pin_device(struct pci_dev *pdev);
688 static inline int pci_is_enabled(struct pci_dev *pdev)
690 return (atomic_read(&pdev->enable_cnt) > 0);
693 static inline int pci_is_managed(struct pci_dev *pdev)
695 return pdev->is_managed;
698 void pci_disable_device(struct pci_dev *dev);
699 void pci_set_master(struct pci_dev *dev);
700 void pci_clear_master(struct pci_dev *dev);
701 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
702 #define HAVE_PCI_SET_MWI
703 int __must_check pci_set_mwi(struct pci_dev *dev);
704 int pci_try_set_mwi(struct pci_dev *dev);
705 void pci_clear_mwi(struct pci_dev *dev);
706 void pci_intx(struct pci_dev *dev, int enable);
707 void pci_msi_off(struct pci_dev *dev);
708 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
709 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
710 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
711 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
712 int pcix_get_max_mmrbc(struct pci_dev *dev);
713 int pcix_get_mmrbc(struct pci_dev *dev);
714 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
715 int pcie_get_readrq(struct pci_dev *dev);
716 int pcie_set_readrq(struct pci_dev *dev, int rq);
717 int __pci_reset_function(struct pci_dev *dev);
718 int pci_reset_function(struct pci_dev *dev);
719 void pci_update_resource(struct pci_dev *dev, int resno);
720 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
721 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
723 /* ROM control related routines */
724 int pci_enable_rom(struct pci_dev *pdev);
725 void pci_disable_rom(struct pci_dev *pdev);
726 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
727 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
728 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
730 /* Power management related routines */
731 int pci_save_state(struct pci_dev *dev);
732 int pci_restore_state(struct pci_dev *dev);
733 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
734 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
735 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
736 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
737 void pci_pme_active(struct pci_dev *dev, bool enable);
738 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, bool enable);
739 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
740 pci_power_t pci_target_state(struct pci_dev *dev);
741 int pci_prepare_to_sleep(struct pci_dev *dev);
742 int pci_back_from_sleep(struct pci_dev *dev);
744 /* Functions for PCI Hotplug drivers to use */
745 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
746 #ifdef CONFIG_HOTPLUG
747 unsigned int pci_rescan_bus(struct pci_bus *bus);
750 /* Vital product data routines */
751 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
752 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
753 int pci_vpd_truncate(struct pci_dev *dev, size_t size);
755 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
756 void pci_bus_assign_resources(const struct pci_bus *bus);
757 void pci_bus_size_bridges(struct pci_bus *bus);
758 int pci_claim_resource(struct pci_dev *, int);
759 void pci_assign_unassigned_resources(void);
760 void pdev_enable_device(struct pci_dev *);
761 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
762 int pci_enable_resources(struct pci_dev *, int mask);
763 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
764 int (*)(struct pci_dev *, u8, u8));
765 #define HAVE_PCI_REQ_REGIONS 2
766 int __must_check pci_request_regions(struct pci_dev *, const char *);
767 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
768 void pci_release_regions(struct pci_dev *);
769 int __must_check pci_request_region(struct pci_dev *, int, const char *);
770 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
771 void pci_release_region(struct pci_dev *, int);
772 int pci_request_selected_regions(struct pci_dev *, int, const char *);
773 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
774 void pci_release_selected_regions(struct pci_dev *, int);
776 /* drivers/pci/bus.c */
777 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
778 struct resource *res, resource_size_t size,
779 resource_size_t align, resource_size_t min,
780 unsigned int type_mask,
781 void (*alignf)(void *, struct resource *,
782 resource_size_t, resource_size_t),
784 void pci_enable_bridges(struct pci_bus *bus);
786 /* Proper probing supporting hot-pluggable devices */
787 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
788 const char *mod_name);
791 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
793 #define pci_register_driver(driver) \
794 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
796 void pci_unregister_driver(struct pci_driver *dev);
797 void pci_remove_behind_bridge(struct pci_dev *dev);
798 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
799 int pci_add_dynid(struct pci_driver *drv,
800 unsigned int vendor, unsigned int device,
801 unsigned int subvendor, unsigned int subdevice,
802 unsigned int class, unsigned int class_mask,
803 unsigned long driver_data);
804 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
805 struct pci_dev *dev);
806 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
809 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
811 int pci_cfg_space_size_ext(struct pci_dev *dev);
812 int pci_cfg_space_size(struct pci_dev *dev);
813 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
815 int pci_set_vga_state(struct pci_dev *pdev, bool decode,
816 unsigned int command_bits, bool change_bridge);
817 /* kmem_cache style wrapper around pci_alloc_consistent() */
819 #include <linux/dmapool.h>
821 #define pci_pool dma_pool
822 #define pci_pool_create(name, pdev, size, align, allocation) \
823 dma_pool_create(name, &pdev->dev, size, align, allocation)
824 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
825 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
826 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
828 enum pci_dma_burst_strategy {
829 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
830 strategy_parameter is N/A */
831 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
833 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
834 strategy_parameter byte boundaries */
838 u32 vector; /* kernel uses to write allocated vector */
839 u16 entry; /* driver uses to specify entry, OS writes */
843 #ifndef CONFIG_PCI_MSI
844 static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
849 static inline void pci_msi_shutdown(struct pci_dev *dev)
851 static inline void pci_disable_msi(struct pci_dev *dev)
854 static inline int pci_msix_table_size(struct pci_dev *dev)
858 static inline int pci_enable_msix(struct pci_dev *dev,
859 struct msix_entry *entries, int nvec)
864 static inline void pci_msix_shutdown(struct pci_dev *dev)
866 static inline void pci_disable_msix(struct pci_dev *dev)
869 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
872 static inline void pci_restore_msi_state(struct pci_dev *dev)
874 static inline int pci_msi_enabled(void)
879 extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);
880 extern void pci_msi_shutdown(struct pci_dev *dev);
881 extern void pci_disable_msi(struct pci_dev *dev);
882 extern int pci_msix_table_size(struct pci_dev *dev);
883 extern int pci_enable_msix(struct pci_dev *dev,
884 struct msix_entry *entries, int nvec);
885 extern void pci_msix_shutdown(struct pci_dev *dev);
886 extern void pci_disable_msix(struct pci_dev *dev);
887 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
888 extern void pci_restore_msi_state(struct pci_dev *dev);
889 extern int pci_msi_enabled(void);
892 #ifndef CONFIG_PCIEASPM
893 static inline int pcie_aspm_enabled(void)
898 extern int pcie_aspm_enabled(void);
901 #ifndef CONFIG_PCIE_ECRC
902 static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
906 static inline void pcie_ecrc_get_policy(char *str) {};
908 extern void pcie_set_ecrc_checking(struct pci_dev *dev);
909 extern void pcie_ecrc_get_policy(char *str);
912 #define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
915 /* The functions a driver should call */
916 int ht_create_irq(struct pci_dev *dev, int idx);
917 void ht_destroy_irq(unsigned int irq);
918 #endif /* CONFIG_HT_IRQ */
920 extern void pci_block_user_cfg_access(struct pci_dev *dev);
921 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
924 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
925 * a PCI domain is defined to be a set of PCI busses which share
926 * configuration space.
928 #ifdef CONFIG_PCI_DOMAINS
929 extern int pci_domains_supported;
931 enum { pci_domains_supported = 0 };
932 static inline int pci_domain_nr(struct pci_bus *bus)
937 static inline int pci_proc_domain(struct pci_bus *bus)
941 #endif /* CONFIG_PCI_DOMAINS */
943 #else /* CONFIG_PCI is not enabled */
946 * If the system does not have PCI, clearly these return errors. Define
947 * these as simple inline functions to avoid hair in drivers.
950 #define _PCI_NOP(o, s, t) \
951 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
953 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
955 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
956 _PCI_NOP(o, word, u16 x) \
957 _PCI_NOP(o, dword, u32 x)
958 _PCI_NOP_ALL(read, *)
961 static inline struct pci_dev *pci_find_device(unsigned int vendor,
963 struct pci_dev *from)
968 static inline struct pci_dev *pci_get_device(unsigned int vendor,
970 struct pci_dev *from)
975 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
977 unsigned int ss_vendor,
978 unsigned int ss_device,
979 struct pci_dev *from)
984 static inline struct pci_dev *pci_get_class(unsigned int class,
985 struct pci_dev *from)
990 #define pci_dev_present(ids) (0)
991 #define no_pci_devices() (1)
992 #define pci_dev_put(dev) do { } while (0)
994 static inline void pci_set_master(struct pci_dev *dev)
997 static inline int pci_enable_device(struct pci_dev *dev)
1002 static inline void pci_disable_device(struct pci_dev *dev)
1005 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
1010 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
1015 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1021 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1027 static inline int pci_assign_resource(struct pci_dev *dev, int i)
1032 static inline int __pci_register_driver(struct pci_driver *drv,
1033 struct module *owner)
1038 static inline int pci_register_driver(struct pci_driver *drv)
1043 static inline void pci_unregister_driver(struct pci_driver *drv)
1046 static inline int pci_find_capability(struct pci_dev *dev, int cap)
1051 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1057 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1062 /* Power management related routines */
1063 static inline int pci_save_state(struct pci_dev *dev)
1068 static inline int pci_restore_state(struct pci_dev *dev)
1073 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1078 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1084 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1090 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1095 static inline void pci_release_regions(struct pci_dev *dev)
1098 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1100 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
1103 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
1106 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1109 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1113 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1117 #endif /* CONFIG_PCI */
1119 /* Include architecture-dependent settings and functions */
1121 #include <asm/pci.h>
1123 #ifndef PCIBIOS_MAX_MEM_32
1124 #define PCIBIOS_MAX_MEM_32 (-1)
1127 /* these helpers provide future and backwards compatibility
1128 * for accessing popular PCI BAR info */
1129 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1130 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1131 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1132 #define pci_resource_len(dev,bar) \
1133 ((pci_resource_start((dev), (bar)) == 0 && \
1134 pci_resource_end((dev), (bar)) == \
1135 pci_resource_start((dev), (bar))) ? 0 : \
1137 (pci_resource_end((dev), (bar)) - \
1138 pci_resource_start((dev), (bar)) + 1))
1140 /* Similar to the helpers above, these manipulate per-pci_dev
1141 * driver-specific data. They are really just a wrapper around
1142 * the generic device structure functions of these calls.
1144 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1146 return dev_get_drvdata(&pdev->dev);
1149 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1151 dev_set_drvdata(&pdev->dev, data);
1154 /* If you want to know what to call your pci_dev, ask this function.
1155 * Again, it's a wrapper around the generic device.
1157 static inline const char *pci_name(const struct pci_dev *pdev)
1159 return dev_name(&pdev->dev);
1163 /* Some archs don't want to expose struct resource to userland as-is
1164 * in sysfs and /proc
1166 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1167 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1168 const struct resource *rsrc, resource_size_t *start,
1169 resource_size_t *end)
1171 *start = rsrc->start;
1174 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1178 * The world is not perfect and supplies us with broken PCI devices.
1179 * For at least a part of these bugs we need a work-around, so both
1180 * generic (drivers/pci/quirks.c) and per-architecture code can define
1181 * fixup hooks to be called for particular buggy devices.
1185 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
1186 void (*hook)(struct pci_dev *dev);
1189 enum pci_fixup_pass {
1190 pci_fixup_early, /* Before probing BARs */
1191 pci_fixup_header, /* After reading configuration header */
1192 pci_fixup_final, /* Final phase of device fixups */
1193 pci_fixup_enable, /* pci_enable_device() time */
1194 pci_fixup_resume, /* pci_device_resume() */
1195 pci_fixup_suspend, /* pci_device_suspend */
1196 pci_fixup_resume_early, /* pci_device_resume_early() */
1199 /* Anonymous variables would be nice... */
1200 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1201 static const struct pci_fixup __pci_fixup_##name __used \
1202 __attribute__((__section__(#section))) = { vendor, device, hook };
1203 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1204 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1205 vendor##device##hook, vendor, device, hook)
1206 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1207 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1208 vendor##device##hook, vendor, device, hook)
1209 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1210 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1211 vendor##device##hook, vendor, device, hook)
1212 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1213 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1214 vendor##device##hook, vendor, device, hook)
1215 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1216 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1217 resume##vendor##device##hook, vendor, device, hook)
1218 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1219 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1220 resume_early##vendor##device##hook, vendor, device, hook)
1221 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1222 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1223 suspend##vendor##device##hook, vendor, device, hook)
1226 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1228 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1229 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1230 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1231 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1232 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1234 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1236 extern int pci_pci_problems;
1237 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1238 #define PCIPCI_TRITON 2
1239 #define PCIPCI_NATOMA 4
1240 #define PCIPCI_VIAETBF 8
1241 #define PCIPCI_VSFX 16
1242 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1243 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1245 extern unsigned long pci_cardbus_io_size;
1246 extern unsigned long pci_cardbus_mem_size;
1248 int pcibios_add_platform_entries(struct pci_dev *dev);
1249 void pcibios_disable_device(struct pci_dev *dev);
1250 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1251 enum pcie_reset_state state);
1253 #ifdef CONFIG_PCI_MMCONFIG
1254 extern void __init pci_mmcfg_early_init(void);
1255 extern void __init pci_mmcfg_late_init(void);
1257 static inline void pci_mmcfg_early_init(void) { }
1258 static inline void pci_mmcfg_late_init(void) { }
1261 int pci_ext_cfg_avail(struct pci_dev *dev);
1263 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1265 #ifdef CONFIG_PCI_IOV
1266 extern int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1267 extern void pci_disable_sriov(struct pci_dev *dev);
1268 extern irqreturn_t pci_sriov_migration(struct pci_dev *dev);
1270 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1274 static inline void pci_disable_sriov(struct pci_dev *dev)
1277 static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev)
1283 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1284 extern void pci_hp_create_module_link(struct pci_slot *pci_slot);
1285 extern void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1288 #endif /* __KERNEL__ */
1289 #endif /* LINUX_PCI_H */