1 // include/asm-arm/mach-omap/usb.h
3 #ifndef __ASM_ARCH_OMAP_USB_H
4 #define __ASM_ARCH_OMAP_USB_H
6 #include <asm/arch/board.h>
8 /*-------------------------------------------------------------------------*/
10 #define OTG_BASE 0xfffb0400
11 #define UDC_BASE 0xfffb4000
12 #define OMAP_OHCI_BASE 0xfffba000
14 /*-------------------------------------------------------------------------*/
17 * OTG and transceiver registers, for OMAPs starting with ARM926
19 #define OTG_REG32(offset) __REG32(OTG_BASE + (offset))
20 #define OTG_REG16(offset) __REG16(OTG_BASE + (offset))
22 #define OTG_REV_REG OTG_REG32(0x00)
23 #define OTG_SYSCON_1_REG OTG_REG32(0x04)
24 # define USB2_TRX_MODE(w) (((w)>>24)&0x07)
25 # define USB1_TRX_MODE(w) (((w)>>20)&0x07)
26 # define USB0_TRX_MODE(w) (((w)>>16)&0x07)
27 # define OTG_IDLE_EN (1 << 15)
28 # define HST_IDLE_EN (1 << 14)
29 # define DEV_IDLE_EN (1 << 13)
30 # define OTG_RESET_DONE (1 << 2)
31 #define OTG_SYSCON_2_REG OTG_REG32(0x08)
32 # define OTG_EN (1 << 31)
33 # define USBX_SYNCHRO (1 << 30)
34 # define OTG_MST16 (1 << 29)
35 # define SRP_GPDATA (1 << 28)
36 # define SRP_GPDVBUS (1 << 27)
37 # define SRP_GPUVBUS(w) (((w)>>24)&0x07)
38 # define A_WAIT_VRISE(w) (((w)>>20)&0x07)
39 # define B_ASE_BRST(w) (((w)>>16)&0x07)
40 # define SRP_DPW (1 << 14)
41 # define SRP_DATA (1 << 13)
42 # define SRP_VBUS (1 << 12)
43 # define OTG_PADEN (1 << 10)
44 # define HMC_PADEN (1 << 9)
45 # define UHOST_EN (1 << 8)
46 # define HMC_TLLSPEED (1 << 7)
47 # define HMC_TLLATTACH (1 << 6)
48 # define OTG_HMC(w) (((w)>>0)&0x3f)
49 #define OTG_CTRL_REG OTG_REG32(0x0c)
50 # define OTG_ASESSVLD (1 << 20)
51 # define OTG_BSESSEND (1 << 19)
52 # define OTG_BSESSVLD (1 << 18)
53 # define OTG_VBUSVLD (1 << 17)
54 # define OTG_ID (1 << 16)
55 # define OTG_DRIVER_SEL (1 << 15)
56 # define OTG_A_SETB_HNPEN (1 << 12)
57 # define OTG_A_BUSREQ (1 << 11)
58 # define OTG_B_HNPEN (1 << 9)
59 # define OTG_B_BUSREQ (1 << 8)
60 # define OTG_BUSDROP (1 << 7)
61 # define OTG_PULLDOWN (1 << 5)
62 # define OTG_PULLUP (1 << 4)
63 # define OTG_DRV_VBUS (1 << 3)
64 # define OTG_PD_VBUS (1 << 2)
65 # define OTG_PU_VBUS (1 << 1)
66 # define OTG_PU_ID (1 << 0)
67 #define OTG_IRQ_EN_REG OTG_REG16(0x10)
68 # define DRIVER_SWITCH (1 << 15)
69 # define A_VBUS_ERR (1 << 13)
70 # define A_REQ_TMROUT (1 << 12)
71 # define A_SRP_DETECT (1 << 11)
72 # define B_HNP_FAIL (1 << 10)
73 # define B_SRP_TMROUT (1 << 9)
74 # define B_SRP_DONE (1 << 8)
75 # define B_SRP_STARTED (1 << 7)
76 # define OPRT_CHG (1 << 0)
77 #define OTG_IRQ_SRC_REG OTG_REG16(0x14)
78 // same bits as in IRQ_EN
79 #define OTG_OUTCTRL_REG OTG_REG16(0x18)
80 # define OTGVPD (1 << 14)
81 # define OTGVPU (1 << 13)
82 # define OTGPUID (1 << 12)
83 # define USB2VDR (1 << 10)
84 # define USB2PDEN (1 << 9)
85 # define USB2PUEN (1 << 8)
86 # define USB1VDR (1 << 6)
87 # define USB1PDEN (1 << 5)
88 # define USB1PUEN (1 << 4)
89 # define USB0VDR (1 << 2)
90 # define USB0PDEN (1 << 1)
91 # define USB0PUEN (1 << 0)
92 #define OTG_TEST_REG OTG_REG16(0x20)
93 #define OTG_VENDOR_CODE_REG OTG_REG32(0xfc)
95 /*-------------------------------------------------------------------------*/
97 #define USB_TRANSCEIVER_CTRL_REG __REG32(0xfffe1000 + 0x0064)
98 # define CONF_USB2_UNI_R (1 << 8)
99 # define CONF_USB1_UNI_R (1 << 7)
100 # define CONF_USB_PORT0_R(x) (((x)>>4)&0x7)
101 # define CONF_USB0_ISOLATE_R (1 << 3)
102 # define CONF_USB_PWRDN_DM_R (1 << 2)
103 # define CONF_USB_PWRDN_DP_R (1 << 1)
108 #endif /* __ASM_ARCH_OMAP_USB_H */
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