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   1 /*
   2  *  linux/drivers/video/sgivwfb.c -- SGI DBE frame buffer device
   3  *
   4  *      Copyright (C) 1999 Silicon Graphics, Inc.
   5  *      Jeffrey Newquist, newquist@engr.sgi.som
   6  *
   7  *  This file is subject to the terms and conditions of the GNU General Public
   8  *  License. See the file COPYING in the main directory of this archive for
   9  *  more details.
  10  */
  11
  12 #include <linux/config.h>
  13 #include <linux/module.h>
  14 #include <linux/kernel.h>
  15 #include <linux/mm.h>
  16 #include <linux/errno.h>
  17 #include <linux/delay.h>
  18 #include <linux/fb.h>
  19 #include <linux/init.h>
  20 #include <linux/ioport.h>
  21 #include <linux/platform_device.h>
  22
  23 #include <asm/io.h>
  24 #include <asm/mtrr.h>
  25
  26 #define INCLUDE_TIMING_TABLE_DATA
  27 #define DBE_REG_BASE par->regs
  28 #include <video/sgivw.h>
  29
  30 struct sgivw_par {
  31         struct asregs *regs;
  32         u32 cmap_fifo;
  33         u_long timing_num;
  34 };
  35
  36 #define FLATPANEL_SGI_1600SW    5
  37
  38 /*
  39  *  RAM we reserve for the frame buffer. This defines the maximum screen
  40  *  size
  41  *
  42  *  The default can be overridden if the driver is compiled as a module
  43  */
  44
  45 /* set by arch/i386/kernel/setup.c */
  46 extern unsigned long sgivwfb_mem_phys;
  47 extern unsigned long sgivwfb_mem_size;
  48
  49 static int ypan = 0;
  50 static int ywrap = 0;
  51
  52 static int flatpanel_id = -1;
  53
  54 static struct fb_fix_screeninfo sgivwfb_fix __initdata = {
  55         .id             = "SGI Vis WS FB",
  56         .type           = FB_TYPE_PACKED_PIXELS,
  57         .visual         = FB_VISUAL_PSEUDOCOLOR,
  58         .mmio_start     = DBE_REG_PHYS,
  59         .mmio_len       = DBE_REG_SIZE,
  60         .accel          = FB_ACCEL_NONE,
  61         .line_length    = 640,
  62 };
  63
  64 static struct fb_var_screeninfo sgivwfb_var __initdata = {
  65         /* 640x480, 8 bpp */
  66         .xres           = 640,
  67         .yres           = 480,
  68         .xres_virtual   = 640,
  69         .yres_virtual   = 480,
  70         .bits_per_pixel = 8,
  71         .red            = { 0, 8, 0 },
  72         .green          = { 0, 8, 0 },
  73         .blue           = { 0, 8, 0 },
  74         .height         = -1,
  75         .width          = -1,
  76         .pixclock       = 20000,
  77         .left_margin    = 64,
  78         .right_margin   = 64,
  79         .upper_margin   = 32,
  80         .lower_margin   = 32,
  81         .hsync_len      = 64,
  82         .vsync_len      = 2,
  83         .vmode          = FB_VMODE_NONINTERLACED
  84 };
  85
  86 static struct fb_var_screeninfo sgivwfb_var1600sw __initdata = {
  87         /* 1600x1024, 8 bpp */
  88         .xres           = 1600,
  89         .yres           = 1024,
  90         .xres_virtual   = 1600,
  91         .yres_virtual   = 1024,
  92         .bits_per_pixel = 8,
  93         .red            = { 0, 8, 0 },
  94         .green          = { 0, 8, 0 },
  95         .blue           = { 0, 8, 0 },
  96         .height         = -1,
  97         .width          = -1,
  98         .pixclock       = 9353,
  99         .left_margin    = 20,
 100         .right_margin   = 30,
 101         .upper_margin   = 37,
 102         .lower_margin   = 3,
 103         .hsync_len      = 20,
 104         .vsync_len      = 3,
 105         .vmode          = FB_VMODE_NONINTERLACED
 106 };
 107
 108 /*
 109  *  Interface used by the world
 110  */
 111 int sgivwfb_init(void);
 112
 113 static int sgivwfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info);
 114 static int sgivwfb_set_par(struct fb_info *info);
 115 static int sgivwfb_setcolreg(u_int regno, u_int red, u_int green,
 116                              u_int blue, u_int transp,
 117                              struct fb_info *info);
 118 static int sgivwfb_mmap(struct fb_info *info,
 119                         struct vm_area_struct *vma);
 120
 121 static struct fb_ops sgivwfb_ops = {
 122         .owner          = THIS_MODULE,
 123         .fb_check_var   = sgivwfb_check_var,
 124         .fb_set_par     = sgivwfb_set_par,
 125         .fb_setcolreg   = sgivwfb_setcolreg,
 126         .fb_fillrect    = cfb_fillrect,
 127         .fb_copyarea    = cfb_copyarea,
 128         .fb_imageblit   = cfb_imageblit,
 129         .fb_mmap        = sgivwfb_mmap,
 130 };
 131
 132 /*
 133  *  Internal routines
 134  */
 135 static unsigned long bytes_per_pixel(int bpp)
 136 {
 137         switch (bpp) {
 138                 case 8:
 139                         return 1;
 140                 case 16:
 141                         return 2;
 142                 case 32:
 143                         return 4;
 144                 default:
 145                         printk(KERN_INFO "sgivwfb: unsupported bpp %d\n", bpp);
 146                         return 0;
 147         }
 148 }
 149
 150 static unsigned long get_line_length(int xres_virtual, int bpp)
 151 {
 152         return (xres_virtual * bytes_per_pixel(bpp));
 153 }
 154
 155 /*
 156  * Function:    dbe_TurnOffDma
 157  * Parameters:  (None)
 158  * Description: This should turn off the monitor and dbe.  This is used
 159  *              when switching between the serial console and the graphics
 160  *              console.
 161  */
 162
 163 static void dbe_TurnOffDma(struct sgivw_par *par)
 164 {
 165         unsigned int readVal;
 166         int i;
 167
 168         // Check to see if things are already turned off:
 169         // 1) Check to see if dbe is not using the internal dotclock.
 170         // 2) Check to see if the xy counter in dbe is already off.
 171
 172         DBE_GETREG(ctrlstat, readVal);
 173         if (GET_DBE_FIELD(CTRLSTAT, PCLKSEL, readVal) < 2)
 174                 return;
 175
 176         DBE_GETREG(vt_xy, readVal);
 177         if (GET_DBE_FIELD(VT_XY, VT_FREEZE, readVal) == 1)
 178                 return;
 179
 180         // Otherwise, turn off dbe
 181
 182         DBE_GETREG(ovr_control, readVal);
 183         SET_DBE_FIELD(OVR_CONTROL, OVR_DMA_ENABLE, readVal, 0);
 184         DBE_SETREG(ovr_control, readVal);
 185         udelay(1000);
 186         DBE_GETREG(frm_control, readVal);
 187         SET_DBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, readVal, 0);
 188         DBE_SETREG(frm_control, readVal);
 189         udelay(1000);
 190         DBE_GETREG(did_control, readVal);
 191         SET_DBE_FIELD(DID_CONTROL, DID_DMA_ENABLE, readVal, 0);
 192         DBE_SETREG(did_control, readVal);
 193         udelay(1000);
 194
 195         // XXX HACK:
 196         //
 197         //    This was necessary for GBE--we had to wait through two
 198         //    vertical retrace periods before the pixel DMA was
 199         //    turned off for sure.  I've left this in for now, in
 200         //    case dbe needs it.
 201
 202         for (i = 0; i < 10000; i++) {
 203                 DBE_GETREG(frm_inhwctrl, readVal);
 204                 if (GET_DBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, readVal) ==
 205                     0)
 206                         udelay(10);
 207                 else {
 208                         DBE_GETREG(ovr_inhwctrl, readVal);
 209                         if (GET_DBE_FIELD
 210                             (OVR_INHWCTRL, OVR_DMA_ENABLE, readVal) == 0)
 211                                 udelay(10);
 212                         else {
 213                                 DBE_GETREG(did_inhwctrl, readVal);
 214                                 if (GET_DBE_FIELD
 215                                     (DID_INHWCTRL, DID_DMA_ENABLE,
 216                                      readVal) == 0)
 217                                         udelay(10);
 218                                 else
 219                                         break;
 220                         }
 221                 }
 222         }
 223 }
 224
 225 /*
 226  *  Set the User Defined Part of the Display. Again if par use it to get
 227  *  real video mode.
 228  */
 229 static int sgivwfb_check_var(struct fb_var_screeninfo *var,
 230                              struct fb_info *info)
 231 {
 232         struct sgivw_par *par = (struct sgivw_par *)info->par;
 233         struct dbe_timing_info *timing;
 234         u_long line_length;
 235         u_long min_mode;
 236         int req_dot;
 237         int test_mode;
 238
 239         /*
 240          *  FB_VMODE_CONUPDATE and FB_VMODE_SMOOTH_XPAN are equal!
 241          *  as FB_VMODE_SMOOTH_XPAN is only used internally
 242          */
 243
 244         if (var->vmode & FB_VMODE_CONUPDATE) {
 245                 var->vmode |= FB_VMODE_YWRAP;
 246                 var->xoffset = info->var.xoffset;
 247                 var->yoffset = info->var.yoffset;
 248         }
 249
 250         /* XXX FIXME - forcing var's */
 251         var->xoffset = 0;
 252         var->yoffset = 0;
 253
 254         /* Limit bpp to 8, 16, and 32 */
 255         if (var->bits_per_pixel <= 8)
 256                 var->bits_per_pixel = 8;
 257         else if (var->bits_per_pixel <= 16)
 258                 var->bits_per_pixel = 16;
 259         else if (var->bits_per_pixel <= 32)
 260                 var->bits_per_pixel = 32;
 261         else
 262                 return -EINVAL;
 263
 264         var->grayscale = 0;     /* No grayscale for now */
 265
 266         /* determine valid resolution and timing */
 267         for (min_mode = 0; min_mode < DBE_VT_SIZE; min_mode++) {
 268                 if (dbeVTimings[min_mode].width >= var->xres &&
 269                     dbeVTimings[min_mode].height >= var->yres)
 270                         break;
 271         }
 272
 273         if (min_mode == DBE_VT_SIZE)
 274                 return -EINVAL; /* Resolution to high */
 275
 276         /* XXX FIXME - should try to pick best refresh rate */
 277         /* for now, pick closest dot-clock within 3MHz */
 278         req_dot = PICOS2KHZ(var->pixclock);
 279         printk(KERN_INFO "sgivwfb: requested pixclock=%d ps (%d KHz)\n",
 280                var->pixclock, req_dot);
 281         test_mode = min_mode;
 282         while (dbeVTimings[min_mode].width == dbeVTimings[test_mode].width) {
 283                 if (dbeVTimings[test_mode].cfreq + 3000 > req_dot)
 284                         break;
 285                 test_mode++;
 286         }
 287         if (dbeVTimings[min_mode].width != dbeVTimings[test_mode].width)
 288                 test_mode--;
 289         min_mode = test_mode;
 290         timing = &dbeVTimings[min_mode];
 291         printk(KERN_INFO "sgivwfb: granted dot-clock=%d KHz\n", timing->cfreq);
 292
 293         /* Adjust virtual resolution, if necessary */
 294         if (var->xres > var->xres_virtual || (!ywrap && !ypan))
 295                 var->xres_virtual = var->xres;
 296         if (var->yres > var->yres_virtual || (!ywrap && !ypan))
 297                 var->yres_virtual = var->yres;
 298
 299         /*
 300          *  Memory limit
 301          */
 302         line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
 303         if (line_length * var->yres_virtual > sgivwfb_mem_size)
 304                 return -ENOMEM; /* Virtual resolution to high */
 305
 306         info->fix.line_length = line_length;
 307
 308         switch (var->bits_per_pixel) {
 309         case 8:
 310                 var->red.offset = 0;
 311                 var->red.length = 8;
 312                 var->green.offset = 0;
 313                 var->green.length = 8;
 314                 var->blue.offset = 0;
 315                 var->blue.length = 8;
 316                 var->transp.offset = 0;
 317                 var->transp.length = 0;
 318                 break;
 319         case 16:                /* RGBA 5551 */
 320                 var->red.offset = 11;
 321                 var->red.length = 5;
 322                 var->green.offset = 6;
 323                 var->green.length = 5;
 324                 var->blue.offset = 1;
 325                 var->blue.length = 5;
 326                 var->transp.offset = 0;
 327                 var->transp.length = 0;
 328                 break;
 329         case 32:                /* RGB 8888 */
 330                 var->red.offset = 0;
 331                 var->red.length = 8;
 332                 var->green.offset = 8;
 333                 var->green.length = 8;
 334                 var->blue.offset = 16;
 335                 var->blue.length = 8;
 336                 var->transp.offset = 24;
 337                 var->transp.length = 8;
 338                 break;
 339         }
 340         var->red.msb_right = 0;
 341         var->green.msb_right = 0;
 342         var->blue.msb_right = 0;
 343         var->transp.msb_right = 0;
 344
 345         /* set video timing information */
 346         var->pixclock = KHZ2PICOS(timing->cfreq);
 347         var->left_margin = timing->htotal - timing->hsync_end;
 348         var->right_margin = timing->hsync_start - timing->width;
 349         var->upper_margin = timing->vtotal - timing->vsync_end;
 350         var->lower_margin = timing->vsync_start - timing->height;
 351         var->hsync_len = timing->hsync_end - timing->hsync_start;
 352         var->vsync_len = timing->vsync_end - timing->vsync_start;
 353
 354         /* Ouch. This breaks the rules but timing_num is only important if you
 355         * change a video mode */
 356         par->timing_num = min_mode;
 357
 358         printk(KERN_INFO "sgivwfb: new video mode xres=%d yres=%d bpp=%d\n",
 359                 var->xres, var->yres, var->bits_per_pixel);
 360         printk(KERN_INFO "         vxres=%d vyres=%d\n", var->xres_virtual,
 361                 var->yres_virtual);
 362         return 0;
 363 }
 364
 365 /*
 366  *  Setup flatpanel related registers.
 367  */
 368 static void sgivwfb_setup_flatpanel(struct sgivw_par *par, struct dbe_timing_info *currentTiming)
 369 {
 370         int fp_wid, fp_hgt, fp_vbs, fp_vbe;
 371         u32 outputVal = 0;
 372
 373         SET_DBE_FIELD(VT_FLAGS, HDRV_INVERT, outputVal,
 374                 (currentTiming->flags & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1);
 375         SET_DBE_FIELD(VT_FLAGS, VDRV_INVERT, outputVal,
 376                 (currentTiming->flags & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1);
 377         DBE_SETREG(vt_flags, outputVal);
 378
 379         /* Turn on the flat panel */
 380         switch (flatpanel_id) {
 381                 case FLATPANEL_SGI_1600SW:
 382                         fp_wid = 1600;
 383                         fp_hgt = 1024;
 384                         fp_vbs = 0;
 385                         fp_vbe = 1600;
 386                         currentTiming->pll_m = 4;
 387                         currentTiming->pll_n = 1;
 388                         currentTiming->pll_p = 0;
 389                         break;
 390                 default:
 391                         fp_wid = fp_hgt = fp_vbs = fp_vbe = 0xfff;
 392         }
 393
 394         outputVal = 0;
 395         SET_DBE_FIELD(FP_DE, FP_DE_ON, outputVal, fp_vbs);
 396         SET_DBE_FIELD(FP_DE, FP_DE_OFF, outputVal, fp_vbe);
 397         DBE_SETREG(fp_de, outputVal);
 398         outputVal = 0;
 399         SET_DBE_FIELD(FP_HDRV, FP_HDRV_OFF, outputVal, fp_wid);
 400         DBE_SETREG(fp_hdrv, outputVal);
 401         outputVal = 0;
 402         SET_DBE_FIELD(FP_VDRV, FP_VDRV_ON, outputVal, 1);
 403         SET_DBE_FIELD(FP_VDRV, FP_VDRV_OFF, outputVal, fp_hgt + 1);
 404         DBE_SETREG(fp_vdrv, outputVal);
 405 }
 406
 407 /*
 408  *  Set the hardware according to 'par'.
 409  */
 410 static int sgivwfb_set_par(struct fb_info *info)
 411 {
 412         struct sgivw_par *par = info->par;
 413         int i, j, htmp, temp;
 414         u32 readVal, outputVal;
 415         int wholeTilesX, maxPixelsPerTileX;
 416         int frmWrite1, frmWrite2, frmWrite3b;
 417         struct dbe_timing_info *currentTiming; /* Current Video Timing */
 418         int xpmax, ypmax;       // Monitor resolution
 419         int bytesPerPixel;      // Bytes per pixel
 420
 421         currentTiming = &dbeVTimings[par->timing_num];
 422         bytesPerPixel = bytes_per_pixel(info->var.bits_per_pixel);
 423         xpmax = currentTiming->width;
 424         ypmax = currentTiming->height;
 425
 426         /* dbe_InitGraphicsBase(); */
 427         /* Turn on dotclock PLL */
 428         DBE_SETREG(ctrlstat, 0x20000000);
 429
 430         dbe_TurnOffDma(par);
 431
 432         /* dbe_CalculateScreenParams(); */
 433         maxPixelsPerTileX = 512 / bytesPerPixel;
 434         wholeTilesX = xpmax / maxPixelsPerTileX;
 435         if (wholeTilesX * maxPixelsPerTileX < xpmax)
 436                 wholeTilesX++;
 437
 438         printk(KERN_DEBUG "sgivwfb: pixPerTile=%d wholeTilesX=%d\n",
 439                maxPixelsPerTileX, wholeTilesX);
 440
 441         /* dbe_InitGammaMap(); */
 442         udelay(10);
 443
 444         for (i = 0; i < 256; i++) {
 445                 DBE_ISETREG(gmap, i, (i << 24) | (i << 16) | (i << 8));
 446         }
 447
 448         /* dbe_TurnOn(); */
 449         DBE_GETREG(vt_xy, readVal);
 450         if (GET_DBE_FIELD(VT_XY, VT_FREEZE, readVal) == 1) {
 451                 DBE_SETREG(vt_xy, 0x00000000);
 452                 udelay(1);
 453         } else
 454                 dbe_TurnOffDma(par);
 455
 456         /* dbe_Initdbe(); */
 457         for (i = 0; i < 256; i++) {
 458                 for (j = 0; j < 100; j++) {
 459                         DBE_GETREG(cm_fifo, readVal);
 460                         if (readVal != 0x00000000)
 461                                 break;
 462                         else
 463                                 udelay(10);
 464                 }
 465
 466                 // DBE_ISETREG(cmap, i, 0x00000000);
 467                 DBE_ISETREG(cmap, i, (i << 8) | (i << 16) | (i << 24));
 468         }
 469
 470         /* dbe_InitFramebuffer(); */
 471         frmWrite1 = 0;
 472         SET_DBE_FIELD(FRM_SIZE_TILE, FRM_WIDTH_TILE, frmWrite1,
 473                       wholeTilesX);
 474         SET_DBE_FIELD(FRM_SIZE_TILE, FRM_RHS, frmWrite1, 0);
 475
 476         switch (bytesPerPixel) {
 477         case 1:
 478                 SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1,
 479                               DBE_FRM_DEPTH_8);
 480                 break;
 481         case 2:
 482                 SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1,
 483                               DBE_FRM_DEPTH_16);
 484                 break;
 485         case 4:
 486                 SET_DBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, frmWrite1,
 487                               DBE_FRM_DEPTH_32);
 488                 break;
 489         }
 490
 491         frmWrite2 = 0;
 492         SET_DBE_FIELD(FRM_SIZE_PIXEL, FB_HEIGHT_PIX, frmWrite2, ypmax);
 493
 494         // Tell dbe about the framebuffer location and type
 495         // XXX What format is the FRM_TILE_PTR??  64K aligned address?
 496         frmWrite3b = 0;
 497         SET_DBE_FIELD(FRM_CONTROL, FRM_TILE_PTR, frmWrite3b,
 498                       sgivwfb_mem_phys >> 9);
 499         SET_DBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, frmWrite3b, 1);
 500         SET_DBE_FIELD(FRM_CONTROL, FRM_LINEAR, frmWrite3b, 1);
 501
 502         /* Initialize DIDs */
 503
 504         outputVal = 0;
 505         switch (bytesPerPixel) {
 506         case 1:
 507                 SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_I8);
 508                 break;
 509         case 2:
 510                 SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_RGBA5);
 511                 break;
 512         case 4:
 513                 SET_DBE_FIELD(WID, TYP, outputVal, DBE_CMODE_RGB8);
 514                 break;
 515         }
 516         SET_DBE_FIELD(WID, BUF, outputVal, DBE_BMODE_BOTH);
 517
 518         for (i = 0; i < 32; i++) {
 519                 DBE_ISETREG(mode_regs, i, outputVal);
 520         }
 521
 522         /* dbe_InitTiming(); */
 523         DBE_SETREG(vt_intr01, 0xffffffff);
 524         DBE_SETREG(vt_intr23, 0xffffffff);
 525
 526         DBE_GETREG(dotclock, readVal);
 527         DBE_SETREG(dotclock, readVal & 0xffff);
 528
 529         DBE_SETREG(vt_xymax, 0x00000000);
 530         outputVal = 0;
 531         SET_DBE_FIELD(VT_VSYNC, VT_VSYNC_ON, outputVal,
 532                       currentTiming->vsync_start);
 533         SET_DBE_FIELD(VT_VSYNC, VT_VSYNC_OFF, outputVal,
 534                       currentTiming->vsync_end);
 535         DBE_SETREG(vt_vsync, outputVal);
 536         outputVal = 0;
 537         SET_DBE_FIELD(VT_HSYNC, VT_HSYNC_ON, outputVal,
 538                       currentTiming->hsync_start);
 539         SET_DBE_FIELD(VT_HSYNC, VT_HSYNC_OFF, outputVal,
 540                       currentTiming->hsync_end);
 541         DBE_SETREG(vt_hsync, outputVal);
 542         outputVal = 0;
 543         SET_DBE_FIELD(VT_VBLANK, VT_VBLANK_ON, outputVal,
 544                       currentTiming->vblank_start);
 545         SET_DBE_FIELD(VT_VBLANK, VT_VBLANK_OFF, outputVal,
 546                       currentTiming->vblank_end);
 547         DBE_SETREG(vt_vblank, outputVal);
 548         outputVal = 0;
 549         SET_DBE_FIELD(VT_HBLANK, VT_HBLANK_ON, outputVal,
 550                       currentTiming->hblank_start);
 551         SET_DBE_FIELD(VT_HBLANK, VT_HBLANK_OFF, outputVal,
 552                       currentTiming->hblank_end - 3);
 553         DBE_SETREG(vt_hblank, outputVal);
 554         outputVal = 0;
 555         SET_DBE_FIELD(VT_VCMAP, VT_VCMAP_ON, outputVal,
 556                       currentTiming->vblank_start);
 557         SET_DBE_FIELD(VT_VCMAP, VT_VCMAP_OFF, outputVal,
 558                       currentTiming->vblank_end);
 559         DBE_SETREG(vt_vcmap, outputVal);
 560         outputVal = 0;
 561         SET_DBE_FIELD(VT_HCMAP, VT_HCMAP_ON, outputVal,
 562                       currentTiming->hblank_start);
 563         SET_DBE_FIELD(VT_HCMAP, VT_HCMAP_OFF, outputVal,
 564                       currentTiming->hblank_end - 3);
 565         DBE_SETREG(vt_hcmap, outputVal);
 566
 567         if (flatpanel_id != -1)
 568                 sgivwfb_setup_flatpanel(par, currentTiming);
 569
 570         outputVal = 0;
 571         temp = currentTiming->vblank_start - currentTiming->vblank_end - 1;
 572         if (temp > 0)
 573                 temp = -temp;
 574
 575         SET_DBE_FIELD(DID_START_XY, DID_STARTY, outputVal, (u32) temp);
 576         if (currentTiming->hblank_end >= 20)
 577                 SET_DBE_FIELD(DID_START_XY, DID_STARTX, outputVal,
 578                               currentTiming->hblank_end - 20);
 579         else
 580                 SET_DBE_FIELD(DID_START_XY, DID_STARTX, outputVal,
 581                               currentTiming->htotal - (20 -
 582                                                        currentTiming->
 583                                                        hblank_end));
 584         DBE_SETREG(did_start_xy, outputVal);
 585
 586         outputVal = 0;
 587         SET_DBE_FIELD(CRS_START_XY, CRS_STARTY, outputVal,
 588                       (u32) (temp + 1));
 589         if (currentTiming->hblank_end >= DBE_CRS_MAGIC)
 590                 SET_DBE_FIELD(CRS_START_XY, CRS_STARTX, outputVal,
 591                               currentTiming->hblank_end - DBE_CRS_MAGIC);
 592         else
 593                 SET_DBE_FIELD(CRS_START_XY, CRS_STARTX, outputVal,
 594                               currentTiming->htotal - (DBE_CRS_MAGIC -
 595                                                        currentTiming->
 596                                                        hblank_end));
 597         DBE_SETREG(crs_start_xy, outputVal);
 598
 599         outputVal = 0;
 600         SET_DBE_FIELD(VC_START_XY, VC_STARTY, outputVal, (u32) temp);
 601         SET_DBE_FIELD(VC_START_XY, VC_STARTX, outputVal,
 602                       currentTiming->hblank_end - 4);
 603         DBE_SETREG(vc_start_xy, outputVal);
 604
 605         DBE_SETREG(frm_size_tile, frmWrite1);
 606         DBE_SETREG(frm_size_pixel, frmWrite2);
 607
 608         outputVal = 0;
 609         SET_DBE_FIELD(DOTCLK, M, outputVal, currentTiming->pll_m - 1);
 610         SET_DBE_FIELD(DOTCLK, N, outputVal, currentTiming->pll_n - 1);
 611         SET_DBE_FIELD(DOTCLK, P, outputVal, currentTiming->pll_p);
 612         SET_DBE_FIELD(DOTCLK, RUN, outputVal, 1);
 613         DBE_SETREG(dotclock, outputVal);
 614
 615         udelay(11 * 1000);
 616
 617         DBE_SETREG(vt_vpixen, 0xffffff);
 618         DBE_SETREG(vt_hpixen, 0xffffff);
 619
 620         outputVal = 0;
 621         SET_DBE_FIELD(VT_XYMAX, VT_MAXX, outputVal, currentTiming->htotal);
 622         SET_DBE_FIELD(VT_XYMAX, VT_MAXY, outputVal, currentTiming->vtotal);
 623         DBE_SETREG(vt_xymax, outputVal);
 624
 625         outputVal = frmWrite1;
 626         SET_DBE_FIELD(FRM_SIZE_TILE, FRM_FIFO_RESET, outputVal, 1);
 627         DBE_SETREG(frm_size_tile, outputVal);
 628         DBE_SETREG(frm_size_tile, frmWrite1);
 629
 630         outputVal = 0;
 631         SET_DBE_FIELD(OVR_WIDTH_TILE, OVR_FIFO_RESET, outputVal, 1);
 632         DBE_SETREG(ovr_width_tile, outputVal);
 633         DBE_SETREG(ovr_width_tile, 0);
 634
 635         DBE_SETREG(frm_control, frmWrite3b);
 636         DBE_SETREG(did_control, 0);
 637
 638         // Wait for dbe to take frame settings
 639         for (i = 0; i < 100000; i++) {
 640                 DBE_GETREG(frm_inhwctrl, readVal);
 641                 if (GET_DBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, readVal) !=
 642                     0)
 643                         break;
 644                 else
 645                         udelay(1);
 646         }
 647
 648         if (i == 100000)
 649                 printk(KERN_INFO
 650                        "sgivwfb: timeout waiting for frame DMA enable.\n");
 651
 652         outputVal = 0;
 653         htmp = currentTiming->hblank_end - 19;
 654         if (htmp < 0)
 655                 htmp += currentTiming->htotal;  /* allow blank to wrap around */
 656         SET_DBE_FIELD(VT_HPIXEN, VT_HPIXEN_ON, outputVal, htmp);
 657         SET_DBE_FIELD(VT_HPIXEN, VT_HPIXEN_OFF, outputVal,
 658                       ((htmp + currentTiming->width -
 659                         2) % currentTiming->htotal));
 660         DBE_SETREG(vt_hpixen, outputVal);
 661
 662         outputVal = 0;
 663         SET_DBE_FIELD(VT_VPIXEN, VT_VPIXEN_OFF, outputVal,
 664                       currentTiming->vblank_start);
 665         SET_DBE_FIELD(VT_VPIXEN, VT_VPIXEN_ON, outputVal,
 666                       currentTiming->vblank_end);
 667         DBE_SETREG(vt_vpixen, outputVal);
 668
 669         // Turn off mouse cursor
 670         par->regs->crs_ctl = 0;
 671
 672         // XXX What's this section for??
 673         DBE_GETREG(ctrlstat, readVal);
 674         readVal &= 0x02000000;
 675
 676         if (readVal != 0) {
 677                 DBE_SETREG(ctrlstat, 0x30000000);
 678         }
 679         return 0;
 680 }
 681
 682 /*
 683  *  Set a single color register. The values supplied are already
 684  *  rounded down to the hardware's capabilities (according to the
 685  *  entries in the var structure). Return != 0 for invalid regno.
 686  */
 687
 688 static int sgivwfb_setcolreg(u_int regno, u_int red, u_int green,
 689                              u_int blue, u_int transp,
 690                              struct fb_info *info)
 691 {
 692         struct sgivw_par *par = (struct sgivw_par *) info->par;
 693
 694         if (regno > 255)
 695                 return 1;
 696         red >>= 8;
 697         green >>= 8;
 698         blue >>= 8;
 699
 700         /* wait for the color map FIFO to have a free entry */
 701         while (par->cmap_fifo == 0)
 702                 par->cmap_fifo = par->regs->cm_fifo;
 703
 704         par->regs->cmap[regno] = (red << 24) | (green << 16) | (blue << 8);
 705         par->cmap_fifo--;       /* assume FIFO is filling up */
 706         return 0;
 707 }
 708
 709 static int sgivwfb_mmap(struct fb_info *info,
 710                         struct vm_area_struct *vma)
 711 {
 712         unsigned long size = vma->vm_end - vma->vm_start;
 713         unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
 714
 715         if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
 716                 return -EINVAL;
 717         if (offset + size > sgivwfb_mem_size)
 718                 return -EINVAL;
 719         offset += sgivwfb_mem_phys;
 720         pgprot_val(vma->vm_page_prot) =
 721             pgprot_val(vma->vm_page_prot) | _PAGE_PCD;
 722         vma->vm_flags |= VM_IO;
 723         if (remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT,
 724                                                 size, vma->vm_page_prot))
 725                 return -EAGAIN;
 726         printk(KERN_DEBUG "sgivwfb: mmap framebuffer P(%lx)->V(%lx)\n",
 727                offset, vma->vm_start);
 728         return 0;
 729 }
 730
 731 int __init sgivwfb_setup(char *options)
 732 {
 733         char *this_opt;
 734
 735         if (!options || !*options)
 736                 return 0;
 737
 738         while ((this_opt = strsep(&options, ",")) != NULL) {
 739                 if (!strncmp(this_opt, "monitor:", 8)) {
 740                         if (!strncmp(this_opt + 8, "crt", 3))
 741                                 flatpanel_id = -1;
 742                         else if (!strncmp(this_opt + 8, "1600sw", 6))
 743                                 flatpanel_id = FLATPANEL_SGI_1600SW;
 744                 }
 745         }
 746         return 0;
 747 }
 748
 749 /*
 750  *  Initialisation
 751  */
 752 static int __init sgivwfb_probe(struct platform_device *dev)
 753 {
 754         struct sgivw_par *par;
 755         struct fb_info *info;
 756         char *monitor;
 757
 758         info = framebuffer_alloc(sizeof(struct sgivw_par) + sizeof(u32) * 256, &dev->dev);
 759         if (!info)
 760                 return -ENOMEM;
 761         par = info->par;
 762
 763         if (!request_mem_region(DBE_REG_PHYS, DBE_REG_SIZE, "sgivwfb")) {
 764                 printk(KERN_ERR "sgivwfb: couldn't reserve mmio region\n");
 765                 framebuffer_release(info);
 766                 return -EBUSY;
 767         }
 768
 769         par->regs = (struct asregs *) ioremap_nocache(DBE_REG_PHYS, DBE_REG_SIZE);
 770         if (!par->regs) {
 771                 printk(KERN_ERR "sgivwfb: couldn't ioremap registers\n");
 772                 goto fail_ioremap_regs;
 773         }
 774
 775         mtrr_add(sgivwfb_mem_phys, sgivwfb_mem_size, MTRR_TYPE_WRCOMB, 1);
 776
 777         sgivwfb_fix.smem_start = sgivwfb_mem_phys;
 778         sgivwfb_fix.smem_len = sgivwfb_mem_size;
 779         sgivwfb_fix.ywrapstep = ywrap;
 780         sgivwfb_fix.ypanstep = ypan;
 781
 782         info->fix = sgivwfb_fix;
 783
 784         switch (flatpanel_id) {
 785                 case FLATPANEL_SGI_1600SW:
 786                         info->var = sgivwfb_var1600sw;
 787                         monitor = "SGI 1600SW flatpanel";
 788                         break;
 789                 default:
 790                         info->var = sgivwfb_var;
 791                         monitor = "CRT";
 792         }
 793
 794         printk(KERN_INFO "sgivwfb: %s monitor selected\n", monitor);
 795
 796         info->fbops = &sgivwfb_ops;
 797         info->pseudo_palette = (void *) (par + 1);
 798         info->flags = FBINFO_DEFAULT;
 799
 800         info->screen_base = ioremap_nocache((unsigned long) sgivwfb_mem_phys, sgivwfb_mem_size);
 801         if (!info->screen_base) {
 802                 printk(KERN_ERR "sgivwfb: couldn't ioremap screen_base\n");
 803                 goto fail_ioremap_fbmem;
 804         }
 805
 806         if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
 807                 goto fail_color_map;
 808
 809         if (register_framebuffer(info) < 0) {
 810                 printk(KERN_ERR "sgivwfb: couldn't register framebuffer\n");
 811                 goto fail_register_framebuffer;
 812         }
 813
 814         platform_set_drvdata(dev, info);
 815
 816         printk(KERN_INFO "fb%d: SGI DBE frame buffer device, using %ldK of video memory at %#lx\n",
 817                 info->node, sgivwfb_mem_size >> 10, sgivwfb_mem_phys);
 818         return 0;
 819
 820 fail_register_framebuffer:
 821         fb_dealloc_cmap(&info->cmap);
 822 fail_color_map:
 823         iounmap((char *) info->screen_base);
 824 fail_ioremap_fbmem:
 825         iounmap(par->regs);
 826 fail_ioremap_regs:
 827         release_mem_region(DBE_REG_PHYS, DBE_REG_SIZE);
 828         framebuffer_release(info);
 829         return -ENXIO;
 830 }
 831
 832 static int sgivwfb_remove(struct platform_device *dev)
 833 {
 834         struct fb_info *info = platform_get_drvdata(dev);
 835
 836         if (info) {
 837                 struct sgivw_par *par = info->par;
 838
 839                 unregister_framebuffer(info);
 840                 dbe_TurnOffDma(par);
 841                 iounmap(par->regs);
 842                 iounmap(info->screen_base);
 843                 release_mem_region(DBE_REG_PHYS, DBE_REG_SIZE);
 844         }
 845         return 0;
 846 }
 847
 848 static struct platform_driver sgivwfb_driver = {
 849         .probe  = sgivwfb_probe,
 850         .remove = sgivwfb_remove,
 851         .driver = {
 852                 .name   = "sgivwfb",
 853         },
 854 };
 855
 856 static struct platform_device *sgivwfb_device;
 857
 858 int __init sgivwfb_init(void)
 859 {
 860         int ret;
 861
 862 #ifndef MODULE
 863         char *option = NULL;
 864
 865         if (fb_get_options("sgivwfb", &option))
 866                 return -ENODEV;
 867         sgivwfb_setup(option);
 868 #endif
 869         ret = platform_driver_register(&sgivwfb_driver);
 870         if (!ret) {
 871                 sgivwfb_device = platform_device_alloc("sgivwfb", 0);
 872                 if (sgivwfb_device) {
 873                         ret = platform_device_add(sgivwfb_device);
 874                 } else
 875                         ret = -ENOMEM;
 876                 if (ret) {
 877                         platform_driver_unregister(&sgivwfb_driver);
 878                         platform_device_put(sgivwfb_device);
 879                 }
 880         }
 881         return ret;
 882 }
 883
 884 module_init(sgivwfb_init);
 885
 886 #ifdef MODULE
 887 MODULE_LICENSE("GPL");
 888
 889 static void __exit sgivwfb_exit(void)
 890 {
 891         platform_device_unregister(sgivwfb_device);
 892         platform_driver_unregister(&sgivwfb_driver);
 893 }
 894
 895 module_exit(sgivwfb_exit);
 896
 897 #endif                          /* MODULE */