SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/video/neofb.c

   1 /*
   2  * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver
   3  *
   4  * Copyright (c) 2001-2002  Denis Oliver Kropp <dok@directfb.org>
   5  *
   6  *
   7  * Card specific code is based on XFree86's neomagic driver.
   8  * Framebuffer framework code is based on code of cyber2000fb.
   9  *
  10  * This file is subject to the terms and conditions of the GNU General
  11  * Public License.  See the file COPYING in the main directory of this
  12  * archive for more details.
  13  *
  14  *
  15  * 0.4.1
  16  *  - Cosmetic changes (dok)
  17  *
  18  * 0.4
  19  *  - Toshiba Libretto support, allow modes larger than LCD size if
  20  *    LCD is disabled, keep BIOS settings if internal/external display
  21  *    haven't been enabled explicitly
  22  *                          (Thomas J. Moore <dark@mama.indstate.edu>)
  23  *
  24  * 0.3.3
  25  *  - Porting over to new fbdev api. (jsimmons)
  26  *
  27  * 0.3.2
  28  *  - got rid of all floating point (dok)
  29  *
  30  * 0.3.1
  31  *  - added module license (dok)
  32  *
  33  * 0.3
  34  *  - hardware accelerated clear and move for 2200 and above (dok)
  35  *  - maximum allowed dotclock is handled now (dok)
  36  *
  37  * 0.2.1
  38  *  - correct panning after X usage (dok)
  39  *  - added module and kernel parameters (dok)
  40  *  - no stretching if external display is enabled (dok)
  41  *
  42  * 0.2
  43  *  - initial version (dok)
  44  *
  45  *
  46  * TODO
  47  * - ioctl for internal/external switching
  48  * - blanking
  49  * - 32bit depth support, maybe impossible
  50  * - disable pan-on-sync, need specs
  51  *
  52  * BUGS
  53  * - white margin on bootup like with tdfxfb (colormap problem?)
  54  *
  55  */
  56
  57 #include <linux/module.h>
  58 #include <linux/kernel.h>
  59 #include <linux/errno.h>
  60 #include <linux/string.h>
  61 #include <linux/mm.h>
  62 #include <linux/slab.h>
  63 #include <linux/delay.h>
  64 #include <linux/fb.h>
  65 #include <linux/pci.h>
  66 #include <linux/init.h>
  67 #ifdef CONFIG_TOSHIBA
  68 #include <linux/toshiba.h>
  69 #endif
  70
  71 #include <asm/io.h>
  72 #include <asm/irq.h>
  73 #include <asm/pgtable.h>
  74 #include <asm/system.h>
  75 #include <asm/uaccess.h>
  76
  77 #ifdef CONFIG_MTRR
  78 #include <asm/mtrr.h>
  79 #endif
  80
  81 #include <video/vga.h>
  82 #include <video/neomagic.h>
  83
  84 #define NEOFB_VERSION "0.4.2"
  85
  86 /* --------------------------------------------------------------------- */
  87
  88 static int internal;
  89 static int external;
  90 static int libretto;
  91 static int nostretch;
  92 static int nopciburst;
  93 static char *mode_option __devinitdata = NULL;
  94
  95 #ifdef MODULE
  96
  97 MODULE_AUTHOR("(c) 2001-2002  Denis Oliver Kropp <dok@convergence.de>");
  98 MODULE_LICENSE("GPL");
  99 MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");
 100 module_param(internal, bool, 0);
 101 MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");
 102 module_param(external, bool, 0);
 103 MODULE_PARM_DESC(external, "Enable output on external CRT.");
 104 module_param(libretto, bool, 0);
 105 MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");
 106 module_param(nostretch, bool, 0);
 107 MODULE_PARM_DESC(nostretch,
 108                  "Disable stretching of modes smaller than LCD.");
 109 module_param(nopciburst, bool, 0);
 110 MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");
 111 module_param(mode_option, charp, 0);
 112 MODULE_PARM_DESC(mode_option, "Preferred video mode ('640x480-8@60', etc)");
 113
 114 #endif
 115
 116
 117 /* --------------------------------------------------------------------- */
 118
 119 static biosMode bios8[] = {
 120         {320, 240, 0x40},
 121         {300, 400, 0x42},
 122         {640, 400, 0x20},
 123         {640, 480, 0x21},
 124         {800, 600, 0x23},
 125         {1024, 768, 0x25},
 126 };
 127
 128 static biosMode bios16[] = {
 129         {320, 200, 0x2e},
 130         {320, 240, 0x41},
 131         {300, 400, 0x43},
 132         {640, 480, 0x31},
 133         {800, 600, 0x34},
 134         {1024, 768, 0x37},
 135 };
 136
 137 static biosMode bios24[] = {
 138         {640, 480, 0x32},
 139         {800, 600, 0x35},
 140         {1024, 768, 0x38}
 141 };
 142
 143 #ifdef NO_32BIT_SUPPORT_YET
 144 /* FIXME: guessed values, wrong */
 145 static biosMode bios32[] = {
 146         {640, 480, 0x33},
 147         {800, 600, 0x36},
 148         {1024, 768, 0x39}
 149 };
 150 #endif
 151
 152 static inline void write_le32(int regindex, u32 val, const struct neofb_par *par)
 153 {
 154         writel(val, par->neo2200 + par->cursorOff + regindex);
 155 }
 156
 157 static int neoFindMode(int xres, int yres, int depth)
 158 {
 159         int xres_s;
 160         int i, size;
 161         biosMode *mode;
 162
 163         switch (depth) {
 164         case 8:
 165                 size = ARRAY_SIZE(bios8);
 166                 mode = bios8;
 167                 break;
 168         case 16:
 169                 size = ARRAY_SIZE(bios16);
 170                 mode = bios16;
 171                 break;
 172         case 24:
 173                 size = ARRAY_SIZE(bios24);
 174                 mode = bios24;
 175                 break;
 176 #ifdef NO_32BIT_SUPPORT_YET
 177         case 32:
 178                 size = ARRAY_SIZE(bios32);
 179                 mode = bios32;
 180                 break;
 181 #endif
 182         default:
 183                 return 0;
 184         }
 185
 186         for (i = 0; i < size; i++) {
 187                 if (xres <= mode[i].x_res) {
 188                         xres_s = mode[i].x_res;
 189                         for (; i < size; i++) {
 190                                 if (mode[i].x_res != xres_s)
 191                                         return mode[i - 1].mode;
 192                                 if (yres <= mode[i].y_res)
 193                                         return mode[i].mode;
 194                         }
 195                 }
 196         }
 197         return mode[size - 1].mode;
 198 }
 199
 200 /*
 201  * neoCalcVCLK --
 202  *
 203  * Determine the closest clock frequency to the one requested.
 204  */
 205 #define REF_FREQ 0xe517         /* 14.31818 in 20.12 fixed point */
 206 #define MAX_N 127
 207 #define MAX_D 31
 208 #define MAX_F 1
 209
 210 static void neoCalcVCLK(const struct fb_info *info,
 211                         struct neofb_par *par, long freq)
 212 {
 213         int n, d, f;
 214         int n_best = 0, d_best = 0, f_best = 0;
 215         long f_best_diff = (0x7ffff << 12);     /* 20.12 */
 216         long f_target = (freq << 12) / 1000;    /* 20.12 */
 217
 218         for (f = 0; f <= MAX_F; f++)
 219                 for (n = 0; n <= MAX_N; n++)
 220                         for (d = 0; d <= MAX_D; d++) {
 221                                 long f_out;     /* 20.12 */
 222                                 long f_diff;    /* 20.12 */
 223
 224                                 f_out =
 225                                     ((((n + 1) << 12) / ((d +
 226                                                           1) *
 227                                                          (1 << f))) >> 12)
 228                                     * REF_FREQ;
 229                                 f_diff = abs(f_out - f_target);
 230                                 if (f_diff < f_best_diff) {
 231                                         f_best_diff = f_diff;
 232                                         n_best = n;
 233                                         d_best = d;
 234                                         f_best = f;
 235                                 }
 236                         }
 237
 238         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
 239             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
 240             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
 241             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
 242                 /* NOT_DONE:  We are trying the full range of the 2200 clock.
 243                    We should be able to try n up to 2047 */
 244                 par->VCLK3NumeratorLow = n_best;
 245                 par->VCLK3NumeratorHigh = (f_best << 7);
 246         } else
 247                 par->VCLK3NumeratorLow = n_best | (f_best << 7);
 248
 249         par->VCLK3Denominator = d_best;
 250
 251 #ifdef NEOFB_DEBUG
 252         printk("neoVCLK: f:%d NumLow=%d NumHi=%d Den=%d Df=%d\n",
 253                f_target >> 12,
 254                par->VCLK3NumeratorLow,
 255                par->VCLK3NumeratorHigh,
 256                par->VCLK3Denominator, f_best_diff >> 12);
 257 #endif
 258 }
 259
 260 /*
 261  * vgaHWInit --
 262  *      Handle the initialization, etc. of a screen.
 263  *      Return FALSE on failure.
 264  */
 265
 266 static int vgaHWInit(const struct fb_var_screeninfo *var,
 267                      const struct fb_info *info,
 268                      struct neofb_par *par, struct xtimings *timings)
 269 {
 270         par->MiscOutReg = 0x23;
 271
 272         if (!(timings->sync & FB_SYNC_HOR_HIGH_ACT))
 273                 par->MiscOutReg |= 0x40;
 274
 275         if (!(timings->sync & FB_SYNC_VERT_HIGH_ACT))
 276                 par->MiscOutReg |= 0x80;
 277
 278         /*
 279          * Time Sequencer
 280          */
 281         par->Sequencer[0] = 0x00;
 282         par->Sequencer[1] = 0x01;
 283         par->Sequencer[2] = 0x0F;
 284         par->Sequencer[3] = 0x00;       /* Font select */
 285         par->Sequencer[4] = 0x0E;       /* Misc */
 286
 287         /*
 288          * CRTC Controller
 289          */
 290         par->CRTC[0] = (timings->HTotal >> 3) - 5;
 291         par->CRTC[1] = (timings->HDisplay >> 3) - 1;
 292         par->CRTC[2] = (timings->HDisplay >> 3) - 1;
 293         par->CRTC[3] = (((timings->HTotal >> 3) - 1) & 0x1F) | 0x80;
 294         par->CRTC[4] = (timings->HSyncStart >> 3);
 295         par->CRTC[5] = ((((timings->HTotal >> 3) - 1) & 0x20) << 2)
 296             | (((timings->HSyncEnd >> 3)) & 0x1F);
 297         par->CRTC[6] = (timings->VTotal - 2) & 0xFF;
 298         par->CRTC[7] = (((timings->VTotal - 2) & 0x100) >> 8)
 299             | (((timings->VDisplay - 1) & 0x100) >> 7)
 300             | ((timings->VSyncStart & 0x100) >> 6)
 301             | (((timings->VDisplay - 1) & 0x100) >> 5)
 302             | 0x10 | (((timings->VTotal - 2) & 0x200) >> 4)
 303             | (((timings->VDisplay - 1) & 0x200) >> 3)
 304             | ((timings->VSyncStart & 0x200) >> 2);
 305         par->CRTC[8] = 0x00;
 306         par->CRTC[9] = (((timings->VDisplay - 1) & 0x200) >> 4) | 0x40;
 307
 308         if (timings->dblscan)
 309                 par->CRTC[9] |= 0x80;
 310
 311         par->CRTC[10] = 0x00;
 312         par->CRTC[11] = 0x00;
 313         par->CRTC[12] = 0x00;
 314         par->CRTC[13] = 0x00;
 315         par->CRTC[14] = 0x00;
 316         par->CRTC[15] = 0x00;
 317         par->CRTC[16] = timings->VSyncStart & 0xFF;
 318         par->CRTC[17] = (timings->VSyncEnd & 0x0F) | 0x20;
 319         par->CRTC[18] = (timings->VDisplay - 1) & 0xFF;
 320         par->CRTC[19] = var->xres_virtual >> 4;
 321         par->CRTC[20] = 0x00;
 322         par->CRTC[21] = (timings->VDisplay - 1) & 0xFF;
 323         par->CRTC[22] = (timings->VTotal - 1) & 0xFF;
 324         par->CRTC[23] = 0xC3;
 325         par->CRTC[24] = 0xFF;
 326
 327         /*
 328          * are these unnecessary?
 329          * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 330          * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
 331          */
 332
 333         /*
 334          * Graphics Display Controller
 335          */
 336         par->Graphics[0] = 0x00;
 337         par->Graphics[1] = 0x00;
 338         par->Graphics[2] = 0x00;
 339         par->Graphics[3] = 0x00;
 340         par->Graphics[4] = 0x00;
 341         par->Graphics[5] = 0x40;
 342         par->Graphics[6] = 0x05;        /* only map 64k VGA memory !!!! */
 343         par->Graphics[7] = 0x0F;
 344         par->Graphics[8] = 0xFF;
 345
 346
 347         par->Attribute[0] = 0x00;       /* standard colormap translation */
 348         par->Attribute[1] = 0x01;
 349         par->Attribute[2] = 0x02;
 350         par->Attribute[3] = 0x03;
 351         par->Attribute[4] = 0x04;
 352         par->Attribute[5] = 0x05;
 353         par->Attribute[6] = 0x06;
 354         par->Attribute[7] = 0x07;
 355         par->Attribute[8] = 0x08;
 356         par->Attribute[9] = 0x09;
 357         par->Attribute[10] = 0x0A;
 358         par->Attribute[11] = 0x0B;
 359         par->Attribute[12] = 0x0C;
 360         par->Attribute[13] = 0x0D;
 361         par->Attribute[14] = 0x0E;
 362         par->Attribute[15] = 0x0F;
 363         par->Attribute[16] = 0x41;
 364         par->Attribute[17] = 0xFF;
 365         par->Attribute[18] = 0x0F;
 366         par->Attribute[19] = 0x00;
 367         par->Attribute[20] = 0x00;
 368         return 0;
 369 }
 370
 371 static void vgaHWLock(struct vgastate *state)
 372 {
 373         /* Protect CRTC[0-7] */
 374         vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80);
 375 }
 376
 377 static void vgaHWUnlock(void)
 378 {
 379         /* Unprotect CRTC[0-7] */
 380         vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80);
 381 }
 382
 383 static void neoLock(struct vgastate *state)
 384 {
 385         vga_wgfx(state->vgabase, 0x09, 0x00);
 386         vgaHWLock(state);
 387 }
 388
 389 static void neoUnlock(void)
 390 {
 391         vgaHWUnlock();
 392         vga_wgfx(NULL, 0x09, 0x26);
 393 }
 394
 395 /*
 396  * VGA Palette management
 397  */
 398 static int paletteEnabled = 0;
 399
 400 static inline void VGAenablePalette(void)
 401 {
 402         vga_r(NULL, VGA_IS1_RC);
 403         vga_w(NULL, VGA_ATT_W, 0x00);
 404         paletteEnabled = 1;
 405 }
 406
 407 static inline void VGAdisablePalette(void)
 408 {
 409         vga_r(NULL, VGA_IS1_RC);
 410         vga_w(NULL, VGA_ATT_W, 0x20);
 411         paletteEnabled = 0;
 412 }
 413
 414 static inline void VGAwATTR(u8 index, u8 value)
 415 {
 416         if (paletteEnabled)
 417                 index &= ~0x20;
 418         else
 419                 index |= 0x20;
 420
 421         vga_r(NULL, VGA_IS1_RC);
 422         vga_wattr(NULL, index, value);
 423 }
 424
 425 static void vgaHWProtect(int on)
 426 {
 427         unsigned char tmp;
 428
 429         if (on) {
 430                 /*
 431                  * Turn off screen and disable sequencer.
 432                  */
 433                 tmp = vga_rseq(NULL, 0x01);
 434                 vga_wseq(NULL, 0x00, 0x01);             /* Synchronous Reset */
 435                 vga_wseq(NULL, 0x01, tmp | 0x20);       /* disable the display */
 436
 437                 VGAenablePalette();
 438         } else {
 439                 /*
 440                  * Reenable sequencer, then turn on screen.
 441                  */
 442                 tmp = vga_rseq(NULL, 0x01);
 443                 vga_wseq(NULL, 0x01, tmp & ~0x20);      /* reenable display */
 444                 vga_wseq(NULL, 0x00, 0x03);             /* clear synchronousreset */
 445
 446                 VGAdisablePalette();
 447         }
 448 }
 449
 450 static void vgaHWRestore(const struct fb_info *info,
 451                          const struct neofb_par *par)
 452 {
 453         int i;
 454
 455         vga_w(NULL, VGA_MIS_W, par->MiscOutReg);
 456
 457         for (i = 1; i < 5; i++)
 458                 vga_wseq(NULL, i, par->Sequencer[i]);
 459
 460         /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */
 461         vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80);
 462
 463         for (i = 0; i < 25; i++)
 464                 vga_wcrt(NULL, i, par->CRTC[i]);
 465
 466         for (i = 0; i < 9; i++)
 467                 vga_wgfx(NULL, i, par->Graphics[i]);
 468
 469         VGAenablePalette();
 470
 471         for (i = 0; i < 21; i++)
 472                 VGAwATTR(i, par->Attribute[i]);
 473
 474         VGAdisablePalette();
 475 }
 476
 477
 478 /* -------------------- Hardware specific routines ------------------------- */
 479
 480 /*
 481  * Hardware Acceleration for Neo2200+
 482  */
 483 static inline int neo2200_sync(struct fb_info *info)
 484 {
 485         struct neofb_par *par = info->par;
 486
 487         while (readl(&par->neo2200->bltStat) & 1);
 488         return 0;
 489 }
 490
 491 static inline void neo2200_wait_fifo(struct fb_info *info,
 492                                      int requested_fifo_space)
 493 {
 494         //  ndev->neo.waitfifo_calls++;
 495         //  ndev->neo.waitfifo_sum += requested_fifo_space;
 496
 497         /* FIXME: does not work
 498            if (neo_fifo_space < requested_fifo_space)
 499            {
 500            neo_fifo_waitcycles++;
 501
 502            while (1)
 503            {
 504            neo_fifo_space = (neo2200->bltStat >> 8);
 505            if (neo_fifo_space >= requested_fifo_space)
 506            break;
 507            }
 508            }
 509            else
 510            {
 511            neo_fifo_cache_hits++;
 512            }
 513
 514            neo_fifo_space -= requested_fifo_space;
 515          */
 516
 517         neo2200_sync(info);
 518 }
 519
 520 static inline void neo2200_accel_init(struct fb_info *info,
 521                                       struct fb_var_screeninfo *var)
 522 {
 523         struct neofb_par *par = info->par;
 524         Neo2200 __iomem *neo2200 = par->neo2200;
 525         u32 bltMod, pitch;
 526
 527         neo2200_sync(info);
 528
 529         switch (var->bits_per_pixel) {
 530         case 8:
 531                 bltMod = NEO_MODE1_DEPTH8;
 532                 pitch = var->xres_virtual;
 533                 break;
 534         case 15:
 535         case 16:
 536                 bltMod = NEO_MODE1_DEPTH16;
 537                 pitch = var->xres_virtual * 2;
 538                 break;
 539         case 24:
 540                 bltMod = NEO_MODE1_DEPTH24;
 541                 pitch = var->xres_virtual * 3;
 542                 break;
 543         default:
 544                 printk(KERN_ERR
 545                        "neofb: neo2200_accel_init: unexpected bits per pixel!\n");
 546                 return;
 547         }
 548
 549         writel(bltMod << 16, &neo2200->bltStat);
 550         writel((pitch << 16) | pitch, &neo2200->pitch);
 551 }
 552
 553 /* --------------------------------------------------------------------- */
 554
 555 static int
 556 neofb_open(struct fb_info *info, int user)
 557 {
 558         struct neofb_par *par = info->par;
 559
 560         mutex_lock(&par->open_lock);
 561         if (!par->ref_count) {
 562                 memset(&par->state, 0, sizeof(struct vgastate));
 563                 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS;
 564                 save_vga(&par->state);
 565         }
 566         par->ref_count++;
 567         mutex_unlock(&par->open_lock);
 568
 569         return 0;
 570 }
 571
 572 static int
 573 neofb_release(struct fb_info *info, int user)
 574 {
 575         struct neofb_par *par = info->par;
 576
 577         mutex_lock(&par->open_lock);
 578         if (!par->ref_count) {
 579                 mutex_unlock(&par->open_lock);
 580                 return -EINVAL;
 581         }
 582         if (par->ref_count == 1) {
 583                 restore_vga(&par->state);
 584         }
 585         par->ref_count--;
 586         mutex_unlock(&par->open_lock);
 587
 588         return 0;
 589 }
 590
 591 static int
 592 neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 593 {
 594         struct neofb_par *par = info->par;
 595         unsigned int pixclock = var->pixclock;
 596         struct xtimings timings;
 597         int memlen, vramlen;
 598         int mode_ok = 0;
 599
 600         DBG("neofb_check_var");
 601
 602         if (!pixclock)
 603                 pixclock = 10000;       /* 10ns = 100MHz */
 604         timings.pixclock = 1000000000 / pixclock;
 605         if (timings.pixclock < 1)
 606                 timings.pixclock = 1;
 607
 608         if (timings.pixclock > par->maxClock)
 609                 return -EINVAL;
 610
 611         timings.dblscan = var->vmode & FB_VMODE_DOUBLE;
 612         timings.interlaced = var->vmode & FB_VMODE_INTERLACED;
 613         timings.HDisplay = var->xres;
 614         timings.HSyncStart = timings.HDisplay + var->right_margin;
 615         timings.HSyncEnd = timings.HSyncStart + var->hsync_len;
 616         timings.HTotal = timings.HSyncEnd + var->left_margin;
 617         timings.VDisplay = var->yres;
 618         timings.VSyncStart = timings.VDisplay + var->lower_margin;
 619         timings.VSyncEnd = timings.VSyncStart + var->vsync_len;
 620         timings.VTotal = timings.VSyncEnd + var->upper_margin;
 621         timings.sync = var->sync;
 622
 623         /* Is the mode larger than the LCD panel? */
 624         if (par->internal_display &&
 625             ((var->xres > par->NeoPanelWidth) ||
 626              (var->yres > par->NeoPanelHeight))) {
 627                 printk(KERN_INFO
 628                        "Mode (%dx%d) larger than the LCD panel (%dx%d)\n",
 629                        var->xres, var->yres, par->NeoPanelWidth,
 630                        par->NeoPanelHeight);
 631                 return -EINVAL;
 632         }
 633
 634         /* Is the mode one of the acceptable sizes? */
 635         if (!par->internal_display)
 636                 mode_ok = 1;
 637         else {
 638                 switch (var->xres) {
 639                 case 1280:
 640                         if (var->yres == 1024)
 641                                 mode_ok = 1;
 642                         break;
 643                 case 1024:
 644                         if (var->yres == 768)
 645                                 mode_ok = 1;
 646                         break;
 647                 case 800:
 648                         if (var->yres == (par->libretto ? 480 : 600))
 649                                 mode_ok = 1;
 650                         break;
 651                 case 640:
 652                         if (var->yres == 480)
 653                                 mode_ok = 1;
 654                         break;
 655                 }
 656         }
 657
 658         if (!mode_ok) {
 659                 printk(KERN_INFO
 660                        "Mode (%dx%d) won't display properly on LCD\n",
 661                        var->xres, var->yres);
 662                 return -EINVAL;
 663         }
 664
 665         var->red.msb_right = 0;
 666         var->green.msb_right = 0;
 667         var->blue.msb_right = 0;
 668         var->transp.msb_right = 0;
 669
 670         switch (var->bits_per_pixel) {
 671         case 8:         /* PSEUDOCOLOUR, 256 */
 672                 var->transp.offset = 0;
 673                 var->transp.length = 0;
 674                 var->red.offset = 0;
 675                 var->red.length = 8;
 676                 var->green.offset = 0;
 677                 var->green.length = 8;
 678                 var->blue.offset = 0;
 679                 var->blue.length = 8;
 680                 break;
 681
 682         case 16:                /* DIRECTCOLOUR, 64k */
 683                 var->transp.offset = 0;
 684                 var->transp.length = 0;
 685                 var->red.offset = 11;
 686                 var->red.length = 5;
 687                 var->green.offset = 5;
 688                 var->green.length = 6;
 689                 var->blue.offset = 0;
 690                 var->blue.length = 5;
 691                 break;
 692
 693         case 24:                /* TRUECOLOUR, 16m */
 694                 var->transp.offset = 0;
 695                 var->transp.length = 0;
 696                 var->red.offset = 16;
 697                 var->red.length = 8;
 698                 var->green.offset = 8;
 699                 var->green.length = 8;
 700                 var->blue.offset = 0;
 701                 var->blue.length = 8;
 702                 break;
 703
 704 #ifdef NO_32BIT_SUPPORT_YET
 705         case 32:                /* TRUECOLOUR, 16m */
 706                 var->transp.offset = 24;
 707                 var->transp.length = 8;
 708                 var->red.offset = 16;
 709                 var->red.length = 8;
 710                 var->green.offset = 8;
 711                 var->green.length = 8;
 712                 var->blue.offset = 0;
 713                 var->blue.length = 8;
 714                 break;
 715 #endif
 716         default:
 717                 printk(KERN_WARNING "neofb: no support for %dbpp\n",
 718                        var->bits_per_pixel);
 719                 return -EINVAL;
 720         }
 721
 722         vramlen = info->fix.smem_len;
 723         if (vramlen > 4 * 1024 * 1024)
 724                 vramlen = 4 * 1024 * 1024;
 725
 726         if (var->yres_virtual < var->yres)
 727                 var->yres_virtual = var->yres;
 728         if (var->xres_virtual < var->xres)
 729                 var->xres_virtual = var->xres;
 730
 731         memlen = var->xres_virtual * var->bits_per_pixel * var->yres_virtual >> 3;
 732
 733         if (memlen > vramlen) {
 734                 var->yres_virtual =  vramlen * 8 / (var->xres_virtual *
 735                                         var->bits_per_pixel);
 736                 memlen = var->xres_virtual * var->bits_per_pixel *
 737                                 var->yres_virtual / 8;
 738         }
 739
 740         /* we must round yres/xres down, we already rounded y/xres_virtual up
 741            if it was possible. We should return -EINVAL, but I disagree */
 742         if (var->yres_virtual < var->yres)
 743                 var->yres = var->yres_virtual;
 744         if (var->xres_virtual < var->xres)
 745                 var->xres = var->xres_virtual;
 746         if (var->xoffset + var->xres > var->xres_virtual)
 747                 var->xoffset = var->xres_virtual - var->xres;
 748         if (var->yoffset + var->yres > var->yres_virtual)
 749                 var->yoffset = var->yres_virtual - var->yres;
 750
 751         var->nonstd = 0;
 752         var->height = -1;
 753         var->width = -1;
 754
 755         if (var->bits_per_pixel >= 24 || !par->neo2200)
 756                 var->accel_flags &= ~FB_ACCELF_TEXT;
 757         return 0;
 758 }
 759
 760 static int neofb_set_par(struct fb_info *info)
 761 {
 762         struct neofb_par *par = info->par;
 763         struct xtimings timings;
 764         unsigned char temp;
 765         int i, clock_hi = 0;
 766         int lcd_stretch;
 767         int hoffset, voffset;
 768
 769         DBG("neofb_set_par");
 770
 771         neoUnlock();
 772
 773         vgaHWProtect(1);        /* Blank the screen */
 774
 775         timings.dblscan = info->var.vmode & FB_VMODE_DOUBLE;
 776         timings.interlaced = info->var.vmode & FB_VMODE_INTERLACED;
 777         timings.HDisplay = info->var.xres;
 778         timings.HSyncStart = timings.HDisplay + info->var.right_margin;
 779         timings.HSyncEnd = timings.HSyncStart + info->var.hsync_len;
 780         timings.HTotal = timings.HSyncEnd + info->var.left_margin;
 781         timings.VDisplay = info->var.yres;
 782         timings.VSyncStart = timings.VDisplay + info->var.lower_margin;
 783         timings.VSyncEnd = timings.VSyncStart + info->var.vsync_len;
 784         timings.VTotal = timings.VSyncEnd + info->var.upper_margin;
 785         timings.sync = info->var.sync;
 786         timings.pixclock = PICOS2KHZ(info->var.pixclock);
 787
 788         if (timings.pixclock < 1)
 789                 timings.pixclock = 1;
 790
 791         /*
 792          * This will allocate the datastructure and initialize all of the
 793          * generic VGA registers.
 794          */
 795
 796         if (vgaHWInit(&info->var, info, par, &timings))
 797                 return -EINVAL;
 798
 799         /*
 800          * The default value assigned by vgaHW.c is 0x41, but this does
 801          * not work for NeoMagic.
 802          */
 803         par->Attribute[16] = 0x01;
 804
 805         switch (info->var.bits_per_pixel) {
 806         case 8:
 807                 par->CRTC[0x13] = info->var.xres_virtual >> 3;
 808                 par->ExtCRTOffset = info->var.xres_virtual >> 11;
 809                 par->ExtColorModeSelect = 0x11;
 810                 break;
 811         case 16:
 812                 par->CRTC[0x13] = info->var.xres_virtual >> 2;
 813                 par->ExtCRTOffset = info->var.xres_virtual >> 10;
 814                 par->ExtColorModeSelect = 0x13;
 815                 break;
 816         case 24:
 817                 par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3;
 818                 par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11;
 819                 par->ExtColorModeSelect = 0x14;
 820                 break;
 821 #ifdef NO_32BIT_SUPPORT_YET
 822         case 32:                /* FIXME: guessed values */
 823                 par->CRTC[0x13] = info->var.xres_virtual >> 1;
 824                 par->ExtCRTOffset = info->var.xres_virtual >> 9;
 825                 par->ExtColorModeSelect = 0x15;
 826                 break;
 827 #endif
 828         default:
 829                 break;
 830         }
 831
 832         par->ExtCRTDispAddr = 0x10;
 833
 834         /* Vertical Extension */
 835         par->VerticalExt = (((timings.VTotal - 2) & 0x400) >> 10)
 836             | (((timings.VDisplay - 1) & 0x400) >> 9)
 837             | (((timings.VSyncStart) & 0x400) >> 8)
 838             | (((timings.VSyncStart) & 0x400) >> 7);
 839
 840         /* Fast write bursts on unless disabled. */
 841         if (par->pci_burst)
 842                 par->SysIfaceCntl1 = 0x30;
 843         else
 844                 par->SysIfaceCntl1 = 0x00;
 845
 846         par->SysIfaceCntl2 = 0xc0;      /* VESA Bios sets this to 0x80! */
 847
 848         /* Initialize: by default, we want display config register to be read */
 849         par->PanelDispCntlRegRead = 1;
 850
 851         /* Enable any user specified display devices. */
 852         par->PanelDispCntlReg1 = 0x00;
 853         if (par->internal_display)
 854                 par->PanelDispCntlReg1 |= 0x02;
 855         if (par->external_display)
 856                 par->PanelDispCntlReg1 |= 0x01;
 857
 858         /* If the user did not specify any display devices, then... */
 859         if (par->PanelDispCntlReg1 == 0x00) {
 860                 /* Default to internal (i.e., LCD) only. */
 861                 par->PanelDispCntlReg1 = vga_rgfx(NULL, 0x20) & 0x03;
 862         }
 863
 864         /* If we are using a fixed mode, then tell the chip we are. */
 865         switch (info->var.xres) {
 866         case 1280:
 867                 par->PanelDispCntlReg1 |= 0x60;
 868                 break;
 869         case 1024:
 870                 par->PanelDispCntlReg1 |= 0x40;
 871                 break;
 872         case 800:
 873                 par->PanelDispCntlReg1 |= 0x20;
 874                 break;
 875         case 640:
 876         default:
 877                 break;
 878         }
 879
 880         /* Setup shadow register locking. */
 881         switch (par->PanelDispCntlReg1 & 0x03) {
 882         case 0x01:              /* External CRT only mode: */
 883                 par->GeneralLockReg = 0x00;
 884                 /* We need to program the VCLK for external display only mode. */
 885                 par->ProgramVCLK = 1;
 886                 break;
 887         case 0x02:              /* Internal LCD only mode: */
 888         case 0x03:              /* Simultaneous internal/external (LCD/CRT) mode: */
 889                 par->GeneralLockReg = 0x01;
 890                 /* Don't program the VCLK when using the LCD. */
 891                 par->ProgramVCLK = 0;
 892                 break;
 893         }
 894
 895         /*
 896          * If the screen is to be stretched, turn on stretching for the
 897          * various modes.
 898          *
 899          * OPTION_LCD_STRETCH means stretching should be turned off!
 900          */
 901         par->PanelDispCntlReg2 = 0x00;
 902         par->PanelDispCntlReg3 = 0x00;
 903
 904         if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) &&     /* LCD only */
 905             (info->var.xres != par->NeoPanelWidth)) {
 906                 switch (info->var.xres) {
 907                 case 320:       /* Needs testing.  KEM -- 24 May 98 */
 908                 case 400:       /* Needs testing.  KEM -- 24 May 98 */
 909                 case 640:
 910                 case 800:
 911                 case 1024:
 912                         lcd_stretch = 1;
 913                         par->PanelDispCntlReg2 |= 0xC6;
 914                         break;
 915                 default:
 916                         lcd_stretch = 0;
 917                         /* No stretching in these modes. */
 918                 }
 919         } else
 920                 lcd_stretch = 0;
 921
 922         /*
 923          * If the screen is to be centerd, turn on the centering for the
 924          * various modes.
 925          */
 926         par->PanelVertCenterReg1 = 0x00;
 927         par->PanelVertCenterReg2 = 0x00;
 928         par->PanelVertCenterReg3 = 0x00;
 929         par->PanelVertCenterReg4 = 0x00;
 930         par->PanelVertCenterReg5 = 0x00;
 931         par->PanelHorizCenterReg1 = 0x00;
 932         par->PanelHorizCenterReg2 = 0x00;
 933         par->PanelHorizCenterReg3 = 0x00;
 934         par->PanelHorizCenterReg4 = 0x00;
 935         par->PanelHorizCenterReg5 = 0x00;
 936
 937
 938         if (par->PanelDispCntlReg1 & 0x02) {
 939                 if (info->var.xres == par->NeoPanelWidth) {
 940                         /*
 941                          * No centering required when the requested display width
 942                          * equals the panel width.
 943                          */
 944                 } else {
 945                         par->PanelDispCntlReg2 |= 0x01;
 946                         par->PanelDispCntlReg3 |= 0x10;
 947
 948                         /* Calculate the horizontal and vertical offsets. */
 949                         if (!lcd_stretch) {
 950                                 hoffset =
 951                                     ((par->NeoPanelWidth -
 952                                       info->var.xres) >> 4) - 1;
 953                                 voffset =
 954                                     ((par->NeoPanelHeight -
 955                                       info->var.yres) >> 1) - 2;
 956                         } else {
 957                                 /* Stretched modes cannot be centered. */
 958                                 hoffset = 0;
 959                                 voffset = 0;
 960                         }
 961
 962                         switch (info->var.xres) {
 963                         case 320:       /* Needs testing.  KEM -- 24 May 98 */
 964                                 par->PanelHorizCenterReg3 = hoffset;
 965                                 par->PanelVertCenterReg2 = voffset;
 966                                 break;
 967                         case 400:       /* Needs testing.  KEM -- 24 May 98 */
 968                                 par->PanelHorizCenterReg4 = hoffset;
 969                                 par->PanelVertCenterReg1 = voffset;
 970                                 break;
 971                         case 640:
 972                                 par->PanelHorizCenterReg1 = hoffset;
 973                                 par->PanelVertCenterReg3 = voffset;
 974                                 break;
 975                         case 800:
 976                                 par->PanelHorizCenterReg2 = hoffset;
 977                                 par->PanelVertCenterReg4 = voffset;
 978                                 break;
 979                         case 1024:
 980                                 par->PanelHorizCenterReg5 = hoffset;
 981                                 par->PanelVertCenterReg5 = voffset;
 982                                 break;
 983                         case 1280:
 984                         default:
 985                                 /* No centering in these modes. */
 986                                 break;
 987                         }
 988                 }
 989         }
 990
 991         par->biosMode =
 992             neoFindMode(info->var.xres, info->var.yres,
 993                         info->var.bits_per_pixel);
 994
 995         /*
 996          * Calculate the VCLK that most closely matches the requested dot
 997          * clock.
 998          */
 999         neoCalcVCLK(info, par, timings.pixclock);
1000
1001         /* Since we program the clocks ourselves, always use VCLK3. */
1002         par->MiscOutReg |= 0x0C;
1003
1004         /* alread unlocked above */
1005         /* BOGUS  vga_wgfx(NULL, 0x09, 0x26); */
1006
1007         /* don't know what this is, but it's 0 from bootup anyway */
1008         vga_wgfx(NULL, 0x15, 0x00);
1009
1010         /* was set to 0x01 by my bios in text and vesa modes */
1011         vga_wgfx(NULL, 0x0A, par->GeneralLockReg);
1012
1013         /*
1014          * The color mode needs to be set before calling vgaHWRestore
1015          * to ensure the DAC is initialized properly.
1016          *
1017          * NOTE: Make sure we don't change bits make sure we don't change
1018          * any reserved bits.
1019          */
1020         temp = vga_rgfx(NULL, 0x90);
1021         switch (info->fix.accel) {
1022         case FB_ACCEL_NEOMAGIC_NM2070:
1023                 temp &= 0xF0;   /* Save bits 7:4 */
1024                 temp |= (par->ExtColorModeSelect & ~0xF0);
1025                 break;
1026         case FB_ACCEL_NEOMAGIC_NM2090:
1027         case FB_ACCEL_NEOMAGIC_NM2093:
1028         case FB_ACCEL_NEOMAGIC_NM2097:
1029         case FB_ACCEL_NEOMAGIC_NM2160:
1030         case FB_ACCEL_NEOMAGIC_NM2200:
1031         case FB_ACCEL_NEOMAGIC_NM2230:
1032         case FB_ACCEL_NEOMAGIC_NM2360:
1033         case FB_ACCEL_NEOMAGIC_NM2380:
1034                 temp &= 0x70;   /* Save bits 6:4 */
1035                 temp |= (par->ExtColorModeSelect & ~0x70);
1036                 break;
1037         }
1038
1039         vga_wgfx(NULL, 0x90, temp);
1040
1041         /*
1042          * In some rare cases a lockup might occur if we don't delay
1043          * here. (Reported by Miles Lane)
1044          */
1045         //mdelay(200);
1046
1047         /*
1048          * Disable horizontal and vertical graphics and text expansions so
1049          * that vgaHWRestore works properly.
1050          */
1051         temp = vga_rgfx(NULL, 0x25);
1052         temp &= 0x39;
1053         vga_wgfx(NULL, 0x25, temp);
1054
1055         /*
1056          * Sleep for 200ms to make sure that the two operations above have
1057          * had time to take effect.
1058          */
1059         mdelay(200);
1060
1061         /*
1062          * This function handles restoring the generic VGA registers.  */
1063         vgaHWRestore(info, par);
1064
1065         /* linear colormap for non palettized modes */
1066         switch (info->var.bits_per_pixel) {
1067         case 8:
1068                 /* PseudoColor, 256 */
1069                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
1070                 break;
1071         case 16:
1072                 /* TrueColor, 64k */
1073                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1074
1075                 for (i = 0; i < 64; i++) {
1076                         outb(i, 0x3c8);
1077
1078                         outb(i << 1, 0x3c9);
1079                         outb(i, 0x3c9);
1080                         outb(i << 1, 0x3c9);
1081                 }
1082                 break;
1083         case 24:
1084 #ifdef NO_32BIT_SUPPORT_YET
1085         case 32:
1086 #endif
1087                 /* TrueColor, 16m */
1088                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1089
1090                 for (i = 0; i < 256; i++) {
1091                         outb(i, 0x3c8);
1092
1093                         outb(i, 0x3c9);
1094                         outb(i, 0x3c9);
1095                         outb(i, 0x3c9);
1096                 }
1097                 break;
1098         }
1099
1100         vga_wgfx(NULL, 0x0E, par->ExtCRTDispAddr);
1101         vga_wgfx(NULL, 0x0F, par->ExtCRTOffset);
1102         temp = vga_rgfx(NULL, 0x10);
1103         temp &= 0x0F;           /* Save bits 3:0 */
1104         temp |= (par->SysIfaceCntl1 & ~0x0F);   /* VESA Bios sets bit 1! */
1105         vga_wgfx(NULL, 0x10, temp);
1106
1107         vga_wgfx(NULL, 0x11, par->SysIfaceCntl2);
1108         vga_wgfx(NULL, 0x15, 0 /*par->SingleAddrPage */ );
1109         vga_wgfx(NULL, 0x16, 0 /*par->DualAddrPage */ );
1110
1111         temp = vga_rgfx(NULL, 0x20);
1112         switch (info->fix.accel) {
1113         case FB_ACCEL_NEOMAGIC_NM2070:
1114                 temp &= 0xFC;   /* Save bits 7:2 */
1115                 temp |= (par->PanelDispCntlReg1 & ~0xFC);
1116                 break;
1117         case FB_ACCEL_NEOMAGIC_NM2090:
1118         case FB_ACCEL_NEOMAGIC_NM2093:
1119         case FB_ACCEL_NEOMAGIC_NM2097:
1120         case FB_ACCEL_NEOMAGIC_NM2160:
1121                 temp &= 0xDC;   /* Save bits 7:6,4:2 */
1122                 temp |= (par->PanelDispCntlReg1 & ~0xDC);
1123                 break;
1124         case FB_ACCEL_NEOMAGIC_NM2200:
1125         case FB_ACCEL_NEOMAGIC_NM2230:
1126         case FB_ACCEL_NEOMAGIC_NM2360:
1127         case FB_ACCEL_NEOMAGIC_NM2380:
1128                 temp &= 0x98;   /* Save bits 7,4:3 */
1129                 temp |= (par->PanelDispCntlReg1 & ~0x98);
1130                 break;
1131         }
1132         vga_wgfx(NULL, 0x20, temp);
1133
1134         temp = vga_rgfx(NULL, 0x25);
1135         temp &= 0x38;           /* Save bits 5:3 */
1136         temp |= (par->PanelDispCntlReg2 & ~0x38);
1137         vga_wgfx(NULL, 0x25, temp);
1138
1139         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1140                 temp = vga_rgfx(NULL, 0x30);
1141                 temp &= 0xEF;   /* Save bits 7:5 and bits 3:0 */
1142                 temp |= (par->PanelDispCntlReg3 & ~0xEF);
1143                 vga_wgfx(NULL, 0x30, temp);
1144         }
1145
1146         vga_wgfx(NULL, 0x28, par->PanelVertCenterReg1);
1147         vga_wgfx(NULL, 0x29, par->PanelVertCenterReg2);
1148         vga_wgfx(NULL, 0x2a, par->PanelVertCenterReg3);
1149
1150         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1151                 vga_wgfx(NULL, 0x32, par->PanelVertCenterReg4);
1152                 vga_wgfx(NULL, 0x33, par->PanelHorizCenterReg1);
1153                 vga_wgfx(NULL, 0x34, par->PanelHorizCenterReg2);
1154                 vga_wgfx(NULL, 0x35, par->PanelHorizCenterReg3);
1155         }
1156
1157         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160)
1158                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1159
1160         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1161             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1162             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1163             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1164                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1165                 vga_wgfx(NULL, 0x37, par->PanelVertCenterReg5);
1166                 vga_wgfx(NULL, 0x38, par->PanelHorizCenterReg5);
1167
1168                 clock_hi = 1;
1169         }
1170
1171         /* Program VCLK3 if needed. */
1172         if (par->ProgramVCLK && ((vga_rgfx(NULL, 0x9B) != par->VCLK3NumeratorLow)
1173                                  || (vga_rgfx(NULL, 0x9F) != par->VCLK3Denominator)
1174                                  || (clock_hi && ((vga_rgfx(NULL, 0x8F) & ~0x0f)
1175                                                   != (par->VCLK3NumeratorHigh &
1176                                                       ~0x0F))))) {
1177                 vga_wgfx(NULL, 0x9B, par->VCLK3NumeratorLow);
1178                 if (clock_hi) {
1179                         temp = vga_rgfx(NULL, 0x8F);
1180                         temp &= 0x0F;   /* Save bits 3:0 */
1181                         temp |= (par->VCLK3NumeratorHigh & ~0x0F);
1182                         vga_wgfx(NULL, 0x8F, temp);
1183                 }
1184                 vga_wgfx(NULL, 0x9F, par->VCLK3Denominator);
1185         }
1186
1187         if (par->biosMode)
1188                 vga_wcrt(NULL, 0x23, par->biosMode);
1189
1190         vga_wgfx(NULL, 0x93, 0xc0);     /* Gives 5x faster framebuffer writes !!! */
1191
1192         /* Program vertical extension register */
1193         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1194             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1195             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1196             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1197                 vga_wcrt(NULL, 0x70, par->VerticalExt);
1198         }
1199
1200         vgaHWProtect(0);        /* Turn on screen */
1201
1202         /* Calling this also locks offset registers required in update_start */
1203         neoLock(&par->state);
1204
1205         info->fix.line_length =
1206             info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
1207
1208         switch (info->fix.accel) {
1209                 case FB_ACCEL_NEOMAGIC_NM2200:
1210                 case FB_ACCEL_NEOMAGIC_NM2230:
1211                 case FB_ACCEL_NEOMAGIC_NM2360:
1212                 case FB_ACCEL_NEOMAGIC_NM2380:
1213                         neo2200_accel_init(info, &info->var);
1214                         break;
1215                 default:
1216                         break;
1217         }
1218         return 0;
1219 }
1220
1221 static void neofb_update_start(struct fb_info *info,
1222                                struct fb_var_screeninfo *var)
1223 {
1224         struct neofb_par *par = info->par;
1225         struct vgastate *state = &par->state;
1226         int oldExtCRTDispAddr;
1227         int Base;
1228
1229         DBG("neofb_update_start");
1230
1231         Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2;
1232         Base *= (var->bits_per_pixel + 7) / 8;
1233
1234         neoUnlock();
1235
1236         /*
1237          * These are the generic starting address registers.
1238          */
1239         vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8);
1240         vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF));
1241
1242         /*
1243          * Make sure we don't clobber some other bits that might already
1244          * have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't
1245          * be needed.
1246          */
1247         oldExtCRTDispAddr = vga_rgfx(NULL, 0x0E);
1248         vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
1249
1250         neoLock(state);
1251 }
1252
1253 /*
1254  *    Pan or Wrap the Display
1255  */
1256 static int neofb_pan_display(struct fb_var_screeninfo *var,
1257                              struct fb_info *info)
1258 {
1259         u_int y_bottom;
1260
1261         y_bottom = var->yoffset;
1262
1263         if (!(var->vmode & FB_VMODE_YWRAP))
1264                 y_bottom += var->yres;
1265
1266         if (var->xoffset > (var->xres_virtual - var->xres))
1267                 return -EINVAL;
1268         if (y_bottom > info->var.yres_virtual)
1269                 return -EINVAL;
1270
1271         neofb_update_start(info, var);
1272
1273         info->var.xoffset = var->xoffset;
1274         info->var.yoffset = var->yoffset;
1275
1276         if (var->vmode & FB_VMODE_YWRAP)
1277                 info->var.vmode |= FB_VMODE_YWRAP;
1278         else
1279                 info->var.vmode &= ~FB_VMODE_YWRAP;
1280         return 0;
1281 }
1282
1283 static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1284                            u_int transp, struct fb_info *fb)
1285 {
1286         if (regno >= fb->cmap.len || regno > 255)
1287                 return -EINVAL;
1288
1289         switch (fb->var.bits_per_pixel) {
1290         case 8:
1291                 outb(regno, 0x3c8);
1292
1293                 outb(red >> 10, 0x3c9);
1294                 outb(green >> 10, 0x3c9);
1295                 outb(blue >> 10, 0x3c9);
1296                 break;
1297         case 16:
1298                 ((u32 *) fb->pseudo_palette)[regno] =
1299                                 ((red & 0xf800)) | ((green & 0xfc00) >> 5) |
1300                                 ((blue & 0xf800) >> 11);
1301                 break;
1302         case 24:
1303                 ((u32 *) fb->pseudo_palette)[regno] =
1304                                 ((red & 0xff00) << 8) | ((green & 0xff00)) |
1305                                 ((blue & 0xff00) >> 8);
1306                 break;
1307 #ifdef NO_32BIT_SUPPORT_YET
1308         case 32:
1309                 ((u32 *) fb->pseudo_palette)[regno] =
1310                                 ((transp & 0xff00) << 16) | ((red & 0xff00) << 8) |
1311                                 ((green & 0xff00)) | ((blue & 0xff00) >> 8);
1312                 break;
1313 #endif
1314         default:
1315                 return 1;
1316         }
1317         return 0;
1318 }
1319
1320 /*
1321  *    (Un)Blank the display.
1322  */
1323 static int neofb_blank(int blank_mode, struct fb_info *info)
1324 {
1325         /*
1326          *  Blank the screen if blank_mode != 0, else unblank.
1327          *  Return 0 if blanking succeeded, != 0 if un-/blanking failed due to
1328          *  e.g. a video mode which doesn't support it. Implements VESA suspend
1329          *  and powerdown modes for monitors, and backlight control on LCDs.
1330          *    blank_mode == 0: unblanked (backlight on)
1331          *    blank_mode == 1: blank (backlight on)
1332          *    blank_mode == 2: suspend vsync (backlight off)
1333          *    blank_mode == 3: suspend hsync (backlight off)
1334          *    blank_mode == 4: powerdown (backlight off)
1335          *
1336          *  wms...Enable VESA DPMS compatible powerdown mode
1337          *  run "setterm -powersave powerdown" to take advantage
1338          */
1339         struct neofb_par *par = info->par;
1340         int seqflags, lcdflags, dpmsflags, reg, tmpdisp;
1341
1342         /*
1343          * Read back the register bits related to display configuration. They might
1344          * have been changed underneath the driver via Fn key stroke.
1345          */
1346         neoUnlock();
1347         tmpdisp = vga_rgfx(NULL, 0x20) & 0x03;
1348         neoLock(&par->state);
1349
1350         /* In case we blank the screen, we want to store the possibly new
1351          * configuration in the driver. During un-blank, we re-apply this setting,
1352          * since the LCD bit will be cleared in order to switch off the backlight.
1353          */
1354         if (par->PanelDispCntlRegRead) {
1355                 par->PanelDispCntlReg1 = tmpdisp;
1356         }
1357         par->PanelDispCntlRegRead = !blank_mode;
1358
1359         switch (blank_mode) {
1360         case FB_BLANK_POWERDOWN:        /* powerdown - both sync lines down */
1361                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1362                 lcdflags = 0;                   /* LCD off */
1363                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC |
1364                             NEO_GR01_SUPPRESS_VSYNC;
1365 #ifdef CONFIG_TOSHIBA
1366                 /* Do we still need this ? */
1367                 /* attempt to turn off backlight on toshiba; also turns off external */
1368                 {
1369                         SMMRegisters regs;
1370
1371                         regs.eax = 0xff00; /* HCI_SET */
1372                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1373                         regs.ecx = 0x0000; /* HCI_DISABLE */
1374                         tosh_smm(&regs);
1375                 }
1376 #endif
1377                 break;
1378         case FB_BLANK_HSYNC_SUSPEND:            /* hsync off */
1379                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1380                 lcdflags = 0;                   /* LCD off */
1381                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC;
1382                 break;
1383         case FB_BLANK_VSYNC_SUSPEND:            /* vsync off */
1384                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1385                 lcdflags = 0;                   /* LCD off */
1386                 dpmsflags = NEO_GR01_SUPPRESS_VSYNC;
1387                 break;
1388         case FB_BLANK_NORMAL:           /* just blank screen (backlight stays on) */
1389                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1390                 /*
1391                  * During a blank operation with the LID shut, we might store "LCD off"
1392                  * by mistake. Due to timing issues, the BIOS may switch the lights
1393                  * back on, and we turn it back off once we "unblank".
1394                  *
1395                  * So here is an attempt to implement ">=" - if we are in the process
1396                  * of unblanking, and the LCD bit is unset in the driver but set in the
1397                  * register, we must keep it.
1398                  */
1399                 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1400                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1401                 break;
1402         case FB_BLANK_UNBLANK:          /* unblank */
1403                 seqflags = 0;                   /* Enable sequencer */
1404                 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1405                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1406 #ifdef CONFIG_TOSHIBA
1407                 /* Do we still need this ? */
1408                 /* attempt to re-enable backlight/external on toshiba */
1409                 {
1410                         SMMRegisters regs;
1411
1412                         regs.eax = 0xff00; /* HCI_SET */
1413                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1414                         regs.ecx = 0x0001; /* HCI_ENABLE */
1415                         tosh_smm(&regs);
1416                 }
1417 #endif
1418                 break;
1419         default:        /* Anything else we don't understand; return 1 to tell
1420                          * fb_blank we didn't aactually do anything */
1421                 return 1;
1422         }
1423
1424         neoUnlock();
1425         reg = (vga_rseq(NULL, 0x01) & ~0x20) | seqflags;
1426         vga_wseq(NULL, 0x01, reg);
1427         reg = (vga_rgfx(NULL, 0x20) & ~0x02) | lcdflags;
1428         vga_wgfx(NULL, 0x20, reg);
1429         reg = (vga_rgfx(NULL, 0x01) & ~0xF0) | 0x80 | dpmsflags;
1430         vga_wgfx(NULL, 0x01, reg);
1431         neoLock(&par->state);
1432         return 0;
1433 }
1434
1435 static void
1436 neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1437 {
1438         struct neofb_par *par = info->par;
1439         u_long dst, rop;
1440
1441         dst = rect->dx + rect->dy * info->var.xres_virtual;
1442         rop = rect->rop ? 0x060000 : 0x0c0000;
1443
1444         neo2200_wait_fifo(info, 4);
1445
1446         /* set blt control */
1447         writel(NEO_BC3_FIFO_EN |
1448                NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING |
1449                //               NEO_BC3_DST_XY_ADDR  |
1450                //               NEO_BC3_SRC_XY_ADDR  |
1451                rop, &par->neo2200->bltCntl);
1452
1453         switch (info->var.bits_per_pixel) {
1454         case 8:
1455                 writel(rect->color, &par->neo2200->fgColor);
1456                 break;
1457         case 16:
1458         case 24:
1459                 writel(((u32 *) (info->pseudo_palette))[rect->color],
1460                        &par->neo2200->fgColor);
1461                 break;
1462         }
1463
1464         writel(dst * ((info->var.bits_per_pixel + 7) >> 3),
1465                &par->neo2200->dstStart);
1466         writel((rect->height << 16) | (rect->width & 0xffff),
1467                &par->neo2200->xyExt);
1468 }
1469
1470 static void
1471 neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1472 {
1473         u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
1474         struct neofb_par *par = info->par;
1475         u_long src, dst, bltCntl;
1476
1477         bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
1478
1479         if ((dy > sy) || ((dy == sy) && (dx > sx))) {
1480                 /* Start with the lower right corner */
1481                 sy += (area->height - 1);
1482                 dy += (area->height - 1);
1483                 sx += (area->width - 1);
1484                 dx += (area->width - 1);
1485
1486                 bltCntl |= NEO_BC0_X_DEC | NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
1487         }
1488
1489         src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
1490         dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
1491
1492         neo2200_wait_fifo(info, 4);
1493
1494         /* set blt control */
1495         writel(bltCntl, &par->neo2200->bltCntl);
1496
1497         writel(src, &par->neo2200->srcStart);
1498         writel(dst, &par->neo2200->dstStart);
1499         writel((area->height << 16) | (area->width & 0xffff),
1500                &par->neo2200->xyExt);
1501 }
1502
1503 static void
1504 neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
1505 {
1506         struct neofb_par *par = info->par;
1507         int s_pitch = (image->width * image->depth + 7) >> 3;
1508         int scan_align = info->pixmap.scan_align - 1;
1509         int buf_align = info->pixmap.buf_align - 1;
1510         int bltCntl_flags, d_pitch, data_len;
1511
1512         // The data is padded for the hardware
1513         d_pitch = (s_pitch + scan_align) & ~scan_align;
1514         data_len = ((d_pitch * image->height) + buf_align) & ~buf_align;
1515
1516         neo2200_sync(info);
1517
1518         if (image->depth == 1) {
1519                 if (info->var.bits_per_pixel == 24 && image->width < 16) {
1520                         /* FIXME. There is a bug with accelerated color-expanded
1521                          * transfers in 24 bit mode if the image being transferred
1522                          * is less than 16 bits wide. This is due to insufficient
1523                          * padding when writing the image. We need to adjust
1524                          * struct fb_pixmap. Not yet done. */
1525                         return cfb_imageblit(info, image);
1526                 }
1527                 bltCntl_flags = NEO_BC0_SRC_MONO;
1528         } else if (image->depth == info->var.bits_per_pixel) {
1529                 bltCntl_flags = 0;
1530         } else {
1531                 /* We don't currently support hardware acceleration if image
1532                  * depth is different from display */
1533                 return cfb_imageblit(info, image);
1534         }
1535
1536         switch (info->var.bits_per_pixel) {
1537         case 8:
1538                 writel(image->fg_color, &par->neo2200->fgColor);
1539                 writel(image->bg_color, &par->neo2200->bgColor);
1540                 break;
1541         case 16:
1542         case 24:
1543                 writel(((u32 *) (info->pseudo_palette))[image->fg_color],
1544                        &par->neo2200->fgColor);
1545                 writel(((u32 *) (info->pseudo_palette))[image->bg_color],
1546                        &par->neo2200->bgColor);
1547                 break;
1548         }
1549
1550         writel(NEO_BC0_SYS_TO_VID |
1551                 NEO_BC3_SKIP_MAPPING | bltCntl_flags |
1552                 // NEO_BC3_DST_XY_ADDR |
1553                 0x0c0000, &par->neo2200->bltCntl);
1554
1555         writel(0, &par->neo2200->srcStart);
1556 //      par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff);
1557         writel(((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
1558                 image->dy * info->fix.line_length), &par->neo2200->dstStart);
1559         writel((image->height << 16) | (image->width & 0xffff),
1560                &par->neo2200->xyExt);
1561
1562         memcpy_toio(par->mmio_vbase + 0x100000, image->data, data_len);
1563 }
1564
1565 static void
1566 neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1567 {
1568         switch (info->fix.accel) {
1569                 case FB_ACCEL_NEOMAGIC_NM2200:
1570                 case FB_ACCEL_NEOMAGIC_NM2230:
1571                 case FB_ACCEL_NEOMAGIC_NM2360:
1572                 case FB_ACCEL_NEOMAGIC_NM2380:
1573                         neo2200_fillrect(info, rect);
1574                         break;
1575                 default:
1576                         cfb_fillrect(info, rect);
1577                         break;
1578         }
1579 }
1580
1581 static void
1582 neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1583 {
1584         switch (info->fix.accel) {
1585                 case FB_ACCEL_NEOMAGIC_NM2200:
1586                 case FB_ACCEL_NEOMAGIC_NM2230:
1587                 case FB_ACCEL_NEOMAGIC_NM2360:
1588                 case FB_ACCEL_NEOMAGIC_NM2380:
1589                         neo2200_copyarea(info, area);
1590                         break;
1591                 default:
1592                         cfb_copyarea(info, area);
1593                         break;
1594         }
1595 }
1596
1597 static void
1598 neofb_imageblit(struct fb_info *info, const struct fb_image *image)
1599 {
1600         switch (info->fix.accel) {
1601                 case FB_ACCEL_NEOMAGIC_NM2200:
1602                 case FB_ACCEL_NEOMAGIC_NM2230:
1603                 case FB_ACCEL_NEOMAGIC_NM2360:
1604                 case FB_ACCEL_NEOMAGIC_NM2380:
1605                         neo2200_imageblit(info, image);
1606                         break;
1607                 default:
1608                         cfb_imageblit(info, image);
1609                         break;
1610         }
1611 }
1612
1613 static int
1614 neofb_sync(struct fb_info *info)
1615 {
1616         switch (info->fix.accel) {
1617                 case FB_ACCEL_NEOMAGIC_NM2200:
1618                 case FB_ACCEL_NEOMAGIC_NM2230:
1619                 case FB_ACCEL_NEOMAGIC_NM2360:
1620                 case FB_ACCEL_NEOMAGIC_NM2380:
1621                         neo2200_sync(info);
1622                         break;
1623                 default:
1624                         break;
1625         }
1626         return 0;
1627 }
1628
1629 /*
1630 static void
1631 neofb_draw_cursor(struct fb_info *info, u8 *dst, u8 *src, unsigned int width)
1632 {
1633         //memset_io(info->sprite.addr, 0xff, 1);
1634 }
1635
1636 static int
1637 neofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1638 {
1639         struct neofb_par *par = (struct neofb_par *) info->par;
1640
1641         * Disable cursor *
1642         write_le32(NEOREG_CURSCNTL, ~NEO_CURS_ENABLE, par);
1643
1644         if (cursor->set & FB_CUR_SETPOS) {
1645                 u32 x = cursor->image.dx;
1646                 u32 y = cursor->image.dy;
1647
1648                 info->cursor.image.dx = x;
1649                 info->cursor.image.dy = y;
1650                 write_le32(NEOREG_CURSX, x, par);
1651                 write_le32(NEOREG_CURSY, y, par);
1652         }
1653
1654         if (cursor->set & FB_CUR_SETSIZE) {
1655                 info->cursor.image.height = cursor->image.height;
1656                 info->cursor.image.width = cursor->image.width;
1657         }
1658
1659         if (cursor->set & FB_CUR_SETHOT)
1660                 info->cursor.hot = cursor->hot;
1661
1662         if (cursor->set & FB_CUR_SETCMAP) {
1663                 if (cursor->image.depth == 1) {
1664                         u32 fg = cursor->image.fg_color;
1665                         u32 bg = cursor->image.bg_color;
1666
1667                         info->cursor.image.fg_color = fg;
1668                         info->cursor.image.bg_color = bg;
1669
1670                         fg = ((fg & 0xff0000) >> 16) | ((fg & 0xff) << 16) | (fg & 0xff00);
1671                         bg = ((bg & 0xff0000) >> 16) | ((bg & 0xff) << 16) | (bg & 0xff00);
1672                         write_le32(NEOREG_CURSFGCOLOR, fg, par);
1673                         write_le32(NEOREG_CURSBGCOLOR, bg, par);
1674                 }
1675         }
1676
1677         if (cursor->set & FB_CUR_SETSHAPE)
1678                 fb_load_cursor_image(info);
1679
1680         if (info->cursor.enable)
1681                 write_le32(NEOREG_CURSCNTL, NEO_CURS_ENABLE, par);
1682         return 0;
1683 }
1684 */
1685
1686 static struct fb_ops neofb_ops = {
1687         .owner          = THIS_MODULE,
1688         .fb_open        = neofb_open,
1689         .fb_release     = neofb_release,
1690         .fb_check_var   = neofb_check_var,
1691         .fb_set_par     = neofb_set_par,
1692         .fb_setcolreg   = neofb_setcolreg,
1693         .fb_pan_display = neofb_pan_display,
1694         .fb_blank       = neofb_blank,
1695         .fb_sync        = neofb_sync,
1696         .fb_fillrect    = neofb_fillrect,
1697         .fb_copyarea    = neofb_copyarea,
1698         .fb_imageblit   = neofb_imageblit,
1699 };
1700
1701 /* --------------------------------------------------------------------- */
1702
1703 static struct fb_videomode __devinitdata mode800x480 = {
1704         .xres           = 800,
1705         .yres           = 480,
1706         .pixclock       = 25000,
1707         .left_margin    = 88,
1708         .right_margin   = 40,
1709         .upper_margin   = 23,
1710         .lower_margin   = 1,
1711         .hsync_len      = 128,
1712         .vsync_len      = 4,
1713         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1714         .vmode          = FB_VMODE_NONINTERLACED
1715 };
1716
1717 static int __devinit neo_map_mmio(struct fb_info *info,
1718                                   struct pci_dev *dev)
1719 {
1720         struct neofb_par *par = info->par;
1721
1722         DBG("neo_map_mmio");
1723
1724         switch (info->fix.accel) {
1725                 case FB_ACCEL_NEOMAGIC_NM2070:
1726                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1727                                 0x100000;
1728                         break;
1729                 case FB_ACCEL_NEOMAGIC_NM2090:
1730                 case FB_ACCEL_NEOMAGIC_NM2093:
1731                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1732                                 0x200000;
1733                         break;
1734                 case FB_ACCEL_NEOMAGIC_NM2160:
1735                 case FB_ACCEL_NEOMAGIC_NM2097:
1736                 case FB_ACCEL_NEOMAGIC_NM2200:
1737                 case FB_ACCEL_NEOMAGIC_NM2230:
1738                 case FB_ACCEL_NEOMAGIC_NM2360:
1739                 case FB_ACCEL_NEOMAGIC_NM2380:
1740                         info->fix.mmio_start = pci_resource_start(dev, 1);
1741                         break;
1742                 default:
1743                         info->fix.mmio_start = pci_resource_start(dev, 0);
1744         }
1745         info->fix.mmio_len = MMIO_SIZE;
1746
1747         if (!request_mem_region
1748             (info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) {
1749                 printk("neofb: memory mapped IO in use\n");
1750                 return -EBUSY;
1751         }
1752
1753         par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE);
1754         if (!par->mmio_vbase) {
1755                 printk("neofb: unable to map memory mapped IO\n");
1756                 release_mem_region(info->fix.mmio_start,
1757                                    info->fix.mmio_len);
1758                 return -ENOMEM;
1759         } else
1760                 printk(KERN_INFO "neofb: mapped io at %p\n",
1761                        par->mmio_vbase);
1762         return 0;
1763 }
1764
1765 static void neo_unmap_mmio(struct fb_info *info)
1766 {
1767         struct neofb_par *par = info->par;
1768
1769         DBG("neo_unmap_mmio");
1770
1771         iounmap(par->mmio_vbase);
1772         par->mmio_vbase = NULL;
1773
1774         release_mem_region(info->fix.mmio_start,
1775                            info->fix.mmio_len);
1776 }
1777
1778 static int __devinit neo_map_video(struct fb_info *info,
1779                                    struct pci_dev *dev, int video_len)
1780 {
1781         //unsigned long addr;
1782
1783         DBG("neo_map_video");
1784
1785         info->fix.smem_start = pci_resource_start(dev, 0);
1786         info->fix.smem_len = video_len;
1787
1788         if (!request_mem_region(info->fix.smem_start, info->fix.smem_len,
1789                                 "frame buffer")) {
1790                 printk("neofb: frame buffer in use\n");
1791                 return -EBUSY;
1792         }
1793
1794         info->screen_base =
1795             ioremap(info->fix.smem_start, info->fix.smem_len);
1796         if (!info->screen_base) {
1797                 printk("neofb: unable to map screen memory\n");
1798                 release_mem_region(info->fix.smem_start,
1799                                    info->fix.smem_len);
1800                 return -ENOMEM;
1801         } else
1802                 printk(KERN_INFO "neofb: mapped framebuffer at %p\n",
1803                        info->screen_base);
1804
1805 #ifdef CONFIG_MTRR
1806         ((struct neofb_par *)(info->par))->mtrr =
1807                 mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0),
1808                                 MTRR_TYPE_WRCOMB, 1);
1809 #endif
1810
1811         /* Clear framebuffer, it's all white in memory after boot */
1812         memset_io(info->screen_base, 0, info->fix.smem_len);
1813
1814         /* Allocate Cursor drawing pad.
1815         info->fix.smem_len -= PAGE_SIZE;
1816         addr = info->fix.smem_start + info->fix.smem_len;
1817         write_le32(NEOREG_CURSMEMPOS, ((0x000f & (addr >> 10)) << 8) |
1818                                         ((0x0ff0 & (addr >> 10)) >> 4), par);
1819         addr = (unsigned long) info->screen_base + info->fix.smem_len;
1820         info->sprite.addr = (u8 *) addr; */
1821         return 0;
1822 }
1823
1824 static void neo_unmap_video(struct fb_info *info)
1825 {
1826         DBG("neo_unmap_video");
1827
1828 #ifdef CONFIG_MTRR
1829         {
1830                 struct neofb_par *par = info->par;
1831
1832                 mtrr_del(par->mtrr, info->fix.smem_start,
1833                          info->fix.smem_len);
1834         }
1835 #endif
1836         iounmap(info->screen_base);
1837         info->screen_base = NULL;
1838
1839         release_mem_region(info->fix.smem_start,
1840                            info->fix.smem_len);
1841 }
1842
1843 static int __devinit neo_scan_monitor(struct fb_info *info)
1844 {
1845         struct neofb_par *par = info->par;
1846         unsigned char type, display;
1847         int w;
1848
1849         // Eventually we will have i2c support.
1850         info->monspecs.modedb = kmalloc(sizeof(struct fb_videomode), GFP_KERNEL);
1851         if (!info->monspecs.modedb)
1852                 return -ENOMEM;
1853         info->monspecs.modedb_len = 1;
1854
1855         /* Determine the panel type */
1856         vga_wgfx(NULL, 0x09, 0x26);
1857         type = vga_rgfx(NULL, 0x21);
1858         display = vga_rgfx(NULL, 0x20);
1859         if (!par->internal_display && !par->external_display) {
1860                 par->internal_display = display & 2 || !(display & 3) ? 1 : 0;
1861                 par->external_display = display & 1;
1862                 printk (KERN_INFO "Autodetected %s display\n",
1863                         par->internal_display && par->external_display ? "simultaneous" :
1864                         par->internal_display ? "internal" : "external");
1865         }
1866
1867         /* Determine panel width -- used in NeoValidMode. */
1868         w = vga_rgfx(NULL, 0x20);
1869         vga_wgfx(NULL, 0x09, 0x00);
1870         switch ((w & 0x18) >> 3) {
1871         case 0x00:
1872                 // 640x480@60
1873                 par->NeoPanelWidth = 640;
1874                 par->NeoPanelHeight = 480;
1875                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1876                 break;
1877         case 0x01:
1878                 par->NeoPanelWidth = 800;
1879                 if (par->libretto) {
1880                         par->NeoPanelHeight = 480;
1881                         memcpy(info->monspecs.modedb, &mode800x480, sizeof(struct fb_videomode));
1882                 } else {
1883                         // 800x600@60
1884                         par->NeoPanelHeight = 600;
1885                         memcpy(info->monspecs.modedb, &vesa_modes[8], sizeof(struct fb_videomode));
1886                 }
1887                 break;
1888         case 0x02:
1889                 // 1024x768@60
1890                 par->NeoPanelWidth = 1024;
1891                 par->NeoPanelHeight = 768;
1892                 memcpy(info->monspecs.modedb, &vesa_modes[13], sizeof(struct fb_videomode));
1893                 break;
1894         case 0x03:
1895                 /* 1280x1024@60 panel support needs to be added */
1896 #ifdef NOT_DONE
1897                 par->NeoPanelWidth = 1280;
1898                 par->NeoPanelHeight = 1024;
1899                 memcpy(info->monspecs.modedb, &vesa_modes[20], sizeof(struct fb_videomode));
1900                 break;
1901 #else
1902                 printk(KERN_ERR
1903                        "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n");
1904                 return -1;
1905 #endif
1906         default:
1907                 // 640x480@60
1908                 par->NeoPanelWidth = 640;
1909                 par->NeoPanelHeight = 480;
1910                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1911                 break;
1912         }
1913
1914         printk(KERN_INFO "Panel is a %dx%d %s %s display\n",
1915                par->NeoPanelWidth,
1916                par->NeoPanelHeight,
1917                (type & 0x02) ? "color" : "monochrome",
1918                (type & 0x10) ? "TFT" : "dual scan");
1919         return 0;
1920 }
1921
1922 static int __devinit neo_init_hw(struct fb_info *info)
1923 {
1924         struct neofb_par *par = info->par;
1925         int videoRam = 896;
1926         int maxClock = 65000;
1927         int CursorMem = 1024;
1928         int CursorOff = 0x100;
1929         int linearSize = 1024;
1930         int maxWidth = 1024;
1931         int maxHeight = 1024;
1932
1933         DBG("neo_init_hw");
1934
1935         neoUnlock();
1936
1937 #if 0
1938         printk(KERN_DEBUG "--- Neo extended register dump ---\n");
1939         for (int w = 0; w < 0x85; w++)
1940                 printk(KERN_DEBUG "CR %p: %p\n", (void *) w,
1941                        (void *) vga_rcrt(NULL, w));
1942         for (int w = 0; w < 0xC7; w++)
1943                 printk(KERN_DEBUG "GR %p: %p\n", (void *) w,
1944                        (void *) vga_rgfx(NULL, w));
1945 #endif
1946         switch (info->fix.accel) {
1947         case FB_ACCEL_NEOMAGIC_NM2070:
1948                 videoRam = 896;
1949                 maxClock = 65000;
1950                 CursorMem = 2048;
1951                 CursorOff = 0x100;
1952                 linearSize = 1024;
1953                 maxWidth = 1024;
1954                 maxHeight = 1024;
1955                 break;
1956         case FB_ACCEL_NEOMAGIC_NM2090:
1957         case FB_ACCEL_NEOMAGIC_NM2093:
1958                 videoRam = 1152;
1959                 maxClock = 80000;
1960                 CursorMem = 2048;
1961                 CursorOff = 0x100;
1962                 linearSize = 2048;
1963                 maxWidth = 1024;
1964                 maxHeight = 1024;
1965                 break;
1966         case FB_ACCEL_NEOMAGIC_NM2097:
1967                 videoRam = 1152;
1968                 maxClock = 80000;
1969                 CursorMem = 1024;
1970                 CursorOff = 0x100;
1971                 linearSize = 2048;
1972                 maxWidth = 1024;
1973                 maxHeight = 1024;
1974                 break;
1975         case FB_ACCEL_NEOMAGIC_NM2160:
1976                 videoRam = 2048;
1977                 maxClock = 90000;
1978                 CursorMem = 1024;
1979                 CursorOff = 0x100;
1980                 linearSize = 2048;
1981                 maxWidth = 1024;
1982                 maxHeight = 1024;
1983                 break;
1984         case FB_ACCEL_NEOMAGIC_NM2200:
1985                 videoRam = 2560;
1986                 maxClock = 110000;
1987                 CursorMem = 1024;
1988                 CursorOff = 0x1000;
1989                 linearSize = 4096;
1990                 maxWidth = 1280;
1991                 maxHeight = 1024;       /* ???? */
1992
1993                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
1994                 break;
1995         case FB_ACCEL_NEOMAGIC_NM2230:
1996                 videoRam = 3008;
1997                 maxClock = 110000;
1998                 CursorMem = 1024;
1999                 CursorOff = 0x1000;
2000                 linearSize = 4096;
2001                 maxWidth = 1280;
2002                 maxHeight = 1024;       /* ???? */
2003
2004                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2005                 break;
2006         case FB_ACCEL_NEOMAGIC_NM2360:
2007                 videoRam = 4096;
2008                 maxClock = 110000;
2009                 CursorMem = 1024;
2010                 CursorOff = 0x1000;
2011                 linearSize = 4096;
2012                 maxWidth = 1280;
2013                 maxHeight = 1024;       /* ???? */
2014
2015                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2016                 break;
2017         case FB_ACCEL_NEOMAGIC_NM2380:
2018                 videoRam = 6144;
2019                 maxClock = 110000;
2020                 CursorMem = 1024;
2021                 CursorOff = 0x1000;
2022                 linearSize = 8192;
2023                 maxWidth = 1280;
2024                 maxHeight = 1024;       /* ???? */
2025
2026                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2027                 break;
2028         }
2029 /*
2030         info->sprite.size = CursorMem;
2031         info->sprite.scan_align = 1;
2032         info->sprite.buf_align = 1;
2033         info->sprite.flags = FB_PIXMAP_IO;
2034         info->sprite.outbuf = neofb_draw_cursor;
2035 */
2036         par->maxClock = maxClock;
2037         par->cursorOff = CursorOff;
2038         return ((videoRam * 1024));
2039 }
2040
2041
2042 static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct
2043                                                    pci_device_id *id)
2044 {
2045         struct fb_info *info;
2046         struct neofb_par *par;
2047
2048         info = framebuffer_alloc(sizeof(struct neofb_par), &dev->dev);
2049
2050         if (!info)
2051                 return NULL;
2052
2053         par = info->par;
2054
2055         info->fix.accel = id->driver_data;
2056
2057         mutex_init(&par->open_lock);
2058         par->pci_burst = !nopciburst;
2059         par->lcd_stretch = !nostretch;
2060         par->libretto = libretto;
2061
2062         par->internal_display = internal;
2063         par->external_display = external;
2064         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
2065
2066         switch (info->fix.accel) {
2067         case FB_ACCEL_NEOMAGIC_NM2070:
2068                 sprintf(info->fix.id, "MagicGraph 128");
2069                 break;
2070         case FB_ACCEL_NEOMAGIC_NM2090:
2071                 sprintf(info->fix.id, "MagicGraph 128V");
2072                 break;
2073         case FB_ACCEL_NEOMAGIC_NM2093:
2074                 sprintf(info->fix.id, "MagicGraph 128ZV");
2075                 break;
2076         case FB_ACCEL_NEOMAGIC_NM2097:
2077                 sprintf(info->fix.id, "MagicGraph 128ZV+");
2078                 break;
2079         case FB_ACCEL_NEOMAGIC_NM2160:
2080                 sprintf(info->fix.id, "MagicGraph 128XD");
2081                 break;
2082         case FB_ACCEL_NEOMAGIC_NM2200:
2083                 sprintf(info->fix.id, "MagicGraph 256AV");
2084                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2085                                FBINFO_HWACCEL_COPYAREA |
2086                                FBINFO_HWACCEL_FILLRECT;
2087                 break;
2088         case FB_ACCEL_NEOMAGIC_NM2230:
2089                 sprintf(info->fix.id, "MagicGraph 256AV+");
2090                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2091                                FBINFO_HWACCEL_COPYAREA |
2092                                FBINFO_HWACCEL_FILLRECT;
2093                 break;
2094         case FB_ACCEL_NEOMAGIC_NM2360:
2095                 sprintf(info->fix.id, "MagicGraph 256ZX");
2096                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2097                                FBINFO_HWACCEL_COPYAREA |
2098                                FBINFO_HWACCEL_FILLRECT;
2099                 break;
2100         case FB_ACCEL_NEOMAGIC_NM2380:
2101                 sprintf(info->fix.id, "MagicGraph 256XL+");
2102                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2103                                FBINFO_HWACCEL_COPYAREA |
2104                                FBINFO_HWACCEL_FILLRECT;
2105                 break;
2106         }
2107
2108         info->fix.type = FB_TYPE_PACKED_PIXELS;
2109         info->fix.type_aux = 0;
2110         info->fix.xpanstep = 0;
2111         info->fix.ypanstep = 4;
2112         info->fix.ywrapstep = 0;
2113         info->fix.accel = id->driver_data;
2114
2115         info->fbops = &neofb_ops;
2116         info->pseudo_palette = par->palette;
2117         return info;
2118 }
2119
2120 static void neo_free_fb_info(struct fb_info *info)
2121 {
2122         if (info) {
2123                 /*
2124                  * Free the colourmap
2125                  */
2126                 fb_dealloc_cmap(&info->cmap);
2127                 framebuffer_release(info);
2128         }
2129 }
2130
2131 /* --------------------------------------------------------------------- */
2132
2133 static int __devinit neofb_probe(struct pci_dev *dev,
2134                                  const struct pci_device_id *id)
2135 {
2136         struct fb_info *info;
2137         u_int h_sync, v_sync;
2138         int video_len, err;
2139
2140         DBG("neofb_probe");
2141
2142         err = pci_enable_device(dev);
2143         if (err)
2144                 return err;
2145
2146         err = -ENOMEM;
2147         info = neo_alloc_fb_info(dev, id);
2148         if (!info)
2149                 return err;
2150
2151         err = neo_map_mmio(info, dev);
2152         if (err)
2153                 goto err_map_mmio;
2154
2155         err = neo_scan_monitor(info);
2156         if (err)
2157                 goto err_scan_monitor;
2158
2159         video_len = neo_init_hw(info);
2160         if (video_len < 0) {
2161                 err = video_len;
2162                 goto err_init_hw;
2163         }
2164
2165         err = neo_map_video(info, dev, video_len);
2166         if (err)
2167                 goto err_init_hw;
2168
2169         if (!fb_find_mode(&info->var, info, mode_option, NULL, 0,
2170                         info->monspecs.modedb, 16)) {
2171                 printk(KERN_ERR "neofb: Unable to find usable video mode.\n");
2172                 goto err_map_video;
2173         }
2174
2175         /*
2176          * Calculate the hsync and vsync frequencies.  Note that
2177          * we split the 1e12 constant up so that we can preserve
2178          * the precision and fit the results into 32-bit registers.
2179          *  (1953125000 * 512 = 1e12)
2180          */
2181         h_sync = 1953125000 / info->var.pixclock;
2182         h_sync =
2183             h_sync * 512 / (info->var.xres + info->var.left_margin +
2184                             info->var.right_margin + info->var.hsync_len);
2185         v_sync =
2186             h_sync / (info->var.yres + info->var.upper_margin +
2187                       info->var.lower_margin + info->var.vsync_len);
2188
2189         printk(KERN_INFO "neofb v" NEOFB_VERSION
2190                ": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
2191                info->fix.smem_len >> 10, info->var.xres,
2192                info->var.yres, h_sync / 1000, h_sync % 1000, v_sync);
2193
2194         if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
2195                 goto err_map_video;
2196
2197         err = register_framebuffer(info);
2198         if (err < 0)
2199                 goto err_reg_fb;
2200
2201         printk(KERN_INFO "fb%d: %s frame buffer device\n",
2202                info->node, info->fix.id);
2203
2204         /*
2205          * Our driver data
2206          */
2207         pci_set_drvdata(dev, info);
2208         return 0;
2209
2210 err_reg_fb:
2211         fb_dealloc_cmap(&info->cmap);
2212 err_map_video:
2213         neo_unmap_video(info);
2214 err_init_hw:
2215         fb_destroy_modedb(info->monspecs.modedb);
2216 err_scan_monitor:
2217         neo_unmap_mmio(info);
2218 err_map_mmio:
2219         neo_free_fb_info(info);
2220         return err;
2221 }
2222
2223 static void __devexit neofb_remove(struct pci_dev *dev)
2224 {
2225         struct fb_info *info = pci_get_drvdata(dev);
2226
2227         DBG("neofb_remove");
2228
2229         if (info) {
2230                 /*
2231                  * If unregister_framebuffer fails, then
2232                  * we will be leaving hooks that could cause
2233                  * oopsen laying around.
2234                  */
2235                 if (unregister_framebuffer(info))
2236                         printk(KERN_WARNING
2237                                "neofb: danger danger!  Oopsen imminent!\n");
2238
2239                 neo_unmap_video(info);
2240                 fb_destroy_modedb(info->monspecs.modedb);
2241                 neo_unmap_mmio(info);
2242                 neo_free_fb_info(info);
2243
2244                 /*
2245                  * Ensure that the driver data is no longer
2246                  * valid.
2247                  */
2248                 pci_set_drvdata(dev, NULL);
2249         }
2250 }
2251
2252 static struct pci_device_id neofb_devices[] = {
2253         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
2254          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
2255
2256         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090,
2257          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090},
2258
2259         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093,
2260          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093},
2261
2262         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097,
2263          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097},
2264
2265         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160,
2266          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160},
2267
2268         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200,
2269          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200},
2270
2271         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230,
2272          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230},
2273
2274         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360,
2275          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360},
2276
2277         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380,
2278          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380},
2279
2280         {0, 0, 0, 0, 0, 0, 0}
2281 };
2282
2283 MODULE_DEVICE_TABLE(pci, neofb_devices);
2284
2285 static struct pci_driver neofb_driver = {
2286         .name =         "neofb",
2287         .id_table =     neofb_devices,
2288         .probe =        neofb_probe,
2289         .remove =       __devexit_p(neofb_remove)
2290 };
2291
2292 /* ************************* init in-kernel code ************************** */
2293
2294 #ifndef MODULE
2295 static int __init neofb_setup(char *options)
2296 {
2297         char *this_opt;
2298
2299         DBG("neofb_setup");
2300
2301         if (!options || !*options)
2302                 return 0;
2303
2304         while ((this_opt = strsep(&options, ",")) != NULL) {
2305                 if (!*this_opt)
2306                         continue;
2307
2308                 if (!strncmp(this_opt, "internal", 8))
2309                         internal = 1;
2310                 else if (!strncmp(this_opt, "external", 8))
2311                         external = 1;
2312                 else if (!strncmp(this_opt, "nostretch", 9))
2313                         nostretch = 1;
2314                 else if (!strncmp(this_opt, "nopciburst", 10))
2315                         nopciburst = 1;
2316                 else if (!strncmp(this_opt, "libretto", 8))
2317                         libretto = 1;
2318                 else
2319                         mode_option = this_opt;
2320         }
2321         return 0;
2322 }
2323 #endif  /*  MODULE  */
2324
2325 static int __init neofb_init(void)
2326 {
2327 #ifndef MODULE
2328         char *option = NULL;
2329
2330         if (fb_get_options("neofb", &option))
2331                 return -ENODEV;
2332         neofb_setup(option);
2333 #endif
2334         return pci_register_driver(&neofb_driver);
2335 }
2336
2337 module_init(neofb_init);
2338
2339 #ifdef MODULE
2340 static void __exit neofb_exit(void)
2341 {
2342         pci_unregister_driver(&neofb_driver);
2343 }
2344
2345 module_exit(neofb_exit);
2346 #endif                          /* MODULE */