SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/video/cyber2000fb.c

   1 /*
   2  *  linux/drivers/video/cyber2000fb.c
   3  *
   4  *  Copyright (C) 1998-2002 Russell King
   5  *
   6  *  MIPS and 50xx clock support
   7  *  Copyright (C) 2001 Bradley D. LaRonde <brad@ltc.com>
   8  *
   9  *  32 bit support, text color and panning fixes for modes != 8 bit
  10  *  Copyright (C) 2002 Denis Oliver Kropp <dok@directfb.org>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  *
  16  * Integraphics CyberPro 2000, 2010 and 5000 frame buffer device
  17  *
  18  * Based on cyberfb.c.
  19  *
  20  * Note that we now use the new fbcon fix, var and cmap scheme.  We do
  21  * still have to check which console is the currently displayed one
  22  * however, especially for the colourmap stuff.
  23  *
  24  * We also use the new hotplug PCI subsystem.  I'm not sure if there
  25  * are any such cards, but I'm erring on the side of caution.  We don't
  26  * want to go pop just because someone does have one.
  27  *
  28  * Note that this doesn't work fully in the case of multiple CyberPro
  29  * cards with grabbers.  We currently can only attach to the first
  30  * CyberPro card found.
  31  *
  32  * When we're in truecolour mode, we power down the LUT RAM as a power
  33  * saving feature.  Also, when we enter any of the powersaving modes
  34  * (except soft blanking) we power down the RAMDACs.  This saves about
  35  * 1W, which is roughly 8% of the power consumption of a NetWinder
  36  * (which, incidentally, is about the same saving as a 2.5in hard disk
  37  * entering standby mode.)
  38  */
  39 #include <linux/config.h>
  40 #include <linux/module.h>
  41 #include <linux/kernel.h>
  42 #include <linux/errno.h>
  43 #include <linux/string.h>
  44 #include <linux/mm.h>
  45 #include <linux/tty.h>
  46 #include <linux/slab.h>
  47 #include <linux/delay.h>
  48 #include <linux/fb.h>
  49 #include <linux/pci.h>
  50 #include <linux/init.h>
  51
  52 #include <asm/io.h>
  53 #include <asm/pgtable.h>
  54 #include <asm/system.h>
  55 #include <asm/uaccess.h>
  56
  57 #ifdef __arm__
  58 #include <asm/mach-types.h>
  59 #endif
  60
  61 #include "cyber2000fb.h"
  62
  63 struct cfb_info {
  64         struct fb_info          fb;
  65         struct display_switch   *dispsw;
  66         struct display          *display;
  67         struct pci_dev          *dev;
  68         unsigned char           __iomem *region;
  69         unsigned char           __iomem *regs;
  70         u_int                   id;
  71         int                     func_use_count;
  72         u_long                  ref_ps;
  73
  74         /*
  75          * Clock divisors
  76          */
  77         u_int                   divisors[4];
  78
  79         struct {
  80                 u8 red, green, blue;
  81         } palette[NR_PALETTE];
  82
  83         u_char                  mem_ctl1;
  84         u_char                  mem_ctl2;
  85         u_char                  mclk_mult;
  86         u_char                  mclk_div;
  87         /*
  88          * RAMDAC control register is both of these or'ed together
  89          */
  90         u_char                  ramdac_ctrl;
  91         u_char                  ramdac_powerdown;
  92
  93         u32                     pseudo_palette[16];
  94 };
  95
  96 static char *default_font = "Acorn8x8";
  97 module_param(default_font, charp, 0);
  98 MODULE_PARM_DESC(default_font, "Default font name");
  99
 100 /*
 101  * Our access methods.
 102  */
 103 #define cyber2000fb_writel(val,reg,cfb) writel(val, (cfb)->regs + (reg))
 104 #define cyber2000fb_writew(val,reg,cfb) writew(val, (cfb)->regs + (reg))
 105 #define cyber2000fb_writeb(val,reg,cfb) writeb(val, (cfb)->regs + (reg))
 106
 107 #define cyber2000fb_readb(reg,cfb)      readb((cfb)->regs + (reg))
 108
 109 static inline void
 110 cyber2000_crtcw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 111 {
 112         cyber2000fb_writew((reg & 255) | val << 8, 0x3d4, cfb);
 113 }
 114
 115 static inline void
 116 cyber2000_grphw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 117 {
 118         cyber2000fb_writew((reg & 255) | val << 8, 0x3ce, cfb);
 119 }
 120
 121 static inline unsigned int
 122 cyber2000_grphr(unsigned int reg, struct cfb_info *cfb)
 123 {
 124         cyber2000fb_writeb(reg, 0x3ce, cfb);
 125         return cyber2000fb_readb(0x3cf, cfb);
 126 }
 127
 128 static inline void
 129 cyber2000_attrw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 130 {
 131         cyber2000fb_readb(0x3da, cfb);
 132         cyber2000fb_writeb(reg, 0x3c0, cfb);
 133         cyber2000fb_readb(0x3c1, cfb);
 134         cyber2000fb_writeb(val, 0x3c0, cfb);
 135 }
 136
 137 static inline void
 138 cyber2000_seqw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 139 {
 140         cyber2000fb_writew((reg & 255) | val << 8, 0x3c4, cfb);
 141 }
 142
 143 /* -------------------- Hardware specific routines ------------------------- */
 144
 145 /*
 146  * Hardware Cyber2000 Acceleration
 147  */
 148 static void
 149 cyber2000fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 150 {
 151         struct cfb_info *cfb = (struct cfb_info *)info;
 152         unsigned long dst, col;
 153
 154         if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT)) {
 155                 cfb_fillrect(info, rect);
 156                 return;
 157         }
 158
 159         cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
 160         cyber2000fb_writew(rect->width - 1, CO_REG_PIXWIDTH, cfb);
 161         cyber2000fb_writew(rect->height - 1, CO_REG_PIXHEIGHT, cfb);
 162
 163         col = rect->color;
 164         if (cfb->fb.var.bits_per_pixel > 8)
 165                 col = ((u32 *)cfb->fb.pseudo_palette)[col];
 166         cyber2000fb_writel(col, CO_REG_FGCOLOUR, cfb);
 167
 168         dst = rect->dx + rect->dy * cfb->fb.var.xres_virtual;
 169         if (cfb->fb.var.bits_per_pixel == 24) {
 170                 cyber2000fb_writeb(dst, CO_REG_X_PHASE, cfb);
 171                 dst *= 3;
 172         }
 173
 174         cyber2000fb_writel(dst, CO_REG_DEST_PTR, cfb);
 175         cyber2000fb_writeb(CO_FG_MIX_SRC, CO_REG_FGMIX, cfb);
 176         cyber2000fb_writew(CO_CMD_L_PATTERN_FGCOL, CO_REG_CMD_L, cfb);
 177         cyber2000fb_writew(CO_CMD_H_BLITTER, CO_REG_CMD_H, cfb);
 178 }
 179
 180 static void
 181 cyber2000fb_copyarea(struct fb_info *info, const struct fb_copyarea *region)
 182 {
 183         struct cfb_info *cfb = (struct cfb_info *)info;
 184         unsigned int cmd = CO_CMD_L_PATTERN_FGCOL;
 185         unsigned long src, dst;
 186
 187         if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT)) {
 188                 cfb_copyarea(info, region);
 189                 return;
 190         }
 191
 192         cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
 193         cyber2000fb_writew(region->width - 1, CO_REG_PIXWIDTH, cfb);
 194         cyber2000fb_writew(region->height - 1, CO_REG_PIXHEIGHT, cfb);
 195
 196         src = region->sx + region->sy * cfb->fb.var.xres_virtual;
 197         dst = region->dx + region->dy * cfb->fb.var.xres_virtual;
 198
 199         if (region->sx < region->dx) {
 200                 src += region->width - 1;
 201                 dst += region->width - 1;
 202                 cmd |= CO_CMD_L_INC_LEFT;
 203         }
 204
 205         if (region->sy < region->dy) {
 206                 src += (region->height - 1) * cfb->fb.var.xres_virtual;
 207                 dst += (region->height - 1) * cfb->fb.var.xres_virtual;
 208                 cmd |= CO_CMD_L_INC_UP;
 209         }
 210
 211         if (cfb->fb.var.bits_per_pixel == 24) {
 212                 cyber2000fb_writeb(dst, CO_REG_X_PHASE, cfb);
 213                 src *= 3;
 214                 dst *= 3;
 215         }
 216         cyber2000fb_writel(src, CO_REG_SRC1_PTR, cfb);
 217         cyber2000fb_writel(dst, CO_REG_DEST_PTR, cfb);
 218         cyber2000fb_writew(CO_FG_MIX_SRC, CO_REG_FGMIX, cfb);
 219         cyber2000fb_writew(cmd, CO_REG_CMD_L, cfb);
 220         cyber2000fb_writew(CO_CMD_H_FGSRCMAP | CO_CMD_H_BLITTER,
 221                            CO_REG_CMD_H, cfb);
 222 }
 223
 224 static void
 225 cyber2000fb_imageblit(struct fb_info *info, const struct fb_image *image)
 226 {
 227 //      struct cfb_info *cfb = (struct cfb_info *)info;
 228
 229 //      if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT)) {
 230                 cfb_imageblit(info, image);
 231                 return;
 232 //      }
 233 }
 234
 235 static int cyber2000fb_sync(struct fb_info *info)
 236 {
 237         struct cfb_info *cfb = (struct cfb_info *)info;
 238         int count = 100000;
 239
 240         if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT))
 241                 return 0;
 242
 243         while (cyber2000fb_readb(CO_REG_CONTROL, cfb) & CO_CTRL_BUSY) {
 244                 if (!count--) {
 245                         debug_printf("accel_wait timed out\n");
 246                         cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
 247                         break;
 248                 }
 249                 udelay(1);
 250         }
 251         return 0;
 252 }
 253
 254 /*
 255  * ===========================================================================
 256  */
 257
 258 static inline u32 convert_bitfield(u_int val, struct fb_bitfield *bf)
 259 {
 260         u_int mask = (1 << bf->length) - 1;
 261
 262         return (val >> (16 - bf->length) & mask) << bf->offset;
 263 }
 264
 265 /*
 266  *    Set a single color register. Return != 0 for invalid regno.
 267  */
 268 static int
 269 cyber2000fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 270                       u_int transp, struct fb_info *info)
 271 {
 272         struct cfb_info *cfb = (struct cfb_info *)info;
 273         struct fb_var_screeninfo *var = &cfb->fb.var;
 274         u32 pseudo_val;
 275         int ret = 1;
 276
 277         switch (cfb->fb.fix.visual) {
 278         default:
 279                 return 1;
 280
 281         /*
 282          * Pseudocolour:
 283          *         8     8
 284          * pixel --/--+--/-->  red lut  --> red dac
 285          *            |  8
 286          *            +--/--> green lut --> green dac
 287          *            |  8
 288          *            +--/-->  blue lut --> blue dac
 289          */
 290         case FB_VISUAL_PSEUDOCOLOR:
 291                 if (regno >= NR_PALETTE)
 292                         return 1;
 293
 294                 red >>= 8;
 295                 green >>= 8;
 296                 blue >>= 8;
 297
 298                 cfb->palette[regno].red   = red;
 299                 cfb->palette[regno].green = green;
 300                 cfb->palette[regno].blue  = blue;
 301
 302                 cyber2000fb_writeb(regno, 0x3c8, cfb);
 303                 cyber2000fb_writeb(red, 0x3c9, cfb);
 304                 cyber2000fb_writeb(green, 0x3c9, cfb);
 305                 cyber2000fb_writeb(blue, 0x3c9, cfb);
 306                 return 0;
 307
 308         /*
 309          * Direct colour:
 310          *          n     rl
 311          *  pixel --/--+--/-->  red lut  --> red dac
 312          *             |  gl
 313          *             +--/--> green lut --> green dac
 314          *             |  bl
 315          *             +--/-->  blue lut --> blue dac
 316          * n = bpp, rl = red length, gl = green length, bl = blue length
 317          */
 318         case FB_VISUAL_DIRECTCOLOR:
 319                 red >>= 8;
 320                 green >>= 8;
 321                 blue >>= 8;
 322
 323                 if (var->green.length == 6 && regno < 64) {
 324                         cfb->palette[regno << 2].green = green;
 325
 326                         /*
 327                          * The 6 bits of the green component are applied
 328                          * to the high 6 bits of the LUT.
 329                          */
 330                         cyber2000fb_writeb(regno << 2, 0x3c8, cfb);
 331                         cyber2000fb_writeb(cfb->palette[regno >> 1].red, 0x3c9, cfb);
 332                         cyber2000fb_writeb(green, 0x3c9, cfb);
 333                         cyber2000fb_writeb(cfb->palette[regno >> 1].blue, 0x3c9, cfb);
 334
 335                         green = cfb->palette[regno << 3].green;
 336
 337                         ret = 0;
 338                 }
 339
 340                 if (var->green.length >= 5 && regno < 32) {
 341                         cfb->palette[regno << 3].red   = red;
 342                         cfb->palette[regno << 3].green = green;
 343                         cfb->palette[regno << 3].blue  = blue;
 344
 345                         /*
 346                          * The 5 bits of each colour component are
 347                          * applied to the high 5 bits of the LUT.
 348                          */
 349                         cyber2000fb_writeb(regno << 3, 0x3c8, cfb);
 350                         cyber2000fb_writeb(red, 0x3c9, cfb);
 351                         cyber2000fb_writeb(green, 0x3c9, cfb);
 352                         cyber2000fb_writeb(blue, 0x3c9, cfb);
 353                         ret = 0;
 354                 }
 355
 356                 if (var->green.length == 4 && regno < 16) {
 357                         cfb->palette[regno << 4].red   = red;
 358                         cfb->palette[regno << 4].green = green;
 359                         cfb->palette[regno << 4].blue  = blue;
 360
 361                         /*
 362                          * The 5 bits of each colour component are
 363                          * applied to the high 5 bits of the LUT.
 364                          */
 365                         cyber2000fb_writeb(regno << 4, 0x3c8, cfb);
 366                         cyber2000fb_writeb(red, 0x3c9, cfb);
 367                         cyber2000fb_writeb(green, 0x3c9, cfb);
 368                         cyber2000fb_writeb(blue, 0x3c9, cfb);
 369                         ret = 0;
 370                 }
 371
 372                 /*
 373                  * Since this is only used for the first 16 colours, we
 374                  * don't have to care about overflowing for regno >= 32
 375                  */
 376                 pseudo_val = regno << var->red.offset |
 377                              regno << var->green.offset |
 378                              regno << var->blue.offset;
 379                 break;
 380
 381         /*
 382          * True colour:
 383          *          n     rl
 384          *  pixel --/--+--/--> red dac
 385          *             |  gl
 386          *             +--/--> green dac
 387          *             |  bl
 388          *             +--/--> blue dac
 389          * n = bpp, rl = red length, gl = green length, bl = blue length
 390          */
 391         case FB_VISUAL_TRUECOLOR:
 392                 pseudo_val = convert_bitfield(transp ^ 0xffff, &var->transp);
 393                 pseudo_val |= convert_bitfield(red, &var->red);
 394                 pseudo_val |= convert_bitfield(green, &var->green);
 395                 pseudo_val |= convert_bitfield(blue, &var->blue);
 396                 break;
 397         }
 398
 399         /*
 400          * Now set our pseudo palette for the CFB16/24/32 drivers.
 401          */
 402         if (regno < 16)
 403                 ((u32 *)cfb->fb.pseudo_palette)[regno] = pseudo_val;
 404
 405         return ret;
 406 }
 407
 408 struct par_info {
 409         /*
 410          * Hardware
 411          */
 412         u_char  clock_mult;
 413         u_char  clock_div;
 414         u_char  extseqmisc;
 415         u_char  co_pixfmt;
 416         u_char  crtc_ofl;
 417         u_char  crtc[19];
 418         u_int   width;
 419         u_int   pitch;
 420         u_int   fetch;
 421
 422         /*
 423          * Other
 424          */
 425         u_char  ramdac;
 426 };
 427
 428 static const u_char crtc_idx[] = {
 429         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
 430         0x08, 0x09,
 431         0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18
 432 };
 433
 434 static void cyber2000fb_write_ramdac_ctrl(struct cfb_info *cfb)
 435 {
 436         unsigned int i;
 437         unsigned int val = cfb->ramdac_ctrl | cfb->ramdac_powerdown;
 438
 439         cyber2000fb_writeb(0x56, 0x3ce, cfb);
 440         i = cyber2000fb_readb(0x3cf, cfb);
 441         cyber2000fb_writeb(i | 4, 0x3cf, cfb);
 442         cyber2000fb_writeb(val, 0x3c6, cfb);
 443         cyber2000fb_writeb(i, 0x3cf, cfb);
 444 }
 445
 446 static void cyber2000fb_set_timing(struct cfb_info *cfb, struct par_info *hw)
 447 {
 448         u_int i;
 449
 450         /*
 451          * Blank palette
 452          */
 453         for (i = 0; i < NR_PALETTE; i++) {
 454                 cyber2000fb_writeb(i, 0x3c8, cfb);
 455                 cyber2000fb_writeb(0, 0x3c9, cfb);
 456                 cyber2000fb_writeb(0, 0x3c9, cfb);
 457                 cyber2000fb_writeb(0, 0x3c9, cfb);
 458         }
 459
 460         cyber2000fb_writeb(0xef, 0x3c2, cfb);
 461         cyber2000_crtcw(0x11, 0x0b, cfb);
 462         cyber2000_attrw(0x11, 0x00, cfb);
 463
 464         cyber2000_seqw(0x00, 0x01, cfb);
 465         cyber2000_seqw(0x01, 0x01, cfb);
 466         cyber2000_seqw(0x02, 0x0f, cfb);
 467         cyber2000_seqw(0x03, 0x00, cfb);
 468         cyber2000_seqw(0x04, 0x0e, cfb);
 469         cyber2000_seqw(0x00, 0x03, cfb);
 470
 471         for (i = 0; i < sizeof(crtc_idx); i++)
 472                 cyber2000_crtcw(crtc_idx[i], hw->crtc[i], cfb);
 473
 474         for (i = 0x0a; i < 0x10; i++)
 475                 cyber2000_crtcw(i, 0, cfb);
 476
 477         cyber2000_grphw(EXT_CRT_VRTOFL, hw->crtc_ofl, cfb);
 478         cyber2000_grphw(0x00, 0x00, cfb);
 479         cyber2000_grphw(0x01, 0x00, cfb);
 480         cyber2000_grphw(0x02, 0x00, cfb);
 481         cyber2000_grphw(0x03, 0x00, cfb);
 482         cyber2000_grphw(0x04, 0x00, cfb);
 483         cyber2000_grphw(0x05, 0x60, cfb);
 484         cyber2000_grphw(0x06, 0x05, cfb);
 485         cyber2000_grphw(0x07, 0x0f, cfb);
 486         cyber2000_grphw(0x08, 0xff, cfb);
 487
 488         /* Attribute controller registers */
 489         for (i = 0; i < 16; i++)
 490                 cyber2000_attrw(i, i, cfb);
 491
 492         cyber2000_attrw(0x10, 0x01, cfb);
 493         cyber2000_attrw(0x11, 0x00, cfb);
 494         cyber2000_attrw(0x12, 0x0f, cfb);
 495         cyber2000_attrw(0x13, 0x00, cfb);
 496         cyber2000_attrw(0x14, 0x00, cfb);
 497
 498         /* PLL registers */
 499         cyber2000_grphw(EXT_DCLK_MULT, hw->clock_mult, cfb);
 500         cyber2000_grphw(EXT_DCLK_DIV,  hw->clock_div, cfb);
 501         cyber2000_grphw(EXT_MCLK_MULT, cfb->mclk_mult, cfb);
 502         cyber2000_grphw(EXT_MCLK_DIV,  cfb->mclk_div, cfb);
 503         cyber2000_grphw(0x90, 0x01, cfb);
 504         cyber2000_grphw(0xb9, 0x80, cfb);
 505         cyber2000_grphw(0xb9, 0x00, cfb);
 506
 507         cfb->ramdac_ctrl = hw->ramdac;
 508         cyber2000fb_write_ramdac_ctrl(cfb);
 509
 510         cyber2000fb_writeb(0x20, 0x3c0, cfb);
 511         cyber2000fb_writeb(0xff, 0x3c6, cfb);
 512
 513         cyber2000_grphw(0x14, hw->fetch, cfb);
 514         cyber2000_grphw(0x15, ((hw->fetch >> 8) & 0x03) |
 515                               ((hw->pitch >> 4) & 0x30), cfb);
 516         cyber2000_grphw(EXT_SEQ_MISC, hw->extseqmisc, cfb);
 517
 518         /*
 519          * Set up accelerator registers
 520          */
 521         cyber2000fb_writew(hw->width,     CO_REG_SRC_WIDTH,  cfb);
 522         cyber2000fb_writew(hw->width,     CO_REG_DEST_WIDTH, cfb);
 523         cyber2000fb_writeb(hw->co_pixfmt, CO_REG_PIXFMT, cfb);
 524 }
 525
 526 static inline int
 527 cyber2000fb_update_start(struct cfb_info *cfb, struct fb_var_screeninfo *var)
 528 {
 529         u_int base = var->yoffset * var->xres_virtual + var->xoffset;
 530
 531         base *= var->bits_per_pixel;
 532
 533         /*
 534          * Convert to bytes and shift two extra bits because DAC
 535          * can only start on 4 byte aligned data.
 536          */
 537         base >>= 5;
 538
 539         if (base >= 1 << 20)
 540                 return -EINVAL;
 541
 542         cyber2000_grphw(0x10, base >> 16 | 0x10, cfb);
 543         cyber2000_crtcw(0x0c, base >> 8, cfb);
 544         cyber2000_crtcw(0x0d, base, cfb);
 545
 546         return 0;
 547 }
 548
 549 static int
 550 cyber2000fb_decode_crtc(struct par_info *hw, struct cfb_info *cfb,
 551                         struct fb_var_screeninfo *var)
 552 {
 553         u_int Htotal, Hblankend, Hsyncend;
 554         u_int Vtotal, Vdispend, Vblankstart, Vblankend, Vsyncstart, Vsyncend;
 555 #define BIT(v,b1,m,b2) (((v >> b1) & m) << b2)
 556
 557         hw->crtc[13] = hw->pitch;
 558         hw->crtc[17] = 0xe3;
 559         hw->crtc[14] = 0;
 560         hw->crtc[8]  = 0;
 561
 562         Htotal      = var->xres + var->right_margin +
 563                       var->hsync_len + var->left_margin;
 564
 565         if (Htotal > 2080)
 566                 return -EINVAL;
 567
 568         hw->crtc[0] = (Htotal >> 3) - 5;
 569         hw->crtc[1] = (var->xres >> 3) - 1;
 570         hw->crtc[2] = var->xres >> 3;
 571         hw->crtc[4] = (var->xres + var->right_margin) >> 3;
 572
 573         Hblankend   = (Htotal - 4*8) >> 3;
 574
 575         hw->crtc[3] = BIT(Hblankend,  0, 0x1f,  0) |
 576                       BIT(1,          0, 0x01,  7);
 577
 578         Hsyncend    = (var->xres + var->right_margin + var->hsync_len) >> 3;
 579
 580         hw->crtc[5] = BIT(Hsyncend,   0, 0x1f,  0) |
 581                       BIT(Hblankend,  5, 0x01,  7);
 582
 583         Vdispend    = var->yres - 1;
 584         Vsyncstart  = var->yres + var->lower_margin;
 585         Vsyncend    = var->yres + var->lower_margin + var->vsync_len;
 586         Vtotal      = var->yres + var->lower_margin + var->vsync_len +
 587                       var->upper_margin - 2;
 588
 589         if (Vtotal > 2047)
 590                 return -EINVAL;
 591
 592         Vblankstart = var->yres + 6;
 593         Vblankend   = Vtotal - 10;
 594
 595         hw->crtc[6]  = Vtotal;
 596         hw->crtc[7]  = BIT(Vtotal,     8, 0x01,  0) |
 597                         BIT(Vdispend,   8, 0x01,  1) |
 598                         BIT(Vsyncstart, 8, 0x01,  2) |
 599                         BIT(Vblankstart,8, 0x01,  3) |
 600                         BIT(1,          0, 0x01,  4) |
 601                         BIT(Vtotal,     9, 0x01,  5) |
 602                         BIT(Vdispend,   9, 0x01,  6) |
 603                         BIT(Vsyncstart, 9, 0x01,  7);
 604         hw->crtc[9]  = BIT(0,          0, 0x1f,  0) |
 605                         BIT(Vblankstart,9, 0x01,  5) |
 606                         BIT(1,          0, 0x01,  6);
 607         hw->crtc[10] = Vsyncstart;
 608         hw->crtc[11] = BIT(Vsyncend,   0, 0x0f,  0) |
 609                        BIT(1,          0, 0x01,  7);
 610         hw->crtc[12] = Vdispend;
 611         hw->crtc[15] = Vblankstart;
 612         hw->crtc[16] = Vblankend;
 613         hw->crtc[18] = 0xff;
 614
 615         /*
 616          * overflow - graphics reg 0x11
 617          * 0=VTOTAL:10 1=VDEND:10 2=VRSTART:10 3=VBSTART:10
 618          * 4=LINECOMP:10 5-IVIDEO 6=FIXCNT
 619          */
 620         hw->crtc_ofl =
 621                 BIT(Vtotal,     10, 0x01,  0) |
 622                 BIT(Vdispend,   10, 0x01,  1) |
 623                 BIT(Vsyncstart, 10, 0x01,  2) |
 624                 BIT(Vblankstart,10, 0x01,  3) |
 625                 EXT_CRT_VRTOFL_LINECOMP10;
 626
 627         /* woody: set the interlaced bit... */
 628         /* FIXME: what about doublescan? */
 629         if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
 630                 hw->crtc_ofl |= EXT_CRT_VRTOFL_INTERLACE;
 631
 632         return 0;
 633 }
 634
 635 /*
 636  * The following was discovered by a good monitor, bit twiddling, theorising
 637  * and but mostly luck.  Strangely, it looks like everyone elses' PLL!
 638  *
 639  * Clock registers:
 640  *   fclock = fpll / div2
 641  *   fpll   = fref * mult / div1
 642  * where:
 643  *   fref = 14.318MHz (69842ps)
 644  *   mult = reg0xb0.7:0
 645  *   div1 = (reg0xb1.5:0 + 1)
 646  *   div2 =  2^(reg0xb1.7:6)
 647  *   fpll should be between 115 and 260 MHz
 648  *  (8696ps and 3846ps)
 649  */
 650 static int
 651 cyber2000fb_decode_clock(struct par_info *hw, struct cfb_info *cfb,
 652                          struct fb_var_screeninfo *var)
 653 {
 654         u_long pll_ps = var->pixclock;
 655         const u_long ref_ps = cfb->ref_ps;
 656         u_int div2, t_div1, best_div1, best_mult;
 657         int best_diff;
 658         int vco;
 659
 660         /*
 661          * Step 1:
 662          *   find div2 such that 115MHz < fpll < 260MHz
 663          *   and 0 <= div2 < 4
 664          */
 665         for (div2 = 0; div2 < 4; div2++) {
 666                 u_long new_pll;
 667
 668                 new_pll = pll_ps / cfb->divisors[div2];
 669                 if (8696 > new_pll && new_pll > 3846) {
 670                         pll_ps = new_pll;
 671                         break;
 672                 }
 673         }
 674
 675         if (div2 == 4)
 676                 return -EINVAL;
 677
 678         /*
 679          * Step 2:
 680          *  Given pll_ps and ref_ps, find:
 681          *    pll_ps * 0.995 < pll_ps_calc < pll_ps * 1.005
 682          *  where { 1 < best_div1 < 32, 1 < best_mult < 256 }
 683          *    pll_ps_calc = best_div1 / (ref_ps * best_mult)
 684          */
 685         best_diff = 0x7fffffff;
 686         best_mult = 32;
 687         best_div1 = 255;
 688         for (t_div1 = 32; t_div1 > 1; t_div1 -= 1) {
 689                 u_int rr, t_mult, t_pll_ps;
 690                 int diff;
 691
 692                 /*
 693                  * Find the multiplier for this divisor
 694                  */
 695                 rr = ref_ps * t_div1;
 696                 t_mult = (rr + pll_ps / 2) / pll_ps;
 697
 698                 /*
 699                  * Is the multiplier within the correct range?
 700                  */
 701                 if (t_mult > 256 || t_mult < 2)
 702                         continue;
 703
 704                 /*
 705                  * Calculate the actual clock period from this multiplier
 706                  * and divisor, and estimate the error.
 707                  */
 708                 t_pll_ps = (rr + t_mult / 2) / t_mult;
 709                 diff = pll_ps - t_pll_ps;
 710                 if (diff < 0)
 711                         diff = -diff;
 712
 713                 if (diff < best_diff) {
 714                         best_diff = diff;
 715                         best_mult = t_mult;
 716                         best_div1 = t_div1;
 717                 }
 718
 719                 /*
 720                  * If we hit an exact value, there is no point in continuing.
 721                  */
 722                 if (diff == 0)
 723                         break;
 724         }
 725
 726         /*
 727          * Step 3:
 728          *  combine values
 729          */
 730         hw->clock_mult = best_mult - 1;
 731         hw->clock_div  = div2 << 6 | (best_div1 - 1);
 732
 733         vco = ref_ps * best_div1 / best_mult;
 734         if ((ref_ps == 40690) && (vco < 5556))
 735                 /* Set VFSEL when VCO > 180MHz (5.556 ps). */
 736                 hw->clock_div |= EXT_DCLK_DIV_VFSEL;
 737
 738         return 0;
 739 }
 740
 741 /*
 742  *    Set the User Defined Part of the Display
 743  */
 744 static int
 745 cyber2000fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 746 {
 747         struct cfb_info *cfb = (struct cfb_info *)info;
 748         struct par_info hw;
 749         unsigned int mem;
 750         int err;
 751
 752         var->transp.msb_right   = 0;
 753         var->red.msb_right      = 0;
 754         var->green.msb_right    = 0;
 755         var->blue.msb_right     = 0;
 756
 757         switch (var->bits_per_pixel) {
 758         case 8: /* PSEUDOCOLOUR, 256 */
 759                 var->transp.offset      = 0;
 760                 var->transp.length      = 0;
 761                 var->red.offset         = 0;
 762                 var->red.length         = 8;
 763                 var->green.offset       = 0;
 764                 var->green.length       = 8;
 765                 var->blue.offset        = 0;
 766                 var->blue.length        = 8;
 767                 break;
 768
 769         case 16:/* DIRECTCOLOUR, 64k or 32k */
 770                 switch (var->green.length) {
 771                 case 6: /* RGB565, 64k */
 772                         var->transp.offset      = 0;
 773                         var->transp.length      = 0;
 774                         var->red.offset         = 11;
 775                         var->red.length         = 5;
 776                         var->green.offset       = 5;
 777                         var->green.length       = 6;
 778                         var->blue.offset        = 0;
 779                         var->blue.length        = 5;
 780                         break;
 781
 782                 default:
 783                 case 5: /* RGB555, 32k */
 784                         var->transp.offset      = 0;
 785                         var->transp.length      = 0;
 786                         var->red.offset         = 10;
 787                         var->red.length         = 5;
 788                         var->green.offset       = 5;
 789                         var->green.length       = 5;
 790                         var->blue.offset        = 0;
 791                         var->blue.length        = 5;
 792                         break;
 793
 794                 case 4: /* RGB444, 4k + transparency? */
 795                         var->transp.offset      = 12;
 796                         var->transp.length      = 4;
 797                         var->red.offset         = 8;
 798                         var->red.length         = 4;
 799                         var->green.offset       = 4;
 800                         var->green.length       = 4;
 801                         var->blue.offset        = 0;
 802                         var->blue.length        = 4;
 803                         break;
 804                 }
 805                 break;
 806
 807         case 24:/* TRUECOLOUR, 16m */
 808                 var->transp.offset      = 0;
 809                 var->transp.length      = 0;
 810                 var->red.offset         = 16;
 811                 var->red.length         = 8;
 812                 var->green.offset       = 8;
 813                 var->green.length       = 8;
 814                 var->blue.offset        = 0;
 815                 var->blue.length        = 8;
 816                 break;
 817
 818         case 32:/* TRUECOLOUR, 16m */
 819                 var->transp.offset      = 24;
 820                 var->transp.length      = 8;
 821                 var->red.offset         = 16;
 822                 var->red.length         = 8;
 823                 var->green.offset       = 8;
 824                 var->green.length       = 8;
 825                 var->blue.offset        = 0;
 826                 var->blue.length        = 8;
 827                 break;
 828
 829         default:
 830                 return -EINVAL;
 831         }
 832
 833         mem = var->xres_virtual * var->yres_virtual * (var->bits_per_pixel / 8);
 834         if (mem > cfb->fb.fix.smem_len)
 835                 var->yres_virtual = cfb->fb.fix.smem_len * 8 /
 836                         (var->bits_per_pixel * var->xres_virtual);
 837
 838         if (var->yres > var->yres_virtual)
 839                 var->yres = var->yres_virtual;
 840         if (var->xres > var->xres_virtual)
 841                 var->xres = var->xres_virtual;
 842
 843         err = cyber2000fb_decode_clock(&hw, cfb, var);
 844         if (err)
 845                 return err;
 846
 847         err = cyber2000fb_decode_crtc(&hw, cfb, var);
 848         if (err)
 849                 return err;
 850
 851         return 0;
 852 }
 853
 854 static int cyber2000fb_set_par(struct fb_info *info)
 855 {
 856         struct cfb_info *cfb = (struct cfb_info *)info;
 857         struct fb_var_screeninfo *var = &cfb->fb.var;
 858         struct par_info hw;
 859         unsigned int mem;
 860
 861         hw.width = var->xres_virtual;
 862         hw.ramdac = RAMDAC_VREFEN | RAMDAC_DAC8BIT;
 863
 864         switch (var->bits_per_pixel) {
 865         case 8:
 866                 hw.co_pixfmt            = CO_PIXFMT_8BPP;
 867                 hw.pitch                = hw.width >> 3;
 868                 hw.extseqmisc           = EXT_SEQ_MISC_8;
 869                 break;
 870
 871         case 16:
 872                 hw.co_pixfmt            = CO_PIXFMT_16BPP;
 873                 hw.pitch                = hw.width >> 2;
 874
 875                 switch (var->green.length) {
 876                 case 6: /* RGB565, 64k */
 877                         hw.extseqmisc   = EXT_SEQ_MISC_16_RGB565;
 878                         break;
 879                 case 5: /* RGB555, 32k */
 880                         hw.extseqmisc   = EXT_SEQ_MISC_16_RGB555;
 881                         break;
 882                 case 4: /* RGB444, 4k + transparency? */
 883                         hw.extseqmisc   = EXT_SEQ_MISC_16_RGB444;
 884                         break;
 885                 default:
 886                         BUG();
 887                 }
 888         case 24:/* TRUECOLOUR, 16m */
 889                 hw.co_pixfmt            = CO_PIXFMT_24BPP;
 890                 hw.width                *= 3;
 891                 hw.pitch                = hw.width >> 3;
 892                 hw.ramdac               |= (RAMDAC_BYPASS | RAMDAC_RAMPWRDN);
 893                 hw.extseqmisc           = EXT_SEQ_MISC_24_RGB888;
 894                 break;
 895
 896         case 32:/* TRUECOLOUR, 16m */
 897                 hw.co_pixfmt            = CO_PIXFMT_32BPP;
 898                 hw.pitch                = hw.width >> 1;
 899                 hw.ramdac               |= (RAMDAC_BYPASS | RAMDAC_RAMPWRDN);
 900                 hw.extseqmisc           = EXT_SEQ_MISC_32;
 901                 break;
 902
 903         default:
 904                 BUG();
 905         }
 906
 907         /*
 908          * Sigh, this is absolutely disgusting, but caused by
 909          * the way the fbcon developers want to separate out
 910          * the "checking" and the "setting" of the video mode.
 911          *
 912          * If the mode is not suitable for the hardware here,
 913          * we can't prevent it being set by returning an error.
 914          *
 915          * In theory, since NetWinders contain just one VGA card,
 916          * we should never end up hitting this problem.
 917          */
 918         BUG_ON(cyber2000fb_decode_clock(&hw, cfb, var) != 0);
 919         BUG_ON(cyber2000fb_decode_crtc(&hw, cfb, var) != 0);
 920
 921         hw.width -= 1;
 922         hw.fetch = hw.pitch;
 923         if (!(cfb->mem_ctl2 & MEM_CTL2_64BIT))
 924                 hw.fetch <<= 1;
 925         hw.fetch += 1;
 926
 927         cfb->fb.fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
 928
 929         /*
 930          * Same here - if the size of the video mode exceeds the
 931          * available RAM, we can't prevent this mode being set.
 932          *
 933          * In theory, since NetWinders contain just one VGA card,
 934          * we should never end up hitting this problem.
 935          */
 936         mem = cfb->fb.fix.line_length * var->yres_virtual;
 937         BUG_ON(mem > cfb->fb.fix.smem_len);
 938
 939         /*
 940          * 8bpp displays are always pseudo colour.  16bpp and above
 941          * are direct colour or true colour, depending on whether
 942          * the RAMDAC palettes are bypassed.  (Direct colour has
 943          * palettes, true colour does not.)
 944          */
 945         if (var->bits_per_pixel == 8)
 946                 cfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
 947         else if (hw.ramdac & RAMDAC_BYPASS)
 948                 cfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
 949         else
 950                 cfb->fb.fix.visual = FB_VISUAL_DIRECTCOLOR;
 951
 952         cyber2000fb_set_timing(cfb, &hw);
 953         cyber2000fb_update_start(cfb, var);
 954
 955         return 0;
 956 }
 957
 958
 959 /*
 960  *    Pan or Wrap the Display
 961  */
 962 static int
 963 cyber2000fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
 964 {
 965         struct cfb_info *cfb = (struct cfb_info *)info;
 966
 967         if (cyber2000fb_update_start(cfb, var))
 968                 return -EINVAL;
 969
 970         cfb->fb.var.xoffset = var->xoffset;
 971         cfb->fb.var.yoffset = var->yoffset;
 972
 973         if (var->vmode & FB_VMODE_YWRAP) {
 974                 cfb->fb.var.vmode |= FB_VMODE_YWRAP;
 975         } else {
 976                 cfb->fb.var.vmode &= ~FB_VMODE_YWRAP;
 977         }
 978
 979         return 0;
 980 }
 981
 982 /*
 983  *    (Un)Blank the display.
 984  *
 985  *  Blank the screen if blank_mode != 0, else unblank. If
 986  *  blank == NULL then the caller blanks by setting the CLUT
 987  *  (Color Look Up Table) to all black. Return 0 if blanking
 988  *  succeeded, != 0 if un-/blanking failed due to e.g. a
 989  *  video mode which doesn't support it. Implements VESA
 990  *  suspend and powerdown modes on hardware that supports
 991  *  disabling hsync/vsync:
 992  *    blank_mode == 2: suspend vsync
 993  *    blank_mode == 3: suspend hsync
 994  *    blank_mode == 4: powerdown
 995  *
 996  *  wms...Enable VESA DMPS compatible powerdown mode
 997  *  run "setterm -powersave powerdown" to take advantage
 998  */
 999 static int cyber2000fb_blank(int blank, struct fb_info *info)
1000 {
1001         struct cfb_info *cfb = (struct cfb_info *)info;
1002         unsigned int sync = 0;
1003         int i;
1004
1005         switch (blank) {
1006         case FB_BLANK_POWERDOWN:        /* powerdown - both sync lines down */
1007                 sync = EXT_SYNC_CTL_VS_0 | EXT_SYNC_CTL_HS_0;
1008                 break;
1009         case FB_BLANK_HSYNC_SUSPEND:    /* hsync off */
1010                 sync = EXT_SYNC_CTL_VS_NORMAL | EXT_SYNC_CTL_HS_0;
1011                 break;
1012         case FB_BLANK_VSYNC_SUSPEND:    /* vsync off */
1013                 sync = EXT_SYNC_CTL_VS_0 | EXT_SYNC_CTL_HS_NORMAL;
1014                 break;
1015         case FB_BLANK_NORMAL:           /* soft blank */
1016         default: /* unblank */
1017                 break;
1018         }
1019
1020         cyber2000_grphw(EXT_SYNC_CTL, sync, cfb);
1021
1022         if (blank <= 1) {
1023                 /* turn on ramdacs */
1024                 cfb->ramdac_powerdown &= ~(RAMDAC_DACPWRDN | RAMDAC_BYPASS | RAMDAC_RAMPWRDN);
1025                 cyber2000fb_write_ramdac_ctrl(cfb);
1026         }
1027
1028         /*
1029          * Soft blank/unblank the display.
1030          */
1031         if (blank) {    /* soft blank */
1032                 for (i = 0; i < NR_PALETTE; i++) {
1033                         cyber2000fb_writeb(i, 0x3c8, cfb);
1034                         cyber2000fb_writeb(0, 0x3c9, cfb);
1035                         cyber2000fb_writeb(0, 0x3c9, cfb);
1036                         cyber2000fb_writeb(0, 0x3c9, cfb);
1037                 }
1038         } else {        /* unblank */
1039                 for (i = 0; i < NR_PALETTE; i++) {
1040                         cyber2000fb_writeb(i, 0x3c8, cfb);
1041                         cyber2000fb_writeb(cfb->palette[i].red, 0x3c9, cfb);
1042                         cyber2000fb_writeb(cfb->palette[i].green, 0x3c9, cfb);
1043                         cyber2000fb_writeb(cfb->palette[i].blue, 0x3c9, cfb);
1044                 }
1045         }
1046
1047         if (blank >= 2) {
1048                 /* turn off ramdacs */
1049                 cfb->ramdac_powerdown |= RAMDAC_DACPWRDN | RAMDAC_BYPASS | RAMDAC_RAMPWRDN;
1050                 cyber2000fb_write_ramdac_ctrl(cfb);
1051         }
1052
1053         return 0;
1054 }
1055
1056 static struct fb_ops cyber2000fb_ops = {
1057         .owner          = THIS_MODULE,
1058         .fb_check_var   = cyber2000fb_check_var,
1059         .fb_set_par     = cyber2000fb_set_par,
1060         .fb_setcolreg   = cyber2000fb_setcolreg,
1061         .fb_blank       = cyber2000fb_blank,
1062         .fb_pan_display = cyber2000fb_pan_display,
1063         .fb_fillrect    = cyber2000fb_fillrect,
1064         .fb_copyarea    = cyber2000fb_copyarea,
1065         .fb_imageblit   = cyber2000fb_imageblit,
1066         .fb_sync        = cyber2000fb_sync,
1067 };
1068
1069 /*
1070  * This is the only "static" reference to the internal data structures
1071  * of this driver.  It is here solely at the moment to support the other
1072  * CyberPro modules external to this driver.
1073  */
1074 static struct cfb_info          *int_cfb_info;
1075
1076 /*
1077  * Enable access to the extended registers
1078  */
1079 void cyber2000fb_enable_extregs(struct cfb_info *cfb)
1080 {
1081         cfb->func_use_count += 1;
1082
1083         if (cfb->func_use_count == 1) {
1084                 int old;
1085
1086                 old = cyber2000_grphr(EXT_FUNC_CTL, cfb);
1087                 old |= EXT_FUNC_CTL_EXTREGENBL;
1088                 cyber2000_grphw(EXT_FUNC_CTL, old, cfb);
1089         }
1090 }
1091
1092 /*
1093  * Disable access to the extended registers
1094  */
1095 void cyber2000fb_disable_extregs(struct cfb_info *cfb)
1096 {
1097         if (cfb->func_use_count == 1) {
1098                 int old;
1099
1100                 old = cyber2000_grphr(EXT_FUNC_CTL, cfb);
1101                 old &= ~EXT_FUNC_CTL_EXTREGENBL;
1102                 cyber2000_grphw(EXT_FUNC_CTL, old, cfb);
1103         }
1104
1105         if (cfb->func_use_count == 0)
1106                 printk(KERN_ERR "disable_extregs: count = 0\n");
1107         else
1108                 cfb->func_use_count -= 1;
1109 }
1110
1111 void cyber2000fb_get_fb_var(struct cfb_info *cfb, struct fb_var_screeninfo *var)
1112 {
1113         memcpy(var, &cfb->fb.var, sizeof(struct fb_var_screeninfo));
1114 }
1115
1116 /*
1117  * Attach a capture/tv driver to the core CyberX0X0 driver.
1118  */
1119 int cyber2000fb_attach(struct cyberpro_info *info, int idx)
1120 {
1121         if (int_cfb_info != NULL) {
1122                 info->dev             = int_cfb_info->dev;
1123                 info->regs            = int_cfb_info->regs;
1124                 info->fb              = int_cfb_info->fb.screen_base;
1125                 info->fb_size         = int_cfb_info->fb.fix.smem_len;
1126                 info->enable_extregs  = cyber2000fb_enable_extregs;
1127                 info->disable_extregs = cyber2000fb_disable_extregs;
1128                 info->info            = int_cfb_info;
1129
1130                 strlcpy(info->dev_name, int_cfb_info->fb.fix.id, sizeof(info->dev_name));
1131         }
1132
1133         return int_cfb_info != NULL;
1134 }
1135
1136 /*
1137  * Detach a capture/tv driver from the core CyberX0X0 driver.
1138  */
1139 void cyber2000fb_detach(int idx)
1140 {
1141 }
1142
1143 EXPORT_SYMBOL(cyber2000fb_attach);
1144 EXPORT_SYMBOL(cyber2000fb_detach);
1145 EXPORT_SYMBOL(cyber2000fb_enable_extregs);
1146 EXPORT_SYMBOL(cyber2000fb_disable_extregs);
1147 EXPORT_SYMBOL(cyber2000fb_get_fb_var);
1148
1149 /*
1150  * These parameters give
1151  * 640x480, hsync 31.5kHz, vsync 60Hz
1152  */
1153 static struct fb_videomode __devinitdata cyber2000fb_default_mode = {
1154         .refresh        = 60,
1155         .xres           = 640,
1156         .yres           = 480,
1157         .pixclock       = 39722,
1158         .left_margin    = 56,
1159         .right_margin   = 16,
1160         .upper_margin   = 34,
1161         .lower_margin   = 9,
1162         .hsync_len      = 88,
1163         .vsync_len      = 2,
1164         .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1165         .vmode          = FB_VMODE_NONINTERLACED
1166 };
1167
1168 static char igs_regs[] = {
1169         EXT_CRT_IRQ,            0,
1170         EXT_CRT_TEST,           0,
1171         EXT_SYNC_CTL,           0,
1172         EXT_SEG_WRITE_PTR,      0,
1173         EXT_SEG_READ_PTR,       0,
1174         EXT_BIU_MISC,           EXT_BIU_MISC_LIN_ENABLE |
1175                                 EXT_BIU_MISC_COP_ENABLE |
1176                                 EXT_BIU_MISC_COP_BFC,
1177         EXT_FUNC_CTL,           0,
1178         CURS_H_START,           0,
1179         CURS_H_START + 1,       0,
1180         CURS_H_PRESET,          0,
1181         CURS_V_START,           0,
1182         CURS_V_START + 1,       0,
1183         CURS_V_PRESET,          0,
1184         CURS_CTL,               0,
1185         EXT_ATTRIB_CTL,         EXT_ATTRIB_CTL_EXT,
1186         EXT_OVERSCAN_RED,       0,
1187         EXT_OVERSCAN_GREEN,     0,
1188         EXT_OVERSCAN_BLUE,      0,
1189
1190         /* some of these are questionable when we have a BIOS */
1191         EXT_MEM_CTL0,           EXT_MEM_CTL0_7CLK |
1192                                 EXT_MEM_CTL0_RAS_1 |
1193                                 EXT_MEM_CTL0_MULTCAS,
1194         EXT_HIDDEN_CTL1,        0x30,
1195         EXT_FIFO_CTL,           0x0b,
1196         EXT_FIFO_CTL + 1,       0x17,
1197         0x76,                   0x00,
1198         EXT_HIDDEN_CTL4,        0xc8
1199 };
1200
1201 /*
1202  * Initialise the CyberPro hardware.  On the CyberPro5XXXX,
1203  * ensure that we're using the correct PLL (5XXX's may be
1204  * programmed to use an additional set of PLLs.)
1205  */
1206 static void cyberpro_init_hw(struct cfb_info *cfb)
1207 {
1208         int i;
1209
1210         for (i = 0; i < sizeof(igs_regs); i += 2)
1211                 cyber2000_grphw(igs_regs[i], igs_regs[i+1], cfb);
1212
1213         if (cfb->id == ID_CYBERPRO_5000) {
1214                 unsigned char val;
1215                 cyber2000fb_writeb(0xba, 0x3ce, cfb);
1216                 val = cyber2000fb_readb(0x3cf, cfb) & 0x80;
1217                 cyber2000fb_writeb(val, 0x3cf, cfb);
1218         }
1219 }
1220
1221 static struct cfb_info * __devinit
1222 cyberpro_alloc_fb_info(unsigned int id, char *name)
1223 {
1224         struct cfb_info *cfb;
1225
1226         cfb = kmalloc(sizeof(struct cfb_info), GFP_KERNEL);
1227         if (!cfb)
1228                 return NULL;
1229
1230         memset(cfb, 0, sizeof(struct cfb_info));
1231
1232         cfb->id                 = id;
1233
1234         if (id == ID_CYBERPRO_5000)
1235                 cfb->ref_ps     = 40690; // 24.576 MHz
1236         else
1237                 cfb->ref_ps     = 69842; // 14.31818 MHz (69841?)
1238
1239         cfb->divisors[0]        = 1;
1240         cfb->divisors[1]        = 2;
1241         cfb->divisors[2]        = 4;
1242
1243         if (id == ID_CYBERPRO_2000)
1244                 cfb->divisors[3] = 8;
1245         else
1246                 cfb->divisors[3] = 6;
1247
1248         strcpy(cfb->fb.fix.id, name);
1249
1250         cfb->fb.fix.type        = FB_TYPE_PACKED_PIXELS;
1251         cfb->fb.fix.type_aux    = 0;
1252         cfb->fb.fix.xpanstep    = 0;
1253         cfb->fb.fix.ypanstep    = 1;
1254         cfb->fb.fix.ywrapstep   = 0;
1255
1256         switch (id) {
1257         case ID_IGA_1682:
1258                 cfb->fb.fix.accel = 0;
1259                 break;
1260
1261         case ID_CYBERPRO_2000:
1262                 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER2000;
1263                 break;
1264
1265         case ID_CYBERPRO_2010:
1266                 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER2010;
1267                 break;
1268
1269         case ID_CYBERPRO_5000:
1270                 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER5000;
1271                 break;
1272         }
1273
1274         cfb->fb.var.nonstd      = 0;
1275         cfb->fb.var.activate    = FB_ACTIVATE_NOW;
1276         cfb->fb.var.height      = -1;
1277         cfb->fb.var.width       = -1;
1278         cfb->fb.var.accel_flags = FB_ACCELF_TEXT;
1279
1280         cfb->fb.fbops           = &cyber2000fb_ops;
1281         cfb->fb.flags           = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1282         cfb->fb.pseudo_palette  = cfb->pseudo_palette;
1283
1284         fb_alloc_cmap(&cfb->fb.cmap, NR_PALETTE, 0);
1285
1286         return cfb;
1287 }
1288
1289 static void
1290 cyberpro_free_fb_info(struct cfb_info *cfb)
1291 {
1292         if (cfb) {
1293                 /*
1294                  * Free the colourmap
1295                  */
1296                 fb_alloc_cmap(&cfb->fb.cmap, 0, 0);
1297
1298                 kfree(cfb);
1299         }
1300 }
1301
1302 /*
1303  * Parse Cyber2000fb options.  Usage:
1304  *  video=cyber2000:font:fontname
1305  */
1306 #ifndef MODULE
1307 static int
1308 cyber2000fb_setup(char *options)
1309 {
1310         char *opt;
1311
1312         if (!options || !*options)
1313                 return 0;
1314
1315         while ((opt = strsep(&options, ",")) != NULL) {
1316                 if (!*opt)
1317                         continue;
1318
1319                 if (strncmp(opt, "font:", 5) == 0) {
1320                         static char default_font_storage[40];
1321
1322                         strlcpy(default_font_storage, opt + 5, sizeof(default_font_storage));
1323                         default_font = default_font_storage;
1324                         continue;
1325                 }
1326
1327                 printk(KERN_ERR "CyberPro20x0: unknown parameter: %s\n", opt);
1328         }
1329         return 0;
1330 }
1331 #endif  /*  MODULE  */
1332
1333 /*
1334  * The CyberPro chips can be placed on many different bus types.
1335  * This probe function is common to all bus types.  The bus-specific
1336  * probe function is expected to have:
1337  *  - enabled access to the linear memory region
1338  *  - memory mapped access to the registers
1339  *  - initialised mem_ctl1 and mem_ctl2 appropriately.
1340  */
1341 static int __devinit cyberpro_common_probe(struct cfb_info *cfb)
1342 {
1343         u_long smem_size;
1344         u_int h_sync, v_sync;
1345         int err;
1346
1347         cyberpro_init_hw(cfb);
1348
1349         /*
1350          * Get the video RAM size and width from the VGA register.
1351          * This should have been already initialised by the BIOS,
1352          * but if it's garbage, claim default 1MB VRAM (woody)
1353          */
1354         cfb->mem_ctl1 = cyber2000_grphr(EXT_MEM_CTL1, cfb);
1355         cfb->mem_ctl2 = cyber2000_grphr(EXT_MEM_CTL2, cfb);
1356
1357         /*
1358          * Determine the size of the memory.
1359          */
1360         switch (cfb->mem_ctl2 & MEM_CTL2_SIZE_MASK) {
1361         case MEM_CTL2_SIZE_4MB: smem_size = 0x00400000; break;
1362         case MEM_CTL2_SIZE_2MB: smem_size = 0x00200000; break;
1363         case MEM_CTL2_SIZE_1MB: smem_size = 0x00100000; break;
1364         default:                smem_size = 0x00100000; break;
1365         }
1366
1367         cfb->fb.fix.smem_len   = smem_size;
1368         cfb->fb.fix.mmio_len   = MMIO_SIZE;
1369         cfb->fb.screen_base    = cfb->region;
1370
1371         err = -EINVAL;
1372         if (!fb_find_mode(&cfb->fb.var, &cfb->fb, NULL, NULL, 0,
1373                           &cyber2000fb_default_mode, 8)) {
1374                 printk("%s: no valid mode found\n", cfb->fb.fix.id);
1375                 goto failed;
1376         }
1377
1378         cfb->fb.var.yres_virtual = cfb->fb.fix.smem_len * 8 /
1379                         (cfb->fb.var.bits_per_pixel * cfb->fb.var.xres_virtual);
1380
1381         if (cfb->fb.var.yres_virtual < cfb->fb.var.yres)
1382                 cfb->fb.var.yres_virtual = cfb->fb.var.yres;
1383
1384 //      fb_set_var(&cfb->fb.var, -1, &cfb->fb);
1385
1386         /*
1387          * Calculate the hsync and vsync frequencies.  Note that
1388          * we split the 1e12 constant up so that we can preserve
1389          * the precision and fit the results into 32-bit registers.
1390          *  (1953125000 * 512 = 1e12)
1391          */
1392         h_sync = 1953125000 / cfb->fb.var.pixclock;
1393         h_sync = h_sync * 512 / (cfb->fb.var.xres + cfb->fb.var.left_margin +
1394                  cfb->fb.var.right_margin + cfb->fb.var.hsync_len);
1395         v_sync = h_sync / (cfb->fb.var.yres + cfb->fb.var.upper_margin +
1396                  cfb->fb.var.lower_margin + cfb->fb.var.vsync_len);
1397
1398         printk(KERN_INFO "%s: %dKiB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
1399                 cfb->fb.fix.id, cfb->fb.fix.smem_len >> 10,
1400                 cfb->fb.var.xres, cfb->fb.var.yres,
1401                 h_sync / 1000, h_sync % 1000, v_sync);
1402
1403         if (cfb->dev)
1404                 cfb->fb.device = &cfb->dev->dev;
1405         err = register_framebuffer(&cfb->fb);
1406
1407 failed:
1408         return err;
1409 }
1410
1411 static void cyberpro_common_resume(struct cfb_info *cfb)
1412 {
1413         cyberpro_init_hw(cfb);
1414
1415         /*
1416          * Reprogram the MEM_CTL1 and MEM_CTL2 registers
1417          */
1418         cyber2000_grphw(EXT_MEM_CTL1, cfb->mem_ctl1, cfb);
1419         cyber2000_grphw(EXT_MEM_CTL2, cfb->mem_ctl2, cfb);
1420
1421         /*
1422          * Restore the old video mode and the palette.
1423          * We also need to tell fbcon to redraw the console.
1424          */
1425         cyber2000fb_set_par(&cfb->fb);
1426 }
1427
1428 #ifdef CONFIG_ARCH_SHARK
1429
1430 #include <asm/arch/hardware.h>
1431
1432 static int __devinit
1433 cyberpro_vl_probe(void)
1434 {
1435         struct cfb_info *cfb;
1436         int err = -ENOMEM;
1437
1438         if (!request_mem_region(FB_START,FB_SIZE,"CyberPro2010")) return err;
1439
1440         cfb = cyberpro_alloc_fb_info(ID_CYBERPRO_2010, "CyberPro2010");
1441         if (!cfb)
1442                 goto failed_release;
1443
1444         cfb->dev = NULL;
1445         cfb->region = ioremap(FB_START,FB_SIZE);
1446         if (!cfb->region)
1447                 goto failed_ioremap;
1448
1449         cfb->regs = cfb->region + MMIO_OFFSET;
1450         cfb->fb.fix.mmio_start = FB_START + MMIO_OFFSET;
1451         cfb->fb.fix.smem_start = FB_START;
1452
1453         /*
1454          * Bring up the hardware.  This is expected to enable access
1455          * to the linear memory region, and allow access to the memory
1456          * mapped registers.  Also, mem_ctl1 and mem_ctl2 must be
1457          * initialised.
1458          */
1459         cyber2000fb_writeb(0x18, 0x46e8, cfb);
1460         cyber2000fb_writeb(0x01, 0x102, cfb);
1461         cyber2000fb_writeb(0x08, 0x46e8, cfb);
1462         cyber2000fb_writeb(EXT_BIU_MISC, 0x3ce, cfb);
1463         cyber2000fb_writeb(EXT_BIU_MISC_LIN_ENABLE, 0x3cf, cfb);
1464
1465         cfb->mclk_mult = 0xdb;
1466         cfb->mclk_div  = 0x54;
1467
1468         err = cyberpro_common_probe(cfb);
1469         if (err)
1470                 goto failed;
1471
1472         if (int_cfb_info == NULL)
1473                 int_cfb_info = cfb;
1474
1475         return 0;
1476
1477 failed:
1478         iounmap(cfb->region);
1479 failed_ioremap:
1480         cyberpro_free_fb_info(cfb);
1481 failed_release:
1482         release_mem_region(FB_START,FB_SIZE);
1483
1484         return err;
1485 }
1486 #endif /* CONFIG_ARCH_SHARK */
1487
1488 /*
1489  * PCI specific support.
1490  */
1491 #ifdef CONFIG_PCI
1492 /*
1493  * We need to wake up the CyberPro, and make sure its in linear memory
1494  * mode.  Unfortunately, this is specific to the platform and card that
1495  * we are running on.
1496  *
1497  * On x86 and ARM, should we be initialising the CyberPro first via the
1498  * IO registers, and then the MMIO registers to catch all cases?  Can we
1499  * end up in the situation where the chip is in MMIO mode, but not awake
1500  * on an x86 system?
1501  */
1502 static int cyberpro_pci_enable_mmio(struct cfb_info *cfb)
1503 {
1504         unsigned char val;
1505
1506 #if defined(__sparc_v9__)
1507 #error "You lose, consult DaveM."
1508 #elif defined(__sparc__)
1509         /*
1510          * SPARC does not have an "outb" instruction, so we generate
1511          * I/O cycles storing into a reserved memory space at
1512          * physical address 0x3000000
1513          */
1514         unsigned char __iomem *iop;
1515
1516         iop = ioremap(0x3000000, 0x5000);
1517         if (iop == NULL) {
1518                 prom_printf("iga5000: cannot map I/O\n");
1519                 return -ENOMEM;
1520         }
1521
1522         writeb(0x18, iop + 0x46e8);
1523         writeb(0x01, iop + 0x102);
1524         writeb(0x08, iop + 0x46e8);
1525         writeb(EXT_BIU_MISC, iop + 0x3ce);
1526         writeb(EXT_BIU_MISC_LIN_ENABLE, iop + 0x3cf);
1527
1528         iounmap(iop);
1529 #else
1530         /*
1531          * Most other machine types are "normal", so
1532          * we use the standard IO-based wakeup.
1533          */
1534         outb(0x18, 0x46e8);
1535         outb(0x01, 0x102);
1536         outb(0x08, 0x46e8);
1537         outb(EXT_BIU_MISC, 0x3ce);
1538         outb(EXT_BIU_MISC_LIN_ENABLE, 0x3cf);
1539 #endif
1540
1541         /*
1542          * Allow the CyberPro to accept PCI burst accesses
1543          */
1544         val = cyber2000_grphr(EXT_BUS_CTL, cfb);
1545         if (!(val & EXT_BUS_CTL_PCIBURST_WRITE)) {
1546                 printk(KERN_INFO "%s: enabling PCI bursts\n", cfb->fb.fix.id);
1547
1548                 val |= EXT_BUS_CTL_PCIBURST_WRITE;
1549
1550                 if (cfb->id == ID_CYBERPRO_5000)
1551                         val |= EXT_BUS_CTL_PCIBURST_READ;
1552
1553                 cyber2000_grphw(EXT_BUS_CTL, val, cfb);
1554         }
1555
1556         return 0;
1557 }
1558
1559 static int __devinit
1560 cyberpro_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1561 {
1562         struct cfb_info *cfb;
1563         char name[16];
1564         int err;
1565
1566         sprintf(name, "CyberPro%4X", id->device);
1567
1568         err = pci_enable_device(dev);
1569         if (err)
1570                 return err;
1571
1572         err = pci_request_regions(dev, name);
1573         if (err)
1574                 return err;
1575
1576         err = -ENOMEM;
1577         cfb = cyberpro_alloc_fb_info(id->driver_data, name);
1578         if (!cfb)
1579                 goto failed_release;
1580
1581         cfb->dev = dev;
1582         cfb->region = ioremap(pci_resource_start(dev, 0),
1583                               pci_resource_len(dev, 0));
1584         if (!cfb->region)
1585                 goto failed_ioremap;
1586
1587         cfb->regs = cfb->region + MMIO_OFFSET;
1588         cfb->fb.fix.mmio_start = pci_resource_start(dev, 0) + MMIO_OFFSET;
1589         cfb->fb.fix.smem_start = pci_resource_start(dev, 0);
1590
1591         /*
1592          * Bring up the hardware.  This is expected to enable access
1593          * to the linear memory region, and allow access to the memory
1594          * mapped registers.  Also, mem_ctl1 and mem_ctl2 must be
1595          * initialised.
1596          */
1597         err = cyberpro_pci_enable_mmio(cfb);
1598         if (err)
1599                 goto failed;
1600
1601         /*
1602          * Use MCLK from BIOS. FIXME: what about hotplug?
1603          */
1604         cfb->mclk_mult = cyber2000_grphr(EXT_MCLK_MULT, cfb);
1605         cfb->mclk_div  = cyber2000_grphr(EXT_MCLK_DIV, cfb);
1606
1607 #ifdef __arm__
1608         /*
1609          * MCLK on the NetWinder and the Shark is fixed at 75MHz
1610          */
1611         if (machine_is_netwinder()) {
1612                 cfb->mclk_mult = 0xdb;
1613                 cfb->mclk_div  = 0x54;
1614         }
1615 #endif
1616
1617         err = cyberpro_common_probe(cfb);
1618         if (err)
1619                 goto failed;
1620
1621         /*
1622          * Our driver data
1623          */
1624         pci_set_drvdata(dev, cfb);
1625         if (int_cfb_info == NULL)
1626                 int_cfb_info = cfb;
1627
1628         return 0;
1629
1630 failed:
1631         iounmap(cfb->region);
1632 failed_ioremap:
1633         cyberpro_free_fb_info(cfb);
1634 failed_release:
1635         pci_release_regions(dev);
1636
1637         return err;
1638 }
1639
1640 static void __devexit cyberpro_pci_remove(struct pci_dev *dev)
1641 {
1642         struct cfb_info *cfb = pci_get_drvdata(dev);
1643
1644         if (cfb) {
1645                 /*
1646                  * If unregister_framebuffer fails, then
1647                  * we will be leaving hooks that could cause
1648                  * oopsen laying around.
1649                  */
1650                 if (unregister_framebuffer(&cfb->fb))
1651                         printk(KERN_WARNING "%s: danger Will Robinson, "
1652                                 "danger danger!  Oopsen imminent!\n",
1653                                 cfb->fb.fix.id);
1654                 iounmap(cfb->region);
1655                 cyberpro_free_fb_info(cfb);
1656
1657                 /*
1658                  * Ensure that the driver data is no longer
1659                  * valid.
1660                  */
1661                 pci_set_drvdata(dev, NULL);
1662                 if (cfb == int_cfb_info)
1663                         int_cfb_info = NULL;
1664
1665                 pci_release_regions(dev);
1666         }
1667 }
1668
1669 static int cyberpro_pci_suspend(struct pci_dev *dev, pm_message_t state)
1670 {
1671         return 0;
1672 }
1673
1674 /*
1675  * Re-initialise the CyberPro hardware
1676  */
1677 static int cyberpro_pci_resume(struct pci_dev *dev)
1678 {
1679         struct cfb_info *cfb = pci_get_drvdata(dev);
1680
1681         if (cfb) {
1682                 cyberpro_pci_enable_mmio(cfb);
1683                 cyberpro_common_resume(cfb);
1684         }
1685
1686         return 0;
1687 }
1688
1689 static struct pci_device_id cyberpro_pci_table[] = {
1690 //      Not yet
1691 //      { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_1682,
1692 //              PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_IGA_1682 },
1693         { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_2000,
1694                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_2000 },
1695         { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_2010,
1696                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_2010 },
1697         { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5000,
1698                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_5000 },
1699         { 0, }
1700 };
1701
1702 MODULE_DEVICE_TABLE(pci,cyberpro_pci_table);
1703
1704 static struct pci_driver cyberpro_driver = {
1705         .name           = "CyberPro",
1706         .probe          = cyberpro_pci_probe,
1707         .remove         = __devexit_p(cyberpro_pci_remove),
1708         .suspend        = cyberpro_pci_suspend,
1709         .resume         = cyberpro_pci_resume,
1710         .id_table       = cyberpro_pci_table
1711 };
1712 #endif
1713
1714 /*
1715  * I don't think we can use the "module_init" stuff here because
1716  * the fbcon stuff may not be initialised yet.  Hence the #ifdef
1717  * around module_init.
1718  *
1719  * Tony: "module_init" is now required
1720  */
1721 static int __init cyber2000fb_init(void)
1722 {
1723         int ret = -1, err;
1724
1725 #ifndef MODULE
1726         char *option = NULL;
1727
1728         if (fb_get_options("cyber2000fb", &option))
1729                 return -ENODEV;
1730         cyber2000fb_setup(option);
1731 #endif
1732
1733 #ifdef CONFIG_ARCH_SHARK
1734         err = cyberpro_vl_probe();
1735         if (!err) {
1736                 ret = 0;
1737                 __module_get(THIS_MODULE);
1738         }
1739 #endif
1740 #ifdef CONFIG_PCI
1741         err = pci_register_driver(&cyberpro_driver);
1742         if (!err)
1743                 ret = 0;
1744 #endif
1745
1746         return ret ? err : 0;
1747 }
1748
1749 static void __exit cyberpro_exit(void)
1750 {
1751         pci_unregister_driver(&cyberpro_driver);
1752 }
1753
1754 module_init(cyber2000fb_init);
1755 module_exit(cyberpro_exit);
1756
1757 MODULE_AUTHOR("Russell King");
1758 MODULE_DESCRIPTION("CyberPro 2000, 2010 and 5000 framebuffer driver");
1759 MODULE_LICENSE("GPL");