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   1 /*
   2  * xHCI host controller driver
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/usb.h>
  24 #include <linux/pci.h>
  25 #include <linux/slab.h>
  26 #include <linux/dmapool.h>
  27
  28 #include "xhci.h"
  29
  30 /*
  31  * Allocates a generic ring segment from the ring pool, sets the dma address,
  32  * initializes the segment to zero, and sets the private next pointer to NULL.
  33  *
  34  * Section 4.11.1.1:
  35  * "All components of all Command and Transfer TRBs shall be initialized to '0'"
  36  */
  37 static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, gfp_t flags)
  38 {
  39         struct xhci_segment *seg;
  40         dma_addr_t      dma;
  41
  42         seg = kzalloc(sizeof *seg, flags);
  43         if (!seg)
  44                 return 0;
  45         xhci_dbg(xhci, "Allocating priv segment structure at %p\n", seg);
  46
  47         seg->trbs = dma_pool_alloc(xhci->segment_pool, flags, &dma);
  48         if (!seg->trbs) {
  49                 kfree(seg);
  50                 return 0;
  51         }
  52         xhci_dbg(xhci, "// Allocating segment at %p (virtual) 0x%llx (DMA)\n",
  53                         seg->trbs, (unsigned long long)dma);
  54
  55         memset(seg->trbs, 0, SEGMENT_SIZE);
  56         seg->dma = dma;
  57         seg->next = NULL;
  58
  59         return seg;
  60 }
  61
  62 static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg)
  63 {
  64         if (!seg)
  65                 return;
  66         if (seg->trbs) {
  67                 xhci_dbg(xhci, "Freeing DMA segment at %p (virtual) 0x%llx (DMA)\n",
  68                                 seg->trbs, (unsigned long long)seg->dma);
  69                 dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma);
  70                 seg->trbs = NULL;
  71         }
  72         xhci_dbg(xhci, "Freeing priv segment structure at %p\n", seg);
  73         kfree(seg);
  74 }
  75
  76 /*
  77  * Make the prev segment point to the next segment.
  78  *
  79  * Change the last TRB in the prev segment to be a Link TRB which points to the
  80  * DMA address of the next segment.  The caller needs to set any Link TRB
  81  * related flags, such as End TRB, Toggle Cycle, and no snoop.
  82  */
  83 static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev,
  84                 struct xhci_segment *next, bool link_trbs)
  85 {
  86         u32 val;
  87
  88         if (!prev || !next)
  89                 return;
  90         prev->next = next;
  91         if (link_trbs) {
  92                 prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = next->dma;
  93
  94                 /* Set the last TRB in the segment to have a TRB type ID of Link TRB */
  95                 val = prev->trbs[TRBS_PER_SEGMENT-1].link.control;
  96                 val &= ~TRB_TYPE_BITMASK;
  97                 val |= TRB_TYPE(TRB_LINK);
  98                 /* Always set the chain bit with 0.95 hardware */
  99                 if (xhci_link_trb_quirk(xhci))
 100                         val |= TRB_CHAIN;
 101                 prev->trbs[TRBS_PER_SEGMENT-1].link.control = val;
 102         }
 103         xhci_dbg(xhci, "Linking segment 0x%llx to segment 0x%llx (DMA)\n",
 104                         (unsigned long long)prev->dma,
 105                         (unsigned long long)next->dma);
 106 }
 107
 108 /* XXX: Do we need the hcd structure in all these functions? */
 109 void xhci_ring_free(struct xhci_hcd *xhci, struct xhci_ring *ring)
 110 {
 111         struct xhci_segment *seg;
 112         struct xhci_segment *first_seg;
 113
 114         if (!ring || !ring->first_seg)
 115                 return;
 116         first_seg = ring->first_seg;
 117         seg = first_seg->next;
 118         xhci_dbg(xhci, "Freeing ring at %p\n", ring);
 119         while (seg != first_seg) {
 120                 struct xhci_segment *next = seg->next;
 121                 xhci_segment_free(xhci, seg);
 122                 seg = next;
 123         }
 124         xhci_segment_free(xhci, first_seg);
 125         ring->first_seg = NULL;
 126         kfree(ring);
 127 }
 128
 129 static void xhci_initialize_ring_info(struct xhci_ring *ring)
 130 {
 131         /* The ring is empty, so the enqueue pointer == dequeue pointer */
 132         ring->enqueue = ring->first_seg->trbs;
 133         ring->enq_seg = ring->first_seg;
 134         ring->dequeue = ring->enqueue;
 135         ring->deq_seg = ring->first_seg;
 136         /* The ring is initialized to 0. The producer must write 1 to the cycle
 137          * bit to handover ownership of the TRB, so PCS = 1.  The consumer must
 138          * compare CCS to the cycle bit to check ownership, so CCS = 1.
 139          */
 140         ring->cycle_state = 1;
 141         /* Not necessary for new rings, but needed for re-initialized rings */
 142         ring->enq_updates = 0;
 143         ring->deq_updates = 0;
 144 }
 145
 146 /**
 147  * Create a new ring with zero or more segments.
 148  *
 149  * Link each segment together into a ring.
 150  * Set the end flag and the cycle toggle bit on the last segment.
 151  * See section 4.9.1 and figures 15 and 16.
 152  */
 153 static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci,
 154                 unsigned int num_segs, bool link_trbs, gfp_t flags)
 155 {
 156         struct xhci_ring        *ring;
 157         struct xhci_segment     *prev;
 158
 159         ring = kzalloc(sizeof *(ring), flags);
 160         xhci_dbg(xhci, "Allocating ring at %p\n", ring);
 161         if (!ring)
 162                 return 0;
 163
 164         INIT_LIST_HEAD(&ring->td_list);
 165         if (num_segs == 0)
 166                 return ring;
 167
 168         ring->first_seg = xhci_segment_alloc(xhci, flags);
 169         if (!ring->first_seg)
 170                 goto fail;
 171         num_segs--;
 172
 173         prev = ring->first_seg;
 174         while (num_segs > 0) {
 175                 struct xhci_segment     *next;
 176
 177                 next = xhci_segment_alloc(xhci, flags);
 178                 if (!next)
 179                         goto fail;
 180                 xhci_link_segments(xhci, prev, next, link_trbs);
 181
 182                 prev = next;
 183                 num_segs--;
 184         }
 185         xhci_link_segments(xhci, prev, ring->first_seg, link_trbs);
 186
 187         if (link_trbs) {
 188                 /* See section 4.9.2.1 and 6.4.4.1 */
 189                 prev->trbs[TRBS_PER_SEGMENT-1].link.control |= (LINK_TOGGLE);
 190                 xhci_dbg(xhci, "Wrote link toggle flag to"
 191                                 " segment %p (virtual), 0x%llx (DMA)\n",
 192                                 prev, (unsigned long long)prev->dma);
 193         }
 194         xhci_initialize_ring_info(ring);
 195         return ring;
 196
 197 fail:
 198         xhci_ring_free(xhci, ring);
 199         return 0;
 200 }
 201
 202 void xhci_free_or_cache_endpoint_ring(struct xhci_hcd *xhci,
 203                 struct xhci_virt_device *virt_dev,
 204                 unsigned int ep_index)
 205 {
 206         int rings_cached;
 207
 208         rings_cached = virt_dev->num_rings_cached;
 209         if (rings_cached < XHCI_MAX_RINGS_CACHED) {
 210                 virt_dev->num_rings_cached++;
 211                 rings_cached = virt_dev->num_rings_cached;
 212                 virt_dev->ring_cache[rings_cached] =
 213                         virt_dev->eps[ep_index].ring;
 214                 xhci_dbg(xhci, "Cached old ring, "
 215                                 "%d ring%s cached\n",
 216                                 rings_cached,
 217                                 (rings_cached > 1) ? "s" : "");
 218         } else {
 219                 xhci_ring_free(xhci, virt_dev->eps[ep_index].ring);
 220                 xhci_dbg(xhci, "Ring cache full (%d rings), "
 221                                 "freeing ring\n",
 222                                 virt_dev->num_rings_cached);
 223         }
 224         virt_dev->eps[ep_index].ring = NULL;
 225 }
 226
 227 /* Zero an endpoint ring (except for link TRBs) and move the enqueue and dequeue
 228  * pointers to the beginning of the ring.
 229  */
 230 static void xhci_reinit_cached_ring(struct xhci_hcd *xhci,
 231                 struct xhci_ring *ring)
 232 {
 233         struct xhci_segment     *seg = ring->first_seg;
 234         do {
 235                 memset(seg->trbs, 0,
 236                                 sizeof(union xhci_trb)*TRBS_PER_SEGMENT);
 237                 /* All endpoint rings have link TRBs */
 238                 xhci_link_segments(xhci, seg, seg->next, 1);
 239                 seg = seg->next;
 240         } while (seg != ring->first_seg);
 241         xhci_initialize_ring_info(ring);
 242         /* td list should be empty since all URBs have been cancelled,
 243          * but just in case...
 244          */
 245         INIT_LIST_HEAD(&ring->td_list);
 246 }
 247
 248 #define CTX_SIZE(_hcc) (HCC_64BYTE_CONTEXT(_hcc) ? 64 : 32)
 249
 250 struct xhci_container_ctx *xhci_alloc_container_ctx(struct xhci_hcd *xhci,
 251                                                     int type, gfp_t flags)
 252 {
 253         struct xhci_container_ctx *ctx = kzalloc(sizeof(*ctx), flags);
 254         if (!ctx)
 255                 return NULL;
 256
 257         BUG_ON((type != XHCI_CTX_TYPE_DEVICE) && (type != XHCI_CTX_TYPE_INPUT));
 258         ctx->type = type;
 259         ctx->size = HCC_64BYTE_CONTEXT(xhci->hcc_params) ? 2048 : 1024;
 260         if (type == XHCI_CTX_TYPE_INPUT)
 261                 ctx->size += CTX_SIZE(xhci->hcc_params);
 262
 263         ctx->bytes = dma_pool_alloc(xhci->device_pool, flags, &ctx->dma);
 264         memset(ctx->bytes, 0, ctx->size);
 265         return ctx;
 266 }
 267
 268 void xhci_free_container_ctx(struct xhci_hcd *xhci,
 269                              struct xhci_container_ctx *ctx)
 270 {
 271         if (!ctx)
 272                 return;
 273         dma_pool_free(xhci->device_pool, ctx->bytes, ctx->dma);
 274         kfree(ctx);
 275 }
 276
 277 struct xhci_input_control_ctx *xhci_get_input_control_ctx(struct xhci_hcd *xhci,
 278                                               struct xhci_container_ctx *ctx)
 279 {
 280         BUG_ON(ctx->type != XHCI_CTX_TYPE_INPUT);
 281         return (struct xhci_input_control_ctx *)ctx->bytes;
 282 }
 283
 284 struct xhci_slot_ctx *xhci_get_slot_ctx(struct xhci_hcd *xhci,
 285                                         struct xhci_container_ctx *ctx)
 286 {
 287         if (ctx->type == XHCI_CTX_TYPE_DEVICE)
 288                 return (struct xhci_slot_ctx *)ctx->bytes;
 289
 290         return (struct xhci_slot_ctx *)
 291                 (ctx->bytes + CTX_SIZE(xhci->hcc_params));
 292 }
 293
 294 struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_hcd *xhci,
 295                                     struct xhci_container_ctx *ctx,
 296                                     unsigned int ep_index)
 297 {
 298         /* increment ep index by offset of start of ep ctx array */
 299         ep_index++;
 300         if (ctx->type == XHCI_CTX_TYPE_INPUT)
 301                 ep_index++;
 302
 303         return (struct xhci_ep_ctx *)
 304                 (ctx->bytes + (ep_index * CTX_SIZE(xhci->hcc_params)));
 305 }
 306
 307 static void xhci_init_endpoint_timer(struct xhci_hcd *xhci,
 308                 struct xhci_virt_ep *ep)
 309 {
 310         init_timer(&ep->stop_cmd_timer);
 311         ep->stop_cmd_timer.data = (unsigned long) ep;
 312         ep->stop_cmd_timer.function = xhci_stop_endpoint_command_watchdog;
 313         ep->xhci = xhci;
 314 }
 315
 316 /* All the xhci_tds in the ring's TD list should be freed at this point */
 317 void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id)
 318 {
 319         struct xhci_virt_device *dev;
 320         int i;
 321
 322         /* Slot ID 0 is reserved */
 323         if (slot_id == 0 || !xhci->devs[slot_id])
 324                 return;
 325
 326         dev = xhci->devs[slot_id];
 327         xhci->dcbaa->dev_context_ptrs[slot_id] = 0;
 328         if (!dev)
 329                 return;
 330
 331         for (i = 0; i < 31; ++i)
 332                 if (dev->eps[i].ring)
 333                         xhci_ring_free(xhci, dev->eps[i].ring);
 334
 335         if (dev->ring_cache) {
 336                 for (i = 0; i < dev->num_rings_cached; i++)
 337                         xhci_ring_free(xhci, dev->ring_cache[i]);
 338                 kfree(dev->ring_cache);
 339         }
 340
 341         if (dev->in_ctx)
 342                 xhci_free_container_ctx(xhci, dev->in_ctx);
 343         if (dev->out_ctx)
 344                 xhci_free_container_ctx(xhci, dev->out_ctx);
 345
 346         kfree(xhci->devs[slot_id]);
 347         xhci->devs[slot_id] = 0;
 348 }
 349
 350 int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
 351                 struct usb_device *udev, gfp_t flags)
 352 {
 353         struct xhci_virt_device *dev;
 354         int i;
 355
 356         /* Slot ID 0 is reserved */
 357         if (slot_id == 0 || xhci->devs[slot_id]) {
 358                 xhci_warn(xhci, "Bad Slot ID %d\n", slot_id);
 359                 return 0;
 360         }
 361
 362         xhci->devs[slot_id] = kzalloc(sizeof(*xhci->devs[slot_id]), flags);
 363         if (!xhci->devs[slot_id])
 364                 return 0;
 365         dev = xhci->devs[slot_id];
 366
 367         /* Allocate the (output) device context that will be used in the HC. */
 368         dev->out_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags);
 369         if (!dev->out_ctx)
 370                 goto fail;
 371
 372         xhci_dbg(xhci, "Slot %d output ctx = 0x%llx (dma)\n", slot_id,
 373                         (unsigned long long)dev->out_ctx->dma);
 374
 375         /* Allocate the (input) device context for address device command */
 376         dev->in_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, flags);
 377         if (!dev->in_ctx)
 378                 goto fail;
 379
 380         xhci_dbg(xhci, "Slot %d input ctx = 0x%llx (dma)\n", slot_id,
 381                         (unsigned long long)dev->in_ctx->dma);
 382
 383         /* Initialize the cancellation list and watchdog timers for each ep */
 384         for (i = 0; i < 31; i++) {
 385                 xhci_init_endpoint_timer(xhci, &dev->eps[i]);
 386                 INIT_LIST_HEAD(&dev->eps[i].cancelled_td_list);
 387         }
 388
 389         /* Allocate endpoint 0 ring */
 390         dev->eps[0].ring = xhci_ring_alloc(xhci, 1, true, flags);
 391         if (!dev->eps[0].ring)
 392                 goto fail;
 393
 394         /* Allocate pointers to the ring cache */
 395         dev->ring_cache = kzalloc(
 396                         sizeof(struct xhci_ring *)*XHCI_MAX_RINGS_CACHED,
 397                         flags);
 398         if (!dev->ring_cache)
 399                 goto fail;
 400         dev->num_rings_cached = 0;
 401
 402         init_completion(&dev->cmd_completion);
 403         INIT_LIST_HEAD(&dev->cmd_list);
 404
 405         /* Point to output device context in dcbaa. */
 406         xhci->dcbaa->dev_context_ptrs[slot_id] = dev->out_ctx->dma;
 407         xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n",
 408                         slot_id,
 409                         &xhci->dcbaa->dev_context_ptrs[slot_id],
 410                         (unsigned long long) xhci->dcbaa->dev_context_ptrs[slot_id]);
 411
 412         return 1;
 413 fail:
 414         xhci_free_virt_device(xhci, slot_id);
 415         return 0;
 416 }
 417
 418 /* Setup an xHCI virtual device for a Set Address command */
 419 int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev)
 420 {
 421         struct xhci_virt_device *dev;
 422         struct xhci_ep_ctx      *ep0_ctx;
 423         struct usb_device       *top_dev;
 424         struct xhci_slot_ctx    *slot_ctx;
 425         struct xhci_input_control_ctx *ctrl_ctx;
 426
 427         dev = xhci->devs[udev->slot_id];
 428         /* Slot ID 0 is reserved */
 429         if (udev->slot_id == 0 || !dev) {
 430                 xhci_warn(xhci, "Slot ID %d is not assigned to this device\n",
 431                                 udev->slot_id);
 432                 return -EINVAL;
 433         }
 434         ep0_ctx = xhci_get_ep_ctx(xhci, dev->in_ctx, 0);
 435         ctrl_ctx = xhci_get_input_control_ctx(xhci, dev->in_ctx);
 436         slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx);
 437
 438         /* 2) New slot context and endpoint 0 context are valid*/
 439         ctrl_ctx->add_flags = SLOT_FLAG | EP0_FLAG;
 440
 441         /* 3) Only the control endpoint is valid - one endpoint context */
 442         slot_ctx->dev_info |= LAST_CTX(1);
 443
 444         slot_ctx->dev_info |= (u32) udev->route;
 445         switch (udev->speed) {
 446         case USB_SPEED_SUPER:
 447                 slot_ctx->dev_info |= (u32) SLOT_SPEED_SS;
 448                 break;
 449         case USB_SPEED_HIGH:
 450                 slot_ctx->dev_info |= (u32) SLOT_SPEED_HS;
 451                 break;
 452         case USB_SPEED_FULL:
 453                 slot_ctx->dev_info |= (u32) SLOT_SPEED_FS;
 454                 break;
 455         case USB_SPEED_LOW:
 456                 slot_ctx->dev_info |= (u32) SLOT_SPEED_LS;
 457                 break;
 458         case USB_SPEED_WIRELESS:
 459                 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
 460                 return -EINVAL;
 461                 break;
 462         default:
 463                 /* Speed was set earlier, this shouldn't happen. */
 464                 BUG();
 465         }
 466         /* Find the root hub port this device is under */
 467         for (top_dev = udev; top_dev->parent && top_dev->parent->parent;
 468                         top_dev = top_dev->parent)
 469                 /* Found device below root hub */;
 470         slot_ctx->dev_info2 |= (u32) ROOT_HUB_PORT(top_dev->portnum);
 471         xhci_dbg(xhci, "Set root hub portnum to %d\n", top_dev->portnum);
 472
 473         /* Is this a LS/FS device under a HS hub? */
 474         if ((udev->speed == USB_SPEED_LOW || udev->speed == USB_SPEED_FULL) &&
 475                         udev->tt) {
 476                 slot_ctx->tt_info = udev->tt->hub->slot_id;
 477                 slot_ctx->tt_info |= udev->ttport << 8;
 478                 if (udev->tt->multi)
 479                         slot_ctx->dev_info |= DEV_MTT;
 480         }
 481         xhci_dbg(xhci, "udev->tt = %p\n", udev->tt);
 482         xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport);
 483
 484         /* Step 4 - ring already allocated */
 485         /* Step 5 */
 486         ep0_ctx->ep_info2 = EP_TYPE(CTRL_EP);
 487         /*
 488          * XXX: Not sure about wireless USB devices.
 489          */
 490         switch (udev->speed) {
 491         case USB_SPEED_SUPER:
 492                 ep0_ctx->ep_info2 |= MAX_PACKET(512);
 493                 break;
 494         case USB_SPEED_HIGH:
 495         /* USB core guesses at a 64-byte max packet first for FS devices */
 496         case USB_SPEED_FULL:
 497                 ep0_ctx->ep_info2 |= MAX_PACKET(64);
 498                 break;
 499         case USB_SPEED_LOW:
 500                 ep0_ctx->ep_info2 |= MAX_PACKET(8);
 501                 break;
 502         case USB_SPEED_WIRELESS:
 503                 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
 504                 return -EINVAL;
 505                 break;
 506         default:
 507                 /* New speed? */
 508                 BUG();
 509         }
 510         /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */
 511         ep0_ctx->ep_info2 |= MAX_BURST(0);
 512         ep0_ctx->ep_info2 |= ERROR_COUNT(3);
 513
 514         ep0_ctx->deq =
 515                 dev->eps[0].ring->first_seg->dma;
 516         ep0_ctx->deq |= dev->eps[0].ring->cycle_state;
 517
 518         /* Steps 7 and 8 were done in xhci_alloc_virt_device() */
 519
 520         return 0;
 521 }
 522
 523 /* Return the polling or NAK interval.
 524  *
 525  * The polling interval is expressed in "microframes".  If xHCI's Interval field
 526  * is set to N, it will service the endpoint every 2^(Interval)*125us.
 527  *
 528  * The NAK interval is one NAK per 1 to 255 microframes, or no NAKs if interval
 529  * is set to 0.
 530  */
 531 static inline unsigned int xhci_get_endpoint_interval(struct usb_device *udev,
 532                 struct usb_host_endpoint *ep)
 533 {
 534         unsigned int interval = 0;
 535
 536         switch (udev->speed) {
 537         case USB_SPEED_HIGH:
 538                 /* Max NAK rate */
 539                 if (usb_endpoint_xfer_control(&ep->desc) ||
 540                                 usb_endpoint_xfer_bulk(&ep->desc))
 541                         interval = ep->desc.bInterval;
 542                 /* Fall through - SS and HS isoc/int have same decoding */
 543         case USB_SPEED_SUPER:
 544                 if (usb_endpoint_xfer_int(&ep->desc) ||
 545                                 usb_endpoint_xfer_isoc(&ep->desc)) {
 546                         if (ep->desc.bInterval == 0)
 547                                 interval = 0;
 548                         else
 549                                 interval = ep->desc.bInterval - 1;
 550                         if (interval > 15)
 551                                 interval = 15;
 552                         if (interval != ep->desc.bInterval + 1)
 553                                 dev_warn(&udev->dev, "ep %#x - rounding interval to %d microframes\n",
 554                                                 ep->desc.bEndpointAddress, 1 << interval);
 555                 }
 556                 break;
 557         /* Convert bInterval (in 1-255 frames) to microframes and round down to
 558          * nearest power of 2.
 559          */
 560         case USB_SPEED_FULL:
 561         case USB_SPEED_LOW:
 562                 if (usb_endpoint_xfer_int(&ep->desc) ||
 563                                 usb_endpoint_xfer_isoc(&ep->desc)) {
 564                         interval = fls(8*ep->desc.bInterval) - 1;
 565                         if (interval > 10)
 566                                 interval = 10;
 567                         if (interval < 3)
 568                                 interval = 3;
 569                         if ((1 << interval) != 8*ep->desc.bInterval)
 570                                 dev_warn(&udev->dev,
 571                                                 "ep %#x - rounding interval"
 572                                                 " to %d microframes, "
 573                                                 "ep desc says %d microframes\n",
 574                                                 ep->desc.bEndpointAddress,
 575                                                 1 << interval,
 576                                                 8*ep->desc.bInterval);
 577                 }
 578                 break;
 579         default:
 580                 BUG();
 581         }
 582         return EP_INTERVAL(interval);
 583 }
 584
 585 static inline u32 xhci_get_endpoint_type(struct usb_device *udev,
 586                 struct usb_host_endpoint *ep)
 587 {
 588         int in;
 589         u32 type;
 590
 591         in = usb_endpoint_dir_in(&ep->desc);
 592         if (usb_endpoint_xfer_control(&ep->desc)) {
 593                 type = EP_TYPE(CTRL_EP);
 594         } else if (usb_endpoint_xfer_bulk(&ep->desc)) {
 595                 if (in)
 596                         type = EP_TYPE(BULK_IN_EP);
 597                 else
 598                         type = EP_TYPE(BULK_OUT_EP);
 599         } else if (usb_endpoint_xfer_isoc(&ep->desc)) {
 600                 if (in)
 601                         type = EP_TYPE(ISOC_IN_EP);
 602                 else
 603                         type = EP_TYPE(ISOC_OUT_EP);
 604         } else if (usb_endpoint_xfer_int(&ep->desc)) {
 605                 if (in)
 606                         type = EP_TYPE(INT_IN_EP);
 607                 else
 608                         type = EP_TYPE(INT_OUT_EP);
 609         } else {
 610                 BUG();
 611         }
 612         return type;
 613 }
 614
 615 int xhci_endpoint_init(struct xhci_hcd *xhci,
 616                 struct xhci_virt_device *virt_dev,
 617                 struct usb_device *udev,
 618                 struct usb_host_endpoint *ep,
 619                 gfp_t mem_flags)
 620 {
 621         unsigned int ep_index;
 622         struct xhci_ep_ctx *ep_ctx;
 623         struct xhci_ring *ep_ring;
 624         unsigned int max_packet;
 625         unsigned int max_burst;
 626
 627         ep_index = xhci_get_endpoint_index(&ep->desc);
 628         ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
 629
 630         /* Set up the endpoint ring */
 631         virt_dev->eps[ep_index].new_ring =
 632                 xhci_ring_alloc(xhci, 1, true, mem_flags);
 633         if (!virt_dev->eps[ep_index].new_ring) {
 634                 /* Attempt to use the ring cache */
 635                 if (virt_dev->num_rings_cached == 0)
 636                         return -ENOMEM;
 637                 virt_dev->eps[ep_index].new_ring =
 638                         virt_dev->ring_cache[virt_dev->num_rings_cached];
 639                 virt_dev->ring_cache[virt_dev->num_rings_cached] = NULL;
 640                 virt_dev->num_rings_cached--;
 641                 xhci_reinit_cached_ring(xhci, virt_dev->eps[ep_index].new_ring);
 642         }
 643         ep_ring = virt_dev->eps[ep_index].new_ring;
 644         ep_ctx->deq = ep_ring->first_seg->dma | ep_ring->cycle_state;
 645
 646         ep_ctx->ep_info = xhci_get_endpoint_interval(udev, ep);
 647
 648         /* FIXME dig Mult and streams info out of ep companion desc */
 649
 650         /* Allow 3 retries for everything but isoc;
 651          * error count = 0 means infinite retries.
 652          */
 653         if (!usb_endpoint_xfer_isoc(&ep->desc))
 654                 ep_ctx->ep_info2 = ERROR_COUNT(3);
 655         else
 656                 ep_ctx->ep_info2 = ERROR_COUNT(1);
 657
 658         ep_ctx->ep_info2 |= xhci_get_endpoint_type(udev, ep);
 659
 660         /* Set the max packet size and max burst */
 661         switch (udev->speed) {
 662         case USB_SPEED_SUPER:
 663                 max_packet = ep->desc.wMaxPacketSize;
 664                 ep_ctx->ep_info2 |= MAX_PACKET(max_packet);
 665                 /* dig out max burst from ep companion desc */
 666                 if (!ep->ss_ep_comp) {
 667                         xhci_warn(xhci, "WARN no SS endpoint companion descriptor.\n");
 668                         max_packet = 0;
 669                 } else {
 670                         max_packet = ep->ss_ep_comp->desc.bMaxBurst;
 671                 }
 672                 ep_ctx->ep_info2 |= MAX_BURST(max_packet);
 673                 break;
 674         case USB_SPEED_HIGH:
 675                 /* bits 11:12 specify the number of additional transaction
 676                  * opportunities per microframe (USB 2.0, section 9.6.6)
 677                  */
 678                 if (usb_endpoint_xfer_isoc(&ep->desc) ||
 679                                 usb_endpoint_xfer_int(&ep->desc)) {
 680                         max_burst = (ep->desc.wMaxPacketSize & 0x1800) >> 11;
 681                         ep_ctx->ep_info2 |= MAX_BURST(max_burst);
 682                 }
 683                 /* Fall through */
 684         case USB_SPEED_FULL:
 685         case USB_SPEED_LOW:
 686                 max_packet = ep->desc.wMaxPacketSize & 0x3ff;
 687                 ep_ctx->ep_info2 |= MAX_PACKET(max_packet);
 688                 break;
 689         default:
 690                 BUG();
 691         }
 692         /* FIXME Debug endpoint context */
 693         return 0;
 694 }
 695
 696 void xhci_endpoint_zero(struct xhci_hcd *xhci,
 697                 struct xhci_virt_device *virt_dev,
 698                 struct usb_host_endpoint *ep)
 699 {
 700         unsigned int ep_index;
 701         struct xhci_ep_ctx *ep_ctx;
 702
 703         ep_index = xhci_get_endpoint_index(&ep->desc);
 704         ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
 705
 706         ep_ctx->ep_info = 0;
 707         ep_ctx->ep_info2 = 0;
 708         ep_ctx->deq = 0;
 709         ep_ctx->tx_info = 0;
 710         /* Don't free the endpoint ring until the set interface or configuration
 711          * request succeeds.
 712          */
 713 }
 714
 715 /* Copy output xhci_ep_ctx to the input xhci_ep_ctx copy.
 716  * Useful when you want to change one particular aspect of the endpoint and then
 717  * issue a configure endpoint command.
 718  */
 719 void xhci_endpoint_copy(struct xhci_hcd *xhci,
 720                 struct xhci_container_ctx *in_ctx,
 721                 struct xhci_container_ctx *out_ctx,
 722                 unsigned int ep_index)
 723 {
 724         struct xhci_ep_ctx *out_ep_ctx;
 725         struct xhci_ep_ctx *in_ep_ctx;
 726
 727         out_ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
 728         in_ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
 729
 730         in_ep_ctx->ep_info = out_ep_ctx->ep_info;
 731         in_ep_ctx->ep_info2 = out_ep_ctx->ep_info2;
 732         in_ep_ctx->deq = out_ep_ctx->deq;
 733         in_ep_ctx->tx_info = out_ep_ctx->tx_info;
 734 }
 735
 736 /* Copy output xhci_slot_ctx to the input xhci_slot_ctx.
 737  * Useful when you want to change one particular aspect of the endpoint and then
 738  * issue a configure endpoint command.  Only the context entries field matters,
 739  * but we'll copy the whole thing anyway.
 740  */
 741 void xhci_slot_copy(struct xhci_hcd *xhci,
 742                 struct xhci_container_ctx *in_ctx,
 743                 struct xhci_container_ctx *out_ctx)
 744 {
 745         struct xhci_slot_ctx *in_slot_ctx;
 746         struct xhci_slot_ctx *out_slot_ctx;
 747
 748         in_slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
 749         out_slot_ctx = xhci_get_slot_ctx(xhci, out_ctx);
 750
 751         in_slot_ctx->dev_info = out_slot_ctx->dev_info;
 752         in_slot_ctx->dev_info2 = out_slot_ctx->dev_info2;
 753         in_slot_ctx->tt_info = out_slot_ctx->tt_info;
 754         in_slot_ctx->dev_state = out_slot_ctx->dev_state;
 755 }
 756
 757 /* Set up the scratchpad buffer array and scratchpad buffers, if needed. */
 758 static int scratchpad_alloc(struct xhci_hcd *xhci, gfp_t flags)
 759 {
 760         int i;
 761         struct device *dev = xhci_to_hcd(xhci)->self.controller;
 762         int num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
 763
 764         xhci_dbg(xhci, "Allocating %d scratchpad buffers\n", num_sp);
 765
 766         if (!num_sp)
 767                 return 0;
 768
 769         xhci->scratchpad = kzalloc(sizeof(*xhci->scratchpad), flags);
 770         if (!xhci->scratchpad)
 771                 goto fail_sp;
 772
 773         xhci->scratchpad->sp_array =
 774                 pci_alloc_consistent(to_pci_dev(dev),
 775                                      num_sp * sizeof(u64),
 776                                      &xhci->scratchpad->sp_dma);
 777         if (!xhci->scratchpad->sp_array)
 778                 goto fail_sp2;
 779
 780         xhci->scratchpad->sp_buffers = kzalloc(sizeof(void *) * num_sp, flags);
 781         if (!xhci->scratchpad->sp_buffers)
 782                 goto fail_sp3;
 783
 784         xhci->scratchpad->sp_dma_buffers =
 785                 kzalloc(sizeof(dma_addr_t) * num_sp, flags);
 786
 787         if (!xhci->scratchpad->sp_dma_buffers)
 788                 goto fail_sp4;
 789
 790         xhci->dcbaa->dev_context_ptrs[0] = xhci->scratchpad->sp_dma;
 791         for (i = 0; i < num_sp; i++) {
 792                 dma_addr_t dma;
 793                 void *buf = pci_alloc_consistent(to_pci_dev(dev),
 794                                                  xhci->page_size, &dma);
 795                 if (!buf)
 796                         goto fail_sp5;
 797
 798                 xhci->scratchpad->sp_array[i] = dma;
 799                 xhci->scratchpad->sp_buffers[i] = buf;
 800                 xhci->scratchpad->sp_dma_buffers[i] = dma;
 801         }
 802
 803         return 0;
 804
 805  fail_sp5:
 806         for (i = i - 1; i >= 0; i--) {
 807                 pci_free_consistent(to_pci_dev(dev), xhci->page_size,
 808                                     xhci->scratchpad->sp_buffers[i],
 809                                     xhci->scratchpad->sp_dma_buffers[i]);
 810         }
 811         kfree(xhci->scratchpad->sp_dma_buffers);
 812
 813  fail_sp4:
 814         kfree(xhci->scratchpad->sp_buffers);
 815
 816  fail_sp3:
 817         pci_free_consistent(to_pci_dev(dev), num_sp * sizeof(u64),
 818                             xhci->scratchpad->sp_array,
 819                             xhci->scratchpad->sp_dma);
 820
 821  fail_sp2:
 822         kfree(xhci->scratchpad);
 823         xhci->scratchpad = NULL;
 824
 825  fail_sp:
 826         return -ENOMEM;
 827 }
 828
 829 static void scratchpad_free(struct xhci_hcd *xhci)
 830 {
 831         int num_sp;
 832         int i;
 833         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
 834
 835         if (!xhci->scratchpad)
 836                 return;
 837
 838         num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
 839
 840         for (i = 0; i < num_sp; i++) {
 841                 pci_free_consistent(pdev, xhci->page_size,
 842                                     xhci->scratchpad->sp_buffers[i],
 843                                     xhci->scratchpad->sp_dma_buffers[i]);
 844         }
 845         kfree(xhci->scratchpad->sp_dma_buffers);
 846         kfree(xhci->scratchpad->sp_buffers);
 847         pci_free_consistent(pdev, num_sp * sizeof(u64),
 848                             xhci->scratchpad->sp_array,
 849                             xhci->scratchpad->sp_dma);
 850         kfree(xhci->scratchpad);
 851         xhci->scratchpad = NULL;
 852 }
 853
 854 struct xhci_command *xhci_alloc_command(struct xhci_hcd *xhci,
 855                 bool allocate_in_ctx, bool allocate_completion,
 856                 gfp_t mem_flags)
 857 {
 858         struct xhci_command *command;
 859
 860         command = kzalloc(sizeof(*command), mem_flags);
 861         if (!command)
 862                 return NULL;
 863
 864         if (allocate_in_ctx) {
 865                 command->in_ctx =
 866                         xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT,
 867                                         mem_flags);
 868                 if (!command->in_ctx) {
 869                         kfree(command);
 870                         return NULL;
 871                 }
 872         }
 873
 874         if (allocate_completion) {
 875                 command->completion =
 876                         kzalloc(sizeof(struct completion), mem_flags);
 877                 if (!command->completion) {
 878                         xhci_free_container_ctx(xhci, command->in_ctx);
 879                         kfree(command);
 880                         return NULL;
 881                 }
 882                 init_completion(command->completion);
 883         }
 884
 885         command->status = 0;
 886         INIT_LIST_HEAD(&command->cmd_list);
 887         return command;
 888 }
 889
 890 void xhci_free_command(struct xhci_hcd *xhci,
 891                 struct xhci_command *command)
 892 {
 893         xhci_free_container_ctx(xhci,
 894                         command->in_ctx);
 895         kfree(command->completion);
 896         kfree(command);
 897 }
 898
 899 void xhci_mem_cleanup(struct xhci_hcd *xhci)
 900 {
 901         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
 902         int size;
 903         int i;
 904
 905         /* Free the Event Ring Segment Table and the actual Event Ring */
 906         if (xhci->ir_set) {
 907                 xhci_writel(xhci, 0, &xhci->ir_set->erst_size);
 908                 xhci_write_64(xhci, 0, &xhci->ir_set->erst_base);
 909                 xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue);
 910         }
 911         size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);
 912         if (xhci->erst.entries)
 913                 pci_free_consistent(pdev, size,
 914                                 xhci->erst.entries, xhci->erst.erst_dma_addr);
 915         xhci->erst.entries = NULL;
 916         xhci_dbg(xhci, "Freed ERST\n");
 917         if (xhci->event_ring)
 918                 xhci_ring_free(xhci, xhci->event_ring);
 919         xhci->event_ring = NULL;
 920         xhci_dbg(xhci, "Freed event ring\n");
 921
 922         xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring);
 923         if (xhci->cmd_ring)
 924                 xhci_ring_free(xhci, xhci->cmd_ring);
 925         xhci->cmd_ring = NULL;
 926         xhci_dbg(xhci, "Freed command ring\n");
 927
 928         for (i = 1; i < MAX_HC_SLOTS; ++i)
 929                 xhci_free_virt_device(xhci, i);
 930
 931         if (xhci->segment_pool)
 932                 dma_pool_destroy(xhci->segment_pool);
 933         xhci->segment_pool = NULL;
 934         xhci_dbg(xhci, "Freed segment pool\n");
 935
 936         if (xhci->device_pool)
 937                 dma_pool_destroy(xhci->device_pool);
 938         xhci->device_pool = NULL;
 939         xhci_dbg(xhci, "Freed device context pool\n");
 940
 941         xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr);
 942         if (xhci->dcbaa)
 943                 pci_free_consistent(pdev, sizeof(*xhci->dcbaa),
 944                                 xhci->dcbaa, xhci->dcbaa->dma);
 945         xhci->dcbaa = NULL;
 946
 947         scratchpad_free(xhci);
 948         xhci->page_size = 0;
 949         xhci->page_shift = 0;
 950 }
 951
 952 static int xhci_test_trb_in_td(struct xhci_hcd *xhci,
 953                 struct xhci_segment *input_seg,
 954                 union xhci_trb *start_trb,
 955                 union xhci_trb *end_trb,
 956                 dma_addr_t input_dma,
 957                 struct xhci_segment *result_seg,
 958                 char *test_name, int test_number)
 959 {
 960         unsigned long long start_dma;
 961         unsigned long long end_dma;
 962         struct xhci_segment *seg;
 963
 964         start_dma = xhci_trb_virt_to_dma(input_seg, start_trb);
 965         end_dma = xhci_trb_virt_to_dma(input_seg, end_trb);
 966
 967         seg = trb_in_td(input_seg, start_trb, end_trb, input_dma);
 968         if (seg != result_seg) {
 969                 xhci_warn(xhci, "WARN: %s TRB math test %d failed!\n",
 970                                 test_name, test_number);
 971                 xhci_warn(xhci, "Tested TRB math w/ seg %p and "
 972                                 "input DMA 0x%llx\n",
 973                                 input_seg,
 974                                 (unsigned long long) input_dma);
 975                 xhci_warn(xhci, "starting TRB %p (0x%llx DMA), "
 976                                 "ending TRB %p (0x%llx DMA)\n",
 977                                 start_trb, start_dma,
 978                                 end_trb, end_dma);
 979                 xhci_warn(xhci, "Expected seg %p, got seg %p\n",
 980                                 result_seg, seg);
 981                 return -1;
 982         }
 983         return 0;
 984 }
 985
 986 /* TRB math checks for xhci_trb_in_td(), using the command and event rings. */
 987 static int xhci_check_trb_in_td_math(struct xhci_hcd *xhci, gfp_t mem_flags)
 988 {
 989         struct {
 990                 dma_addr_t              input_dma;
 991                 struct xhci_segment     *result_seg;
 992         } simple_test_vector [] = {
 993                 /* A zeroed DMA field should fail */
 994                 { 0, NULL },
 995                 /* One TRB before the ring start should fail */
 996                 { xhci->event_ring->first_seg->dma - 16, NULL },
 997                 /* One byte before the ring start should fail */
 998                 { xhci->event_ring->first_seg->dma - 1, NULL },
 999                 /* Starting TRB should succeed */
1000                 { xhci->event_ring->first_seg->dma, xhci->event_ring->first_seg },
1001                 /* Ending TRB should succeed */
1002                 { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16,
1003                         xhci->event_ring->first_seg },
1004                 /* One byte after the ring end should fail */
1005                 { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16 + 1, NULL },
1006                 /* One TRB after the ring end should fail */
1007                 { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT)*16, NULL },
1008                 /* An address of all ones should fail */
1009                 { (dma_addr_t) (~0), NULL },
1010         };
1011         struct {
1012                 struct xhci_segment     *input_seg;
1013                 union xhci_trb          *start_trb;
1014                 union xhci_trb          *end_trb;
1015                 dma_addr_t              input_dma;
1016                 struct xhci_segment     *result_seg;
1017         } complex_test_vector [] = {
1018                 /* Test feeding a valid DMA address from a different ring */
1019                 {       .input_seg = xhci->event_ring->first_seg,
1020                         .start_trb = xhci->event_ring->first_seg->trbs,
1021                         .end_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1022                         .input_dma = xhci->cmd_ring->first_seg->dma,
1023                         .result_seg = NULL,
1024                 },
1025                 /* Test feeding a valid end TRB from a different ring */
1026                 {       .input_seg = xhci->event_ring->first_seg,
1027                         .start_trb = xhci->event_ring->first_seg->trbs,
1028                         .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1029                         .input_dma = xhci->cmd_ring->first_seg->dma,
1030                         .result_seg = NULL,
1031                 },
1032                 /* Test feeding a valid start and end TRB from a different ring */
1033                 {       .input_seg = xhci->event_ring->first_seg,
1034                         .start_trb = xhci->cmd_ring->first_seg->trbs,
1035                         .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1036                         .input_dma = xhci->cmd_ring->first_seg->dma,
1037                         .result_seg = NULL,
1038                 },
1039                 /* TRB in this ring, but after this TD */
1040                 {       .input_seg = xhci->event_ring->first_seg,
1041                         .start_trb = &xhci->event_ring->first_seg->trbs[0],
1042                         .end_trb = &xhci->event_ring->first_seg->trbs[3],
1043                         .input_dma = xhci->event_ring->first_seg->dma + 4*16,
1044                         .result_seg = NULL,
1045                 },
1046                 /* TRB in this ring, but before this TD */
1047                 {       .input_seg = xhci->event_ring->first_seg,
1048                         .start_trb = &xhci->event_ring->first_seg->trbs[3],
1049                         .end_trb = &xhci->event_ring->first_seg->trbs[6],
1050                         .input_dma = xhci->event_ring->first_seg->dma + 2*16,
1051                         .result_seg = NULL,
1052                 },
1053                 /* TRB in this ring, but after this wrapped TD */
1054                 {       .input_seg = xhci->event_ring->first_seg,
1055                         .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
1056                         .end_trb = &xhci->event_ring->first_seg->trbs[1],
1057                         .input_dma = xhci->event_ring->first_seg->dma + 2*16,
1058                         .result_seg = NULL,
1059                 },
1060                 /* TRB in this ring, but before this wrapped TD */
1061                 {       .input_seg = xhci->event_ring->first_seg,
1062                         .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
1063                         .end_trb = &xhci->event_ring->first_seg->trbs[1],
1064                         .input_dma = xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 4)*16,
1065                         .result_seg = NULL,
1066                 },
1067                 /* TRB not in this ring, and we have a wrapped TD */
1068                 {       .input_seg = xhci->event_ring->first_seg,
1069                         .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
1070                         .end_trb = &xhci->event_ring->first_seg->trbs[1],
1071                         .input_dma = xhci->cmd_ring->first_seg->dma + 2*16,
1072                         .result_seg = NULL,
1073                 },
1074         };
1075
1076         unsigned int num_tests;
1077         int i, ret;
1078
1079         num_tests = sizeof(simple_test_vector) / sizeof(simple_test_vector[0]);
1080         for (i = 0; i < num_tests; i++) {
1081                 ret = xhci_test_trb_in_td(xhci,
1082                                 xhci->event_ring->first_seg,
1083                                 xhci->event_ring->first_seg->trbs,
1084                                 &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1085                                 simple_test_vector[i].input_dma,
1086                                 simple_test_vector[i].result_seg,
1087                                 "Simple", i);
1088                 if (ret < 0)
1089                         return ret;
1090         }
1091
1092         num_tests = sizeof(complex_test_vector) / sizeof(complex_test_vector[0]);
1093         for (i = 0; i < num_tests; i++) {
1094                 ret = xhci_test_trb_in_td(xhci,
1095                                 complex_test_vector[i].input_seg,
1096                                 complex_test_vector[i].start_trb,
1097                                 complex_test_vector[i].end_trb,
1098                                 complex_test_vector[i].input_dma,
1099                                 complex_test_vector[i].result_seg,
1100                                 "Complex", i);
1101                 if (ret < 0)
1102                         return ret;
1103         }
1104         xhci_dbg(xhci, "TRB math tests passed.\n");
1105         return 0;
1106 }
1107
1108
1109 int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
1110 {
1111         dma_addr_t      dma;
1112         struct device   *dev = xhci_to_hcd(xhci)->self.controller;
1113         unsigned int    val, val2;
1114         u64             val_64;
1115         struct xhci_segment     *seg;
1116         u32 page_size;
1117         int i;
1118
1119         page_size = xhci_readl(xhci, &xhci->op_regs->page_size);
1120         xhci_dbg(xhci, "Supported page size register = 0x%x\n", page_size);
1121         for (i = 0; i < 16; i++) {
1122                 if ((0x1 & page_size) != 0)
1123                         break;
1124                 page_size = page_size >> 1;
1125         }
1126         if (i < 16)
1127                 xhci_dbg(xhci, "Supported page size of %iK\n", (1 << (i+12)) / 1024);
1128         else
1129                 xhci_warn(xhci, "WARN: no supported page size\n");
1130         /* Use 4K pages, since that's common and the minimum the HC supports */
1131         xhci->page_shift = 12;
1132         xhci->page_size = 1 << xhci->page_shift;
1133         xhci_dbg(xhci, "HCD page size set to %iK\n", xhci->page_size / 1024);
1134
1135         /*
1136          * Program the Number of Device Slots Enabled field in the CONFIG
1137          * register with the max value of slots the HC can handle.
1138          */
1139         val = HCS_MAX_SLOTS(xhci_readl(xhci, &xhci->cap_regs->hcs_params1));
1140         xhci_dbg(xhci, "// xHC can handle at most %d device slots.\n",
1141                         (unsigned int) val);
1142         val2 = xhci_readl(xhci, &xhci->op_regs->config_reg);
1143         val |= (val2 & ~HCS_SLOTS_MASK);
1144         xhci_dbg(xhci, "// Setting Max device slots reg = 0x%x.\n",
1145                         (unsigned int) val);
1146         xhci_writel(xhci, val, &xhci->op_regs->config_reg);
1147
1148         /*
1149          * Section 5.4.8 - doorbell array must be
1150          * "physically contiguous and 64-byte (cache line) aligned".
1151          */
1152         xhci->dcbaa = pci_alloc_consistent(to_pci_dev(dev),
1153                         sizeof(*xhci->dcbaa), &dma);
1154         if (!xhci->dcbaa)
1155                 goto fail;
1156         memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa));
1157         xhci->dcbaa->dma = dma;
1158         xhci_dbg(xhci, "// Device context base array address = 0x%llx (DMA), %p (virt)\n",
1159                         (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa);
1160         xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr);
1161
1162         /*
1163          * Initialize the ring segment pool.  The ring must be a contiguous
1164          * structure comprised of TRBs.  The TRBs must be 16 byte aligned,
1165          * however, the command ring segment needs 64-byte aligned segments,
1166          * so we pick the greater alignment need.
1167          */
1168         xhci->segment_pool = dma_pool_create("xHCI ring segments", dev,
1169                         SEGMENT_SIZE, 64, xhci->page_size);
1170
1171         /* See Table 46 and Note on Figure 55 */
1172         xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev,
1173                         2112, 64, xhci->page_size);
1174         if (!xhci->segment_pool || !xhci->device_pool)
1175                 goto fail;
1176
1177         /* Set up the command ring to have one segments for now. */
1178         xhci->cmd_ring = xhci_ring_alloc(xhci, 1, true, flags);
1179         if (!xhci->cmd_ring)
1180                 goto fail;
1181         xhci_dbg(xhci, "Allocated command ring at %p\n", xhci->cmd_ring);
1182         xhci_dbg(xhci, "First segment DMA is 0x%llx\n",
1183                         (unsigned long long)xhci->cmd_ring->first_seg->dma);
1184
1185         /* Set the address in the Command Ring Control register */
1186         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
1187         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
1188                 (xhci->cmd_ring->first_seg->dma & (u64) ~CMD_RING_RSVD_BITS) |
1189                 xhci->cmd_ring->cycle_state;
1190         xhci_dbg(xhci, "// Setting command ring address to 0x%x\n", val);
1191         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
1192         xhci_dbg_cmd_ptrs(xhci);
1193
1194         val = xhci_readl(xhci, &xhci->cap_regs->db_off);
1195         val &= DBOFF_MASK;
1196         xhci_dbg(xhci, "// Doorbell array is located at offset 0x%x"
1197                         " from cap regs base addr\n", val);
1198         xhci->dba = (void *) xhci->cap_regs + val;
1199         xhci_dbg_regs(xhci);
1200         xhci_print_run_regs(xhci);
1201         /* Set ir_set to interrupt register set 0 */
1202         xhci->ir_set = (void *) xhci->run_regs->ir_set;
1203
1204         /*
1205          * Event ring setup: Allocate a normal ring, but also setup
1206          * the event ring segment table (ERST).  Section 4.9.3.
1207          */
1208         xhci_dbg(xhci, "// Allocating event ring\n");
1209         xhci->event_ring = xhci_ring_alloc(xhci, ERST_NUM_SEGS, false, flags);
1210         if (!xhci->event_ring)
1211                 goto fail;
1212         if (xhci_check_trb_in_td_math(xhci, flags) < 0)
1213                 goto fail;
1214
1215         xhci->erst.entries = pci_alloc_consistent(to_pci_dev(dev),
1216                         sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS, &dma);
1217         if (!xhci->erst.entries)
1218                 goto fail;
1219         xhci_dbg(xhci, "// Allocated event ring segment table at 0x%llx\n",
1220                         (unsigned long long)dma);
1221
1222         memset(xhci->erst.entries, 0, sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS);
1223         xhci->erst.num_entries = ERST_NUM_SEGS;
1224         xhci->erst.erst_dma_addr = dma;
1225         xhci_dbg(xhci, "Set ERST to 0; private num segs = %i, virt addr = %p, dma addr = 0x%llx\n",
1226                         xhci->erst.num_entries,
1227                         xhci->erst.entries,
1228                         (unsigned long long)xhci->erst.erst_dma_addr);
1229
1230         /* set ring base address and size for each segment table entry */
1231         for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) {
1232                 struct xhci_erst_entry *entry = &xhci->erst.entries[val];
1233                 entry->seg_addr = seg->dma;
1234                 entry->seg_size = TRBS_PER_SEGMENT;
1235                 entry->rsvd = 0;
1236                 seg = seg->next;
1237         }
1238
1239         /* set ERST count with the number of entries in the segment table */
1240         val = xhci_readl(xhci, &xhci->ir_set->erst_size);
1241         val &= ERST_SIZE_MASK;
1242         val |= ERST_NUM_SEGS;
1243         xhci_dbg(xhci, "// Write ERST size = %i to ir_set 0 (some bits preserved)\n",
1244                         val);
1245         xhci_writel(xhci, val, &xhci->ir_set->erst_size);
1246
1247         xhci_dbg(xhci, "// Set ERST entries to point to event ring.\n");
1248         /* set the segment table base address */
1249         xhci_dbg(xhci, "// Set ERST base address for ir_set 0 = 0x%llx\n",
1250                         (unsigned long long)xhci->erst.erst_dma_addr);
1251         val_64 = xhci_read_64(xhci, &xhci->ir_set->erst_base);
1252         val_64 &= ERST_PTR_MASK;
1253         val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK);
1254         xhci_write_64(xhci, val_64, &xhci->ir_set->erst_base);
1255
1256         /* Set the event ring dequeue address */
1257         xhci_set_hc_event_deq(xhci);
1258         xhci_dbg(xhci, "Wrote ERST address to ir_set 0.\n");
1259         xhci_print_ir_set(xhci, xhci->ir_set, 0);
1260
1261         /*
1262          * XXX: Might need to set the Interrupter Moderation Register to
1263          * something other than the default (~1ms minimum between interrupts).
1264          * See section 5.5.1.2.
1265          */
1266         init_completion(&xhci->addr_dev);
1267         for (i = 0; i < MAX_HC_SLOTS; ++i)
1268                 xhci->devs[i] = 0;
1269
1270         if (scratchpad_alloc(xhci, flags))
1271                 goto fail;
1272
1273         return 0;
1274
1275 fail:
1276         xhci_warn(xhci, "Couldn't initialize memory\n");
1277         xhci_mem_cleanup(xhci);
1278         return -ENOMEM;
1279 }