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   1 /*
   2    This is part of rtl818x pci OpenSource driver - v 0.1
   3    Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
   4    Released under the terms of GPL (General Public License)
   5
   6    Parts of this driver are based on the GPL part of the official
   7    Realtek driver.
   8
   9    Parts of this driver are based on the rtl8180 driver skeleton
  10    from Patric Schenke & Andres Salomon.
  11
  12    Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
  13
  14    Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
  15
  16    RSSI calc function from 'The Deuce'
  17
  18    Some ideas borrowed from the 8139too.c driver included in linux kernel.
  19
  20    We (I?) want to thanks the Authors of those projecs and also the
  21    Ndiswrapper's project Authors.
  22
  23    A big big thanks goes also to Realtek corp. for their help in my attempt to
  24    add RTL8185 and RTL8225 support, and to David Young also.
  25 */
  26
  27 #if 0
  28 double __floatsidf (int i) { return i; }
  29 unsigned int __fixunsdfsi (double d) { return d; }
  30 double __adddf3(double a, double b) { return a+b; }
  31 double __addsf3(float a, float b) { return a+b; }
  32 double __subdf3(double a, double b) { return a-b; }
  33 double __extendsfdf2(float a) {return a;}
  34 #endif
  35
  36
  37 #undef DEBUG_TX_DESC2
  38 #undef RX_DONT_PASS_UL
  39 #undef DEBUG_EPROM
  40 #undef DEBUG_RX_VERBOSE
  41 #undef DUMMY_RX
  42 #undef DEBUG_ZERO_RX
  43 #undef DEBUG_RX_SKB
  44 #undef DEBUG_TX_FRAG
  45 #undef DEBUG_RX_FRAG
  46 #undef DEBUG_TX_FILLDESC
  47 #undef DEBUG_TX
  48 #undef DEBUG_IRQ
  49 #undef DEBUG_RX
  50 #undef DEBUG_RXALLOC
  51 #undef DEBUG_REGISTERS
  52 #undef DEBUG_RING
  53 #undef DEBUG_IRQ_TASKLET
  54 #undef DEBUG_TX_ALLOC
  55 #undef DEBUG_TX_DESC
  56
  57 //#define DEBUG_TX
  58 //#define DEBUG_TX_DESC2
  59 //#define DEBUG_RX
  60 //#define DEBUG_RX_SKB
  61
  62 //#define CONFIG_RTL8180_IO_MAP
  63 #include <linux/syscalls.h>
  64 //#include <linux/fcntl.h>
  65 //#include <asm/uaccess.h>
  66 #include "r8180_hw.h"
  67 #include "r8180.h"
  68 #include "r8180_sa2400.h"  /* PHILIPS Radio frontend */
  69 #include "r8180_max2820.h" /* MAXIM Radio frontend */
  70 #include "r8180_gct.h"     /* GCT Radio frontend */
  71 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
  72 #include "r8180_rtl8255.h" /* RTL8255 Radio frontend */
  73 #include "r8180_93cx6.h"   /* Card EEPROM */
  74 #include "r8180_wx.h"
  75 #include "r8180_dm.h"
  76
  77 #ifdef CONFIG_RTL8180_PM
  78 #include "r8180_pm.h"
  79 #endif
  80
  81 #ifdef ENABLE_DOT11D
  82 #include "ieee80211/dot11d.h"
  83 #endif
  84
  85 #ifdef CONFIG_RTL8185B
  86 //#define CONFIG_RTL8180_IO_MAP
  87 #endif
  88
  89 #ifndef PCI_VENDOR_ID_BELKIN
  90         #define PCI_VENDOR_ID_BELKIN 0x1799
  91 #endif
  92 #ifndef PCI_VENDOR_ID_DLINK
  93         #define PCI_VENDOR_ID_DLINK 0x1186
  94 #endif
  95
  96 static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
  97         {
  98                 .vendor = PCI_VENDOR_ID_REALTEK,
  99 //                .device = 0x8180,
 100                 .device = 0x8199,
 101                 .subvendor = PCI_ANY_ID,
 102                 .subdevice = PCI_ANY_ID,
 103                 .driver_data = 0,
 104         },
 105 #if 0
 106         {
 107                 .vendor = PCI_VENDOR_ID_BELKIN,
 108                 .device = 0x6001,
 109                 .subvendor = PCI_ANY_ID,
 110                 .subdevice = PCI_ANY_ID,
 111                 .driver_data = 1,
 112         },
 113         {       /* Belkin F5D6020 v3 */
 114                 .vendor = PCI_VENDOR_ID_BELKIN,
 115                 .device = 0x6020,
 116                 .subvendor = PCI_ANY_ID,
 117                 .subdevice = PCI_ANY_ID,
 118                 .driver_data = 2,
 119         },
 120         {       /* D-Link DWL-610 */
 121                 .vendor = PCI_VENDOR_ID_DLINK,
 122                 .device = 0x3300,
 123                 .subvendor = PCI_ANY_ID,
 124                 .subdevice = PCI_ANY_ID,
 125                 .driver_data = 3,
 126         },
 127         {
 128                 .vendor = PCI_VENDOR_ID_REALTEK,
 129                 .device = 0x8185,
 130                 .subvendor = PCI_ANY_ID,
 131                 .subdevice = PCI_ANY_ID,
 132                 .driver_data = 4,
 133         },
 134 #endif
 135         {
 136                 .vendor = 0,
 137                 .device = 0,
 138                 .subvendor = 0,
 139                 .subdevice = 0,
 140                 .driver_data = 0,
 141         }
 142 };
 143
 144
 145 static char* ifname = "wlan%d";
 146 static int hwseqnum = 0;
 147 //static char* ifname = "ath%d";
 148 static int hwwep = 0;
 149 static int channels = 0x3fff;
 150
 151 #define eqMacAddr(a,b)          ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
 152 #define cpMacAddr(des,src)            ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
 153 MODULE_LICENSE("GPL");
 154 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
 155 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
 156 MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
 157
 158
 159
 160 /*
 161 MODULE_PARM(ifname, "s");
 162 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
 163
 164 MODULE_PARM(hwseqnum,"i");
 165 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
 166
 167 MODULE_PARM(hwwep,"i");
 168 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
 169
 170 MODULE_PARM(channels,"i");
 171 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
 172 */
 173
 174 module_param(ifname, charp, S_IRUGO|S_IWUSR );
 175 module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
 176 module_param(hwwep,int, S_IRUGO|S_IWUSR);
 177 module_param(channels,int, S_IRUGO|S_IWUSR);
 178
 179 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
 180 //MODULE_PARM_DESC(devname," Net interface name, ath%d=default");
 181 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
 182 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
 183 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
 184
 185
 186 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
 187                                        const struct pci_device_id *id);
 188
 189 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
 190
 191 static void rtl8180_shutdown (struct pci_dev *pdev)
 192 {
 193         struct net_device *dev = pci_get_drvdata(pdev);
 194         if (dev->netdev_ops->ndo_stop)
 195                 dev->netdev_ops->ndo_stop(dev);
 196         pci_disable_device(pdev);
 197 }
 198
 199 static struct pci_driver rtl8180_pci_driver = {
 200         .name           = RTL8180_MODULE_NAME,            /* Driver name   */
 201         .id_table       = rtl8180_pci_id_tbl,             /* PCI_ID table  */
 202         .probe          = rtl8180_pci_probe,              /* probe fn      */
 203         .remove         = __devexit_p(rtl8180_pci_remove),/* remove fn     */
 204 #ifdef CONFIG_RTL8180_PM
 205         .suspend        = rtl8180_suspend,                /* PM suspend fn */
 206         .resume         = rtl8180_resume,                 /* PM resume fn  */
 207 #else
 208         .suspend        = NULL,                           /* PM suspend fn */
 209         .resume         = NULL,                           /* PM resume fn  */
 210 #endif
 211         .shutdown       = rtl8180_shutdown,
 212 };
 213
 214
 215
 216 #ifdef CONFIG_RTL8180_IO_MAP
 217
 218 u8 read_nic_byte(struct net_device *dev, int x)
 219 {
 220         return 0xff&inb(dev->base_addr +x);
 221 }
 222
 223 u32 read_nic_dword(struct net_device *dev, int x)
 224 {
 225         return inl(dev->base_addr +x);
 226 }
 227
 228 u16 read_nic_word(struct net_device *dev, int x)
 229 {
 230         return inw(dev->base_addr +x);
 231 }
 232
 233 void write_nic_byte(struct net_device *dev, int x,u8 y)
 234 {
 235         outb(y&0xff,dev->base_addr +x);
 236 }
 237
 238 void write_nic_word(struct net_device *dev, int x,u16 y)
 239 {
 240         outw(y,dev->base_addr +x);
 241 }
 242
 243 void write_nic_dword(struct net_device *dev, int x,u32 y)
 244 {
 245         outl(y,dev->base_addr +x);
 246 }
 247
 248 #else /* RTL_IO_MAP */
 249
 250 u8 read_nic_byte(struct net_device *dev, int x)
 251 {
 252         return 0xff&readb((u8*)dev->mem_start +x);
 253 }
 254
 255 u32 read_nic_dword(struct net_device *dev, int x)
 256 {
 257         return readl((u8*)dev->mem_start +x);
 258 }
 259
 260 u16 read_nic_word(struct net_device *dev, int x)
 261 {
 262         return readw((u8*)dev->mem_start +x);
 263 }
 264
 265 void write_nic_byte(struct net_device *dev, int x,u8 y)
 266 {
 267         writeb(y,(u8*)dev->mem_start +x);
 268         udelay(20);
 269 }
 270
 271 void write_nic_dword(struct net_device *dev, int x,u32 y)
 272 {
 273         writel(y,(u8*)dev->mem_start +x);
 274         udelay(20);
 275 }
 276
 277 void write_nic_word(struct net_device *dev, int x,u16 y)
 278 {
 279         writew(y,(u8*)dev->mem_start +x);
 280         udelay(20);
 281 }
 282
 283 #endif /* RTL_IO_MAP */
 284
 285
 286
 287
 288
 289 inline void force_pci_posting(struct net_device *dev)
 290 {
 291         read_nic_byte(dev,EPROM_CMD);
 292 #ifndef CONFIG_RTL8180_IO_MAP
 293         mb();
 294 #endif
 295 }
 296
 297
 298 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
 299 void set_nic_rxring(struct net_device *dev);
 300 void set_nic_txring(struct net_device *dev);
 301 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
 302 void rtl8180_commit(struct net_device *dev);
 303 void rtl8180_start_tx_beacon(struct net_device *dev);
 304
 305 /****************************************************************************
 306    -----------------------------PROCFS STUFF-------------------------
 307 *****************************************************************************/
 308
 309 static struct proc_dir_entry *rtl8180_proc = NULL;
 310
 311 static int proc_get_registers(char *page, char **start,
 312                           off_t offset, int count,
 313                           int *eof, void *data)
 314 {
 315         struct net_device *dev = data;
 316 //      struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 317
 318         int len = 0;
 319         int i,n;
 320
 321         int max=0xff;
 322
 323         /* This dump the current register page */
 324         for(n=0;n<=max;)
 325         {
 326                 //printk( "\nD: %2x> ", n);
 327                 len += snprintf(page + len, count - len,
 328                         "\nD:  %2x > ",n);
 329
 330                 for(i=0;i<16 && n<=max;i++,n++)
 331                 len += snprintf(page + len, count - len,
 332                         "%2x ",read_nic_byte(dev,n));
 333
 334                 //      printk("%2x ",read_nic_byte(dev,n));
 335         }
 336         len += snprintf(page + len, count - len,"\n");
 337
 338
 339
 340         *eof = 1;
 341         return len;
 342
 343 }
 344
 345 int get_curr_tx_free_desc(struct net_device *dev, int priority);
 346
 347 static int proc_get_stats_hw(char *page, char **start,
 348                           off_t offset, int count,
 349                           int *eof, void *data)
 350 {
 351         //struct net_device *dev = data;
 352         //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 353
 354         int len = 0;
 355 #ifdef  CONFIG_RTL8185B
 356
 357 #else
 358         len += snprintf(page + len, count - len,
 359                 "NIC int: %lu\n"
 360                 "Total int: %lu\n"
 361                 "--------------------\n"
 362                 "LP avail desc %d\n"
 363                 "NP avail desc %d\n"
 364                 "--------------------\n"
 365                 "LP phys dma addr %x\n"
 366                 "LP NIC ptr %x\n"
 367                 "LP virt 32base %x\n"
 368                 "LP virt 32tail %x\n"
 369                 "--------------------\n"
 370                 "NP phys dma addr %x\n"
 371                 "NP NIC ptr %x\n"
 372                 "NP virt 32base %x\n"
 373                 "NP virt 32tail %x\n"
 374                 "--------------------\n"
 375                 "BP phys dma addr %x\n"
 376                 "BP NIC ptr %x\n"
 377                 "BP virt 32base %x\n"
 378                 "BP virt 32tail %x\n",
 379                 priv->stats.ints,
 380                 priv->stats.shints,
 381                 get_curr_tx_free_desc(dev,LOW_PRIORITY),
 382                 get_curr_tx_free_desc(dev,NORM_PRIORITY),
 383                 (u32)priv->txvipringdma,
 384                 read_nic_dword(dev,TLPDA),
 385                 (u32)priv->txvipring,
 386                 (u32)priv->txvipringtail,
 387                 (u32)priv->txvopringdma,
 388                 read_nic_dword(dev,TNPDA),
 389                 (u32)priv->txvopring,
 390                 (u32)priv->txvopringtail,
 391                 (u32)priv->txbeaconringdma,
 392                 read_nic_dword(dev,TBDA),
 393                 (u32)priv->txbeaconring,
 394                 (u32)priv->txbeaconringtail);
 395 #endif
 396         *eof = 1;
 397         return len;
 398 }
 399
 400
 401 static int proc_get_stats_rx(char *page, char **start,
 402                           off_t offset, int count,
 403                           int *eof, void *data)
 404 {
 405         struct net_device *dev = data;
 406         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 407
 408         int len = 0;
 409
 410         len += snprintf(page + len, count - len,
 411         /*      "RX descriptor not available: %lu\n"
 412                 "RX incomplete (missing last descriptor): %lu\n"
 413                 "RX not data: %lu\n"
 414                 //"RX descriptor pointer reset: %lu\n"
 415                 "RX descriptor pointer lost: %lu\n"
 416                 //"RX pointer workaround: %lu\n"
 417                 "RX error int: %lu\n"
 418                 "RX fifo overflow: %lu\n"
 419                 "RX int: %lu\n"
 420                 "RX packet: %lu\n"
 421                 "RX bytes: %lu\n"
 422                 "RX DMA fail: %lu\n",
 423                 priv->stats.rxrdu,
 424                 priv->stats.rxnolast,
 425                 priv->stats.rxnodata,
 426                 //priv->stats.rxreset,
 427                 priv->stats.rxnopointer,
 428                 //priv->stats.rxwrkaround,
 429                 priv->stats.rxerr,
 430                 priv->stats.rxoverflow,
 431                 priv->stats.rxint,
 432                 priv->ieee80211->stats.rx_packets,
 433                 priv->ieee80211->stats.rx_bytes,
 434                 priv->stats.rxdmafail  */
 435                 "RX OK: %lu\n"
 436                 "RX Retry: %lu\n"
 437                 "RX CRC Error(0-500): %lu\n"
 438                 "RX CRC Error(500-1000): %lu\n"
 439                 "RX CRC Error(>1000): %lu\n"
 440                 "RX ICV Error: %lu\n",
 441                 priv->stats.rxint,
 442                 priv->stats.rxerr,
 443                 priv->stats.rxcrcerrmin,
 444                 priv->stats.rxcrcerrmid,
 445                 priv->stats.rxcrcerrmax,
 446                 priv->stats.rxicverr
 447                 );
 448
 449         *eof = 1;
 450         return len;
 451 }
 452
 453 #if 0
 454 static int proc_get_stats_ieee(char *page, char **start,
 455                           off_t offset, int count,
 456                           int *eof, void *data)
 457 {
 458         struct net_device *dev = data;
 459         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 460
 461         int len = 0;
 462
 463         len += snprintf(page + len, count - len,
 464                 "TXed association requests: %u\n"
 465                 "TXed authentication requests: %u\n"
 466                 "RXed successful association response: %u\n"
 467                 "RXed failed association response: %u\n"
 468                 "RXed successful authentication response: %u\n"
 469                 "RXed failed authentication response: %u\n"
 470                 "Association requests without response: %u\n"
 471                 "Authentication requests without response: %u\n"
 472                 "TX probe response: %u\n"
 473                 "RX probe request: %u\n"
 474                 "TX probe request: %lu\n"
 475                 "RX authentication requests: %lu\n"
 476                 "RX association requests: %lu\n"
 477                 "Reassociations: %lu\n",
 478                 priv->ieee80211->ieee_stats.tx_ass,
 479                 priv->ieee80211->ieee_stats.tx_aut,
 480                 priv->ieee80211->ieee_stats.rx_ass_ok,
 481                 priv->ieee80211->ieee_stats.rx_ass_err,
 482                 priv->ieee80211->ieee_stats.rx_aut_ok,
 483                 priv->ieee80211->ieee_stats.rx_aut_err,
 484                 priv->ieee80211->ieee_stats.ass_noresp,
 485                 priv->ieee80211->ieee_stats.aut_noresp,
 486                 priv->ieee80211->ieee_stats.tx_probe,
 487                 priv->ieee80211->ieee_stats.rx_probe,
 488                 priv->ieee80211->ieee_stats.tx_probe_rq,
 489                 priv->ieee80211->ieee_stats.rx_auth_rq,
 490                 priv->ieee80211->ieee_stats.rx_assoc_rq,
 491                 priv->ieee80211->ieee_stats.reassoc);
 492
 493         *eof = 1;
 494         return len;
 495 }
 496 #endif
 497 #if 0
 498 static int proc_get_stats_ap(char *page, char **start,
 499                           off_t offset, int count,
 500                           int *eof, void *data)
 501 {
 502         struct net_device *dev = data;
 503         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 504         struct mac_htable_t *list;
 505         int i;
 506         int len = 0;
 507
 508         if(priv->ieee80211->iw_mode != IW_MODE_MASTER){
 509                 len += snprintf(page + len, count - len,
 510                 "Card is not acting as AP...\n"
 511                 );
 512         }else{
 513                 len += snprintf(page + len, count - len,
 514                 "List of associated STA:\n"
 515                 );
 516
 517                 for(i=0;i<MAC_HTABLE_ENTRY;i++)
 518                         for (list = priv->ieee80211->assoc_htable[i]; list!=NULL; list = list->next){
 519                                 len += snprintf(page + len, count - len,
 520                                         MACSTR"\n",MAC2STR(list->adr));
 521                         }
 522
 523         }
 524         *eof = 1;
 525         return len;
 526 }
 527 #endif
 528
 529 static int proc_get_stats_tx(char *page, char **start,
 530                           off_t offset, int count,
 531                           int *eof, void *data)
 532 {
 533         struct net_device *dev = data;
 534         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 535
 536         int len = 0;
 537         unsigned long totalOK;
 538
 539         totalOK=priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
 540         len += snprintf(page + len, count - len,
 541         /*      "TX normal priority ok int: %lu\n"
 542                 "TX normal priority error int: %lu\n"
 543                 "TX high priority ok int: %lu\n"
 544                 "TX high priority failed error int: %lu\n"
 545                 "TX low priority ok int: %lu\n"
 546                 "TX low priority failed error int: %lu\n"
 547                 "TX bytes: %lu\n"
 548                 "TX packets: %lu\n"
 549                 "TX queue resume: %lu\n"
 550                 "TX queue stopped?: %d\n"
 551                 "TX fifo overflow: %lu\n"
 552                 //"SW TX stop: %lu\n"
 553                 //"SW TX wake: %lu\n"
 554                 "TX beacon: %lu\n"
 555                 "TX beacon aborted: %lu\n",
 556                 priv->stats.txnpokint,
 557                 priv->stats.txnperr,
 558                 priv->stats.txhpokint,
 559                 priv->stats.txhperr,
 560                 priv->stats.txlpokint,
 561                 priv->stats.txlperr,
 562                 priv->ieee80211->stats.tx_bytes,
 563                 priv->ieee80211->stats.tx_packets,
 564                 priv->stats.txresumed,
 565                 netif_queue_stopped(dev),
 566                 priv->stats.txoverflow,
 567                 //priv->ieee80211->ieee_stats.swtxstop,
 568                 //priv->ieee80211->ieee_stats.swtxawake,
 569                 priv->stats.txbeacon,
 570                 priv->stats.txbeaconerr  */
 571                 "TX OK: %lu\n"
 572                 "TX Error: %lu\n"
 573                 "TX Retry: %lu\n"
 574                 "TX beacon OK: %lu\n"
 575                 "TX beacon error: %lu\n",
 576                 totalOK,
 577                 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
 578                 priv->stats.txretry,
 579                 priv->stats.txbeacon,
 580                 priv->stats.txbeaconerr
 581         );
 582
 583         *eof = 1;
 584         return len;
 585 }
 586
 587
 588 #if WIRELESS_EXT < 17
 589 static struct iw_statistics *r8180_get_wireless_stats(struct net_device *dev)
 590 {
 591        struct r8180_priv *priv = ieee80211_priv(dev);
 592
 593        return &priv->wstats;
 594 }
 595 #endif
 596 void rtl8180_proc_module_init(void)
 597 {
 598         DMESG("Initializing proc filesystem");
 599         rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
 600 }
 601
 602
 603 void rtl8180_proc_module_remove(void)
 604 {
 605         remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
 606 }
 607
 608
 609 void rtl8180_proc_remove_one(struct net_device *dev)
 610 {
 611         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 612         if (priv->dir_dev) {
 613                 remove_proc_entry("stats-hw", priv->dir_dev);
 614                 remove_proc_entry("stats-tx", priv->dir_dev);
 615                 remove_proc_entry("stats-rx", priv->dir_dev);
 616 //              remove_proc_entry("stats-ieee", priv->dir_dev);
 617 //              remove_proc_entry("stats-ap", priv->dir_dev);
 618                 remove_proc_entry("registers", priv->dir_dev);
 619                 remove_proc_entry(dev->name, rtl8180_proc);
 620                 priv->dir_dev = NULL;
 621         }
 622 }
 623
 624
 625 void rtl8180_proc_init_one(struct net_device *dev)
 626 {
 627         struct proc_dir_entry *e;
 628         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 629         priv->dir_dev = rtl8180_proc;
 630         if (!priv->dir_dev) {
 631                 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
 632                       dev->name);
 633                 return;
 634         }
 635
 636         e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
 637                                    priv->dir_dev, proc_get_stats_hw, dev);
 638
 639         if (!e) {
 640                 DMESGE("Unable to initialize "
 641                       "/proc/net/r8180/%s/stats-hw\n",
 642                       dev->name);
 643         }
 644
 645         e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
 646                                    priv->dir_dev, proc_get_stats_rx, dev);
 647
 648         if (!e) {
 649                 DMESGE("Unable to initialize "
 650                       "/proc/net/r8180/%s/stats-rx\n",
 651                       dev->name);
 652         }
 653
 654
 655         e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
 656                                    priv->dir_dev, proc_get_stats_tx, dev);
 657
 658         if (!e) {
 659                 DMESGE("Unable to initialize "
 660                       "/proc/net/r8180/%s/stats-tx\n",
 661                       dev->name);
 662         }
 663         #if 0
 664         e = create_proc_read_entry("stats-ieee", S_IFREG | S_IRUGO,
 665                                    priv->dir_dev, proc_get_stats_ieee, dev);
 666
 667         if (!e) {
 668                 DMESGE("Unable to initialize "
 669                       "/proc/net/rtl8180/%s/stats-ieee\n",
 670                       dev->name);
 671         }
 672         #endif
 673         #if 0
 674         e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
 675                                    priv->dir_dev, proc_get_stats_ap, dev);
 676
 677         if (!e) {
 678                 DMESGE("Unable to initialize "
 679                       "/proc/net/rtl8180/%s/stats-ap\n",
 680                       dev->name);
 681         }
 682         #endif
 683
 684         e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
 685                                    priv->dir_dev, proc_get_registers, dev);
 686
 687         if (!e) {
 688                 DMESGE("Unable to initialize "
 689                       "/proc/net/r8180/%s/registers\n",
 690                       dev->name);
 691         }
 692 }
 693 /****************************************************************************
 694    -----------------------------MISC STUFF-------------------------
 695 *****************************************************************************/
 696 /*
 697   FIXME: check if we can use some standard already-existent
 698   data type+functions in kernel
 699 */
 700
 701 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
 702                 struct buffer **bufferhead)
 703 {
 704 #ifdef DEBUG_RING
 705         DMESG("adding buffer to TX/RX struct");
 706 #endif
 707
 708         struct buffer *tmp;
 709
 710         if(! *buffer){
 711
 712                 *buffer = kmalloc(sizeof(struct buffer),GFP_KERNEL);
 713
 714                 if (*buffer == NULL) {
 715                         DMESGE("Failed to kmalloc head of TX/RX struct");
 716                         return -1;
 717                 }
 718                 (*buffer)->next=*buffer;
 719                 (*buffer)->buf=buf;
 720                 (*buffer)->dma=dma;
 721                 if(bufferhead !=NULL)
 722                         (*bufferhead) = (*buffer);
 723                 return 0;
 724         }
 725         tmp=*buffer;
 726
 727         while(tmp->next!=(*buffer)) tmp=tmp->next;
 728         if ((tmp->next= kmalloc(sizeof(struct buffer),GFP_KERNEL)) == NULL){
 729                 DMESGE("Failed to kmalloc TX/RX struct");
 730                 return -1;
 731         }
 732         tmp->next->buf=buf;
 733         tmp->next->dma=dma;
 734         tmp->next->next=*buffer;
 735
 736         return 0;
 737 }
 738
 739
 740 void buffer_free(struct net_device *dev,struct buffer **buffer,int len,short
 741 consistent)
 742 {
 743
 744         struct buffer *tmp,*next;
 745         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 746         struct pci_dev *pdev=priv->pdev;
 747         //int i;
 748
 749         if(! *buffer) return;
 750
 751         /*for(tmp=*buffer; tmp->next != *buffer; tmp=tmp->next)
 752
 753         */
 754         tmp=*buffer;
 755         do{
 756                 next=tmp->next;
 757                 if(consistent){
 758                         pci_free_consistent(pdev,len,
 759                                     tmp->buf,tmp->dma);
 760                 }else{
 761                         pci_unmap_single(pdev, tmp->dma,
 762                         len,PCI_DMA_FROMDEVICE);
 763                         kfree(tmp->buf);
 764                 }
 765                 kfree(tmp);
 766                 tmp = next;
 767         }
 768         while(next != *buffer);
 769
 770         *buffer=NULL;
 771 }
 772
 773
 774 void print_buffer(u32 *buffer, int len)
 775 {
 776         int i;
 777         u8 *buf =(u8*)buffer;
 778
 779         printk("ASCII BUFFER DUMP (len: %x):\n",len);
 780
 781         for(i=0;i<len;i++)
 782                 printk("%c",buf[i]);
 783
 784         printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
 785
 786         for(i=0;i<len;i++)
 787                 printk("%02x",buf[i]);
 788
 789         printk("\n");
 790 }
 791
 792
 793 int get_curr_tx_free_desc(struct net_device *dev, int priority)
 794 {
 795         struct r8180_priv *priv = ieee80211_priv(dev);
 796         u32* tail;
 797         u32* head;
 798         int ret;
 799
 800         switch (priority){
 801                 case MANAGE_PRIORITY:
 802                         head = priv->txmapringhead;
 803                         tail = priv->txmapringtail;
 804                         break;
 805                 case BK_PRIORITY:
 806                         head = priv->txbkpringhead;
 807                         tail = priv->txbkpringtail;
 808                         break;
 809                 case BE_PRIORITY:
 810                         head = priv->txbepringhead;
 811                         tail = priv->txbepringtail;
 812                         break;
 813                 case VI_PRIORITY:
 814                         head = priv->txvipringhead;
 815                         tail = priv->txvipringtail;
 816                         break;
 817                 case VO_PRIORITY:
 818                         head = priv->txvopringhead;
 819                         tail = priv->txvopringtail;
 820                         break;
 821                 case HI_PRIORITY:
 822                         head = priv->txhpringhead;
 823                         tail = priv->txhpringtail;
 824                         break;
 825                 default:
 826                         return -1;
 827         }
 828
 829         //DMESG("%x %x", head, tail);
 830
 831         /* FIXME FIXME FIXME FIXME */
 832
 833 #if 0
 834         if( head <= tail ) return priv->txringcount-1 - (tail - head)/8;
 835         return (head - tail)/8/4;
 836 #else
 837         if( head <= tail )
 838                 ret = priv->txringcount - (tail - head)/8;
 839         else
 840                 ret = (head - tail)/8;
 841
 842         if(ret > priv->txringcount ) DMESG("BUG");
 843         return ret;
 844 #endif
 845 }
 846
 847
 848 short check_nic_enought_desc(struct net_device *dev, int priority)
 849 {
 850         struct r8180_priv *priv = ieee80211_priv(dev);
 851         struct ieee80211_device *ieee = netdev_priv(dev);
 852
 853         int requiredbyte, required;
 854         requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
 855
 856         if(ieee->current_network.QoS_Enable) {
 857                 requiredbyte += 2;
 858         };
 859
 860         required = requiredbyte / (priv->txbuffsize-4);
 861         if (requiredbyte % priv->txbuffsize) required++;
 862         /* for now we keep two free descriptor as a safety boundary
 863          * between the tail and the head
 864          */
 865
 866         return (required+2 < get_curr_tx_free_desc(dev,priority));
 867 }
 868
 869
 870 /* This function is only for debuging purpose */
 871 void check_tx_ring(struct net_device *dev, int pri)
 872 {
 873         static int maxlog =3;
 874         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 875         u32* tmp;
 876         struct buffer *buf;
 877         int i;
 878         int nic;
 879         u32* tail;
 880         u32* head;
 881         u32* begin;
 882         u32 nicbegin;
 883         struct buffer* buffer;
 884
 885         maxlog --;
 886         if (maxlog <0 ) return;
 887
 888         switch(pri) {
 889         case MANAGE_PRIORITY:
 890                 tail = priv->txmapringtail;
 891                 begin = priv->txmapring;
 892                 head = priv->txmapringhead;
 893                 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
 894                 buffer = priv->txmapbufs;
 895                 nicbegin = priv->txmapringdma;
 896                 break;
 897
 898
 899         case BK_PRIORITY:
 900                 tail = priv->txbkpringtail;
 901                 begin = priv->txbkpring;
 902                 head = priv->txbkpringhead;
 903                 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
 904                 buffer = priv->txbkpbufs;
 905                 nicbegin = priv->txbkpringdma;
 906                 break;
 907
 908         case BE_PRIORITY:
 909                 tail = priv->txbepringtail;
 910                 begin = priv->txbepring;
 911                 head = priv->txbepringhead;
 912                 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
 913                 buffer = priv->txbepbufs;
 914                 nicbegin = priv->txbepringdma;
 915                 break;
 916
 917         case VI_PRIORITY:
 918                 tail = priv->txvipringtail;
 919                 begin = priv->txvipring;
 920                 head = priv->txvipringhead;
 921                 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
 922                 buffer = priv->txvipbufs;
 923                 nicbegin = priv->txvipringdma;
 924                 break;
 925
 926
 927         case VO_PRIORITY:
 928                 tail = priv->txvopringtail;
 929                 begin = priv->txvopring;
 930                 head = priv->txvopringhead;
 931                 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
 932                 buffer = priv->txvopbufs;
 933                 nicbegin = priv->txvopringdma;
 934                 break;
 935
 936         case HI_PRIORITY:
 937                 tail = priv->txhpringtail;
 938                 begin = priv->txhpring;
 939                 head = priv->txhpringhead;
 940                 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
 941                 buffer = priv->txhpbufs;
 942                 nicbegin = priv->txhpringdma;
 943                 break;
 944
 945         default:
 946                 return ;
 947                 break;
 948         }
 949
 950         if(!priv->txvopbufs)
 951                 DMESGE ("NIC TX ack, but TX queue corrupted!");
 952         else{
 953
 954                 for(i=0,buf=buffer, tmp=begin;
 955                         tmp<begin+(priv->txringcount)*8;
 956                         tmp+=8,buf=buf->next,i++)
 957
 958                         DMESG("BUF%d %s %x %s. Next : %x",i,
 959                               *tmp & (1<<31) ? "filled" : "empty",
 960                               *(buf->buf),
 961                               *tmp & (1<<15)? "ok": "err", *(tmp+4));
 962         }
 963
 964         return;
 965 }
 966
 967
 968
 969 /* this function is only for debugging purpose */
 970 void check_rxbuf(struct net_device *dev)
 971 {
 972         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 973         u32* tmp;
 974         struct buffer *buf;
 975         u8 rx_desc_size;
 976
 977 #ifdef CONFIG_RTL8185B
 978         rx_desc_size = 8;
 979 #else
 980         rx_desc_size = 4;
 981 #endif
 982
 983         if(!priv->rxbuffer)
 984                 DMESGE ("NIC RX ack, but RX queue corrupted!");
 985
 986         else{
 987
 988                 for(buf=priv->rxbuffer, tmp=priv->rxring;
 989                     tmp < priv->rxring+(priv->rxringcount)*rx_desc_size;
 990                     tmp+=rx_desc_size, buf=buf->next)
 991
 992                         DMESG("BUF %s %x",
 993                               *tmp & (1<<31) ? "empty" : "filled",
 994                               *(buf->buf));
 995         }
 996
 997         return;
 998 }
 999
1000
1001 void dump_eprom(struct net_device *dev)
1002 {
1003         int i;
1004         for(i=0; i<63; i++)
1005                 DMESG("EEPROM addr %x : %x", i, eprom_read(dev,i));
1006 }
1007
1008
1009 void rtl8180_dump_reg(struct net_device *dev)
1010 {
1011         int i;
1012         int n;
1013         int max=0xff;
1014
1015         DMESG("Dumping NIC register map");
1016
1017         for(n=0;n<=max;)
1018         {
1019                 printk( "\nD: %2x> ", n);
1020                 for(i=0;i<16 && n<=max;i++,n++)
1021                         printk("%2x ",read_nic_byte(dev,n));
1022         }
1023         printk("\n");
1024 }
1025
1026
1027 void fix_tx_fifo(struct net_device *dev)
1028 {
1029         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1030         u32 *tmp;
1031         int i;
1032 #ifdef DEBUG_TX_ALLOC
1033         DMESG("FIXING TX FIFOs");
1034 #endif
1035         for (tmp=priv->txmapring, i=0;
1036              i < priv->txringcount;
1037              tmp+=8, i++){
1038                 *tmp = *tmp &~ (1<<31);
1039         }
1040
1041         for (tmp=priv->txbkpring, i=0;
1042              i < priv->txringcount;
1043              tmp+=8, i++) {
1044                 *tmp = *tmp &~ (1<<31);
1045         }
1046
1047         for (tmp=priv->txbepring, i=0;
1048              i < priv->txringcount;
1049              tmp+=8, i++){
1050                 *tmp = *tmp &~ (1<<31);
1051         }
1052         for (tmp=priv->txvipring, i=0;
1053              i < priv->txringcount;
1054              tmp+=8, i++) {
1055                 *tmp = *tmp &~ (1<<31);
1056         }
1057
1058         for (tmp=priv->txvopring, i=0;
1059              i < priv->txringcount;
1060              tmp+=8, i++){
1061                 *tmp = *tmp &~ (1<<31);
1062         }
1063
1064         for (tmp=priv->txhpring, i=0;
1065              i < priv->txringcount;
1066              tmp+=8,i++){
1067                 *tmp = *tmp &~ (1<<31);
1068         }
1069
1070         for (tmp=priv->txbeaconring, i=0;
1071              i < priv->txbeaconcount;
1072              tmp+=8, i++){
1073                 *tmp = *tmp &~ (1<<31);
1074         }
1075 #ifdef DEBUG_TX_ALLOC
1076         DMESG("TX FIFOs FIXED");
1077 #endif
1078         priv->txmapringtail = priv->txmapring;
1079         priv->txmapringhead = priv->txmapring;
1080         priv->txmapbufstail = priv->txmapbufs;
1081
1082         priv->txbkpringtail = priv->txbkpring;
1083         priv->txbkpringhead = priv->txbkpring;
1084         priv->txbkpbufstail = priv->txbkpbufs;
1085
1086         priv->txbepringtail = priv->txbepring;
1087         priv->txbepringhead = priv->txbepring;
1088         priv->txbepbufstail = priv->txbepbufs;
1089
1090         priv->txvipringtail = priv->txvipring;
1091         priv->txvipringhead = priv->txvipring;
1092         priv->txvipbufstail = priv->txvipbufs;
1093
1094         priv->txvopringtail = priv->txvopring;
1095         priv->txvopringhead = priv->txvopring;
1096         priv->txvopbufstail = priv->txvopbufs;
1097
1098         priv->txhpringtail = priv->txhpring;
1099         priv->txhpringhead = priv->txhpring;
1100         priv->txhpbufstail = priv->txhpbufs;
1101
1102         priv->txbeaconringtail = priv->txbeaconring;
1103         priv->txbeaconbufstail = priv->txbeaconbufs;
1104         set_nic_txring(dev);
1105
1106         ieee80211_reset_queue(priv->ieee80211);
1107         priv->ack_tx_to_ieee = 0;
1108 }
1109
1110
1111 void fix_rx_fifo(struct net_device *dev)
1112 {
1113         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1114         u32 *tmp;
1115         struct buffer *rxbuf;
1116         u8 rx_desc_size;
1117
1118 #ifdef CONFIG_RTL8185B
1119         rx_desc_size = 8; // 4*8 = 32 bytes
1120 #else
1121         rx_desc_size = 4;
1122 #endif
1123
1124 #ifdef DEBUG_RXALLOC
1125         DMESG("FIXING RX FIFO");
1126         check_rxbuf(dev);
1127 #endif
1128
1129         for (tmp=priv->rxring, rxbuf=priv->rxbufferhead;
1130              (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
1131              tmp+=rx_desc_size,rxbuf=rxbuf->next){
1132                 *(tmp+2) = rxbuf->dma;
1133                 *tmp=*tmp &~ 0xfff;
1134                 *tmp=*tmp | priv->rxbuffersize;
1135                 *tmp |= (1<<31);
1136         }
1137
1138 #ifdef DEBUG_RXALLOC
1139         DMESG("RX FIFO FIXED");
1140         check_rxbuf(dev);
1141 #endif
1142
1143         priv->rxringtail=priv->rxring;
1144         priv->rxbuffer=priv->rxbufferhead;
1145         priv->rx_skb_complete=1;
1146         set_nic_rxring(dev);
1147 }
1148
1149
1150 /****************************************************************************
1151       ------------------------------HW STUFF---------------------------
1152 *****************************************************************************/
1153
1154 unsigned char QUALITY_MAP[] = {
1155   0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
1156   0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
1157   0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
1158   0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
1159   0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
1160   0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
1161   0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
1162   0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
1163   0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
1164   0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
1165 };
1166
1167 unsigned char STRENGTH_MAP[] = {
1168   0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
1169   0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
1170   0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
1171   0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
1172   0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
1173   0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
1174   0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
1175   0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
1176   0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
1177   0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
1178 };
1179
1180 void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual){
1181         //void Mlme_UpdateRssiSQ(struct net_device *dev, u8 *rssi, u8 *qual){
1182         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1183         u32 temp;
1184         u32 temp2;
1185         u32 temp3;
1186         u32 lsb;
1187         u32 q;
1188         u32 orig_qual;
1189         u8  _rssi;
1190
1191         q = *qual;
1192         orig_qual = *qual;
1193         _rssi = 0; // avoid gcc complains..
1194
1195         if (q <= 0x4e) {
1196                 temp = QUALITY_MAP[q];
1197         } else {
1198                 if( q & 0x80 ) {
1199                         temp = 0x32;
1200                 } else {
1201                         temp = 1;
1202                 }
1203         }
1204
1205         *qual = temp;
1206         temp2 = *rssi;
1207
1208         switch(priv->rf_chip){
1209         case RFCHIPID_RFMD:
1210                 lsb = temp2 & 1;
1211                 temp2 &= 0x7e;
1212                 if ( !lsb || !(temp2 <= 0x3c) ) {
1213                         temp2 = 0x64;
1214                 } else {
1215                         temp2 = 100 * temp2 / 0x3c;
1216                 }
1217                 *rssi = temp2 & 0xff;
1218                 _rssi = temp2 & 0xff;
1219                 break;
1220         case RFCHIPID_INTERSIL:
1221                 lsb = temp2;
1222                 temp2 &= 0xfffffffe;
1223                 temp2 *= 251;
1224                 temp3 = temp2;
1225                 temp2 <<= 6;
1226                 temp3 += temp2;
1227                 temp3 <<= 1;
1228                 temp2 = 0x4950df;
1229                 temp2 -= temp3;
1230                 lsb &= 1;
1231                 if ( temp2 <= 0x3e0000 ) {
1232                         if ( temp2 < 0xffef0000 )
1233                                 temp2 = 0xffef0000;
1234                 } else {
1235                         temp2 = 0x3e0000;
1236                 }
1237                 if ( !lsb ) {
1238                         temp2 -= 0xf0000;
1239                 } else {
1240                         temp2 += 0xf0000;
1241                 }
1242
1243                 temp3 = 0x4d0000;
1244                 temp3 -= temp2;
1245                 temp3 *= 100;
1246                 temp3 = temp3 / 0x6d;
1247                 temp3 >>= 0x10;
1248                 _rssi = temp3 & 0xff;
1249                 *rssi = temp3 & 0xff;
1250                 break;
1251         case RFCHIPID_GCT:
1252                 lsb = temp2 & 1;
1253                 temp2 &= 0x7e;
1254                 if ( ! lsb || !(temp2 <= 0x3c) ){
1255                         temp2 = 0x64;
1256                 } else {
1257                         temp2 = (100 * temp2) / 0x3c;
1258                 }
1259                 *rssi = temp2 & 0xff;
1260                 _rssi = temp2 & 0xff;
1261                 break;
1262         case RFCHIPID_PHILIPS:
1263                 if( orig_qual <= 0x4e ){
1264                         _rssi = STRENGTH_MAP[orig_qual];
1265                         *rssi = _rssi;
1266                 } else {
1267                         orig_qual -= 0x80;
1268                         if ( !orig_qual ){
1269                                 _rssi = 1;
1270                                 *rssi = 1;
1271                         } else {
1272                                 _rssi = 0x32;
1273                                 *rssi = 0x32;
1274                         }
1275                 }
1276                 break;
1277
1278         /* case 4 */
1279         case RFCHIPID_MAXIM:
1280                 lsb = temp2 & 1;
1281                 temp2 &= 0x7e;
1282                 temp2 >>= 1;
1283                 temp2 += 0x42;
1284                 if( lsb != 0 ){
1285                         temp2 += 0xa;
1286                 }
1287                 *rssi = temp2 & 0xff;
1288                 _rssi = temp2 & 0xff;
1289                 break;
1290         }
1291
1292         if ( _rssi < 0x64 ){
1293                 if ( _rssi == 0 ) {
1294                         *rssi = 1;
1295                 }
1296         } else {
1297                 *rssi = 0x64;
1298         }
1299
1300         return;
1301 }
1302
1303
1304 void rtl8180_irq_enable(struct net_device *dev)
1305 {
1306         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1307         priv->irq_enabled = 1;
1308 /*
1309         write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW |\
1310         INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK |\
1311         INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |\
1312         INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT);
1313 */
1314         write_nic_word(dev,INTA_MASK, priv->irq_mask);
1315 }
1316
1317
1318 void rtl8180_irq_disable(struct net_device *dev)
1319 {
1320         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1321
1322 #ifdef CONFIG_RTL8185B
1323         write_nic_dword(dev,IMR,0);
1324 #else
1325         write_nic_word(dev,INTA_MASK,0);
1326 #endif
1327         force_pci_posting(dev);
1328         priv->irq_enabled = 0;
1329 }
1330
1331
1332 void rtl8180_set_mode(struct net_device *dev,int mode)
1333 {
1334         u8 ecmd;
1335         ecmd=read_nic_byte(dev, EPROM_CMD);
1336         ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1337         ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1338         ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1339         ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1340         write_nic_byte(dev, EPROM_CMD, ecmd);
1341 }
1342
1343 void rtl8180_adapter_start(struct net_device *dev);
1344 void rtl8180_beacon_tx_enable(struct net_device *dev);
1345
1346 void rtl8180_update_msr(struct net_device *dev)
1347 {
1348         struct r8180_priv *priv = ieee80211_priv(dev);
1349         u8 msr;
1350         u32 rxconf;
1351
1352         msr  = read_nic_byte(dev, MSR);
1353         msr &= ~ MSR_LINK_MASK;
1354
1355         rxconf=read_nic_dword(dev,RX_CONF);
1356
1357         if(priv->ieee80211->state == IEEE80211_LINKED)
1358         {
1359                 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1360                         msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1361                 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1362                         msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1363                 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1364                         msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1365                 else
1366                         msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1367                 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
1368
1369         }else {
1370                 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1371                 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
1372         }
1373
1374         write_nic_byte(dev, MSR, msr);
1375         write_nic_dword(dev, RX_CONF, rxconf);
1376
1377 }
1378
1379
1380
1381 void rtl8180_set_chan(struct net_device *dev,short ch)
1382 {
1383         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1384
1385         if((ch > 14) || (ch < 1))
1386         {
1387                 printk("In %s: Invalid chnanel %d\n", __func__, ch);
1388                 return;
1389         }
1390
1391         priv->chan=ch;
1392         //printk("in %s:channel is %d\n",__func__,ch);
1393         priv->rf_set_chan(dev,priv->chan);
1394
1395 }
1396
1397
1398 void rtl8180_rx_enable(struct net_device *dev)
1399 {
1400         u8 cmd;
1401         u32 rxconf;
1402         /* for now we accept data, management & ctl frame*/
1403         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1404
1405         rxconf=read_nic_dword(dev,RX_CONF);
1406         rxconf = rxconf &~ MAC_FILTER_MASK;
1407         rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
1408         rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
1409         rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
1410         rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
1411 //      rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1412         if (dev->flags & IFF_PROMISC) DMESG ("NIC in promisc mode");
1413
1414         if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1415            dev->flags & IFF_PROMISC){
1416                 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1417         }else{
1418                 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
1419                 if(priv->card_8185 == 0)
1420                         rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1421         }
1422
1423         /*if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1424                 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1425                 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1426         }*/
1427
1428         if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1429                 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
1430                 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
1431                 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
1432         }
1433
1434         if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1435                 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1436
1437         //if(!priv->card_8185){
1438                 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1439                 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1440         //}
1441
1442         rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1443         rxconf = rxconf &~ MAX_RX_DMA_MASK;
1444         rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
1445
1446         //if(!priv->card_8185)
1447                 rxconf = rxconf | RCR_ONLYERLPKT;
1448
1449         rxconf = rxconf &~ RCR_CS_MASK;
1450         if(!priv->card_8185)
1451                 rxconf |= (priv->rcr_csense<<RCR_CS_SHIFT);
1452 //      rxconf &=~ 0xfff00000;
1453 //      rxconf |= 0x90100000;//9014f76f;
1454         write_nic_dword(dev, RX_CONF, rxconf);
1455
1456         fix_rx_fifo(dev);
1457
1458 #ifdef DEBUG_RX
1459         DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RX_CONF));
1460 #endif
1461         cmd=read_nic_byte(dev,CMD);
1462         write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
1463
1464         /* In rtl8139 driver seems that DMA threshold has to be written
1465          *  after enabling RX, so we rewrite RX_CONFIG register
1466          */
1467         //mdelay(100);
1468 //      write_nic_dword(dev, RX_CONF, rxconf);
1469
1470 }
1471
1472
1473 void set_nic_txring(struct net_device *dev)
1474 {
1475         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1476 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1477
1478         write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
1479 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1480         write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
1481 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1482         write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
1483 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1484         write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
1485 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1486         write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
1487 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1488         write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
1489 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1490
1491         write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
1492 }
1493
1494
1495 void rtl8180_conttx_enable(struct net_device *dev)
1496 {
1497         u32 txconf;
1498         txconf = read_nic_dword(dev,TX_CONF);
1499         txconf = txconf &~ TX_LOOPBACK_MASK;
1500         txconf = txconf | (TX_LOOPBACK_CONTINUE <<TX_LOOPBACK_SHIFT);
1501         write_nic_dword(dev,TX_CONF,txconf);
1502 }
1503
1504
1505 void rtl8180_conttx_disable(struct net_device *dev)
1506 {
1507         u32 txconf;
1508         txconf = read_nic_dword(dev,TX_CONF);
1509         txconf = txconf &~ TX_LOOPBACK_MASK;
1510         txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1511         write_nic_dword(dev,TX_CONF,txconf);
1512 }
1513
1514
1515 void rtl8180_tx_enable(struct net_device *dev)
1516 {
1517         u8 cmd;
1518         u8 tx_agc_ctl;
1519         u8 byte;
1520         u32 txconf;
1521         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1522         txconf= read_nic_dword(dev,TX_CONF);
1523
1524
1525         if(priv->card_8185){
1526
1527
1528                 byte = read_nic_byte(dev,CW_CONF);
1529                 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
1530                 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
1531                 write_nic_byte(dev, CW_CONF, byte);
1532
1533                 tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
1534                 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
1535                 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
1536                 tx_agc_ctl |=(1<<TX_AGC_CTL_FEEDBACK_ANT);
1537                 write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
1538                 /*
1539                 write_nic_word(dev, 0x5e, 0x01);
1540                 force_pci_posting(dev);
1541                 mdelay(1);
1542                 write_nic_word(dev, 0xfe, 0x10);
1543                 force_pci_posting(dev);
1544                 mdelay(1);
1545                 write_nic_word(dev, 0x5e, 0x00);
1546                 force_pci_posting(dev);
1547                 mdelay(1);
1548                 */
1549                 write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
1550         }
1551
1552         if(priv->card_8185){
1553
1554                 txconf = txconf &~ (1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
1555
1556         }else{
1557
1558                 if(hwseqnum)
1559                         txconf= txconf &~ (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1560                 else
1561                         txconf= txconf | (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1562         }
1563
1564         txconf = txconf &~ TX_LOOPBACK_MASK;
1565         txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1566         txconf = txconf &~ TCR_DPRETRY_MASK;
1567         txconf = txconf &~ TCR_RTSRETRY_MASK;
1568         txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
1569         txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
1570         txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
1571
1572         if(priv->card_8185){
1573                 if(priv->hw_plcp_len)
1574                         txconf = txconf &~ TCR_PLCP_LEN;
1575                 else
1576                         txconf = txconf | TCR_PLCP_LEN;
1577         }else{
1578                 txconf = txconf &~ TCR_SAT;
1579         }
1580         txconf = txconf &~ TCR_MXDMA_MASK;
1581         txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
1582         txconf = txconf | TCR_CWMIN;
1583         txconf = txconf | TCR_DISCW;
1584
1585 //      if(priv->ieee80211->hw_wep)
1586 //              txconf=txconf &~ (1<<TX_NOICV_SHIFT);
1587 //      else
1588                 txconf=txconf | (1<<TX_NOICV_SHIFT);
1589
1590         write_nic_dword(dev,TX_CONF,txconf);
1591
1592
1593         fix_tx_fifo(dev);
1594
1595 #ifdef DEBUG_TX
1596         DMESG("txconf: %x %x",txconf,read_nic_dword(dev,TX_CONF));
1597 #endif
1598
1599         cmd=read_nic_byte(dev,CMD);
1600         write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
1601
1602 //      mdelay(100);
1603         write_nic_dword(dev,TX_CONF,txconf);
1604 //      #endif
1605 /*
1606         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1607         write_nic_byte(dev, TX_DMA_POLLING, priv->dma_poll_mask);
1608         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1609         */
1610 }
1611
1612
1613 void rtl8180_beacon_tx_enable(struct net_device *dev)
1614 {
1615         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1616
1617         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1618 #ifdef CONFIG_RTL8185B
1619         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
1620         write_nic_byte(dev,TPPollStop, priv->dma_poll_mask);
1621 #else
1622         priv->dma_poll_mask &=~(1<<TX_DMA_STOP_BEACON_SHIFT);
1623         write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1624 #endif
1625         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1626 }
1627
1628
1629 void rtl8180_beacon_tx_disable(struct net_device *dev)
1630 {
1631         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1632
1633         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1634 #ifdef CONFIG_RTL8185B
1635         priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
1636         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
1637 #else
1638         priv->dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
1639         write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1640 #endif
1641         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1642
1643 }
1644
1645
1646 void rtl8180_rtx_disable(struct net_device *dev)
1647 {
1648         u8 cmd;
1649         struct r8180_priv *priv = ieee80211_priv(dev);
1650
1651         cmd=read_nic_byte(dev,CMD);
1652         write_nic_byte(dev, CMD, cmd &~ \
1653                        ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
1654         force_pci_posting(dev);
1655         mdelay(10);
1656         /*while (read_nic_byte(dev,CMD) & (1<<CMD_RX_ENABLE_SHIFT))
1657           udelay(10);
1658         */
1659
1660         if(!priv->rx_skb_complete)
1661                 dev_kfree_skb_any(priv->rx_skb);
1662 }
1663
1664 #if 0
1665 int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1666 {
1667         int i;
1668         u32 *tmp;
1669         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1670
1671         priv->txbeaconring = (u32*)pci_alloc_consistent(priv->pdev,
1672                                           sizeof(u32)*8*count,
1673                                           &priv->txbeaconringdma);
1674         if (!priv->txbeaconring) return -1;
1675         for (tmp=priv->txbeaconring,i=0;i<count;i++){
1676                 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1677                 /*
1678                 *(tmp+2) = (u32)dma_tmp;
1679                 *(tmp+3) = bufsize;
1680                 */
1681                 if(i+1<count)
1682                         *(tmp+4) = (u32)priv->txbeaconringdma+((i+1)*8*4);
1683                 else
1684                         *(tmp+4) = (u32)priv->txbeaconringdma;
1685
1686                 tmp=tmp+8;
1687         }
1688         return 0;
1689 }
1690 #endif
1691
1692 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
1693                          int addr)
1694 {
1695         int i;
1696         u32 *desc;
1697         u32 *tmp;
1698         dma_addr_t dma_desc, dma_tmp;
1699         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1700         struct pci_dev *pdev = priv->pdev;
1701         void *buf;
1702
1703         if((bufsize & 0xfff) != bufsize) {
1704                 DMESGE ("TX buffer allocation too large");
1705                 return 0;
1706         }
1707         desc = (u32*)pci_alloc_consistent(pdev,
1708                                           sizeof(u32)*8*count+256, &dma_desc);
1709         if(desc==NULL) return -1;
1710         if(dma_desc & 0xff){
1711
1712                 /*
1713                  * descriptor's buffer must be 256 byte aligned
1714                  * we shouldn't be here, since we set DMA mask !
1715                  */
1716                 WARN(1, "DMA buffer is not aligned\n");
1717         }
1718         tmp=desc;
1719         for (i=0;i<count;i++)
1720         {
1721                 buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1722                 if (buf == NULL) return -ENOMEM;
1723
1724                 switch(addr) {
1725 #if 0
1726                 case TX_NORMPRIORITY_RING_ADDR:
1727                         if(-1 == buffer_add(&(priv->txnpbufs),buf,dma_tmp,NULL)){
1728                                 DMESGE("Unable to allocate mem for buffer NP");
1729                                 return -ENOMEM;
1730                         }
1731                         break;
1732
1733                 case TX_LOWPRIORITY_RING_ADDR:
1734                         if(-1 == buffer_add(&(priv->txlpbufs),buf,dma_tmp,NULL)){
1735                                 DMESGE("Unable to allocate mem for buffer LP");
1736                                 return -ENOMEM;
1737                         }
1738                         break;
1739
1740                 case TX_HIGHPRIORITY_RING_ADDR:
1741                         if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1742                                 DMESGE("Unable to allocate mem for buffer HP");
1743                                 return -ENOMEM;
1744                         }
1745                         break;
1746 #else
1747                 case TX_MANAGEPRIORITY_RING_ADDR:
1748                         if(-1 == buffer_add(&(priv->txmapbufs),buf,dma_tmp,NULL)){
1749                                 DMESGE("Unable to allocate mem for buffer NP");
1750                                 return -ENOMEM;
1751                         }
1752                         break;
1753
1754                 case TX_BKPRIORITY_RING_ADDR:
1755                         if(-1 == buffer_add(&(priv->txbkpbufs),buf,dma_tmp,NULL)){
1756                                 DMESGE("Unable to allocate mem for buffer LP");
1757                                 return -ENOMEM;
1758                         }
1759                         break;
1760                 case TX_BEPRIORITY_RING_ADDR:
1761                         if(-1 == buffer_add(&(priv->txbepbufs),buf,dma_tmp,NULL)){
1762                                 DMESGE("Unable to allocate mem for buffer NP");
1763                                 return -ENOMEM;
1764                         }
1765                         break;
1766
1767                 case TX_VIPRIORITY_RING_ADDR:
1768                         if(-1 == buffer_add(&(priv->txvipbufs),buf,dma_tmp,NULL)){
1769                                 DMESGE("Unable to allocate mem for buffer LP");
1770                                 return -ENOMEM;
1771                         }
1772                         break;
1773                 case TX_VOPRIORITY_RING_ADDR:
1774                         if(-1 == buffer_add(&(priv->txvopbufs),buf,dma_tmp,NULL)){
1775                                 DMESGE("Unable to allocate mem for buffer NP");
1776                                 return -ENOMEM;
1777                         }
1778                         break;
1779 #endif
1780                 case TX_HIGHPRIORITY_RING_ADDR:
1781                         if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1782                                 DMESGE("Unable to allocate mem for buffer HP");
1783                                 return -ENOMEM;
1784                         }
1785                         break;
1786                 case TX_BEACON_RING_ADDR:
1787                         if(-1 == buffer_add(&(priv->txbeaconbufs),buf,dma_tmp,NULL)){
1788                         DMESGE("Unable to allocate mem for buffer BP");
1789                                 return -ENOMEM;
1790                         }
1791                         break;
1792                 }
1793                 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1794                 *(tmp+2) = (u32)dma_tmp;
1795                 *(tmp+3) = bufsize;
1796
1797                 if(i+1<count)
1798                         *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1799                 else
1800                         *(tmp+4) = (u32)dma_desc;
1801
1802                 tmp=tmp+8;
1803         }
1804
1805         switch(addr) {
1806         case TX_MANAGEPRIORITY_RING_ADDR:
1807                 priv->txmapringdma=dma_desc;
1808                 priv->txmapring=desc;
1809                 break;
1810
1811         case TX_BKPRIORITY_RING_ADDR:
1812                 priv->txbkpringdma=dma_desc;
1813                 priv->txbkpring=desc;
1814                 break;
1815
1816         case TX_BEPRIORITY_RING_ADDR:
1817                 priv->txbepringdma=dma_desc;
1818                 priv->txbepring=desc;
1819                 break;
1820
1821         case TX_VIPRIORITY_RING_ADDR:
1822                 priv->txvipringdma=dma_desc;
1823                 priv->txvipring=desc;
1824                 break;
1825
1826         case TX_VOPRIORITY_RING_ADDR:
1827                 priv->txvopringdma=dma_desc;
1828                 priv->txvopring=desc;
1829                 break;
1830
1831         case TX_HIGHPRIORITY_RING_ADDR:
1832                 priv->txhpringdma=dma_desc;
1833                 priv->txhpring=desc;
1834                 break;
1835
1836         case TX_BEACON_RING_ADDR:
1837                 priv->txbeaconringdma=dma_desc;
1838                 priv->txbeaconring=desc;
1839                 break;
1840
1841         }
1842
1843 #ifdef DEBUG_TX
1844         DMESG("Tx dma physical address: %x",dma_desc);
1845 #endif
1846
1847         return 0;
1848 }
1849
1850
1851 void free_tx_desc_rings(struct net_device *dev)
1852 {
1853
1854         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1855         struct pci_dev *pdev=priv->pdev;
1856         int count = priv->txringcount;
1857
1858         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1859                             priv->txmapring, priv->txmapringdma);
1860         buffer_free(dev,&(priv->txmapbufs),priv->txbuffsize,1);
1861
1862         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1863                             priv->txbkpring, priv->txbkpringdma);
1864         buffer_free(dev,&(priv->txbkpbufs),priv->txbuffsize,1);
1865
1866         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1867                             priv->txbepring, priv->txbepringdma);
1868         buffer_free(dev,&(priv->txbepbufs),priv->txbuffsize,1);
1869
1870         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1871                             priv->txvipring, priv->txvipringdma);
1872         buffer_free(dev,&(priv->txvipbufs),priv->txbuffsize,1);
1873
1874         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1875                             priv->txvopring, priv->txvopringdma);
1876         buffer_free(dev,&(priv->txvopbufs),priv->txbuffsize,1);
1877
1878         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1879                             priv->txhpring, priv->txhpringdma);
1880         buffer_free(dev,&(priv->txhpbufs),priv->txbuffsize,1);
1881
1882         count = priv->txbeaconcount;
1883         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1884                             priv->txbeaconring, priv->txbeaconringdma);
1885         buffer_free(dev,&(priv->txbeaconbufs),priv->txbuffsize,1);
1886 }
1887
1888 #if 0
1889 void free_beacon_desc_ring(struct net_device *dev,int count)
1890 {
1891
1892         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1893         struct pci_dev *pdev=priv->pdev;
1894
1895         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1896                             priv->txbeaconring, priv->txbeaconringdma);
1897
1898         if (priv->beacon_buf)
1899                 pci_free_consistent(priv->pdev,
1900                         priv->master_beaconsize,priv->beacon_buf,priv->beacondmabuf);
1901
1902 }
1903 #endif
1904 void free_rx_desc_ring(struct net_device *dev)
1905 {
1906         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1907         struct pci_dev *pdev = priv->pdev;
1908
1909         int count = priv->rxringcount;
1910
1911 #ifdef CONFIG_RTL8185B
1912         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1913                             priv->rxring, priv->rxringdma);
1914 #else
1915         pci_free_consistent(pdev, sizeof(u32)*4*count+256,
1916                             priv->rxring, priv->rxringdma);
1917 #endif
1918
1919         buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0);
1920 }
1921
1922
1923 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1924 {
1925         int i;
1926         u32 *desc;
1927         u32 *tmp;
1928         dma_addr_t dma_desc,dma_tmp;
1929         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1930         struct pci_dev *pdev=priv->pdev;
1931         void *buf;
1932         u8 rx_desc_size;
1933
1934 #ifdef CONFIG_RTL8185B
1935         rx_desc_size = 8; // 4*8 = 32 bytes
1936 #else
1937         rx_desc_size = 4;
1938 #endif
1939
1940         if((bufsize & 0xfff) != bufsize){
1941                 DMESGE ("RX buffer allocation too large");
1942                 return -1;
1943         }
1944
1945         desc = (u32*)pci_alloc_consistent(pdev,sizeof(u32)*rx_desc_size*count+256,
1946                                           &dma_desc);
1947
1948         if(dma_desc & 0xff){
1949
1950                 /*
1951                  * descriptor's buffer must be 256 byte aligned
1952                  * should never happen since we specify the DMA mask
1953                  */
1954                 WARN(1, "DMA buffer is not aligned\n");
1955         }
1956
1957         priv->rxring=desc;
1958         priv->rxringdma=dma_desc;
1959         tmp=desc;
1960
1961         for (i=0;i<count;i++){
1962
1963                 if ((buf= kmalloc(bufsize * sizeof(u8),GFP_ATOMIC)) == NULL){
1964                         DMESGE("Failed to kmalloc RX buffer");
1965                         return -1;
1966                 }
1967
1968                 dma_tmp = pci_map_single(pdev,buf,bufsize * sizeof(u8),
1969                                          PCI_DMA_FROMDEVICE);
1970
1971 #ifdef DEBUG_ZERO_RX
1972                 int j;
1973                 for(j=0;j<bufsize;j++) ((u8*)buf)[i] = 0;
1974 #endif
1975
1976                 //buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1977                 if(-1 == buffer_add(&(priv->rxbuffer), buf,dma_tmp,
1978                            &(priv->rxbufferhead))){
1979                            DMESGE("Unable to allocate mem RX buf");
1980                            return -1;
1981                 }
1982                 *tmp = 0; //zero pads the header of the descriptor
1983                 *tmp = *tmp |( bufsize&0xfff);
1984                 *(tmp+2) = (u32)dma_tmp;
1985                 *tmp = *tmp |(1<<31); // descriptor void, owned by the NIC
1986
1987 #ifdef DEBUG_RXALLOC
1988                 DMESG("Alloc %x size buffer, DMA mem @ %x, virtual mem @ %x",
1989                       (u32)(bufsize&0xfff), (u32)dma_tmp, (u32)buf);
1990 #endif
1991
1992                 tmp=tmp+rx_desc_size;
1993         }
1994
1995         *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); // this is the last descriptor
1996
1997
1998 #ifdef DEBUG_RXALLOC
1999         DMESG("RX DMA physical address: %x",dma_desc);
2000 #endif
2001
2002         return 0;
2003 }
2004
2005
2006 void set_nic_rxring(struct net_device *dev)
2007 {
2008         u8 pgreg;
2009         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2010
2011         //rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2012
2013         pgreg=read_nic_byte(dev, PGSELECT);
2014         write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
2015
2016         //rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2017
2018         write_nic_dword(dev, RXRING_ADDR,priv->rxringdma);
2019 }
2020
2021
2022 void rtl8180_reset(struct net_device *dev)
2023 {
2024         //u32 txconf = 0x80e00707; //FIXME: Make me understandable
2025         u8 cr;
2026
2027         //write_nic_dword(dev,TX_CONF,txconf);
2028
2029         rtl8180_irq_disable(dev);
2030
2031         cr=read_nic_byte(dev,CMD);
2032         cr = cr & 2;
2033         cr = cr | (1<<CMD_RST_SHIFT);
2034         write_nic_byte(dev,CMD,cr);
2035
2036         force_pci_posting(dev);
2037
2038         mdelay(200);
2039
2040         if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
2041                 DMESGW("Card reset timeout!");
2042         else
2043                 DMESG("Card successfully reset");
2044
2045 //#ifndef CONFIG_RTL8185B
2046         rtl8180_set_mode(dev,EPROM_CMD_LOAD);
2047         force_pci_posting(dev);
2048         mdelay(200);
2049 //#endif
2050 }
2051
2052 inline u16 ieeerate2rtlrate(int rate)
2053 {
2054         switch(rate){
2055         case 10:
2056         return 0;
2057         case 20:
2058         return 1;
2059         case 55:
2060         return 2;
2061         case 110:
2062         return 3;
2063         case 60:
2064         return 4;
2065         case 90:
2066         return 5;
2067         case 120:
2068         return 6;
2069         case 180:
2070         return 7;
2071         case 240:
2072         return 8;
2073         case 360:
2074         return 9;
2075         case 480:
2076         return 10;
2077         case 540:
2078         return 11;
2079         default:
2080         return 3;
2081
2082         }
2083 }
2084
2085 static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720};
2086 inline u16 rtl8180_rate2rate(short rate)
2087 {
2088         if (rate >12) return 10;
2089         return rtl_rate[rate];
2090 }
2091 inline u8 rtl8180_IsWirelessBMode(u16 rate)
2092 {
2093         if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
2094                 return 1;
2095         else return 0;
2096 }
2097 u16 N_DBPSOfRate(u16 DataRate);
2098 u16 ComputeTxTime(
2099         u16             FrameLength,
2100         u16             DataRate,
2101         u8              bManagementFrame,
2102         u8              bShortPreamble
2103 )
2104 {
2105         u16     FrameTime;
2106         u16     N_DBPS;
2107         u16     Ceiling;
2108
2109         if( rtl8180_IsWirelessBMode(DataRate) )
2110         {
2111                 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
2112                 {       // long preamble
2113                         FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
2114                 }
2115                 else
2116                 {       // Short preamble
2117                         FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
2118                 }
2119                 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
2120                                 FrameTime ++;
2121         } else {        //802.11g DSSS-OFDM PLCP length field calculation.
2122                 N_DBPS = N_DBPSOfRate(DataRate);
2123                 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
2124                                 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
2125                 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
2126         }
2127         return FrameTime;
2128 }
2129 u16 N_DBPSOfRate(u16 DataRate)
2130 {
2131          u16 N_DBPS = 24;
2132
2133          switch(DataRate)
2134          {
2135          case 60:
2136           N_DBPS = 24;
2137           break;
2138
2139          case 90:
2140           N_DBPS = 36;
2141           break;
2142
2143          case 120:
2144           N_DBPS = 48;
2145           break;
2146
2147          case 180:
2148           N_DBPS = 72;
2149           break;
2150
2151          case 240:
2152           N_DBPS = 96;
2153           break;
2154
2155          case 360:
2156           N_DBPS = 144;
2157           break;
2158
2159          case 480:
2160           N_DBPS = 192;
2161           break;
2162
2163          case 540:
2164           N_DBPS = 216;
2165           break;
2166
2167          default:
2168           break;
2169          }
2170
2171          return N_DBPS;
2172 }
2173
2174 //{by amy 080312
2175 //
2176 //      Description:
2177 //      For Netgear case, they want good-looking singal strength.
2178 //              2004.12.05, by rcnjko.
2179 //
2180 long
2181 NetgearSignalStrengthTranslate(
2182         long LastSS,
2183         long CurrSS
2184         )
2185 {
2186         long RetSS;
2187
2188         // Step 1. Scale mapping.
2189         if(CurrSS >= 71 && CurrSS <= 100)
2190         {
2191                 RetSS = 90 + ((CurrSS - 70) / 3);
2192         }
2193         else if(CurrSS >= 41 && CurrSS <= 70)
2194         {
2195                 RetSS = 78 + ((CurrSS - 40) / 3);
2196         }
2197         else if(CurrSS >= 31 && CurrSS <= 40)
2198         {
2199                 RetSS = 66 + (CurrSS - 30);
2200         }
2201         else if(CurrSS >= 21 && CurrSS <= 30)
2202         {
2203                 RetSS = 54 + (CurrSS - 20);
2204         }
2205         else if(CurrSS >= 5 && CurrSS <= 20)
2206         {
2207                 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
2208         }
2209         else if(CurrSS == 4)
2210         {
2211                 RetSS = 36;
2212         }
2213         else if(CurrSS == 3)
2214         {
2215                 RetSS = 27;
2216         }
2217         else if(CurrSS == 2)
2218         {
2219                 RetSS = 18;
2220         }
2221         else if(CurrSS == 1)
2222         {
2223                 RetSS = 9;
2224         }
2225         else
2226         {
2227                 RetSS = CurrSS;
2228         }
2229         //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2230
2231         // Step 2. Smoothing.
2232         if(LastSS > 0)
2233         {
2234                 RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6;
2235         }
2236         //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2237
2238         return RetSS;
2239 }
2240 //
2241 //      Description:
2242 //              Translate 0-100 signal strength index into dBm.
2243 //
2244 long
2245 TranslateToDbm8185(
2246         u8 SignalStrengthIndex  // 0-100 index.
2247         )
2248 {
2249         long    SignalPower; // in dBm.
2250
2251         // Translate to dBm (x=0.5y-95).
2252         SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
2253         SignalPower -= 95;
2254
2255         return SignalPower;
2256 }
2257 //
2258 //      Description:
2259 //              Perform signal smoothing for dynamic mechanism.
2260 //              This is different with PerformSignalSmoothing8185 in smoothing fomula.
2261 //              No dramatic adjustion is apply because dynamic mechanism need some degree
2262 //              of correctness. Ported from 8187B.
2263 //      2007-02-26, by Bruce.
2264 //
2265 void
2266 PerformUndecoratedSignalSmoothing8185(
2267         struct r8180_priv *priv,
2268         bool    bCckRate
2269         )
2270 {
2271
2272
2273         // Determin the current packet is CCK rate.
2274         priv->bCurCCKPkt = bCckRate;
2275
2276         if(priv->UndecoratedSmoothedSS >= 0)
2277         {
2278                 priv->UndecoratedSmoothedSS = ( (priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10) ) / 6;
2279         }
2280         else
2281         {
2282                 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
2283         }
2284
2285         priv->UndercorateSmoothedRxPower = ( (priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower* 11)) / 60;
2286
2287 //      printk("Sommthing SignalSterngth (%d) => UndecoratedSmoothedSS (%d)\n", priv->SignalStrength, priv->UndecoratedSmoothedSS);
2288 //      printk("Sommthing RxPower (%d) => UndecoratedRxPower (%d)\n", priv->RxPower, priv->UndercorateSmoothedRxPower);
2289
2290         //if(priv->CurCCKRSSI >= 0 && bCckRate)
2291         if(bCckRate)
2292         {
2293                 priv->CurCCKRSSI = priv->RSSI;
2294         }
2295         else
2296         {
2297                 priv->CurCCKRSSI = 0;
2298         }
2299
2300         // Boundary checking.
2301         // TODO: The overflow condition does happen, if we want to fix,
2302         // we shall recalculate thresholds first.
2303         if(priv->UndecoratedSmoothedSS > 100)
2304         {
2305 //              printk("UndecoratedSmoothedSS(%d) overflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2306         }
2307         if(priv->UndecoratedSmoothedSS < 0)
2308         {
2309 //              printk("UndecoratedSmoothedSS(%d) underflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2310         }
2311
2312 }
2313
2314 //by amy 080312}
2315
2316 /* This is rough RX isr handling routine*/
2317 void rtl8180_rx(struct net_device *dev)
2318 {
2319         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2320         struct sk_buff *tmp_skb;
2321
2322         //struct sk_buff *skb;
2323         short first,last;
2324         u32 len;
2325         int lastlen;
2326         unsigned char quality, signal;
2327         u8 rate;
2328         //u32 *prism_hdr;
2329         u32 *tmp,*tmp2;
2330         u8 rx_desc_size;
2331         u8 padding;
2332         //u32 count=0;
2333         char rxpower = 0;
2334         u32 RXAGC = 0;
2335         long RxAGC_dBm = 0;
2336         u8      LNA=0, BB=0;
2337         u8      LNA_gain[4]={02, 17, 29, 39};
2338         u8  Antenna = 0;
2339         struct ieee80211_hdr *hdr;//by amy
2340         u16 fc,type;
2341         u8 bHwError = 0,bCRC = 0,bICV = 0;
2342         //bHwError = 0;
2343         //bCRC = 0;
2344         //bICV = 0;
2345         bool    bCckRate = false;
2346         u8     RSSI = 0;
2347         long    SignalStrengthIndex = 0;//+by amy 080312
2348 //      u8 SignalStrength = 0;
2349         struct ieee80211_rx_stats stats = {
2350                 .signal = 0,
2351                 .noise = -98,
2352                 .rate = 0,
2353         //      .mac_time = jiffies,
2354                 .freq = IEEE80211_24GHZ_BAND,
2355         };
2356
2357 #ifdef CONFIG_RTL8185B
2358         stats.nic_type = NIC_8185B;
2359         rx_desc_size = 8;
2360
2361 #else
2362         stats.nic_type = NIC_8185;
2363         rx_desc_size = 4;
2364 #endif
2365         //printk("receive frame!%d\n",count++);
2366         //if (!priv->rxbuffer) DMESG ("EE: NIC RX ack, but RX queue corrupted!");
2367         //else {
2368
2369         if ((*(priv->rxringtail)) & (1<<31)) {
2370
2371                 /* we have got an RX int, but the descriptor
2372                  * we are pointing is empty*/
2373
2374                 priv->stats.rxnodata++;
2375                 priv->ieee80211->stats.rx_errors++;
2376
2377         /*      if (! *(priv->rxring) & (1<<31)) {
2378
2379                         priv->stats.rxreset++;
2380                         priv->rxringtail=priv->rxring;
2381                         priv->rxbuffer=priv->rxbufferhead;
2382
2383                 }else{*/
2384
2385                 #if 0
2386                 /* Maybe it is possible that the NIC has skipped some descriptors or
2387                  * it has reset its internal pointer to the beginning of the ring
2388                  * we search for the first filled descriptor in the ring, or we break
2389                  * putting again the pointer in the old location if we do not found any.
2390                  * This is quite dangerous, what does happen if the nic writes
2391                  * two descriptor (say A and B) when we have just checked the descriptor
2392                  * A and we are going to check the descriptor B..This might happen if the
2393                  * interrupt was dummy, there was not really filled descriptors and
2394                  * the NIC didn't lose pointer
2395                  */
2396
2397                 //priv->stats.rxwrkaround++;
2398
2399                 tmp = priv->rxringtail;
2400                 while (*(priv->rxringtail) & (1<<31)){
2401
2402                         priv->rxringtail+=4;
2403
2404                         if(priv->rxringtail >=
2405                                 (priv->rxring)+(priv->rxringcount )*4)
2406                                 priv->rxringtail=priv->rxring;
2407
2408                         priv->rxbuffer=(priv->rxbuffer->next);
2409
2410                         if(priv->rxringtail == tmp ){
2411                                 //DMESG("EE: Could not find RX pointer");
2412                                 priv->stats.rxnopointer++;
2413                                 break;
2414                         }
2415                 }
2416                 #else
2417
2418                 tmp2 = NULL;
2419                 tmp = priv->rxringtail;
2420                 do{
2421                         if(tmp == priv->rxring)
2422                                 //tmp  = priv->rxring + (priv->rxringcount )*rx_desc_size; xiong-2006-11-15
2423                                 tmp  = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
2424                         else
2425                                 tmp -= rx_desc_size;
2426
2427                         if(! (*tmp & (1<<31)))
2428                                 tmp2 = tmp;
2429                 }while(tmp != priv->rxring);
2430
2431                 if(tmp2) priv->rxringtail = tmp2;
2432                 #endif
2433                 //}
2434         }
2435
2436         /* while there are filled descriptors */
2437         while(!(*(priv->rxringtail) & (1<<31))){
2438                 if(*(priv->rxringtail) & (1<<26))
2439                         DMESGW("RX buffer overflow");
2440                 if(*(priv->rxringtail) & (1<<12))
2441                         priv->stats.rxicverr++;
2442
2443                 if(*(priv->rxringtail) & (1<<27)){
2444                         priv->stats.rxdmafail++;
2445                         //DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail);
2446                         goto drop;
2447                 }
2448
2449                 pci_dma_sync_single_for_cpu(priv->pdev,
2450                                     priv->rxbuffer->dma,
2451                                     priv->rxbuffersize * \
2452                                     sizeof(u8),
2453                                     PCI_DMA_FROMDEVICE);
2454
2455                 first = *(priv->rxringtail) & (1<<29) ? 1:0;
2456                 if(first) priv->rx_prevlen=0;
2457
2458                 last = *(priv->rxringtail) & (1<<28) ? 1:0;
2459                 if(last){
2460                         lastlen=((*priv->rxringtail) &0xfff);
2461
2462                         /* if the last descriptor (that should
2463                          * tell us the total packet len) tell
2464                          * us something less than the descriptors
2465                          * len we had until now, then there is some
2466                          * problem..
2467                          * workaround to prevent kernel panic
2468                          */
2469                         if(lastlen < priv->rx_prevlen)
2470                                 len=0;
2471                         else
2472                                 len=lastlen-priv->rx_prevlen;
2473
2474                         if(*(priv->rxringtail) & (1<<13)) {
2475 //lastlen=((*priv->rxringtail) &0xfff);
2476                                 if ((*(priv->rxringtail) & 0xfff) <500)
2477                                         priv->stats.rxcrcerrmin++;
2478                                 else if ((*(priv->rxringtail) & 0x0fff) >1000)
2479                                         priv->stats.rxcrcerrmax++;
2480                                 else
2481                                         priv->stats.rxcrcerrmid++;
2482
2483                         }
2484
2485                 }else{
2486                         len = priv->rxbuffersize;
2487                 }
2488
2489 #ifdef CONFIG_RTL8185B
2490                 if(first && last) {
2491                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2492                 }else if(first) {
2493                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2494                         if(padding) {
2495                                 len -= 2;
2496                         }
2497                 }else {
2498                         padding = 0;
2499                 }
2500 #ifdef CONFIG_RTL818X_S
2501                padding = 0;
2502 #endif
2503 #endif
2504                 priv->rx_prevlen+=len;
2505
2506                 if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){
2507                         /* HW is probably passing several buggy frames
2508                         * without FD or LD flag set.
2509                         * Throw this garbage away to prevent skb
2510                         * memory exausting
2511                         */
2512                         if(!priv->rx_skb_complete)
2513                                 dev_kfree_skb_any(priv->rx_skb);
2514                         priv->rx_skb_complete = 1;
2515                 }
2516
2517 #ifdef DEBUG_RX_FRAG
2518                 DMESG("Iteration.. len %x",len);
2519                 if(first) DMESG ("First descriptor");
2520                 if(last) DMESG("Last descriptor");
2521
2522 #endif
2523 #ifdef DEBUG_RX_VERBOSE
2524                 print_buffer( priv->rxbuffer->buf, len);
2525 #endif
2526
2527 #ifdef CONFIG_RTL8185B
2528                 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16);
2529                 signal=(signal&0xfe)>>1;        // Modify by hikaru 6.6
2530
2531                 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff));
2532
2533                 stats.mac_time[0] = *(priv->rxringtail+1);
2534                 stats.mac_time[1] = *(priv->rxringtail+2);
2535                 rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42;
2536                 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f);
2537
2538 #else
2539                 signal=((*(priv->rxringtail+1))& (0xff0000))>>16;
2540                 signal=(signal&0xfe)>>1;        // Modify by hikaru 6.6
2541
2542                 quality=((*(priv->rxringtail+1)) & (0xff));
2543
2544                 stats.mac_time[0] = *(priv->rxringtail+2);
2545                 stats.mac_time[1] = *(priv->rxringtail+3);
2546 #endif
2547                 rate=((*(priv->rxringtail)) &
2548                         ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
2549
2550                 stats.rate = rtl8180_rate2rate(rate);
2551                 //DMESG("%d",rate);
2552                 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ;
2553 //              printk("in rtl8180_rx():Antenna is %d\n",Antenna);
2554 //by amy for antenna
2555                 if(!rtl8180_IsWirelessBMode(stats.rate))
2556                 { // OFDM rate.
2557
2558                         RxAGC_dBm = rxpower+1;  //bias
2559                 }
2560                 else
2561                 { // CCK rate.
2562                         RxAGC_dBm = signal;//bit 0 discard
2563
2564                         LNA = (u8) (RxAGC_dBm & 0x60 ) >> 5 ; //bit 6~ bit 5
2565                         BB  = (u8) (RxAGC_dBm & 0x1F);  // bit 4 ~ bit 0
2566
2567                         RxAGC_dBm = -( LNA_gain[LNA] + (BB *2) ); //Pin_11b=-(LNA_gain+BB_gain) (dBm)
2568
2569                         RxAGC_dBm +=4; //bias
2570                 }
2571
2572                 if(RxAGC_dBm & 0x80) //absolute value
2573                         RXAGC= ~(RxAGC_dBm)+1;
2574                 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
2575                 // Translate RXAGC into 1-100.
2576                 if(!rtl8180_IsWirelessBMode(stats.rate))
2577                 { // OFDM rate.
2578                         if(RXAGC>90)
2579                                 RXAGC=90;
2580                         else if(RXAGC<25)
2581                                 RXAGC=25;
2582                         RXAGC=(90-RXAGC)*100/65;
2583                 }
2584                 else
2585                 { // CCK rate.
2586                         if(RXAGC>95)
2587                                 RXAGC=95;
2588                         else if(RXAGC<30)
2589                                 RXAGC=30;
2590                         RXAGC=(95-RXAGC)*100/65;
2591                 }
2592                 priv->SignalStrength = (u8)RXAGC;
2593                 priv->RecvSignalPower = RxAGC_dBm ;  // It can use directly by SD3 CMLin
2594                 priv->RxPower = rxpower;
2595                 priv->RSSI = RSSI;
2596 //{by amy 080312
2597                 // SQ translation formular is provided by SD3 DZ. 2006.06.27, by rcnjko.
2598                 if(quality >= 127)
2599                         quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now;
2600                 else if(quality < 27)
2601                         quality = 100;
2602                 else
2603                         quality = 127 - quality;
2604                 priv->SignalQuality = quality;
2605                 if(!priv->card_8185)
2606                         printk("check your card type\n");
2607
2608                 stats.signal = (u8)quality;//priv->wstats.qual.level = priv->SignalStrength;
2609                 stats.signalstrength = RXAGC;
2610                 if(stats.signalstrength > 100)
2611                         stats.signalstrength = 100;
2612                 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
2613         //      printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength);
2614                 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
2615                 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual;
2616 //by amy 080312}
2617                 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 )
2618                         | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 );
2619                 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
2620                 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
2621             hdr = (struct ieee80211_hdr *)priv->rxbuffer->buf;
2622                     fc = le16_to_cpu(hdr->frame_ctl);
2623                 type = WLAN_FC_GET_TYPE(fc);
2624
2625                         if((IEEE80211_FTYPE_CTL != type) &&
2626                                 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
2627                                  && (!bHwError) && (!bCRC)&& (!bICV))
2628                         {
2629 //by amy 080312
2630                                 // Perform signal smoothing for dynamic mechanism on demand.
2631                                 // This is different with PerformSignalSmoothing8185 in smoothing fomula.
2632                                 // No dramatic adjustion is apply because dynamic mechanism need some degree
2633                                 // of correctness. 2007.01.23, by shien chang.
2634                                 PerformUndecoratedSignalSmoothing8185(priv,bCckRate);
2635                                 //
2636                                 // For good-looking singal strength.
2637                                 //
2638                                 SignalStrengthIndex = NetgearSignalStrengthTranslate(
2639                                                                 priv->LastSignalStrengthInPercent,
2640                                                                 priv->SignalStrength);
2641
2642                                 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
2643                                 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
2644                 //
2645                 // We need more correct power of received packets and the  "SignalStrength" of RxStats is beautified,
2646                 // so we record the correct power here.
2647                 //
2648                                 priv->Stats_SignalQuality =(long) (priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
2649                                 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower -1) / 6;
2650
2651                 // Figure out which antenna that received the lasted packet.
2652                                 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main.
2653 //by amy 080312
2654                             SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
2655                         }
2656
2657 //by amy for antenna
2658
2659
2660
2661
2662
2663
2664 #ifndef DUMMY_RX
2665                 if(first){
2666                         if(!priv->rx_skb_complete){
2667                                 /* seems that HW sometimes fails to reiceve and
2668                                    doesn't provide the last descriptor */
2669 #ifdef DEBUG_RX_SKB
2670                                 DMESG("going to free incomplete skb");
2671 #endif
2672                                 dev_kfree_skb_any(priv->rx_skb);
2673                                 priv->stats.rxnolast++;
2674 #ifdef DEBUG_RX_SKB
2675                                 DMESG("free incomplete skb OK");
2676 #endif
2677                         }
2678                         /* support for prism header has been originally added by Christian */
2679                         if(priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR){
2680
2681 #if 0
2682                                 priv->rx_skb = dev_alloc_skb(len+2+PRISM_HDR_SIZE);
2683                                 if(! priv->rx_skb) goto drop;
2684
2685                                 prism_hdr = (u32*) skb_put(priv->rx_skb,PRISM_HDR_SIZE);
2686                                 prism_hdr[0]=htonl(0x80211001);        //version
2687                                 prism_hdr[1]=htonl(0x40);              //length
2688                                 prism_hdr[2]=htonl(stats.mac_time[1]);    //mactime (HIGH)
2689                                 prism_hdr[3]=htonl(stats.mac_time[0]);    //mactime (LOW)
2690                                 rdtsc(prism_hdr[5], prism_hdr[4]);         //hostime (LOW+HIGH)
2691                                 prism_hdr[4]=htonl(prism_hdr[4]);          //Byte-Order aendern
2692                                 prism_hdr[5]=htonl(prism_hdr[5]);          //Byte-Order aendern
2693                                 prism_hdr[6]=0x00;                     //phytype
2694                                 prism_hdr[7]=htonl(priv->chan);        //channel
2695                                 prism_hdr[8]=htonl(stats.rate);        //datarate
2696                                 prism_hdr[9]=0x00;                     //antenna
2697                                 prism_hdr[10]=0x00;                    //priority
2698                                 prism_hdr[11]=0x00;                    //ssi_type
2699                                 prism_hdr[12]=htonl(stats.signal);     //ssi_signal
2700                                 prism_hdr[13]=htonl(stats.noise);      //ssi_noise
2701                                 prism_hdr[14]=0x00;                    //preamble
2702                                 prism_hdr[15]=0x00;                    //encoding
2703
2704 #endif
2705                         }else{
2706                                 priv->rx_skb = dev_alloc_skb(len+2);
2707                                 if( !priv->rx_skb) goto drop;
2708 #ifdef DEBUG_RX_SKB
2709                                 DMESG("Alloc initial skb %x",len+2);
2710 #endif
2711                         }
2712
2713                         priv->rx_skb_complete=0;
2714                         priv->rx_skb->dev=dev;
2715                 }else{
2716                         /* if we are here we should  have already RXed
2717                         * the first frame.
2718                         * If we get here and the skb is not allocated then
2719                         * we have just throw out garbage (skb not allocated)
2720                         * and we are still rxing garbage....
2721                         */
2722                         if(!priv->rx_skb_complete){
2723
2724                                 tmp_skb= dev_alloc_skb(priv->rx_skb->len +len+2);
2725
2726                                 if(!tmp_skb) goto drop;
2727
2728                                 tmp_skb->dev=dev;
2729 #ifdef DEBUG_RX_SKB
2730                                 DMESG("Realloc skb %x",len+2);
2731 #endif
2732
2733 #ifdef DEBUG_RX_SKB
2734                                 DMESG("going copy prev frag %x",priv->rx_skb->len);
2735 #endif
2736                                 memcpy(skb_put(tmp_skb,priv->rx_skb->len),
2737                                         priv->rx_skb->data,
2738                                         priv->rx_skb->len);
2739 #ifdef DEBUG_RX_SKB
2740                                 DMESG("skb copy prev frag complete");
2741 #endif
2742
2743                                 dev_kfree_skb_any(priv->rx_skb);
2744 #ifdef DEBUG_RX_SKB
2745                                 DMESG("prev skb free ok");
2746 #endif
2747
2748                                 priv->rx_skb=tmp_skb;
2749                         }
2750                 }
2751 #ifdef DEBUG_RX_SKB
2752                 DMESG("going to copy current payload %x",len);
2753 #endif
2754                 if(!priv->rx_skb_complete) {
2755 #ifdef CONFIG_RTL8185B
2756                         if(padding) {
2757                                 memcpy(skb_put(priv->rx_skb,len),
2758                                         (((unsigned char *)priv->rxbuffer->buf) + 2),len);
2759                         } else {
2760 #endif
2761                                 memcpy(skb_put(priv->rx_skb,len),
2762                                         priv->rxbuffer->buf,len);
2763 #ifdef CONFIG_RTL8185B
2764                         }
2765 #endif
2766                 }
2767 #ifdef DEBUG_RX_SKB
2768                 DMESG("current fragment skb copy complete");
2769 #endif
2770
2771                 if(last && !priv->rx_skb_complete){
2772
2773 #ifdef DEBUG_RX_SKB
2774                         DMESG("Got last fragment");
2775 #endif
2776
2777                         if(priv->rx_skb->len > 4)
2778                                 skb_trim(priv->rx_skb,priv->rx_skb->len-4);
2779 #ifdef DEBUG_RX_SKB
2780                         DMESG("yanked out crc, passing to the upper layer");
2781 #endif
2782
2783 #ifndef RX_DONT_PASS_UL
2784                         if(!ieee80211_rx(priv->ieee80211,
2785                                          priv->rx_skb, &stats)){
2786 #ifdef DEBUG_RX
2787                                 DMESGW("Packet not consumed");
2788 #endif
2789 #endif // RX_DONT_PASS_UL
2790
2791                                 dev_kfree_skb_any(priv->rx_skb);
2792 #ifndef RX_DONT_PASS_UL
2793                         }
2794 #endif
2795 #ifdef DEBUG_RX
2796                         else{
2797                                         DMESG("Rcv frag");
2798                         }
2799 #endif
2800                         priv->rx_skb_complete=1;
2801                 }
2802
2803 #endif //DUMMY_RX
2804
2805                 pci_dma_sync_single_for_device(priv->pdev,
2806                                     priv->rxbuffer->dma,
2807                                     priv->rxbuffersize * \
2808                                     sizeof(u8),
2809                                     PCI_DMA_FROMDEVICE);
2810
2811
2812 drop: // this is used when we have not enought mem
2813
2814                 /* restore the descriptor */
2815                 *(priv->rxringtail+2)=priv->rxbuffer->dma;
2816                 *(priv->rxringtail)=*(priv->rxringtail) &~ 0xfff;
2817                 *(priv->rxringtail)=
2818                         *(priv->rxringtail) | priv->rxbuffersize;
2819
2820                 *(priv->rxringtail)=
2821                         *(priv->rxringtail) | (1<<31);
2822                         //^empty descriptor
2823
2824                         //wmb();
2825
2826 #ifdef DEBUG_RX
2827                 DMESG("Current descriptor: %x",(u32)priv->rxringtail);
2828 #endif
2829                 //unsigned long flags;
2830                 //spin_lock_irqsave(&priv->irq_lock,flags);
2831
2832                 priv->rxringtail+=rx_desc_size;
2833                 if(priv->rxringtail >=
2834                    (priv->rxring)+(priv->rxringcount )*rx_desc_size)
2835                         priv->rxringtail=priv->rxring;
2836
2837                 //spin_unlock_irqrestore(&priv->irq_lock,flags);
2838
2839
2840                 priv->rxbuffer=(priv->rxbuffer->next);
2841
2842         }
2843
2844
2845
2846 //      if(get_curr_tx_free_desc(dev,priority))
2847 //      ieee80211_sta_ps_sleep(priv->ieee80211, &tmp, &tmp2);
2848
2849
2850
2851 }
2852
2853
2854 void rtl8180_dma_kick(struct net_device *dev, int priority)
2855 {
2856         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2857
2858         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2859 /*
2860
2861         switch(priority){
2862
2863                 case LOW_PRIORITY:
2864
2865                 write_nic_byte(dev,TX_DMA_POLLING,
2866                        (1<< TX_DMA_POLLING_LOWPRIORITY_SHIFT) |
2867                                 priv->dma_poll_mask);
2868                 break;
2869
2870                 case NORM_PRIORITY:
2871
2872                 write_nic_byte(dev,TX_DMA_POLLING,
2873                        (1<< TX_DMA_POLLING_NORMPRIORITY_SHIFT) |
2874                                 priv->dma_poll_mask);
2875                 break;
2876
2877                 case HI_PRIORITY:
2878
2879                 write_nic_byte(dev,TX_DMA_POLLING,
2880                        (1<< TX_DMA_POLLING_HIPRIORITY_SHIFT) |
2881                                 priv->dma_poll_mask);
2882                 break;
2883
2884         }
2885 */
2886         write_nic_byte(dev, TX_DMA_POLLING,
2887                         (1 << (priority + 1)) | priv->dma_poll_mask);
2888         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2889
2890         force_pci_posting(dev);
2891 }
2892
2893 #if 0
2894 void rtl8180_tx_queues_stop(struct net_device *dev)
2895 {
2896         //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2897         u8 dma_poll_mask = (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2898         dma_poll_mask |= (1<<TX_DMA_STOP_HIPRIORITY_SHIFT);
2899         dma_poll_mask |= (1<<TX_DMA_STOP_NORMPRIORITY_SHIFT);
2900         dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
2901
2902         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2903         write_nic_byte(dev,TX_DMA_POLLING,dma_poll_mask);
2904         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2905 }
2906 #endif
2907
2908 void rtl8180_data_hard_stop(struct net_device *dev)
2909 {
2910         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2911
2912         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2913 #ifdef CONFIG_RTL8185B
2914         priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
2915         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2916 #else
2917         priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2918         write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2919 #endif
2920         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2921 }
2922
2923
2924 void rtl8180_data_hard_resume(struct net_device *dev)
2925 {
2926         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2927
2928         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2929 #ifdef  CONFIG_RTL8185B
2930         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
2931         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2932 #else
2933         priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2934         write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2935 #endif
2936         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2937 }
2938
2939
2940 /* this function TX data frames when the ieee80211 stack requires this.
2941  * It checks also if we need to stop the ieee tx queue, eventually do it
2942  */
2943 void rtl8180_hard_data_xmit(struct sk_buff *skb,struct net_device *dev, int
2944 rate)
2945 {
2946         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2947         int mode;
2948         struct ieee80211_hdr_3addr  *h = (struct ieee80211_hdr_3addr  *) skb->data;
2949         short morefrag = (h->frame_ctl) & IEEE80211_FCTL_MOREFRAGS;
2950         unsigned long flags;
2951         int priority;
2952         //static int count = 0;
2953
2954         mode = priv->ieee80211->iw_mode;
2955
2956         rate = ieeerate2rtlrate(rate);
2957         /*
2958         * This function doesn't require lock because we make
2959         * sure it's called with the tx_lock already acquired.
2960         * this come from the kernel's hard_xmit callback (trought
2961         * the ieee stack, or from the try_wake_queue (again trought
2962         * the ieee stack.
2963         */
2964 #ifdef CONFIG_RTL8185B
2965         priority = AC2Q(skb->priority);
2966 #else
2967         priority = LOW_PRIORITY;
2968 #endif
2969         spin_lock_irqsave(&priv->tx_lock,flags);
2970
2971         if(priv->ieee80211->bHwRadioOff)
2972         {
2973                 spin_unlock_irqrestore(&priv->tx_lock,flags);
2974
2975                 return;
2976         }
2977
2978         //printk(KERN_WARNING "priority = %d@%d\n", priority, count++);
2979         if (!check_nic_enought_desc(dev, priority)){
2980                 //DMESG("Error: no descriptor left by previous TX (avail %d) ",
2981                 //      get_curr_tx_free_desc(dev, priority));
2982                 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
2983                         get_curr_tx_free_desc(dev, priority));
2984         //printk(KERN_WARNING "==============================================================> \n");
2985                 ieee80211_stop_queue(priv->ieee80211);
2986         }
2987         rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate);
2988         if (!check_nic_enought_desc(dev, priority))
2989                 ieee80211_stop_queue(priv->ieee80211);
2990
2991         //dev_kfree_skb_any(skb);
2992         spin_unlock_irqrestore(&priv->tx_lock,flags);
2993
2994 }
2995
2996 /* This is a rough attempt to TX a frame
2997  * This is called by the ieee 80211 stack to TX management frames.
2998  * If the ring is full packet are dropped (for data frame the queue
2999  * is stopped before this can happen). For this reason it is better
3000  * if the descriptors are larger than the largest management frame
3001  * we intend to TX: i'm unsure what the HW does if it will not found
3002  * the last fragment of a frame because it has been dropped...
3003  * Since queues for Management and Data frames are different we
3004  * might use a different lock than tx_lock (for example mgmt_tx_lock)
3005  */
3006 /* these function may loops if invoked with 0 descriptors or 0 len buffer*/
3007 int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
3008 {
3009         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3010
3011         unsigned long flags;
3012
3013         int priority;
3014
3015 #ifdef CONFIG_RTL8185B
3016         priority = MANAGE_PRIORITY;
3017 #else
3018         priority = NORM_PRIORITY;
3019 #endif
3020
3021         spin_lock_irqsave(&priv->tx_lock,flags);
3022
3023         if(priv->ieee80211->bHwRadioOff)
3024         {
3025                 spin_unlock_irqrestore(&priv->tx_lock,flags);
3026
3027                 dev_kfree_skb_any(skb);
3028                 return NETDEV_TX_OK;
3029         }
3030
3031         rtl8180_tx(dev, skb->data, skb->len, priority,
3032                 0, 0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
3033
3034         priv->ieee80211->stats.tx_bytes+=skb->len;
3035         priv->ieee80211->stats.tx_packets++;
3036         spin_unlock_irqrestore(&priv->tx_lock,flags);
3037
3038         dev_kfree_skb_any(skb);
3039         return NETDEV_TX_OK;
3040 }
3041
3042 // longpre 144+48 shortpre 72+24
3043 u16 rtl8180_len2duration(u32 len, short rate,short* ext)
3044 {
3045         u16 duration;
3046         u16 drift;
3047         *ext=0;
3048
3049         switch(rate){
3050         case 0://1mbps
3051                 *ext=0;
3052                 duration = ((len+4)<<4) /0x2;
3053                 drift = ((len+4)<<4) % 0x2;
3054                 if(drift ==0 ) break;
3055                 duration++;
3056                 break;
3057
3058         case 1://2mbps
3059                 *ext=0;
3060                 duration = ((len+4)<<4) /0x4;
3061                 drift = ((len+4)<<4) % 0x4;
3062                 if(drift ==0 ) break;
3063                 duration++;
3064                 break;
3065
3066         case 2: //5.5mbps
3067                 *ext=0;
3068                 duration = ((len+4)<<4) /0xb;
3069                 drift = ((len+4)<<4) % 0xb;
3070                 if(drift ==0 )
3071                         break;
3072                 duration++;
3073                 break;
3074
3075         default:
3076         case 3://11mbps
3077                 *ext=0;
3078                 duration = ((len+4)<<4) /0x16;
3079                 drift = ((len+4)<<4) % 0x16;
3080                 if(drift ==0 )
3081                         break;
3082                 duration++;
3083                 if(drift > 6)
3084                         break;
3085                 *ext=1;
3086                 break;
3087         }
3088
3089         return duration;
3090 }
3091
3092
3093 void rtl8180_prepare_beacon(struct net_device *dev)
3094 {
3095
3096         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3097
3098         struct sk_buff *skb;
3099
3100         u16 word  = read_nic_word(dev, BcnItv);
3101         word &= ~BcnItv_BcnItv; // clear Bcn_Itv
3102         word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);//0x64;
3103         write_nic_word(dev, BcnItv, word);
3104
3105
3106         skb = ieee80211_get_beacon(priv->ieee80211);
3107         if(skb){
3108                 rtl8180_tx(dev,skb->data,skb->len,BEACON_PRIORITY,
3109                         0,0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
3110                 dev_kfree_skb_any(skb);
3111         }
3112         #if 0
3113         //DMESG("size %x",len);
3114         if(*tail & (1<<31)){
3115
3116                 //DMESG("No more beacon TX desc");
3117                 return ;
3118
3119         }
3120         //while(! (*tail & (1<<31))){
3121                 *tail= 0; // zeroes header
3122
3123                 *tail = *tail| (1<<29) ; //fist segment of the packet
3124                 *tail = (*tail) | (1<<28); // last segment
3125         //      *tail = *tail | (1<<18); // this is  a beacon frame
3126                 *(tail+3)=*(tail+3) &~ 0xfff;
3127                 *(tail+3)=*(tail+3) | len; // buffer lenght
3128                 *tail = *tail |len;
3129                 // zeroes the second 32-bits dword of the descriptor
3130                 *(tail+1)= 0;
3131                 *tail = *tail | (rate << 24);
3132
3133                         duration = rtl8180_len2duration(len,rate,&ext);
3134
3135                 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
3136
3137                 *tail = *tail | (1<<31);
3138                 //^ descriptor ready to be txed
3139                 if((tail - begin)/8 == priv->txbeaconcount-1)
3140                         tail=begin;
3141                 else
3142                         tail=tail+8;
3143         //}
3144 #endif
3145 }
3146
3147 /* This function do the real dirty work: it enqueues a TX command
3148  * descriptor in the ring buffer, copyes the frame in a TX buffer
3149  * and kicks the NIC to ensure it does the DMA transfer.
3150  */
3151 short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
3152                  short morefrag, short descfrag, int rate)
3153 {
3154         struct r8180_priv *priv = ieee80211_priv(dev);
3155         u32 *tail,*temp_tail;
3156         u32 *begin;
3157         u32 *buf;
3158         int i;
3159         int remain;
3160         int buflen;
3161         int count;
3162         //u16   AckCtsTime;
3163         //u16   FrameTime;
3164         u16 duration;
3165         short ext;
3166         struct buffer* buflist;
3167         //unsigned long flags;
3168 #ifdef CONFIG_RTL8185B
3169         struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
3170         u8 dest[ETH_ALEN];
3171         u8                      bUseShortPreamble = 0;
3172         u8                      bCTSEnable = 0;
3173         u8                      bRTSEnable = 0;
3174         //u16                   RTSRate = 22;
3175         //u8                    RetryLimit = 0;
3176         u16                     Duration = 0;
3177         u16                     RtsDur = 0;
3178         u16                     ThisFrameTime = 0;
3179         u16                     TxDescDuration = 0;
3180         u8                      ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14
3181 #endif
3182
3183         switch(priority) {
3184         case MANAGE_PRIORITY:
3185                 tail=priv->txmapringtail;
3186                 begin=priv->txmapring;
3187                 buflist = priv->txmapbufstail;
3188                 count = priv->txringcount;
3189                 break;
3190
3191         case BK_PRIORITY:
3192                 tail=priv->txbkpringtail;
3193                 begin=priv->txbkpring;
3194                 buflist = priv->txbkpbufstail;
3195                 count = priv->txringcount;
3196                 break;
3197
3198         case BE_PRIORITY:
3199                 tail=priv->txbepringtail;
3200                 begin=priv->txbepring;
3201                 buflist = priv->txbepbufstail;
3202                 count = priv->txringcount;
3203                 break;
3204
3205         case VI_PRIORITY:
3206                 tail=priv->txvipringtail;
3207                 begin=priv->txvipring;
3208                 buflist = priv->txvipbufstail;
3209                 count = priv->txringcount;
3210                 break;
3211
3212         case VO_PRIORITY:
3213                 tail=priv->txvopringtail;
3214                 begin=priv->txvopring;
3215                 buflist = priv->txvopbufstail;
3216                 count = priv->txringcount;
3217                 break;
3218
3219         case HI_PRIORITY:
3220                 tail=priv->txhpringtail;
3221                 begin=priv->txhpring;
3222                 buflist = priv->txhpbufstail;
3223                 count = priv->txringcount;
3224                 break;
3225
3226         case BEACON_PRIORITY:
3227                 tail=priv->txbeaconringtail;
3228                 begin=priv->txbeaconring;
3229                 buflist = priv->txbeaconbufstail;
3230                 count = priv->txbeaconcount;
3231                 break;
3232
3233         default:
3234                 return -1;
3235                 break;
3236         }
3237
3238         //printk("in rtl8180_tx(): rate is %d\n",priv->ieee80211->rate);
3239 #if 1
3240                 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
3241                 if (is_multicast_ether_addr(dest) ||
3242                                 is_broadcast_ether_addr(dest))
3243                 {
3244                         Duration = 0;
3245                         RtsDur = 0;
3246                         bRTSEnable = 0;
3247                         bCTSEnable = 0;
3248
3249                         ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3250                         TxDescDuration = ThisFrameTime;
3251                 } else {// Unicast packet
3252                         //u8 AckRate;
3253                         u16 AckTime;
3254
3255                         //YJ,add,080828,for Keep alive
3256                         priv->NumTxUnicast++;
3257
3258                         // Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko.
3259                         //AckRate = ComputeAckRate( pMgntInfo->mBrates, (u1Byte)(pTcb->DataRate) );
3260                         // Figure out ACK time according to the AckRate and assume long preamble is used on receiver, 2006.03.08, by rcnjko.
3261                         //AckTime = ComputeTxTime( sAckCtsLng/8, AckRate, FALSE, FALSE);
3262                         //For simplicity, just use the 1M basic rate
3263                         //AckTime = ComputeTxTime(14, 540,0, 0);        // AckCTSLng = 14 use 1M bps send
3264                         AckTime = ComputeTxTime(14, 10,0, 0);   // AckCTSLng = 14 use 1M bps send
3265                         //AckTime = ComputeTxTime(14, 2,false, false);  // AckCTSLng = 14 use 1M bps send
3266
3267                         if ( ((len + sCrcLng) > priv->rts) && priv->rts )
3268                         { // RTS/CTS.
3269                                 u16 RtsTime, CtsTime;
3270                                 //u16 CtsRate;
3271                                 bRTSEnable = 1;
3272                                 bCTSEnable = 0;
3273
3274                                 // Rate and time required for RTS.
3275                                 RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, 0, 0);
3276                                 // Rate and time required for CTS.
3277                                 CtsTime = ComputeTxTime(14, 10,0, 0);   // AckCTSLng = 14 use 1M bps send
3278
3279                                 // Figure out time required to transmit this frame.
3280                                 ThisFrameTime = ComputeTxTime(len + sCrcLng,
3281                                                 rtl8180_rate2rate(rate),
3282                                                 0,
3283                                                 bUseShortPreamble);
3284
3285                                 // RTS-CTS-ThisFrame-ACK.
3286                                 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
3287
3288                                 TxDescDuration = RtsTime + RtsDur;
3289                         }
3290                         else {// Normal case.
3291                                 bCTSEnable = 0;
3292                                 bRTSEnable = 0;
3293                                 RtsDur = 0;
3294
3295                                 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3296                                 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
3297                         }
3298
3299                         if(!(frag_hdr->frame_ctl & IEEE80211_FCTL_MOREFRAGS)) { //no more fragment
3300                                 // ThisFrame-ACK.
3301                                 Duration = aSifsTime + AckTime;
3302                         } else { // One or more fragments remained.
3303                                 u16 NextFragTime;
3304                                 NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet
3305                                                 rtl8180_rate2rate(rate),
3306                                                 0,
3307                                                 bUseShortPreamble );
3308
3309                                 //ThisFrag-ACk-NextFrag-ACK.
3310                                 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
3311                         }
3312
3313                 } // End of Unicast packet
3314
3315                 frag_hdr->duration_id = Duration;
3316 #endif
3317
3318         buflen=priv->txbuffsize;
3319         remain=len;
3320         temp_tail = tail;
3321 //printk("================================>buflen = %d, remain = %d!\n", buflen,remain);
3322         while(remain!=0){
3323 #ifdef DEBUG_TX_FRAG
3324                 DMESG("TX iteration");
3325 #endif
3326 #ifdef DEBUG_TX
3327                 DMESG("TX: filling descriptor %x",(u32)tail);
3328 #endif
3329                 mb();
3330                 if(!buflist){
3331                         DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
3332                         //spin_unlock_irqrestore(&priv->tx_lock,flags);
3333                         return -1;
3334                 }
3335                 buf=buflist->buf;
3336
3337                 if( (*tail & (1<<31)) && (priority != BEACON_PRIORITY)){
3338
3339                                 DMESGW("No more TX desc, returning %x of %x",
3340                                 remain,len);
3341                                 priv->stats.txrdu++;
3342 #ifdef DEBUG_TX_DESC
3343                                 check_tx_ring(dev,priority);
3344                         //      netif_stop_queue(dev);
3345                         //      netif_carrier_off(dev);
3346 #endif
3347                         //      spin_unlock_irqrestore(&priv->tx_lock,flags);
3348
3349                         return remain;
3350
3351                 }
3352
3353                 *tail= 0; // zeroes header
3354                 *(tail+1) = 0;
3355                 *(tail+3) = 0;
3356                 *(tail+5) = 0;
3357                 *(tail+6) = 0;
3358                 *(tail+7) = 0;
3359
3360                 if(priv->card_8185){
3361                         //FIXME: this should be triggered by HW encryption parameters.
3362                         *tail |= (1<<15); //no encrypt
3363 //                      *tail |= (1<<30); //raise int when completed
3364                 }
3365         //      *tail = *tail | (1<<16);
3366                 if(remain==len && !descfrag) {
3367                         ownbit_flag = false;    //added by david woo,2007.12.14
3368 #ifdef DEBUG_TX_FRAG
3369                         DMESG("First descriptor");
3370 #endif
3371                         *tail = *tail| (1<<29) ; //fist segment of the packet
3372                         *tail = *tail |(len);
3373                 } else {
3374                         ownbit_flag = true;
3375                 }
3376
3377                 for(i=0;i<buflen&& remain >0;i++,remain--){
3378                         ((u8*)buf)[i]=txbuf[i]; //copy data into descriptor pointed DMAble buffer
3379                         if(remain == 4 && i+4 >= buflen) break;
3380                         /* ensure the last desc has at least 4 bytes payload */
3381
3382                 }
3383                 txbuf = txbuf + i;
3384                 *(tail+3)=*(tail+3) &~ 0xfff;
3385                 *(tail+3)=*(tail+3) | i; // buffer lenght
3386                 // Use short preamble or not
3387                 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
3388                         if (priv->plcp_preamble_mode==1 && rate!=0)     //  short mode now, not long!
3389                         //      *tail |= (1<<16);                               // enable short preamble mode.
3390
3391 #ifdef CONFIG_RTL8185B
3392                 if(bCTSEnable) {
3393                         *tail |= (1<<18);
3394                 }
3395
3396                 if(bRTSEnable) //rts enable
3397                 {
3398                         *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE
3399                         *tail |= (1<<23);//rts enable
3400                         *(tail+1) |=(RtsDur&0xffff);//RTS Duration
3401                 }
3402                 *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION
3403 //              *(tail+3) |= (0xe6<<16);
3404                 *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ;
3405 #else
3406                 //Use RTS or not
3407 #ifdef CONFIG_RTL8187B
3408                 if ( (len>priv->rts) && priv->rts && priority!=MANAGE_PRIORITY){
3409 #else
3410                 if ( (len>priv->rts) && priv->rts && priority==LOW_PRIORITY){
3411 #endif
3412                         *tail |= (1<<23);       //enalbe RTS function
3413                         *tail |= (0<<19);       //use 1M bps send RTS packet
3414                         AckCtsTime = ComputeTxTime(14, 10,0, 0);        // AckCTSLng = 14 use 1M bps send
3415                         FrameTime = ComputeTxTime(len + 4, rtl8180_rate2rate(rate), 0, *tail&(1<<16));
3416                         // RTS/CTS time is calculate as follow
3417                         duration = FrameTime + 3*10 + 2*AckCtsTime;     //10us is the SifsTime;
3418                         *(tail+1) |= duration;  //Need to edit here!  ----hikaru
3419                 }else{
3420                         *(tail+1)= 0; // zeroes the second 32-bits dword of the descriptor
3421                 }
3422 #endif
3423
3424                 *tail = *tail | ((rate&0xf) << 24);
3425                 //DMESG("rate %d",rate);
3426
3427                 if(priv->card_8185){
3428
3429                         #if 0
3430                         *(tail+5)&= ~(1<<24); /* tx ant 0 */
3431
3432                         *(tail+5) &= ~(1<<23); /* random tx agc 23-16 */
3433                         *(tail+5) |= (1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16);
3434
3435                         *(tail+5) &=
3436 ~((1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8));
3437                         *(tail+5) |= (7<<8); // Max retry limit
3438
3439                         *(tail+5) &= ~((1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0));
3440                         *(tail+5) |= (8<<4); // Max contention window
3441                         *(tail+6) |= 4; // Min contention window
3442                         #endif
3443            //           *(tail+5) = 0;
3444                 }
3445
3446                 /* hw_plcp_len is not used for rtl8180 chip */
3447                 /* FIXME */
3448                 if(priv->card_8185 == 0 || !priv->hw_plcp_len){
3449
3450                         duration = rtl8180_len2duration(len,
3451                                 rate,&ext);
3452
3453
3454 #ifdef DEBUG_TX
3455                         DMESG("PLCP duration %d",duration );
3456                         //DMESG("drift %d",drift);
3457                         DMESG("extension %s", (ext==1) ? "on":"off");
3458 #endif
3459                         *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
3460                         if(ext) *(tail+1) = *(tail+1) |(1<<31); //plcp length extension
3461                 }
3462
3463                 if(morefrag) *tail = (*tail) | (1<<17); // more fragment
3464                 if(!remain) *tail = (*tail) | (1<<28); // last segment of frame
3465
3466 #ifdef DEBUG_TX_FRAG
3467                 if(!remain)DMESG("Last descriptor");
3468                 if(morefrag)DMESG("More frag");
3469 #endif
3470                *(tail+5) = *(tail+5)|(2<<27);
3471                 *(tail+7) = *(tail+7)|(1<<4);
3472
3473                 wmb();
3474                 if(ownbit_flag)
3475                 {
3476                         *tail = *tail | (1<<31); // descriptor ready to be txed
3477                 }
3478
3479 #ifdef DEBUG_TX_DESC2
3480                 printk("tx desc is:\n");
3481                 DMESG("%8x %8x %8x %8x %8x %8x %8x %8x", tail[0], tail[1], tail[2], tail[3],
3482                         tail[4], tail[5], tail[6], tail[7]);
3483 #endif
3484
3485                 if((tail - begin)/8 == count-1)
3486                         tail=begin;
3487
3488                 else
3489                         tail=tail+8;
3490
3491                 buflist=buflist->next;
3492
3493                 mb();
3494
3495                 switch(priority) {
3496                         case MANAGE_PRIORITY:
3497                                 priv->txmapringtail=tail;
3498                                 priv->txmapbufstail=buflist;
3499                                 break;
3500
3501                         case BK_PRIORITY:
3502                                 priv->txbkpringtail=tail;
3503                                 priv->txbkpbufstail=buflist;
3504                                 break;
3505
3506                         case BE_PRIORITY:
3507                                 priv->txbepringtail=tail;
3508                                 priv->txbepbufstail=buflist;
3509                                 break;
3510
3511                         case VI_PRIORITY:
3512                                 priv->txvipringtail=tail;
3513                                 priv->txvipbufstail=buflist;
3514                                 break;
3515
3516                         case VO_PRIORITY:
3517                                 priv->txvopringtail=tail;
3518                                 priv->txvopbufstail=buflist;
3519                                 break;
3520
3521                         case HI_PRIORITY:
3522                                 priv->txhpringtail=tail;
3523                                 priv->txhpbufstail = buflist;
3524                                 break;
3525
3526                         case BEACON_PRIORITY:
3527                                 /* the HW seems to be happy with the 1st
3528                                  * descriptor filled and the 2nd empty...
3529                                  * So always update descriptor 1 and never
3530                                  * touch 2nd
3531                                  */
3532                         //      priv->txbeaconringtail=tail;
3533                         //      priv->txbeaconbufstail=buflist;
3534
3535                                 break;
3536
3537                 }
3538
3539                 //rtl8180_dma_kick(dev,priority);
3540         }
3541         *temp_tail = *temp_tail | (1<<31); // descriptor ready to be txed
3542         rtl8180_dma_kick(dev,priority);
3543         //spin_unlock_irqrestore(&priv->tx_lock,flags);
3544
3545         return 0;
3546
3547 }
3548
3549
3550 void rtl8180_irq_rx_tasklet(struct r8180_priv * priv);
3551
3552
3553 void rtl8180_link_change(struct net_device *dev)
3554 {
3555         struct r8180_priv *priv = ieee80211_priv(dev);
3556         u16 beacon_interval;
3557
3558         struct ieee80211_network *net = &priv->ieee80211->current_network;
3559 //      rtl8180_adapter_start(dev);
3560         rtl8180_update_msr(dev);
3561
3562
3563         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
3564
3565         write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]);
3566         write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]);
3567
3568
3569         beacon_interval  = read_nic_dword(dev,BEACON_INTERVAL);
3570         beacon_interval &= ~ BEACON_INTERVAL_MASK;
3571         beacon_interval |= net->beacon_interval;
3572         write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
3573
3574         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3575
3576
3577         /*
3578         u16 atim = read_nic_dword(dev,ATIM);
3579         u16 = u16 &~ ATIM_MASK;
3580         u16 = u16 | beacon->atim;
3581         */
3582 #if 0
3583         if (net->capability & WLAN_CAPABILITY_PRIVACY) {
3584                 if (priv->hw_wep) {
3585                         DMESG("Enabling hardware WEP support");
3586                         rtl8180_set_hw_wep(dev);
3587                         priv->ieee80211->host_encrypt=0;
3588                         priv->ieee80211->host_decrypt=0;
3589                 }
3590 #ifndef CONFIG_IEEE80211_NOWEP
3591                 else {
3592                         priv->ieee80211->host_encrypt=1;
3593                         priv->ieee80211->host_decrypt=1;
3594                 }
3595 #endif
3596         }
3597 #ifndef CONFIG_IEEE80211_NOWEP
3598         else{
3599                 priv->ieee80211->host_encrypt=0;
3600                 priv->ieee80211->host_decrypt=0;
3601         }
3602 #endif
3603 #endif
3604
3605
3606         if(priv->card_8185)
3607                 rtl8180_set_chan(dev, priv->chan);
3608
3609
3610 }
3611
3612 void rtl8180_rq_tx_ack(struct net_device *dev){
3613
3614         struct r8180_priv *priv = ieee80211_priv(dev);
3615 //      printk("====================>%s\n",__func__);
3616         write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)|CONFIG4_PWRMGT);
3617         priv->ack_tx_to_ieee = 1;
3618 }
3619
3620 short rtl8180_is_tx_queue_empty(struct net_device *dev){
3621
3622         struct r8180_priv *priv = ieee80211_priv(dev);
3623         u32* d;
3624
3625         for (d = priv->txmapring;
3626                 d < priv->txmapring + priv->txringcount;d+=8)
3627                         if(*d & (1<<31)) return 0;
3628
3629         for (d = priv->txbkpring;
3630                 d < priv->txbkpring + priv->txringcount;d+=8)
3631                         if(*d & (1<<31)) return 0;
3632
3633         for (d = priv->txbepring;
3634                 d < priv->txbepring + priv->txringcount;d+=8)
3635                         if(*d & (1<<31)) return 0;
3636
3637         for (d = priv->txvipring;
3638                 d < priv->txvipring + priv->txringcount;d+=8)
3639                         if(*d & (1<<31)) return 0;
3640
3641         for (d = priv->txvopring;
3642                 d < priv->txvopring + priv->txringcount;d+=8)
3643                         if(*d & (1<<31)) return 0;
3644
3645         for (d = priv->txhpring;
3646                 d < priv->txhpring + priv->txringcount;d+=8)
3647                         if(*d & (1<<31)) return 0;
3648         return 1;
3649 }
3650 /* FIXME FIXME 5msecs is random */
3651 #define HW_WAKE_DELAY 5
3652
3653 void rtl8180_hw_wakeup(struct net_device *dev)
3654 {
3655         unsigned long flags;
3656
3657         struct r8180_priv *priv = ieee80211_priv(dev);
3658
3659         spin_lock_irqsave(&priv->ps_lock,flags);
3660         //DMESG("Waken up!");
3661         write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)&~CONFIG4_PWRMGT);
3662
3663         if(priv->rf_wakeup)
3664                 priv->rf_wakeup(dev);
3665 //      mdelay(HW_WAKE_DELAY);
3666         spin_unlock_irqrestore(&priv->ps_lock,flags);
3667 }
3668
3669 void rtl8180_hw_sleep_down(struct net_device *dev)
3670 {
3671         unsigned long flags;
3672
3673         struct r8180_priv *priv = ieee80211_priv(dev);
3674
3675         spin_lock_irqsave(&priv->ps_lock,flags);
3676        //DMESG("Sleep!");
3677
3678         if(priv->rf_sleep)
3679                 priv->rf_sleep(dev);
3680         spin_unlock_irqrestore(&priv->ps_lock,flags);
3681 }
3682
3683
3684 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
3685 {
3686
3687         struct r8180_priv *priv = ieee80211_priv(dev);
3688
3689         u32 rb = jiffies;
3690         unsigned long flags;
3691
3692         spin_lock_irqsave(&priv->ps_lock,flags);
3693
3694         /* Writing HW register with 0 equals to disable
3695          * the timer, that is not really what we want
3696          */
3697         tl -= MSECS(4+16+7);
3698
3699         //if(tl == 0) tl = 1;
3700
3701         /* FIXME HACK FIXME HACK */
3702 //      force_pci_posting(dev);
3703         //mdelay(1);
3704
3705 //      rb = read_nic_dword(dev, TSFTR);
3706
3707         /* If the interval in witch we are requested to sleep is too
3708          * short then give up and remain awake
3709          */
3710         if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3711                 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3712                 spin_unlock_irqrestore(&priv->ps_lock,flags);
3713                 printk("too short to sleep\n");
3714                 return;
3715         }
3716
3717 //      write_nic_dword(dev, TimerInt, tl);
3718 //      rb = read_nic_dword(dev, TSFTR);
3719         {
3720                 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3721         //      if (tl<rb)
3722
3723                 //lzm,add,080828
3724                 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
3725
3726                 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
3727         }
3728         /* if we suspect the TimerInt is gone beyond tl
3729          * while setting it, then give up
3730          */
3731 #if 1
3732         if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3733                 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3734                 spin_unlock_irqrestore(&priv->ps_lock,flags);
3735                 return;
3736         }
3737 #endif
3738 //      if(priv->rf_sleep)
3739 //              priv->rf_sleep(dev);
3740
3741         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
3742         spin_unlock_irqrestore(&priv->ps_lock,flags);
3743 }
3744
3745
3746 //void rtl8180_wmm_param_update(struct net_device *dev,u8 *ac_param)
3747 void rtl8180_wmm_param_update(struct work_struct * work)
3748 {
3749         struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq);
3750         //struct r8180_priv *priv = (struct r8180_priv*)(ieee->priv);
3751         struct net_device *dev = ieee->dev;
3752         u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
3753         u8 mode = ieee->current_network.mode;
3754         AC_CODING       eACI;
3755         AC_PARAM        AcParam;
3756         PAC_PARAM       pAcParam;
3757         u8 i;
3758
3759 #ifndef CONFIG_RTL8185B
3760         //for legacy 8185 keep the PARAM unchange.
3761         return;
3762 #else
3763         if(!ieee->current_network.QoS_Enable){
3764                 //legacy ac_xx_param update
3765                 AcParam.longData = 0;
3766                 AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
3767                 AcParam.f.AciAifsn.f.ACM = 0;
3768                 AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin.
3769                 AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax.
3770                 AcParam.f.TXOPLimit = 0;
3771                 for(eACI = 0; eACI < AC_MAX; eACI++){
3772                         AcParam.f.AciAifsn.f.ACI = (u8)eACI;
3773                         {
3774                                 u8              u1bAIFS;
3775                                 u32             u4bAcParam;
3776                                 pAcParam = (PAC_PARAM)(&AcParam);
3777                                 // Retrive paramters to udpate.
3778                                 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3779                                 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
3780                                               (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
3781                                               (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
3782                                                (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3783                                 switch(eACI){
3784                                         case AC1_BK:
3785                                                 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3786                                                 break;
3787
3788                                         case AC0_BE:
3789                                                 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3790                                                 break;
3791
3792                                         case AC2_VI:
3793                                                 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3794                                                 break;
3795
3796                                         case AC3_VO:
3797                                                 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3798                                                 break;
3799
3800                                         default:
3801                                                 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
3802                                                 break;
3803                                 }
3804                         }
3805                 }
3806                 return;
3807         }
3808
3809         for(i = 0; i < AC_MAX; i++){
3810                 //AcParam.longData = 0;
3811                 pAcParam = (AC_PARAM * )ac_param;
3812                 {
3813                         AC_CODING       eACI;
3814                         u8              u1bAIFS;
3815                         u32             u4bAcParam;
3816
3817                         // Retrive paramters to udpate.
3818                         eACI = pAcParam->f.AciAifsn.f.ACI;
3819                         //Mode G/A: slotTimeTimer = 9; Mode B: 20
3820                         u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3821                         u4bAcParam = (  (((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)  |
3822                                         (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)  |
3823                                         (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)  |
3824                                         (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3825
3826                         switch(eACI){
3827                                 case AC1_BK:
3828                                         write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3829                                         break;
3830
3831                                 case AC0_BE:
3832                                         write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3833                                         break;
3834
3835                                 case AC2_VI:
3836                                         write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3837                                         break;
3838
3839                                 case AC3_VO:
3840                                         write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3841                                         break;
3842
3843                                 default:
3844                                         printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
3845                                         break;
3846                         }
3847                 }
3848                 ac_param += (sizeof(AC_PARAM));
3849         }
3850 #endif
3851 }
3852
3853 void rtl8180_tx_irq_wq(struct work_struct *work);
3854 void rtl8180_restart_wq(struct work_struct *work);
3855 //void rtl8180_rq_tx_ack(struct work_struct *work);
3856 void rtl8180_watch_dog_wq(struct work_struct *work);
3857 void rtl8180_hw_wakeup_wq(struct work_struct *work);
3858 void rtl8180_hw_sleep_wq(struct work_struct *work);
3859 void rtl8180_sw_antenna_wq(struct work_struct *work);
3860 void rtl8180_watch_dog(struct net_device *dev);
3861
3862 void watch_dog_adaptive(unsigned long data)
3863 {
3864     struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
3865 //      DMESG("---->watch_dog_adaptive()\n");
3866         if(!priv->up)
3867         {
3868                 DMESG("<----watch_dog_adaptive():driver is not up!\n");
3869                 return;
3870         }
3871
3872   //      queue_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq);
3873 //{by amy 080312
3874 #if 1
3875         // Tx High Power Mechanism.
3876 #ifdef HIGH_POWER
3877         if(CheckHighPower((struct net_device *)data))
3878         {
3879                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
3880         }
3881 #endif
3882
3883 #ifdef CONFIG_RTL818X_S
3884         // Tx Power Tracking on 87SE.
3885 #ifdef TX_TRACK
3886         //if( priv->bTxPowerTrack )     //lzm mod 080826
3887         if( CheckTxPwrTracking((struct net_device *)data));
3888                 TxPwrTracking87SE((struct net_device *)data);
3889 #endif
3890 #endif
3891
3892         // Perform DIG immediately.
3893 #ifdef SW_DIG
3894         if(CheckDig((struct net_device *)data) == true)
3895         {
3896                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
3897         }
3898 #endif
3899 #endif
3900 //by amy 080312}
3901         rtl8180_watch_dog((struct net_device *)data);
3902
3903
3904         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
3905
3906         priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
3907         add_timer(&priv->watch_dog_timer);
3908 //        DMESG("<----watch_dog_adaptive()\n");
3909 }
3910
3911 #ifdef ENABLE_DOT11D
3912
3913 static CHANNEL_LIST ChannelPlan[] = {
3914         {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},                 //FCC
3915         {{1,2,3,4,5,6,7,8,9,10,11},11},                                                 //IC
3916         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //ETSI
3917         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},    //Spain. Change to ETSI.
3918         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //France. Change to ETSI.
3919         {{14,36,40,44,48,52,56,60,64},9},                                               //MKK
3920         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1
3921         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //Israel.
3922         {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17},                       // For 11a , TELEC
3923         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},  //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
3924         {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826
3925 };
3926
3927 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
3928 {
3929         int i;
3930
3931         //lzm add 080826
3932         ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1;
3933         ieee->IbssStartChnl=0;
3934
3935         switch (channel_plan)
3936         {
3937                 case COUNTRY_CODE_FCC:
3938                 case COUNTRY_CODE_IC:
3939                 case COUNTRY_CODE_ETSI:
3940                 case COUNTRY_CODE_SPAIN:
3941                 case COUNTRY_CODE_FRANCE:
3942                 case COUNTRY_CODE_MKK:
3943                 case COUNTRY_CODE_MKK1:
3944                 case COUNTRY_CODE_ISRAEL:
3945                 case COUNTRY_CODE_TELEC:
3946                 {
3947                         Dot11d_Init(ieee);
3948                         ieee->bGlobalDomain = false;
3949                         if (ChannelPlan[channel_plan].Len != 0){
3950                                 // Clear old channel map
3951                                 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
3952                                 // Set new channel map
3953                                 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
3954                                 {
3955                                         if(ChannelPlan[channel_plan].Channel[i] <= 14)
3956                                                 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
3957                                 }
3958                         }
3959                         break;
3960                 }
3961                 case COUNTRY_CODE_GLOBAL_DOMAIN:
3962                 {
3963                         GET_DOT11D_INFO(ieee)->bEnabled = 0;
3964                         Dot11d_Reset(ieee);
3965                         ieee->bGlobalDomain = true;
3966                         break;
3967                 }
3968                 case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 080826
3969                 {
3970                 ieee->MinPassiveChnlNum=12;
3971                 ieee->IbssStartChnl= 10;
3972                 break;
3973                 }
3974                 default:
3975                 {
3976                         Dot11d_Init(ieee);
3977                         ieee->bGlobalDomain = false;
3978                         memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
3979                         for (i=1;i<=14;i++)
3980                         {
3981                                 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
3982                         }
3983                         break;
3984                 }
3985         }
3986 }
3987 #endif
3988
3989 //Add for RF power on power off by lizhaoming 080512
3990 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
3991
3992 //YJ,add,080828
3993 static void rtl8180_statistics_init(struct Stats *pstats)
3994 {
3995         memset(pstats, 0, sizeof(struct Stats));
3996 }
3997 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
3998 {
3999         memset(plink_detect, 0, sizeof(link_detect_t));
4000         plink_detect->SlotNum = DEFAULT_SLOT_NUM;
4001 }
4002 //YJ,add,080828,end
4003
4004 short rtl8180_init(struct net_device *dev)
4005 {
4006         struct r8180_priv *priv = ieee80211_priv(dev);
4007         u16 word;
4008         u16 version;
4009         u8 hw_version;
4010         //u8 config3;
4011         u32 usValue;
4012         u16 tmpu16;
4013         int i, j;
4014
4015 #ifdef ENABLE_DOT11D
4016 #if 0
4017         for(i=0;i<0xFF;i++) {
4018                 if(i%16 == 0)
4019                         printk("\n[%x]: ", i/16);
4020                 printk("\t%4.4x", eprom_read(dev,i));
4021         }
4022 #endif
4023         priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF;
4024         if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
4025                 printk("rtl8180_init:Error channel plan! Set to default.\n");
4026                 priv->channel_plan = 0;
4027         }
4028         //priv->channel_plan = 9;  //Global Domain
4029
4030         DMESG("Channel plan is %d\n",priv->channel_plan);
4031         rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
4032 #else
4033         int ch;
4034         //Set Default Channel Plan
4035         if(!channels){
4036                 DMESG("No channels, aborting");
4037                 return -1;
4038         }
4039         ch=channels;
4040         priv->channel_plan = 0;//hikaru
4041          // set channels 1..14 allowed in given locale
4042         for (i=1; i<=14; i++) {
4043                 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
4044                 ch >>= 1;
4045         }
4046 #endif
4047
4048         //memcpy(priv->stats,0,sizeof(struct Stats));
4049
4050         //FIXME: these constants are placed in a bad pleace.
4051         priv->txbuffsize = 2048;//1024;
4052         priv->txringcount = 32;//32;
4053         priv->rxbuffersize = 2048;//1024;
4054         priv->rxringcount = 64;//32;
4055         priv->txbeaconcount = 2;
4056         priv->rx_skb_complete = 1;
4057         //priv->txnp_pending.ispending=0;
4058         /* ^^ the SKB does not containt a partial RXed
4059          * packet (is empty)
4060          */
4061
4062 #ifdef CONFIG_RTL8185B
4063 #ifdef CONFIG_RTL818X_S
4064         priv->RegThreeWireMode = HW_THREE_WIRE_SI;
4065 #else
4066         priv->RegThreeWireMode = SW_THREE_WIRE;
4067 #endif
4068 #endif
4069
4070 //Add for RF power on power off by lizhaoming 080512
4071         priv->RFChangeInProgress = false;
4072         priv->SetRFPowerStateInProgress = false;
4073         priv->RFProgType = 0;
4074         priv->bInHctTest = false;
4075
4076         priv->irq_enabled=0;
4077
4078 //YJ,modified,080828
4079 #if 0
4080         priv->stats.rxdmafail=0;
4081         priv->stats.txrdu=0;
4082         priv->stats.rxrdu=0;
4083         priv->stats.rxnolast=0;
4084         priv->stats.rxnodata=0;
4085         //priv->stats.rxreset=0;
4086         //priv->stats.rxwrkaround=0;
4087         priv->stats.rxnopointer=0;
4088         priv->stats.txnperr=0;
4089         priv->stats.txresumed=0;
4090         priv->stats.rxerr=0;
4091         priv->stats.rxoverflow=0;
4092         priv->stats.rxint=0;
4093         priv->stats.txnpokint=0;
4094         priv->stats.txhpokint=0;
4095         priv->stats.txhperr=0;
4096         priv->stats.ints=0;
4097         priv->stats.shints=0;
4098         priv->stats.txoverflow=0;
4099         priv->stats.txbeacon=0;
4100         priv->stats.txbeaconerr=0;
4101         priv->stats.txlperr=0;
4102         priv->stats.txlpokint=0;
4103         priv->stats.txretry=0;//tony 20060601
4104         priv->stats.rxcrcerrmin=0;
4105         priv->stats.rxcrcerrmid=0;
4106         priv->stats.rxcrcerrmax=0;
4107         priv->stats.rxicverr=0;
4108 #else
4109         rtl8180_statistics_init(&priv->stats);
4110         rtl8180_link_detect_init(&priv->link_detect);
4111 #endif
4112 //YJ,modified,080828,end
4113
4114
4115         priv->ack_tx_to_ieee = 0;
4116         priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
4117         priv->ieee80211->iw_mode = IW_MODE_INFRA;
4118         priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN |
4119                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
4120                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
4121         priv->ieee80211->active_scan = 1;
4122         priv->ieee80211->rate = 110; //11 mbps
4123         priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
4124         priv->ieee80211->host_encrypt = 1;
4125         priv->ieee80211->host_decrypt = 1;
4126         priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
4127         priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
4128         priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
4129         priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
4130
4131         priv->hw_wep = hwwep;
4132         priv->prism_hdr=0;
4133         priv->dev=dev;
4134         priv->retry_rts = DEFAULT_RETRY_RTS;
4135         priv->retry_data = DEFAULT_RETRY_DATA;
4136         priv->RFChangeInProgress = false;
4137         priv->SetRFPowerStateInProgress = false;
4138         priv->RFProgType = 0;
4139         priv->bInHctTest = false;
4140         priv->bInactivePs = true;//false;
4141         priv->ieee80211->bInactivePs = priv->bInactivePs;
4142         priv->bSwRfProcessing = false;
4143         priv->eRFPowerState = eRfOff;
4144         priv->RfOffReason = 0;
4145         priv->LedStrategy = SW_LED_MODE0;
4146         //priv->NumRxOkInPeriod = 0;  //YJ,del,080828
4147         //priv->NumTxOkInPeriod = 0;  //YJ,del,080828
4148         priv->TxPollingTimes = 0;//lzm add 080826
4149         priv->bLeisurePs = true;
4150         priv->dot11PowerSaveMode = eActive;
4151 //by amy for antenna
4152         priv->AdMinCheckPeriod = 5;
4153         priv->AdMaxCheckPeriod = 10;
4154 // Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312
4155         priv->AdMaxRxSsThreshold = 30;//60->30
4156         priv->AdRxSsThreshold = 20;//50->20
4157         priv->AdCheckPeriod = priv->AdMinCheckPeriod;
4158         priv->AdTickCount = 0;
4159         priv->AdRxSignalStrength = -1;
4160         priv->RegSwAntennaDiversityMechanism = 0;
4161         priv->RegDefaultAntenna = 0;
4162         priv->SignalStrength = 0;
4163         priv->AdRxOkCnt = 0;
4164         priv->CurrAntennaIndex = 0;
4165         priv->AdRxSsBeforeSwitched = 0;
4166         init_timer(&priv->SwAntennaDiversityTimer);
4167         priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
4168         priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
4169 //by amy for antenna
4170 //{by amy 080312
4171         priv->bDigMechanism = 1;
4172         priv->InitialGain = 6;
4173         priv->bXtalCalibration = false;
4174         priv->XtalCal_Xin = 0;
4175         priv->XtalCal_Xout = 0;
4176         priv->bTxPowerTrack = false;
4177         priv->ThermalMeter = 0;
4178         priv->FalseAlarmRegValue = 0;
4179         priv->RegDigOfdmFaUpTh = 0xc; // Upper threhold of OFDM false alarm, which is used in DIG.
4180         priv->DIG_NumberFallbackVote = 0;
4181         priv->DIG_NumberUpgradeVote = 0;
4182         priv->LastSignalStrengthInPercent = 0;
4183         priv->Stats_SignalStrength = 0;
4184         priv->LastRxPktAntenna = 0;
4185         priv->SignalQuality = 0; // in 0-100 index.
4186         priv->Stats_SignalQuality = 0;
4187         priv->RecvSignalPower = 0; // in dBm.
4188         priv->Stats_RecvSignalPower = 0;
4189         priv->AdMainAntennaRxOkCnt = 0;
4190         priv->AdAuxAntennaRxOkCnt = 0;
4191         priv->bHWAdSwitched = false;
4192         priv->bRegHighPowerMechanism = true;
4193         priv->RegHiPwrUpperTh = 77;
4194         priv->RegHiPwrLowerTh = 75;
4195         priv->RegRSSIHiPwrUpperTh = 70;
4196         priv->RegRSSIHiPwrLowerTh = 20;
4197         priv->bCurCCKPkt = false;
4198         priv->UndecoratedSmoothedSS = -1;
4199         priv->bToUpdateTxPwr = false;
4200         priv->CurCCKRSSI = 0;
4201         priv->RxPower = 0;
4202         priv->RSSI = 0;
4203         //YJ,add,080828
4204         priv->NumTxOkTotal = 0;
4205         priv->NumTxUnicast = 0;
4206         priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
4207         priv->PowerProfile = POWER_PROFILE_AC;
4208         //YJ,add,080828,end
4209 //by amy for rate adaptive
4210     priv->CurrRetryCnt=0;
4211     priv->LastRetryCnt=0;
4212     priv->LastTxokCnt=0;
4213     priv->LastRxokCnt=0;
4214     priv->LastRetryRate=0;
4215     priv->bTryuping=0;
4216     priv->CurrTxRate=0;
4217     priv->CurrRetryRate=0;
4218     priv->TryupingCount=0;
4219     priv->TryupingCountNoData=0;
4220     priv->TryDownCountLowData=0;
4221     priv->LastTxOKBytes=0;
4222     priv->LastFailTxRate=0;
4223     priv->LastFailTxRateSS=0;
4224     priv->FailTxRateCount=0;
4225     priv->LastTxThroughput=0;
4226     priv->NumTxOkBytesTotal=0;
4227         priv->ForcedDataRate = 0;
4228         priv->RegBModeGainStage = 1;
4229
4230 //by amy for rate adaptive
4231 //by amy 080312}
4232         priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4233         spin_lock_init(&priv->irq_lock);
4234         spin_lock_init(&priv->irq_th_lock);
4235         spin_lock_init(&priv->tx_lock);
4236         spin_lock_init(&priv->ps_lock);
4237         spin_lock_init(&priv->rf_ps_lock);
4238         sema_init(&priv->wx_sem,1);
4239         sema_init(&priv->rf_state,1);
4240         INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq);
4241         INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq);
4242         INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq);
4243         INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq);
4244         //INIT_DELAYED_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq);
4245         //INIT_DELAYED_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq);
4246         INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update);
4247         INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);//+by amy 080312
4248         INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);//+by amy 080312
4249         INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);//+by amy 080312
4250
4251         //add for RF power on power off by lizhaoming 080512
4252         INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack);
4253         //INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
4254
4255         tasklet_init(&priv->irq_rx_tasklet,
4256                      (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
4257                      (unsigned long)priv);
4258 //by amy
4259     init_timer(&priv->watch_dog_timer);
4260         priv->watch_dog_timer.data = (unsigned long)dev;
4261         priv->watch_dog_timer.function = watch_dog_adaptive;
4262 //by amy
4263
4264 //{by amy 080312
4265 //by amy for rate adaptive
4266     init_timer(&priv->rateadapter_timer);
4267         priv->rateadapter_timer.data = (unsigned long)dev;
4268         priv->rateadapter_timer.function = timer_rate_adaptive;
4269                 priv->RateAdaptivePeriod= RATE_ADAPTIVE_TIMER_PERIOD;
4270                 priv->bEnhanceTxPwr=false;
4271 //by amy for rate adaptive
4272 //by amy 080312}
4273         //priv->ieee80211->func =
4274         //      kmalloc(sizeof(struct ieee80211_helper_functions),GFP_KERNEL);
4275         //memset(priv->ieee80211->func, 0,
4276           //     sizeof(struct ieee80211_helper_functions));
4277
4278         priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
4279         priv->ieee80211->set_chan = rtl8180_set_chan;
4280         priv->ieee80211->link_change = rtl8180_link_change;
4281         priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
4282         priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
4283         priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
4284
4285         priv->ieee80211->init_wmmparam_flag = 0;
4286
4287         priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
4288         priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
4289         priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
4290
4291 #ifdef CONFIG_RTL8185B
4292         priv->MWIEnable = 0;
4293
4294         priv->ShortRetryLimit = 7;
4295         priv->LongRetryLimit = 7;
4296         priv->EarlyRxThreshold = 7;
4297
4298         priv->CSMethod = (0x01 << 29);
4299
4300         priv->TransmitConfig    =
4301                                                                         1<<TCR_DurProcMode_OFFSET |             //for RTL8185B, duration setting by HW
4302                                                                         (7<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
4303                                                                         (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |       // Short retry limit
4304                                                                         (priv->LongRetryLimit<<TCR_LRL_OFFSET) |        // Long retry limit
4305                                                                         (0 ? TCR_SAT : 0);      // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
4306
4307         priv->ReceiveConfig     =
4308 #ifdef CONFIG_RTL818X_S
4309 #else
4310                                                         priv->CSMethod |
4311 #endif
4312 //                                                              RCR_ENMARP |
4313                                                                 RCR_AMF | RCR_ADF |                             //accept management/data
4314                                                                 RCR_ACF |                                               //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
4315                                                                 RCR_AB | RCR_AM | RCR_APM |             //accept BC/MC/UC
4316                                                                 //RCR_AICV | RCR_ACRC32 |               //accept ICV/CRC error packet
4317                                                                 (7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
4318                                                                 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
4319                                                                 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
4320
4321         priv->IntrMask          = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
4322                                                                 IMR_THPDER | IMR_THPDOK |
4323                                                                 IMR_TVODER | IMR_TVODOK |
4324                                                                 IMR_TVIDER | IMR_TVIDOK |
4325                                                                 IMR_TBEDER | IMR_TBEDOK |
4326                                                                 IMR_TBKDER | IMR_TBKDOK |
4327                                                                 IMR_RDU |                                               // To handle the defragmentation not enough Rx descriptors case. Annie, 2006-03-27.
4328                                                                 IMR_RER | IMR_ROK |
4329                                                                 IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko.
4330
4331         priv->InitialGain = 6;
4332 #endif
4333
4334         hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
4335
4336         switch (hw_version){
4337 #ifdef CONFIG_RTL8185B
4338                 case HW_VERID_R8185B_B:
4339 #ifdef CONFIG_RTL818X_S
4340                         priv->card_8185 = VERSION_8187S_C;
4341                         DMESG("MAC controller is a RTL8187SE b/g");
4342                         priv->phy_ver = 2;
4343                         break;
4344 #else
4345                         DMESG("MAC controller is a RTL8185B b/g");
4346                         priv->card_8185 = 3;
4347                         priv->phy_ver = 2;
4348                         break;
4349 #endif
4350 #endif
4351                 case HW_VERID_R8185_ABC:
4352                         DMESG("MAC controller is a RTL8185 b/g");
4353                         priv->card_8185 = 1;
4354                         /* you should not find a card with 8225 PHY ver < C*/
4355                         priv->phy_ver = 2;
4356                         break;
4357
4358                 case HW_VERID_R8185_D:
4359                         DMESG("MAC controller is a RTL8185 b/g (V. D)");
4360                         priv->card_8185 = 2;
4361                         /* you should not find a card with 8225 PHY ver < C*/
4362                         priv->phy_ver = 2;
4363                         break;
4364
4365                 case HW_VERID_R8180_ABCD:
4366                         DMESG("MAC controller is a RTL8180");
4367                         priv->card_8185 = 0;
4368                         break;
4369
4370                 case HW_VERID_R8180_F:
4371                         DMESG("MAC controller is a RTL8180 (v. F)");
4372                         priv->card_8185 = 0;
4373                         break;
4374
4375                 default:
4376                         DMESGW("MAC chip not recognized: version %x. Assuming RTL8180",hw_version);
4377                         priv->card_8185 = 0;
4378                         break;
4379         }
4380
4381         if(priv->card_8185){
4382                 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
4383                 priv->ieee80211->short_slot = 1;
4384         }
4385         /* you should not found any 8185 Ver B Card */
4386         priv->card_8185_Bversion = 0;
4387
4388 #ifdef CONFIG_RTL8185B
4389 #ifdef CONFIG_RTL818X_S
4390         // just for sync 85
4391         priv->card_type = PCI;
4392         DMESG("This is a PCI NIC");
4393 #else
4394         config3 = read_nic_byte(dev, CONFIG3);
4395         if(config3 & 0x8){
4396                 priv->card_type = CARDBUS;
4397                 DMESG("This is a CARDBUS NIC");
4398         }
4399         else if( config3 & 0x4){
4400                 priv->card_type = MINIPCI;
4401                 DMESG("This is a MINI-PCI NIC");
4402         }else{
4403                 priv->card_type = PCI;
4404                 DMESG("This is a PCI NIC");
4405         }
4406 #endif
4407 #endif
4408         priv->enable_gpio0 = 0;
4409
4410 //by amy for antenna
4411 #ifdef CONFIG_RTL8185B
4412         usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET);
4413         DMESG("usValue is 0x%x\n",usValue);
4414 #ifdef CONFIG_RTL818X_S
4415         //3Read AntennaDiversity
4416         // SW Antenna Diversity.
4417         if(     (usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE )
4418         {
4419                 priv->EEPROMSwAntennaDiversity = false;
4420                 //printk("EEPROM Disable SW Antenna Diversity\n");
4421         }
4422         else
4423         {
4424                 priv->EEPROMSwAntennaDiversity = true;
4425                 //printk("EEPROM Enable SW Antenna Diversity\n");
4426         }
4427         // Default Antenna to use.
4428         if( (usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1 )
4429         {
4430                 priv->EEPROMDefaultAntenna1 = false;
4431                 //printk("EEPROM Default Antenna 0\n");
4432         }
4433         else
4434         {
4435                 priv->EEPROMDefaultAntenna1 = true;
4436                 //printk("EEPROM Default Antenna 1\n");
4437         }
4438
4439         //
4440         // Antenna diversity mechanism. Added by Roger, 2007.11.05.
4441         //
4442         if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto
4443         {// 0: default from EEPROM.
4444                 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
4445         }
4446         else
4447         {// 1:disable antenna diversity, 2: enable antenna diversity.
4448                 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true);
4449         }
4450         //printk("bSwAntennaDiverity = %d\n", priv->bSwAntennaDiverity);
4451
4452
4453         //
4454         // Default antenna settings. Added by Roger, 2007.11.05.
4455         //
4456         if( priv->RegDefaultAntenna == 0)
4457         {// 0: default from EEPROM.
4458                 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
4459         }
4460         else
4461         {// 1: main, 2: aux.
4462                 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false);
4463         }
4464         //printk("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1);
4465 #endif
4466 #endif
4467 //by amy for antenna
4468         /* rtl8185 can calc plcp len in HW.*/
4469         priv->hw_plcp_len = 1;
4470
4471         priv->plcp_preamble_mode = 2;
4472         /*the eeprom type is stored in RCR register bit #6 */
4473         if (RCR_9356SEL & read_nic_dword(dev, RCR)){
4474                 priv->epromtype=EPROM_93c56;
4475                 //DMESG("Reported EEPROM chip is a 93c56 (2Kbit)");
4476         }else{
4477                 priv->epromtype=EPROM_93c46;
4478                 //DMESG("Reported EEPROM chip is a 93c46 (1Kbit)");
4479         }
4480
4481         dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff;
4482         dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8;
4483         dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
4484         dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
4485         dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
4486         dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8;
4487         //DMESG("Card MAC address is "MAC_FMT, MAC_ARG(dev->dev_addr));
4488
4489
4490         for(i=1,j=0; i<14; i+=2,j++){
4491
4492                 word = eprom_read(dev,EPROM_TXPW_CH1_2 + j);
4493                 priv->chtxpwr[i]=word & 0xff;
4494                 priv->chtxpwr[i+1]=(word & 0xff00)>>8;
4495 #ifdef DEBUG_EPROM
4496                 DMESG("tx word %x:%x",j,word);
4497                 DMESG("ch %d pwr %x",i,priv->chtxpwr[i]);
4498                 DMESG("ch %d pwr %x",i+1,priv->chtxpwr[i+1]);
4499 #endif
4500         }
4501         if(priv->card_8185){
4502                 for(i=1,j=0; i<14; i+=2,j++){
4503
4504                         word = eprom_read(dev,EPROM_TXPW_OFDM_CH1_2 + j);
4505                         priv->chtxpwr_ofdm[i]=word & 0xff;
4506                         priv->chtxpwr_ofdm[i+1]=(word & 0xff00)>>8;
4507 #ifdef DEBUG_EPROM
4508                         DMESG("ofdm tx word %x:%x",j,word);
4509                         DMESG("ofdm ch %d pwr %x",i,priv->chtxpwr_ofdm[i]);
4510                         DMESG("ofdm ch %d pwr %x",i+1,priv->chtxpwr_ofdm[i+1]);
4511 #endif
4512                 }
4513         }
4514 //{by amy 080312
4515         //3Read crystal calibtration and thermal meter indication on 87SE.
4516
4517         // By SD3 SY's request. Added by Roger, 2007.12.11.
4518
4519         tmpu16 = eprom_read(dev, EEPROM_RSV>>1);
4520
4521         //printk("ReadAdapterInfo8185(): EEPROM_RSV(%04x)\n", tmpu16);
4522
4523                 // Crystal calibration for Xin and Xout resp.
4524                 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK; // 0~7.5pF
4525                 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK)>>4; // 0~7.5pF
4526                 if((tmpu16 & EEPROM_XTAL_CAL_ENABLE)>>12)
4527                         priv->bXtalCalibration = true;
4528
4529                 // Thermal meter reference indication.
4530                 priv->ThermalMeter =  (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK)>>8);
4531                 if((tmpu16 & EEPROM_THERMAL_METER_ENABLE)>>13)
4532                         priv->bTxPowerTrack = true;
4533
4534 //by amy 080312}
4535 #ifdef CONFIG_RTL8185B
4536         word = eprom_read(dev,EPROM_TXPW_BASE);
4537         priv->cck_txpwr_base = word & 0xf;
4538         priv->ofdm_txpwr_base = (word>>4) & 0xf;
4539 #endif
4540
4541         version = eprom_read(dev,EPROM_VERSION);
4542         DMESG("EEPROM version %x",version);
4543         if( (!priv->card_8185) && version < 0x0101){
4544                 DMESG ("EEPROM version too old, assuming defaults");
4545                 DMESG ("If you see this message *plase* send your \
4546 DMESG output to andreamrl@tiscali.it THANKS");
4547                 priv->digphy=1;
4548                 priv->antb=0;
4549                 priv->diversity=1;
4550                 priv->cs_treshold=0xc;
4551                 priv->rcr_csense=1;
4552                 priv->rf_chip=RFCHIPID_PHILIPS;
4553         }else{
4554                 if(!priv->card_8185){
4555                         u8 rfparam = eprom_read(dev,RF_PARAM);
4556                         DMESG("RfParam: %x",rfparam);
4557
4558                         priv->digphy = rfparam & (1<<RF_PARAM_DIGPHY_SHIFT) ? 0:1;
4559                         priv->antb =  rfparam & (1<<RF_PARAM_ANTBDEFAULT_SHIFT) ? 1:0;
4560
4561                         priv->rcr_csense = (rfparam & RF_PARAM_CARRIERSENSE_MASK) >>
4562                                         RF_PARAM_CARRIERSENSE_SHIFT;
4563
4564                         priv->diversity =
4565                                 (read_nic_byte(dev,CONFIG2)&(1<<CONFIG2_ANTENNA_SHIFT)) ? 1:0;
4566                 }else{
4567                         priv->rcr_csense = 3;
4568                 }
4569
4570                 priv->cs_treshold = (eprom_read(dev,ENERGY_TRESHOLD)&0xff00) >>8;
4571
4572                 priv->rf_chip = 0xff & eprom_read(dev,RFCHIPID);
4573         }
4574
4575 #ifdef CONFIG_RTL8185B
4576 #ifdef CONFIG_RTL818X_S
4577         priv->rf_chip = RF_ZEBRA4;
4578         priv->rf_sleep = rtl8225z4_rf_sleep;
4579         priv->rf_wakeup = rtl8225z4_rf_wakeup;
4580 #else
4581         priv->rf_chip = RF_ZEBRA2;
4582 #endif
4583         //DMESG("Card reports RF frontend Realtek 8225z2");
4584         //DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4585         //DMESGW("use it with care and at your own risk and");
4586         DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
4587
4588         priv->rf_close = rtl8225z2_rf_close;
4589         priv->rf_init = rtl8225z2_rf_init;
4590         priv->rf_set_chan = rtl8225z2_rf_set_chan;
4591         priv->rf_set_sens = NULL;
4592         //priv->rf_sleep = rtl8225_rf_sleep;
4593         //priv->rf_wakeup = rtl8225_rf_wakeup;
4594
4595 #else
4596         /* check RF frontend chipset */
4597         switch (priv->rf_chip) {
4598
4599                 case RFCHIPID_RTL8225:
4600
4601                 if(priv->card_8185){
4602                         DMESG("Card reports RF frontend Realtek 8225");
4603                         DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4604                         DMESGW("use it with care and at your own risk and");
4605                         DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4606
4607                         priv->rf_close = rtl8225_rf_close;
4608                         priv->rf_init = rtl8225_rf_init;
4609                         priv->rf_set_chan = rtl8225_rf_set_chan;
4610                         priv->rf_set_sens = NULL;
4611                         priv->rf_sleep = rtl8225_rf_sleep;
4612                         priv->rf_wakeup = rtl8225_rf_wakeup;
4613
4614                 }else{
4615                         DMESGW("Detected RTL8225 radio on a card recognized as RTL8180");
4616                         DMESGW("This could not be... something went wrong....");
4617                         return -ENODEV;
4618                 }
4619                         break;
4620
4621                 case RFCHIPID_RTL8255:
4622                 if(priv->card_8185){
4623                         DMESG("Card reports RF frontend Realtek 8255");
4624                         DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4625                         DMESGW("use it with care and at your own risk and");
4626                         DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4627
4628                         priv->rf_close = rtl8255_rf_close;
4629                         priv->rf_init = rtl8255_rf_init;
4630                         priv->rf_set_chan = rtl8255_rf_set_chan;
4631                         priv->rf_set_sens = NULL;
4632                         priv->rf_sleep = NULL;
4633                         priv->rf_wakeup = NULL;
4634
4635                 }else{
4636                         DMESGW("Detected RTL8255 radio on a card recognized as RTL8180");
4637                         DMESGW("This could not be... something went wrong....");
4638                         return -ENODEV;
4639                 }
4640                         break;
4641
4642
4643                 case RFCHIPID_INTERSIL:
4644                         DMESGW("Card reports RF frontend by Intersil.");
4645                         DMESGW("This driver has NO support for this chipset.");
4646                         return -ENODEV;
4647                         break;
4648
4649                 case RFCHIPID_RFMD:
4650                         DMESGW("Card reports RF frontend by RFMD.");
4651                         DMESGW("This driver has NO support for this chipset.");
4652                         return -ENODEV;
4653                         break;
4654
4655                 case RFCHIPID_GCT:
4656                         DMESGW("Card reports RF frontend by GCT.");
4657                         DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4658                         DMESGW("use it with care and at your own risk and");
4659                         DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4660                         priv->rf_close = gct_rf_close;
4661                         priv->rf_init = gct_rf_init;
4662                         priv->rf_set_chan = gct_rf_set_chan;
4663                         priv->rf_set_sens = NULL;
4664                         priv->rf_sleep = NULL;
4665                         priv->rf_wakeup = NULL;
4666                         break;
4667
4668                 case RFCHIPID_MAXIM:
4669                         DMESGW("Card reports RF frontend by MAXIM.");
4670                         DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4671                         DMESGW("use it with care and at your own risk and");
4672                         DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4673                         priv->rf_close = maxim_rf_close;
4674                         priv->rf_init = maxim_rf_init;
4675                         priv->rf_set_chan = maxim_rf_set_chan;
4676                         priv->rf_set_sens = NULL;
4677                         priv->rf_sleep = NULL;
4678                         priv->rf_wakeup = NULL;
4679                         break;
4680
4681                 case RFCHIPID_PHILIPS:
4682                         DMESG("Card reports RF frontend by Philips.");
4683                         DMESG("OK! Philips SA2400 radio chipset is supported.");
4684                         priv->rf_close = sa2400_rf_close;
4685                         priv->rf_init = sa2400_rf_init;
4686                         priv->rf_set_chan = sa2400_rf_set_chan;
4687                         priv->rf_set_sens = sa2400_rf_set_sens;
4688                         priv->sens = SA2400_RF_DEF_SENS; /* default sensitivity */
4689                         priv->max_sens = SA2400_RF_MAX_SENS; /* maximum sensitivity */
4690                         priv->rf_sleep = NULL;
4691                         priv->rf_wakeup = NULL;
4692
4693                         if(priv->digphy){
4694                                 DMESGW("Digital PHY found");
4695                                 DMESGW("Philips DIGITAL PHY is untested! *Please*\
4696         report success/failure to <andreamrl@tiscali.it>");
4697                         }else{
4698                                 DMESG ("Analog PHY found");
4699                         }
4700
4701                         break;
4702
4703                 default:
4704                         DMESGW("Unknown RF module %x",priv->rf_chip);
4705                         DMESGW("Exiting...");
4706                         return -1;
4707
4708         }
4709 #endif
4710
4711
4712         if(!priv->card_8185){
4713                 if(priv->antb)
4714                         DMESG ("Antenna B is default antenna");
4715                 else
4716                         DMESG ("Antenna A is default antenna");
4717
4718                 if(priv->diversity)
4719                         DMESG ("Antenna diversity is enabled");
4720                 else
4721                         DMESG("Antenna diversity is disabled");
4722
4723                 DMESG("Carrier sense %d",priv->rcr_csense);
4724         }
4725
4726         if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
4727                 return -ENOMEM;
4728
4729         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4730                                   TX_MANAGEPRIORITY_RING_ADDR))
4731                 return -ENOMEM;
4732
4733         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4734                                  TX_BKPRIORITY_RING_ADDR))
4735                 return -ENOMEM;
4736
4737         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4738                                  TX_BEPRIORITY_RING_ADDR))
4739                 return -ENOMEM;
4740
4741         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4742                                   TX_VIPRIORITY_RING_ADDR))
4743                 return -ENOMEM;
4744
4745         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4746                                   TX_VOPRIORITY_RING_ADDR))
4747                 return -ENOMEM;
4748
4749         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4750                                   TX_HIGHPRIORITY_RING_ADDR))
4751                 return -ENOMEM;
4752
4753         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
4754                                   TX_BEACON_RING_ADDR))
4755                 return -ENOMEM;
4756
4757
4758         //priv->beacon_buf=NULL;
4759
4760         if(!priv->card_8185){
4761
4762                 if(read_nic_byte(dev, CONFIG0) & (1<<CONFIG0_WEP40_SHIFT))
4763                         DMESG ("40-bit WEP is supported in hardware");
4764                 else
4765                         DMESG ("40-bit WEP is NOT supported in hardware");
4766
4767                 if(read_nic_byte(dev,CONFIG0) & (1<<CONFIG0_WEP104_SHIFT))
4768                         DMESG ("104-bit WEP is supported in hardware");
4769                 else
4770                         DMESG ("104-bit WEP is NOT supported in hardware");
4771         }
4772 #if !defined(SA_SHIRQ)
4773         if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){
4774 #else
4775         if(request_irq(dev->irq, (void *)rtl8180_interrupt, SA_SHIRQ, dev->name, dev)){
4776 #endif
4777                 DMESGE("Error allocating IRQ %d",dev->irq);
4778                 return -1;
4779         }else{
4780                 priv->irq=dev->irq;
4781                 DMESG("IRQ %d",dev->irq);
4782         }
4783
4784 #ifdef DEBUG_EPROM
4785         dump_eprom(dev);
4786 #endif
4787
4788         return 0;
4789
4790 }
4791
4792
4793 void rtl8180_no_hw_wep(struct net_device *dev)
4794 {
4795         struct r8180_priv *priv = ieee80211_priv(dev);
4796
4797         if(!priv->card_8185)
4798         {
4799                 u8 security;
4800
4801                 security  = read_nic_byte(dev, SECURITY);
4802                 security &=~(1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4803                 security &=~(1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4804
4805                 write_nic_byte(dev, SECURITY, security);
4806
4807         }else{
4808
4809                 //FIXME!!!
4810         }
4811         /*
4812           write_nic_dword(dev,TX_CONF,read_nic_dword(dev,TX_CONF) |
4813           (1<<TX_NOICV_SHIFT) );
4814         */
4815 //      priv->ieee80211->hw_wep=0;
4816 }
4817
4818
4819 void rtl8180_set_hw_wep(struct net_device *dev)
4820 {
4821         struct r8180_priv *priv = ieee80211_priv(dev);
4822         u8 pgreg;
4823         u8 security;
4824         u32 key0_word4;
4825
4826         pgreg=read_nic_byte(dev, PGSELECT);
4827         write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
4828
4829         key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
4830         key0_word4 &= ~ 0xff;
4831         key0_word4 |= priv->key0[3]& 0xff;
4832         write_nic_dword(dev,KEY0,(priv->key0[0]));
4833         write_nic_dword(dev,KEY0+4,(priv->key0[1]));
4834         write_nic_dword(dev,KEY0+4+4,(priv->key0[2]));
4835         write_nic_dword(dev,KEY0+4+4+4,(key0_word4));
4836
4837         /*
4838           TX_CONF,read_nic_dword(dev,TX_CONF) &~(1<<TX_NOICV_SHIFT));
4839         */
4840
4841         security  = read_nic_byte(dev,SECURITY);
4842         security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4843         security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4844         security &= ~ SECURITY_ENCRYP_MASK;
4845         security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
4846
4847         write_nic_byte(dev, SECURITY, security);
4848
4849         DMESG("key %x %x %x %x",read_nic_dword(dev,KEY0+4+4+4),
4850               read_nic_dword(dev,KEY0+4+4),read_nic_dword(dev,KEY0+4),
4851               read_nic_dword(dev,KEY0));
4852
4853         //priv->ieee80211->hw_wep=1;
4854 }
4855
4856
4857 void rtl8185_rf_pins_enable(struct net_device *dev)
4858 {
4859 //      u16 tmp;
4860 //      tmp = read_nic_word(dev, RFPinsEnable);
4861         write_nic_word(dev, RFPinsEnable, 0x1fff);// | tmp);
4862 //      write_nic_word(dev, RFPinsEnable,7 | tmp);
4863 }
4864
4865
4866 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
4867 {
4868         u8 conf3;
4869
4870         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4871
4872         conf3 = read_nic_byte(dev, CONFIG3);
4873         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4874         write_nic_dword(dev, ANAPARAM2, a);
4875
4876         conf3 = read_nic_byte(dev, CONFIG3);
4877         write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4878         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4879
4880 }
4881
4882
4883 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
4884 {
4885         u8 conf3;
4886
4887         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4888
4889         conf3 = read_nic_byte(dev, CONFIG3);
4890         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4891         write_nic_dword(dev, ANAPARAM, a);
4892
4893         conf3 = read_nic_byte(dev, CONFIG3);
4894         write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4895         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4896 }
4897
4898
4899 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
4900 {
4901         write_nic_byte(dev, TX_ANTENNA, ant);
4902         force_pci_posting(dev);
4903         mdelay(1);
4904 }
4905
4906
4907 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
4908 {
4909         //u8 phyr;
4910         u32 phyw;
4911         //int i;
4912
4913         adr |= 0x80;
4914
4915         phyw= ((data<<8) | adr);
4916 #if 0
4917
4918         write_nic_dword(dev, PHY_ADR, phyw);
4919
4920         //read_nic_dword(dev, PHY_ADR);
4921         for(i=0;i<10;i++){
4922                 write_nic_dword(dev, PHY_ADR, 0xffffff7f & phyw);
4923                 phyr = read_nic_byte(dev, PHY_READ);
4924                 if(phyr == (data&0xff)) break;
4925
4926         }
4927 #else
4928         // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register.
4929         write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
4930         write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
4931         write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
4932         write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
4933 #endif
4934         /* this is ok to fail when we write AGC table. check for AGC table might be
4935          * done by masking with 0x7f instead of 0xff
4936          */
4937         //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data,adr);
4938 }
4939
4940
4941 inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data)
4942 {
4943         data = data & 0xff;
4944         rtl8185_write_phy(dev, adr, data);
4945 }
4946
4947
4948 void write_phy_cck (struct net_device *dev, u8 adr, u32 data)
4949 {
4950         data = data & 0xff;
4951         rtl8185_write_phy(dev, adr, data | 0x10000);
4952 }
4953
4954
4955 /* 70*3 = 210 ms
4956  * I hope this is enougth
4957  */
4958 #define MAX_PHY 70
4959 void write_phy(struct net_device *dev, u8 adr, u8 data)
4960 {
4961         u32 phy;
4962         int i;
4963
4964         phy = 0xff0000;
4965         phy |= adr;
4966         phy |= 0x80; /* this should enable writing */
4967         phy |= (data<<8);
4968
4969         //PHY_ADR, PHY_R and PHY_W  are contig and treated as one dword
4970         write_nic_dword(dev,PHY_ADR, phy);
4971
4972         phy= 0xffff00;
4973         phy |= adr;
4974
4975         write_nic_dword(dev,PHY_ADR, phy);
4976         for(i=0;i<MAX_PHY;i++){
4977                 phy=read_nic_dword(dev,PHY_ADR);
4978                 phy= phy & 0xff0000;
4979                 phy= phy >> 16;
4980                 if(phy == data){ //SUCCESS!
4981                         force_pci_posting(dev);
4982                         mdelay(3); //random value
4983 #ifdef DEBUG_BB
4984                         DMESG("Phy wr %x,%x",adr,data);
4985 #endif
4986                         return;
4987                 }else{
4988                         force_pci_posting(dev);
4989                         mdelay(3); //random value
4990                 }
4991         }
4992         DMESGW ("Phy writing %x %x failed!", adr,data);
4993 }
4994
4995 void rtl8185_set_rate(struct net_device *dev)
4996 {
4997         int i;
4998         u16 word;
4999         int basic_rate,min_rr_rate,max_rr_rate;
5000
5001 //      struct r8180_priv *priv = ieee80211_priv(dev);
5002
5003         //if (ieee80211_is_54g(priv->ieee80211->current_network) &&
5004 //              priv->ieee80211->state == IEEE80211_LINKED){
5005         basic_rate = ieeerate2rtlrate(240);
5006         min_rr_rate = ieeerate2rtlrate(60);
5007         max_rr_rate = ieeerate2rtlrate(240);
5008
5009 //
5010 //      }else{
5011 //              basic_rate = ieeerate2rtlrate(20);
5012 //              min_rr_rate = ieeerate2rtlrate(10);
5013 //              max_rr_rate = ieeerate2rtlrate(110);
5014 //      }
5015
5016         write_nic_byte(dev, RESP_RATE,
5017                         max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
5018
5019         word  = read_nic_word(dev, BRSR);
5020         word &= ~BRSR_MBR_8185;
5021
5022
5023         for(i=0;i<=basic_rate;i++)
5024                 word |= (1<<i);
5025
5026         write_nic_word(dev, BRSR, word);
5027         //DMESG("RR:%x BRSR: %x", read_nic_byte(dev,RESP_RATE),read_nic_word(dev,BRSR));
5028 }
5029
5030
5031
5032 void rtl8180_adapter_start(struct net_device *dev)
5033 {
5034         struct r8180_priv *priv = ieee80211_priv(dev);
5035         u32 anaparam;
5036         u16 word;
5037         u8 config3;
5038 //      int i;
5039
5040         rtl8180_rtx_disable(dev);
5041         rtl8180_reset(dev);
5042
5043         /* seems that 0xffff or 0xafff will cause
5044          * HW interrupt line crash
5045          */
5046
5047         //priv->irq_mask = 0xafff;
5048 //      priv->irq_mask = 0x4fcf;
5049
5050         /* enable beacon timeout, beacon TX ok and err
5051          * LP tx ok and err, HP TX ok and err, NP TX ok and err,
5052          * RX ok and ERR, and GP timer */
5053         priv->irq_mask = 0x6fcf;
5054
5055         priv->dma_poll_mask = 0;
5056
5057         rtl8180_beacon_tx_disable(dev);
5058
5059         if(priv->card_type == CARDBUS ){
5060                 config3=read_nic_byte(dev, CONFIG3);
5061                 write_nic_byte(dev,CONFIG3,config3 | CONFIG3_FuncRegEn);
5062                 write_nic_word(dev,FEMR, FEMR_INTR | FEMR_WKUP | FEMR_GWAKE |
5063                         read_nic_word(dev, FEMR));
5064         }
5065         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5066         write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
5067         write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
5068         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5069
5070         rtl8180_update_msr(dev);
5071
5072         if(!priv->card_8185){
5073                 anaparam  = eprom_read(dev,EPROM_ANAPARAM_ADDRLWORD);
5074                 anaparam |= eprom_read(dev,EPROM_ANAPARAM_ADDRHWORD)<<16;
5075
5076                 rtl8180_set_anaparam(dev,anaparam);
5077         }
5078         /* These might be unnecessary since we do in rx_enable / tx_enable */
5079         fix_rx_fifo(dev);
5080         fix_tx_fifo(dev);
5081         /*set_nic_rxring(dev);
5082           set_nic_txring(dev);*/
5083
5084         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5085
5086         /*
5087            The following is very strange. seems to be that 1 means test mode,
5088            but we need to acknolwledges the nic when a packet is ready
5089            altought we set it to 0
5090         */
5091
5092         write_nic_byte(dev,
5093                        CONFIG2, read_nic_byte(dev,CONFIG2) &~\
5094                        (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
5095         //^the nic isn't in test mode
5096         if(priv->card_8185)
5097                         write_nic_byte(dev,
5098                        CONFIG2, read_nic_byte(dev,CONFIG2)|(1<<4));
5099
5100         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
5101
5102         write_nic_dword(dev,INT_TIMEOUT,0);
5103 #ifdef DEBUG_REGISTERS
5104         rtl8180_dump_reg(dev);
5105 #endif
5106
5107         if(!priv->card_8185)
5108         {
5109                 /*
5110                 experimental - this might be needed to calibrate AGC,
5111                 anyway it shouldn't hurt
5112                 */
5113                 write_nic_byte(dev, CONFIG5,
5114                         read_nic_byte(dev, CONFIG5) | (1<<AGCRESET_SHIFT));
5115                 read_nic_byte(dev, CONFIG5);
5116                 udelay(15);
5117                 write_nic_byte(dev, CONFIG5,
5118                         read_nic_byte(dev, CONFIG5) &~ (1<<AGCRESET_SHIFT));
5119         }else{
5120
5121                 write_nic_byte(dev, WPA_CONFIG, 0);
5122                 //write_nic_byte(dev, TESTR, 0xd);
5123         }
5124
5125         rtl8180_no_hw_wep(dev);
5126
5127         if(priv->card_8185){
5128                 rtl8185_set_rate(dev);
5129                 write_nic_byte(dev, RATE_FALLBACK, 0x81);
5130         //      write_nic_byte(dev, 0xdf, 0x15);
5131         }else{
5132                 word  = read_nic_word(dev, BRSR);
5133                 word &= ~BRSR_MBR;
5134                 word &= ~BRSR_BPLCP;
5135                 word |= ieeerate2rtlrate(priv->ieee80211->basic_rate);
5136 //by amy
5137               word |= 0x0f;
5138 //by amy
5139                 write_nic_word(dev, BRSR, word);
5140         }
5141
5142
5143         if(priv->card_8185){
5144                 write_nic_byte(dev, GP_ENABLE,read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
5145
5146                 //FIXME cfg 3 ClkRun enable - isn't it ReadOnly ?
5147                 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5148                 write_nic_byte(dev,CONFIG3, read_nic_byte(dev, CONFIG3)
5149 |(1<<CONFIG3_CLKRUN_SHIFT));
5150                 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5151
5152         }
5153
5154         priv->rf_init(dev);
5155
5156         if(priv->rf_set_sens != NULL)
5157                 priv->rf_set_sens(dev,priv->sens);
5158         rtl8180_irq_enable(dev);
5159
5160         netif_start_queue(dev);
5161         /*DMESG ("lfree %d",get_curr_tx_free_desc(dev,LOW_PRIORITY));
5162
5163         DMESG ("nfree %d",get_curr_tx_free_desc(dev,NORM_PRIORITY));
5164
5165         DMESG ("hfree %d",get_curr_tx_free_desc(dev,HI_PRIORITY));
5166         if(check_nic_enought_desc(dev,NORM_PRIORITY)) DMESG("NORM OK");
5167         if(check_nic_enought_desc(dev,HI_PRIORITY)) DMESG("HI OK");
5168         if(check_nic_enought_desc(dev,LOW_PRIORITY)) DMESG("LOW OK");*/
5169 }
5170
5171
5172
5173 /* this configures registers for beacon tx and enables it via
5174  * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
5175  * be used to stop beacon transmission
5176  */
5177 void rtl8180_start_tx_beacon(struct net_device *dev)
5178 {
5179 //      struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5180         u16 word;
5181 //      DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
5182
5183         DMESG("Enabling beacon TX");
5184         //write_nic_byte(dev, 0x42,0xe6);// TCR
5185 //      set_nic_txring(dev);
5186 //      fix_tx_fifo(dev);
5187         rtl8180_prepare_beacon(dev);
5188         rtl8180_irq_disable(dev);
5189         rtl8180_beacon_tx_enable(dev);
5190 #if 0
5191         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
5192         //write_nic_byte(dev,0x9d,0x20); //DMA Poll
5193         //write_nic_word(dev,0x7a,0);
5194         //write_nic_word(dev,0x7a,0x8000);
5195
5196 #if 0
5197         word  = read_nic_word(dev, BcnItv);
5198         word &= ~BcnItv_BcnItv; // clear Bcn_Itv
5199         word |= priv->ieee80211->current_network.beacon_interval;//0x64;
5200         write_nic_word(dev, BcnItv, word);
5201 #endif
5202 #endif
5203         word = read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd;
5204         write_nic_word(dev, AtimWnd,word);// word |=
5205 //priv->ieee80211->current_network.atim_window);
5206
5207         word  = read_nic_word(dev, BintrItv);
5208         word &= ~BintrItv_BintrItv;
5209         word |= 1000;/*priv->ieee80211->current_network.beacon_interval *
5210                 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
5211         // FIXME: check if correct ^^ worked with 0x3e8;
5212         */
5213         write_nic_word(dev, BintrItv, word);
5214
5215
5216         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5217
5218 //      rtl8180_beacon_tx_enable(dev);
5219 #ifdef CONFIG_RTL8185B
5220         rtl8185b_irq_enable(dev);
5221 #else
5222         rtl8180_irq_enable(dev);
5223 #endif
5224         /* VV !!!!!!!!!! VV*/
5225         /*
5226         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
5227         write_nic_byte(dev,0x9d,0x00);
5228         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
5229 */
5230 //      DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
5231
5232 }
5233
5234
5235
5236 /***************************************************************************
5237     -------------------------------NET STUFF---------------------------
5238 ***************************************************************************/
5239 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
5240 {
5241         struct r8180_priv *priv = ieee80211_priv(dev);
5242
5243         return &priv->ieee80211->stats;
5244 }
5245 //
5246 // Change current and default preamble mode.
5247 // 2005.01.06, by rcnjko.
5248 //
5249 bool
5250 MgntActSet_802_11_PowerSaveMode(
5251         struct r8180_priv *priv,
5252         RT_PS_MODE              rtPsMode
5253 )
5254 {
5255
5256         // Currently, we do not change power save mode on IBSS mode.
5257         if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5258         {
5259                 return false;
5260         }
5261
5262         //
5263         // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
5264         // some AP will not response to our mgnt frames with PwrMgt bit set,
5265         // e.g. cannot associate the AP.
5266         // So I commented out it. 2005.02.16, by rcnjko.
5267         //
5268 //      // Change device's power save mode.
5269 //      Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
5270
5271         // Update power save mode configured.
5272 //      priv->dot11PowerSaveMode = rtPsMode;
5273         priv->ieee80211->ps = rtPsMode;
5274         // Determine ListenInterval.
5275 #if 0
5276         if(priv->dot11PowerSaveMode == eMaxPs)
5277         {
5278                 priv->ieee80211->ListenInterval = 10;
5279         }
5280         else
5281         {
5282                 priv->ieee80211->ListenInterval = 2;
5283         }
5284 #endif
5285         return true;
5286 }
5287
5288 //================================================================================
5289 // Leisure Power Save in linked state.
5290 //================================================================================
5291
5292 //
5293 //      Description:
5294 //              Enter the leisure power save mode.
5295 //
5296 void
5297 LeisurePSEnter(
5298         struct r8180_priv *priv
5299         )
5300 {
5301         if (priv->bLeisurePs)
5302         {
5303                 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
5304                 {
5305                         //printk("----Enter PS\n");
5306                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);//IEEE80211_PS_ENABLE
5307                 }
5308         }
5309 }
5310
5311
5312 //
5313 //      Description:
5314 //              Leave the leisure power save mode.
5315 //
5316 void
5317 LeisurePSLeave(
5318         struct r8180_priv *priv
5319         )
5320 {
5321         if (priv->bLeisurePs)
5322         {
5323                 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
5324                 {
5325                         //printk("----Leave PS\n");
5326                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
5327                 }
5328         }
5329 }
5330
5331 void rtl8180_hw_wakeup_wq (struct work_struct *work)
5332 {
5333 //      struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
5334 //      struct ieee80211_device * ieee = (struct ieee80211_device*)
5335 //                                             container_of(work, struct ieee80211_device, watch_dog_wq);
5336         struct delayed_work *dwork = to_delayed_work(work);
5337         struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
5338         struct net_device *dev = ieee->dev;
5339
5340 //      printk("dev is %d\n",dev);
5341 //      printk("&*&(^*(&(&=========>%s()\n", __func__);
5342         rtl8180_hw_wakeup(dev);
5343
5344 }
5345
5346 void rtl8180_hw_sleep_wq (struct work_struct *work)
5347 {
5348 //      struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
5349 //      struct ieee80211_device * ieee = (struct ieee80211_device*)
5350 //                                             container_of(work, struct ieee80211_device, watch_dog_wq);
5351         struct delayed_work *dwork = to_delayed_work(work);
5352         struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
5353         struct net_device *dev = ieee->dev;
5354
5355         rtl8180_hw_sleep_down(dev);
5356 }
5357
5358 //YJ,add,080828,for KeepAlive
5359 static void MgntLinkKeepAlive(struct r8180_priv *priv )
5360 {
5361         if (priv->keepAliveLevel == 0)
5362                 return;
5363
5364         if(priv->ieee80211->state == IEEE80211_LINKED)
5365         {
5366                 //
5367                 // Keep-Alive.
5368                 //
5369                 //printk("LastTx:%d Tx:%d LastRx:%d Rx:%ld Idle:%d\n",priv->link_detect.LastNumTxUnicast,priv->NumTxUnicast, priv->link_detect.LastNumRxUnicast, priv->ieee80211->NumRxUnicast, priv->link_detect.IdleCount);
5370
5371                 if ( (priv->keepAliveLevel== 2) ||
5372                         (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
5373                         priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast )
5374                         )
5375                 {
5376                         priv->link_detect.IdleCount++;
5377
5378                         //
5379                         // Send a Keep-Alive packet packet to AP if we had been idle for a while.
5380                         //
5381                         if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) )
5382                         {
5383                                 priv->link_detect.IdleCount = 0;
5384                                 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
5385                         }
5386                 }
5387                 else
5388                 {
5389                         priv->link_detect.IdleCount = 0;
5390                 }
5391                 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
5392                 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
5393         }
5394 }
5395 //YJ,add,080828,for KeepAlive,end
5396
5397 static u8 read_acadapter_file(char *filename);
5398 void rtl8180_watch_dog(struct net_device *dev)
5399 {
5400         struct r8180_priv *priv = ieee80211_priv(dev);
5401         bool bEnterPS = false;
5402         bool bBusyTraffic = false;
5403         u32 TotalRxNum = 0;
5404         u16 SlotIndex = 0;
5405         u16 i = 0;
5406 #ifdef ENABLE_IPS
5407         if(priv->ieee80211->actscanning == false){
5408                 if((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn)){
5409                         IPSEnter(dev);
5410                 }
5411         }
5412 #endif
5413         //YJ,add,080828,for link state check
5414         if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){
5415                 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
5416                 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
5417                 for( i=0; i<priv->link_detect.SlotNum; i++ )
5418                         TotalRxNum+= priv->link_detect.RxFrameNum[i];
5419                 //printk("&&&&&=== TotalRxNum = %d\n", TotalRxNum);
5420                 if(TotalRxNum == 0){
5421                         priv->ieee80211->state = IEEE80211_ASSOCIATING;
5422                         queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
5423                 }
5424         }
5425
5426         //YJ,add,080828,for KeepAlive
5427         MgntLinkKeepAlive(priv);
5428
5429         //YJ,add,080828,for LPS
5430 #ifdef ENABLE_LPS
5431         if(priv->PowerProfile == POWER_PROFILE_BATTERY )
5432         {
5433                 //Turn on LeisurePS on battery power
5434                 //printk("!!!!!On battery power\n");
5435                 priv->bLeisurePs = true;
5436         }
5437         else if(priv->PowerProfile == POWER_PROFILE_AC )
5438         {
5439                 // Turn off LeisurePS on AC power
5440                 //printk("----On AC power\n");
5441                 LeisurePSLeave(priv);
5442                 priv->bLeisurePs= false;
5443         }
5444 #endif
5445
5446 #if 0
5447 #ifndef ENABLE_LPS
5448         if(priv->ieee80211->state == IEEE80211_LINKED){
5449                 if(     priv->NumRxOkInPeriod> 666 ||
5450                         priv->NumTxOkInPeriod > 666 ) {
5451                         bBusyTraffic = true;
5452                 }
5453                 if((priv->ieee80211->NumRxData + priv->NumTxOkInPeriod)<8) {
5454                         bEnterPS= true;
5455                 }
5456                 if(bEnterPS) {
5457                         LeisurePSEnter(priv);
5458                 }
5459                 else {
5460                         LeisurePSLeave(priv);
5461                 }
5462         }
5463         else    {
5464                 LeisurePSLeave(priv);
5465         }
5466 #endif
5467         priv->NumRxOkInPeriod = 0;
5468         priv->NumTxOkInPeriod = 0;
5469         priv->ieee80211->NumRxData = 0;
5470 #else
5471 #ifdef ENABLE_LPS
5472         if(priv->ieee80211->state == IEEE80211_LINKED){
5473                 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
5474                 //printk("TxOk=%d RxOk=%d\n", priv->link_detect.NumTxOkInPeriod, priv->link_detect.NumRxOkInPeriod);
5475                 if(     priv->link_detect.NumRxOkInPeriod> 666 ||
5476                         priv->link_detect.NumTxOkInPeriod> 666 ) {
5477                         bBusyTraffic = true;
5478                 }
5479                 if(((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
5480                         || (priv->link_detect.NumRxOkInPeriod > 2)) {
5481                         bEnterPS= false;
5482                 }
5483                 else {
5484                         bEnterPS= true;
5485                 }
5486
5487                 if(bEnterPS) {
5488                         LeisurePSEnter(priv);
5489                 }
5490                 else {
5491                         LeisurePSLeave(priv);
5492                 }
5493         }
5494         else{
5495                 LeisurePSLeave(priv);
5496         }
5497 #endif
5498         priv->link_detect.bBusyTraffic = bBusyTraffic;
5499         priv->link_detect.NumRxOkInPeriod = 0;
5500         priv->link_detect.NumTxOkInPeriod = 0;
5501         priv->ieee80211->NumRxDataInPeriod = 0;
5502         priv->ieee80211->NumRxBcnInPeriod = 0;
5503 #endif
5504 }
5505 int _rtl8180_up(struct net_device *dev)
5506 {
5507         struct r8180_priv *priv = ieee80211_priv(dev);
5508         //int i;
5509
5510         priv->up=1;
5511
5512         DMESG("Bringing up iface");
5513 #ifdef CONFIG_RTL8185B
5514         rtl8185b_adapter_start(dev);
5515         rtl8185b_rx_enable(dev);
5516         rtl8185b_tx_enable(dev);
5517 #else
5518         rtl8180_adapter_start(dev);
5519         rtl8180_rx_enable(dev);
5520         rtl8180_tx_enable(dev);
5521 #endif
5522 #ifdef ENABLE_IPS
5523         if(priv->bInactivePs){
5524                 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5525                         IPSLeave(dev);
5526         }
5527 #endif
5528 //by amy 080312
5529 #ifdef RATE_ADAPT
5530        timer_rate_adaptive((unsigned long)dev);
5531 #endif
5532 //by amy 080312
5533         watch_dog_adaptive((unsigned long)dev);
5534 #ifdef SW_ANTE
5535         if(priv->bSwAntennaDiverity)
5536                         SwAntennaDiversityTimerCallback(dev);
5537 #endif
5538 //      IPSEnter(dev);
5539         ieee80211_softmac_start_protocol(priv->ieee80211);
5540
5541 //Add for RF power on power off by lizhaoming 080512
5542 //      priv->eRFPowerState = eRfOn;
5543 //      printk("\n--------Start queue_work:GPIOChangeRFWorkItem");
5544 //      queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem,1000);
5545
5546         return 0;
5547 }
5548
5549
5550 int rtl8180_open(struct net_device *dev)
5551 {
5552         struct r8180_priv *priv = ieee80211_priv(dev);
5553         int ret;
5554
5555         down(&priv->wx_sem);
5556         ret = rtl8180_up(dev);
5557         up(&priv->wx_sem);
5558         return ret;
5559
5560 }
5561
5562
5563 int rtl8180_up(struct net_device *dev)
5564 {
5565         struct r8180_priv *priv = ieee80211_priv(dev);
5566
5567         if (priv->up == 1) return -1;
5568
5569         return _rtl8180_up(dev);
5570 }
5571
5572
5573 int rtl8180_close(struct net_device *dev)
5574 {
5575         struct r8180_priv *priv = ieee80211_priv(dev);
5576         int ret;
5577
5578         down(&priv->wx_sem);
5579         ret = rtl8180_down(dev);
5580         up(&priv->wx_sem);
5581
5582         return ret;
5583
5584 }
5585
5586 int rtl8180_down(struct net_device *dev)
5587 {
5588         struct r8180_priv *priv = ieee80211_priv(dev);
5589
5590         if (priv->up == 0) return -1;
5591
5592         priv->up=0;
5593
5594         ieee80211_softmac_stop_protocol(priv->ieee80211);
5595         /* FIXME */
5596         if (!netif_queue_stopped(dev))
5597                 netif_stop_queue(dev);
5598         rtl8180_rtx_disable(dev);
5599         rtl8180_irq_disable(dev);
5600         del_timer_sync(&priv->watch_dog_timer);
5601         //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5602 //{by amy 080312
5603     del_timer_sync(&priv->rateadapter_timer);
5604     cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5605 //by amy 080312}
5606         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5607         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5608         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5609         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5610         del_timer_sync(&priv->SwAntennaDiversityTimer);
5611         SetZebraRFPowerState8185(dev,eRfOff);
5612         //ieee80211_softmac_stop_protocol(priv->ieee80211);
5613         memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network));
5614         priv->ieee80211->state = IEEE80211_NOLINK;
5615         return 0;
5616 }
5617
5618 void rtl8180_restart_wq(struct work_struct *work)
5619 {
5620         struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
5621         struct net_device *dev = priv->dev;
5622
5623         down(&priv->wx_sem);
5624
5625         rtl8180_commit(dev);
5626
5627         up(&priv->wx_sem);
5628 }
5629
5630 void rtl8180_restart(struct net_device *dev)
5631 {
5632         struct r8180_priv *priv = ieee80211_priv(dev);
5633         //rtl8180_commit(dev);
5634         schedule_work(&priv->reset_wq);
5635         //DMESG("TXTIMEOUT");
5636 }
5637
5638
5639 void rtl8180_commit(struct net_device *dev)
5640 {
5641         struct r8180_priv *priv = ieee80211_priv(dev);
5642
5643         if (priv->up == 0) return ;
5644 //+by amy 080312
5645         del_timer_sync(&priv->watch_dog_timer);
5646         //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5647 //{by amy 080312
5648 //by amy for rate adaptive
5649     del_timer_sync(&priv->rateadapter_timer);
5650     cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5651 //by amy for rate adaptive
5652 //by amy 080312}
5653         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5654         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5655         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5656         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5657         del_timer_sync(&priv->SwAntennaDiversityTimer);
5658         ieee80211_softmac_stop_protocol(priv->ieee80211);
5659         rtl8180_irq_disable(dev);
5660         rtl8180_rtx_disable(dev);
5661         _rtl8180_up(dev);
5662 }
5663
5664
5665 static void r8180_set_multicast(struct net_device *dev)
5666 {
5667         struct r8180_priv *priv = ieee80211_priv(dev);
5668         short promisc;
5669
5670         //down(&priv->wx_sem);
5671
5672         promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5673
5674         if (promisc != priv->promisc)
5675                 rtl8180_restart(dev);
5676
5677         priv->promisc = promisc;
5678
5679         //up(&priv->wx_sem);
5680 }
5681
5682 #if 0
5683 /* this is called by the kernel when it needs to TX a 802.3 encapsulated frame*/
5684 int rtl8180_8023_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
5685 {
5686         struct r8180_priv *priv = ieee80211_priv(dev);
5687         int ret;
5688         unsigned long flags;
5689
5690         spin_lock_irqsave(&priv->tx_lock,flags);
5691         ret = ieee80211_r8180_8023_hardstartxmit(skb,priv->ieee80211);
5692         spin_unlock_irqrestore(&priv->tx_lock,flags);
5693         return ret;
5694 }
5695 #endif
5696
5697 int r8180_set_mac_adr(struct net_device *dev, void *mac)
5698 {
5699         struct r8180_priv *priv = ieee80211_priv(dev);
5700         struct sockaddr *addr = mac;
5701
5702         down(&priv->wx_sem);
5703
5704         memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5705
5706         if(priv->ieee80211->iw_mode == IW_MODE_MASTER)
5707                 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
5708
5709         if (priv->up) {
5710                 rtl8180_down(dev);
5711                 rtl8180_up(dev);
5712         }
5713
5714         up(&priv->wx_sem);
5715
5716         return 0;
5717 }
5718
5719 /* based on ipw2200 driver */
5720 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5721 {
5722         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5723
5724         struct iwreq *wrq = (struct iwreq *) rq;
5725         int ret=-1;
5726         switch (cmd) {
5727             case RTL_IOCTL_WPA_SUPPLICANT:
5728                 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5729                 return ret;
5730
5731             default:
5732                 return -EOPNOTSUPP;
5733         }
5734
5735         return -EOPNOTSUPP;
5736 }
5737
5738
5739
5740 /****************************************************************************
5741      -----------------------------PCI STUFF---------------------------
5742 *****************************************************************************/
5743
5744 static const struct net_device_ops rtl8180_netdev_ops = {
5745         .ndo_open               = rtl8180_open,
5746         .ndo_stop               = rtl8180_close,
5747         .ndo_get_stats          = rtl8180_stats,
5748         .ndo_tx_timeout         = rtl8180_restart,
5749         .ndo_do_ioctl           = rtl8180_ioctl,
5750         .ndo_set_multicast_list = r8180_set_multicast,
5751         .ndo_set_mac_address    = r8180_set_mac_adr,
5752         .ndo_validate_addr      = eth_validate_addr,
5753         .ndo_change_mtu         = eth_change_mtu,
5754         .ndo_start_xmit         = ieee80211_xmit,
5755 };
5756
5757 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
5758                                        const struct pci_device_id *id)
5759 {
5760         unsigned long ioaddr = 0;
5761         struct net_device *dev = NULL;
5762         struct r8180_priv *priv= NULL;
5763         //u8 *ptr;
5764         u8 unit = 0;
5765
5766 #ifdef CONFIG_RTL8180_IO_MAP
5767         unsigned long pio_start, pio_len, pio_flags;
5768 #else
5769         unsigned long pmem_start, pmem_len, pmem_flags;
5770 #endif //end #ifdef RTL_IO_MAP
5771
5772         DMESG("Configuring chip resources");
5773
5774         if( pci_enable_device (pdev) ){
5775                 DMESG("Failed to enable PCI device");
5776                 return -EIO;
5777         }
5778
5779         pci_set_master(pdev);
5780         //pci_set_wmi(pdev);
5781         pci_set_dma_mask(pdev, 0xffffff00ULL);
5782         pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
5783         dev = alloc_ieee80211(sizeof(struct r8180_priv));
5784         if (!dev)
5785                 return -ENOMEM;
5786         priv = ieee80211_priv(dev);
5787         priv->ieee80211 = netdev_priv(dev);
5788
5789         pci_set_drvdata(pdev, dev);
5790         SET_NETDEV_DEV(dev, &pdev->dev);
5791
5792         priv = ieee80211_priv(dev);
5793 //      memset(priv,0,sizeof(struct r8180_priv));
5794         priv->pdev=pdev;
5795
5796
5797 #ifdef CONFIG_RTL8180_IO_MAP
5798
5799         pio_start = (unsigned long)pci_resource_start (pdev, 0);
5800         pio_len = (unsigned long)pci_resource_len (pdev, 0);
5801         pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
5802
5803         if (!(pio_flags & IORESOURCE_IO)) {
5804                 DMESG("region #0 not a PIO resource, aborting");
5805                 goto fail;
5806         }
5807
5808         //DMESG("IO space @ 0x%08lx", pio_start );
5809         if( ! request_region( pio_start, pio_len, RTL8180_MODULE_NAME ) ){
5810                 DMESG("request_region failed!");
5811                 goto fail;
5812         }
5813
5814         ioaddr = pio_start;
5815         dev->base_addr = ioaddr; // device I/O address
5816
5817 #else
5818
5819         pmem_start = pci_resource_start(pdev, 1);
5820         pmem_len = pci_resource_len(pdev, 1);
5821         pmem_flags = pci_resource_flags (pdev, 1);
5822
5823         if (!(pmem_flags & IORESOURCE_MEM)) {
5824                 DMESG("region #1 not a MMIO resource, aborting");
5825                 goto fail;
5826         }
5827
5828         //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
5829         if( ! request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
5830                 DMESG("request_mem_region failed!");
5831                 goto fail;
5832         }
5833
5834
5835         ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
5836         if( ioaddr == (unsigned long)NULL ){
5837                 DMESG("ioremap failed!");
5838                // release_mem_region( pmem_start, pmem_len );
5839                 goto fail1;
5840         }
5841
5842         dev->mem_start = ioaddr; // shared mem start
5843         dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
5844
5845 #endif //end #ifdef RTL_IO_MAP
5846
5847 #ifdef CONFIG_RTL8185B
5848         //pci_read_config_byte(pdev, 0x05, ptr);
5849         //pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04));
5850         pci_read_config_byte(pdev, 0x05, &unit);
5851         pci_write_config_byte(pdev, 0x05, unit & (~0x04));
5852 #endif
5853
5854         dev->irq = pdev->irq;
5855         priv->irq = 0;
5856
5857         dev->netdev_ops = &rtl8180_netdev_ops;
5858         dev->wireless_handlers = &r8180_wx_handlers_def;
5859
5860 #if WIRELESS_EXT >= 12
5861 #if WIRELESS_EXT < 17
5862         dev->get_wireless_stats = r8180_get_wireless_stats;
5863 #endif
5864         dev->wireless_handlers = (struct iw_handler_def *) &r8180_wx_handlers_def;
5865 #endif
5866
5867         dev->type=ARPHRD_ETHER;
5868         dev->watchdog_timeo = HZ*3; //added by david woo, 2007.12.13
5869
5870         if (dev_alloc_name(dev, ifname) < 0){
5871                 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
5872                 ifname = "wlan%d";
5873         //      ifname = "ath%d";
5874                 dev_alloc_name(dev, ifname);
5875         }
5876
5877
5878         if(rtl8180_init(dev)!=0){
5879                 DMESG("Initialization failed");
5880                 goto fail1;
5881         }
5882
5883         netif_carrier_off(dev);
5884
5885         register_netdev(dev);
5886
5887         rtl8180_proc_init_one(dev);
5888
5889         DMESG("Driver probe completed\n");
5890         return 0;
5891
5892 fail1:
5893
5894 #ifdef CONFIG_RTL8180_IO_MAP
5895
5896         if( dev->base_addr != 0 ){
5897
5898                 release_region(dev->base_addr,
5899                pci_resource_len(pdev, 0) );
5900         }
5901 #else
5902         if( dev->mem_start != (unsigned long)NULL ){
5903                 iounmap( (void *)dev->mem_start );
5904                 release_mem_region( pci_resource_start(pdev, 1),
5905                                     pci_resource_len(pdev, 1) );
5906         }
5907 #endif //end #ifdef RTL_IO_MAP
5908
5909
5910 fail:
5911         if(dev){
5912
5913                 if (priv->irq) {
5914                         free_irq(dev->irq, dev);
5915                         dev->irq=0;
5916                 }
5917                 free_ieee80211(dev);
5918         }
5919
5920         pci_disable_device(pdev);
5921
5922         DMESG("wlan driver load failed\n");
5923         pci_set_drvdata(pdev, NULL);
5924         return -ENODEV;
5925
5926 }
5927
5928
5929 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
5930 {
5931         struct r8180_priv *priv;
5932         struct net_device *dev = pci_get_drvdata(pdev);
5933         if(dev){
5934
5935                 unregister_netdev(dev);
5936
5937                 priv=ieee80211_priv(dev);
5938
5939                 rtl8180_proc_remove_one(dev);
5940                 rtl8180_down(dev);
5941                 priv->rf_close(dev);
5942                 rtl8180_reset(dev);
5943                 //rtl8180_rtx_disable(dev);
5944                 //rtl8180_irq_disable(dev);
5945                 mdelay(10);
5946                 //write_nic_word(dev,INTA,read_nic_word(dev,INTA));
5947                 //force_pci_posting(dev);
5948                 //mdelay(10);
5949
5950                 if(priv->irq){
5951
5952                         DMESG("Freeing irq %d",dev->irq);
5953                         free_irq(dev->irq, dev);
5954                         priv->irq=0;
5955
5956                 }
5957
5958                 free_rx_desc_ring(dev);
5959                 free_tx_desc_rings(dev);
5960         //      free_beacon_desc_ring(dev,priv->txbeaconcount);
5961
5962 #ifdef CONFIG_RTL8180_IO_MAP
5963
5964                 if( dev->base_addr != 0 ){
5965
5966                         release_region(dev->base_addr,
5967                                        pci_resource_len(pdev, 0) );
5968                 }
5969 #else
5970                 if( dev->mem_start != (unsigned long)NULL ){
5971                         iounmap( (void *)dev->mem_start );
5972                         release_mem_region( pci_resource_start(pdev, 1),
5973                                             pci_resource_len(pdev, 1) );
5974                 }
5975 #endif /*end #ifdef RTL_IO_MAP*/
5976
5977                 free_ieee80211(dev);
5978         }
5979         pci_disable_device(pdev);
5980
5981         DMESG("wlan driver removed\n");
5982 }
5983
5984
5985 /* fun with the built-in ieee80211 stack... */
5986 extern int ieee80211_crypto_init(void);
5987 extern void ieee80211_crypto_deinit(void);
5988 extern int ieee80211_crypto_tkip_init(void);
5989 extern void ieee80211_crypto_tkip_exit(void);
5990 extern int ieee80211_crypto_ccmp_init(void);
5991 extern void ieee80211_crypto_ccmp_exit(void);
5992 extern int ieee80211_crypto_wep_init(void);
5993 extern void ieee80211_crypto_wep_exit(void);
5994
5995 static int __init rtl8180_pci_module_init(void)
5996 {
5997         int ret;
5998
5999         ret = ieee80211_crypto_init();
6000         if (ret) {
6001                 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
6002                 return ret;
6003         }
6004         ret = ieee80211_crypto_tkip_init();
6005         if (ret) {
6006                 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
6007                 return ret;
6008         }
6009         ret = ieee80211_crypto_ccmp_init();
6010         if (ret) {
6011                 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
6012                 return ret;
6013         }
6014         ret = ieee80211_crypto_wep_init();
6015         if (ret) {
6016                 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
6017                 return ret;
6018         }
6019
6020         printk(KERN_INFO "\nLinux kernel driver for RTL8180 \
6021 / RTL8185 based WLAN cards\n");
6022         printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
6023         DMESG("Initializing module");
6024         DMESG("Wireless extensions version %d", WIRELESS_EXT);
6025         rtl8180_proc_module_init();
6026
6027       if(0!=pci_register_driver(&rtl8180_pci_driver))
6028         //if(0!=pci_module_init(&rtl8180_pci_driver))
6029         {
6030                 DMESG("No device found");
6031                 /*pci_unregister_driver (&rtl8180_pci_driver);*/
6032                 return -ENODEV;
6033         }
6034         return 0;
6035 }
6036
6037
6038 static void __exit rtl8180_pci_module_exit(void)
6039 {
6040         pci_unregister_driver (&rtl8180_pci_driver);
6041         rtl8180_proc_module_remove();
6042         ieee80211_crypto_tkip_exit();
6043         ieee80211_crypto_ccmp_exit();
6044         ieee80211_crypto_wep_exit();
6045         ieee80211_crypto_deinit();
6046         DMESG("Exiting");
6047 }
6048
6049
6050 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
6051 {
6052         unsigned long flags;
6053         short enough_desc;
6054         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6055
6056         spin_lock_irqsave(&priv->tx_lock,flags);
6057         enough_desc = check_nic_enought_desc(dev,pri);
6058         spin_unlock_irqrestore(&priv->tx_lock,flags);
6059
6060         if(enough_desc)
6061                 ieee80211_wake_queue(priv->ieee80211);
6062 }
6063
6064 /*****************************************************************************
6065       -----------------------------IRQ STUFF---------------------------
6066 ******************************************************************************/
6067
6068 void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
6069 {
6070         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6071
6072         u32 *tail; //tail virtual addr
6073         u32 *head; //head virtual addr
6074         u32 *begin;//start of ring virtual addr
6075         u32 *nicv; //nic pointer virtual addr
6076 //      u32 *txdv; //packet just TXed
6077         u32 nic; //nic pointer physical addr
6078         u32 nicbegin;// start of ring physical addr
6079 //      short txed;
6080         unsigned long flag;
6081         /* physical addr are ok on 32 bits since we set DMA mask*/
6082
6083         int offs;
6084         int j,i;
6085         int hd;
6086         if (error) priv->stats.txretry++; //tony 20060601
6087         spin_lock_irqsave(&priv->tx_lock,flag);
6088         switch(pri) {
6089         case MANAGE_PRIORITY:
6090                 tail = priv->txmapringtail;
6091                 begin = priv->txmapring;
6092                 head = priv->txmapringhead;
6093                 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
6094                 nicbegin = priv->txmapringdma;
6095                 break;
6096
6097         case BK_PRIORITY:
6098                 tail = priv->txbkpringtail;
6099                 begin = priv->txbkpring;
6100                 head = priv->txbkpringhead;
6101                 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
6102                 nicbegin = priv->txbkpringdma;
6103                 break;
6104
6105         case BE_PRIORITY:
6106                 tail = priv->txbepringtail;
6107                 begin = priv->txbepring;
6108                 head = priv->txbepringhead;
6109                 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
6110                 nicbegin = priv->txbepringdma;
6111                 break;
6112
6113         case VI_PRIORITY:
6114                 tail = priv->txvipringtail;
6115                 begin = priv->txvipring;
6116                 head = priv->txvipringhead;
6117                 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
6118                 nicbegin = priv->txvipringdma;
6119                 break;
6120
6121         case VO_PRIORITY:
6122                 tail = priv->txvopringtail;
6123                 begin = priv->txvopring;
6124                 head = priv->txvopringhead;
6125                 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
6126                 nicbegin = priv->txvopringdma;
6127                 break;
6128
6129         case HI_PRIORITY:
6130                 tail = priv->txhpringtail;
6131                 begin = priv->txhpring;
6132                 head = priv->txhpringhead;
6133                 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
6134                 nicbegin = priv->txhpringdma;
6135                 break;
6136
6137         default:
6138                 spin_unlock_irqrestore(&priv->tx_lock,flag);
6139                 return ;
6140         }
6141 /*      DMESG("%x %s %x %x",((int)nic & 0xfff)/8/4,
6142         *(priv->txnpring + ((int)nic&0xfff)/4/8) & (1<<31) ? "filled" : "empty",
6143         (priv->txnpringtail - priv->txnpring)/8,(priv->txnpringhead -
6144 priv->txnpring)/8);
6145 */
6146         //nicv = (u32*) ((nic - nicbegin) + (int)begin);
6147         nicv = (u32*) ((nic - nicbegin) + (u8*)begin);
6148         if((head <= tail && (nicv > tail || nicv < head)) ||
6149                 (head > tail && (nicv > tail && nicv < head))){
6150
6151                         DMESGW("nic has lost pointer");
6152 #ifdef DEBUG_TX_DESC
6153                         //check_tx_ring(dev,NORM_PRIORITY);
6154                         check_tx_ring(dev,pri);
6155 #endif
6156                         spin_unlock_irqrestore(&priv->tx_lock,flag);
6157                         rtl8180_restart(dev);
6158                         return;
6159                 }
6160
6161         /* we check all the descriptors between the head and the nic,
6162          * but not the currenly pointed by the nic (the next to be txed)
6163          * and the previous of the pointed (might be in process ??)
6164         */
6165         //if (head == nic) return;
6166         //DMESG("%x %x",head,nic);
6167         offs = (nic - nicbegin);
6168         //DMESG("%x %x %x",nic ,(u32)nicbegin, (int)nic -nicbegin);
6169
6170         offs = offs / 8 /4;
6171
6172         hd = (head - begin) /8;
6173
6174         if(offs >= hd)
6175                 j = offs - hd;
6176         else
6177                 j = offs + (priv->txringcount -1 -hd);
6178         //      j= priv->txringcount -1- (hd - offs);
6179
6180         j-=2;
6181         if(j<0) j=0;
6182
6183
6184         for(i=0;i<j;i++)
6185         {
6186 //              printk("+++++++++++++check status desc\n");
6187                 if((*head) & (1<<31))
6188                         break;
6189                 if(((*head)&(0x10000000)) != 0){
6190 //                      printk("++++++++++++++last desc,retry count is %d\n",((*head) & (0x000000ff)));
6191                         priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
6192 #if 1
6193                         if(!error)
6194                         {
6195                                 priv->NumTxOkTotal++;
6196 //                              printk("NumTxOkTotal is %d\n",priv->NumTxOkTotal++);
6197                         }
6198 #endif
6199                         //      printk("in function %s:curr_retry_count is %d\n",__func__,((*head) & (0x000000ff)));
6200                 }
6201                 if(!error){
6202                         priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
6203                 }
6204 //              printk("in function %s:curr_txokbyte_count is %d\n",__func__,(*(head+3)) & (0x00000fff));
6205                 *head = *head &~ (1<<31);
6206
6207                 if((head - begin)/8 == priv->txringcount-1)
6208                         head=begin;
6209
6210                 else
6211                         head+=8;
6212         }
6213 #if 0
6214         if(nicv == begin)
6215                 txdv = begin + (priv->txringcount -1)*8;
6216         else
6217                 txdv = nicv - 8;
6218
6219         txed = !(txdv[0] &(1<<31));
6220
6221         if(txed){
6222                 if(!(txdv[0] & (1<<15))) error = 1;
6223                 //if(!(txdv[0] & (1<<30))) error = 1;
6224                 if(error)DMESG("%x",txdv[0]);
6225         }
6226 #endif
6227         //DMESG("%x",txdv[0]);
6228         /* the head has been moved to the last certainly TXed
6229          * (or at least processed by the nic) packet.
6230          * The driver take forcefully owning of all these packets
6231          * If the packet previous of the nic pointer has been
6232          * processed this doesn't matter: it will be checked
6233          * here at the next round. Anyway if no more packet are
6234          * TXed no memory leak occour at all.
6235          */
6236
6237         switch(pri) {
6238         case MANAGE_PRIORITY:
6239                 priv->txmapringhead = head;
6240                         //printk("1==========================================> priority check!\n");
6241                 if(priv->ack_tx_to_ieee){
6242                                 // try to implement power-save mode 2008.1.22
6243                 //      printk("2==========================================> priority check!\n");
6244 #if 1
6245                         if(rtl8180_is_tx_queue_empty(dev)){
6246                         //      printk("tx queue empty, after send null sleep packet, try to sleep !\n");
6247                                 priv->ack_tx_to_ieee = 0;
6248                                 ieee80211_ps_tx_ack(priv->ieee80211,!error);
6249                         }
6250 #endif
6251                 }
6252                 break;
6253
6254         case BK_PRIORITY:
6255                 priv->txbkpringhead = head;
6256                 break;
6257
6258         case BE_PRIORITY:
6259                 priv->txbepringhead = head;
6260                 break;
6261
6262         case VI_PRIORITY:
6263                 priv->txvipringhead = head;
6264                 break;
6265
6266         case VO_PRIORITY:
6267                 priv->txvopringhead = head;
6268                 break;
6269
6270         case HI_PRIORITY:
6271                 priv->txhpringhead = head;
6272                 break;
6273         }
6274
6275         /*DMESG("%x %x %x", (priv->txnpringhead - priv->txnpring) /8 ,
6276                 (priv->txnpringtail - priv->txnpring) /8,
6277                 offs );
6278         */
6279
6280         spin_unlock_irqrestore(&priv->tx_lock,flag);
6281
6282 }
6283
6284 void rtl8180_tx_irq_wq(struct work_struct *work)
6285 {
6286         //struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
6287         struct delayed_work *dwork = to_delayed_work(work);
6288         struct ieee80211_device * ieee = (struct ieee80211_device*)
6289                                                container_of(dwork, struct ieee80211_device, watch_dog_wq);
6290         struct net_device *dev = ieee->dev;
6291
6292         rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
6293 }
6294 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
6295 {
6296         struct net_device *dev = (struct net_device *) netdev;
6297         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6298         unsigned long flags;
6299         u32 inta;
6300
6301         /* We should return IRQ_NONE, but for now let me keep this */
6302         if(priv->irq_enabled == 0) return IRQ_HANDLED;
6303
6304         spin_lock_irqsave(&priv->irq_th_lock,flags);
6305
6306 #ifdef CONFIG_RTL8185B
6307         //ISR: 4bytes
6308         inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
6309         write_nic_dword(dev,ISR,inta); // reset int situation
6310 #else
6311         inta = read_nic_word(dev,INTA) & priv->irq_mask;
6312         write_nic_word(dev,INTA,inta); // reset int situation
6313 #endif
6314
6315         priv->stats.shints++;
6316
6317         //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
6318
6319         if(!inta){
6320                 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6321                 return IRQ_HANDLED;
6322         /*
6323            most probably we can safely return IRQ_NONE,
6324            but for now is better to avoid problems
6325         */
6326         }
6327
6328         if(inta == 0xffff){
6329                         /* HW disappared */
6330                         spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6331                         return IRQ_HANDLED;
6332         }
6333
6334         priv->stats.ints++;
6335 #ifdef DEBUG_IRQ
6336         DMESG("NIC irq %x",inta);
6337 #endif
6338         //priv->irqpending = inta;
6339
6340
6341         if(!netif_running(dev)) {
6342                 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6343                 return IRQ_HANDLED;
6344         }
6345
6346         if(inta & ISR_TimeOut){
6347                 write_nic_dword(dev, TimerInt, 0);
6348                 //DMESG("=================>waking up");
6349 //              rtl8180_hw_wakeup(dev);
6350         }
6351
6352         if(inta & ISR_TBDOK){
6353                 priv->stats.txbeacon++;
6354         }
6355
6356         if(inta & ISR_TBDER){
6357                 priv->stats.txbeaconerr++;
6358         }
6359
6360         if(inta  & IMR_TMGDOK ) {
6361 //              priv->NumTxOkTotal++;
6362                 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
6363 //                      schedule_work(&priv->tx_irq_wq);
6364
6365         }
6366
6367         if(inta & ISR_THPDER){
6368 #ifdef DEBUG_TX
6369                 DMESG ("TX high priority ERR");
6370 #endif
6371                 priv->stats.txhperr++;
6372                 rtl8180_tx_isr(dev,HI_PRIORITY,1);
6373                 priv->ieee80211->stats.tx_errors++;
6374         }
6375
6376         if(inta & ISR_THPDOK){ //High priority tx ok
6377 #ifdef DEBUG_TX
6378                 DMESG ("TX high priority OK");
6379 #endif
6380 //              priv->NumTxOkTotal++;
6381                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
6382                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6383                 priv->stats.txhpokint++;
6384                 rtl8180_tx_isr(dev,HI_PRIORITY,0);
6385         }
6386
6387         if(inta & ISR_RER) {
6388                 priv->stats.rxerr++;
6389 #ifdef DEBUG_RX
6390                 DMESGW("RX error int");
6391 #endif
6392         }
6393 #ifdef CONFIG_RTL8185B
6394         if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY
6395                 priv->stats.txbkperr++;
6396                 priv->ieee80211->stats.tx_errors++;
6397 #ifdef DEBUG_TX
6398                 DMESGW("TX bkp error int");
6399 #endif
6400                 //tasklet_schedule(&priv->irq_tx_tasklet);
6401                 rtl8180_tx_isr(dev,BK_PRIORITY,1);
6402                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6403         }
6404
6405         if(inta & ISR_TBEDER){ //corresponding to BE_PRIORITY
6406                 priv->stats.txbeperr++;
6407                 priv->ieee80211->stats.tx_errors++;
6408 #ifdef DEBUG_TX
6409                 DMESGW("TX bep error int");
6410 #endif
6411                 rtl8180_tx_isr(dev,BE_PRIORITY,1);
6412                 //tasklet_schedule(&priv->irq_tx_tasklet);
6413                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6414         }
6415 #endif
6416         if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY
6417                 priv->stats.txnperr++;
6418                 priv->ieee80211->stats.tx_errors++;
6419 #ifdef DEBUG_TX
6420                 DMESGW("TX np error int");
6421 #endif
6422                 //tasklet_schedule(&priv->irq_tx_tasklet);
6423                 rtl8180_tx_isr(dev,NORM_PRIORITY,1);
6424 #ifdef CONFIG_RTL8185B
6425                 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
6426 #endif
6427         }
6428
6429         if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY
6430                 priv->stats.txlperr++;
6431                 priv->ieee80211->stats.tx_errors++;
6432 #ifdef DEBUG_TX
6433                 DMESGW("TX lp error int");
6434 #endif
6435                 rtl8180_tx_isr(dev,LOW_PRIORITY,1);
6436                 //tasklet_schedule(&priv->irq_tx_tasklet);
6437                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
6438         }
6439
6440         if(inta & ISR_ROK){
6441 #ifdef DEBUG_RX
6442                 DMESG("Frame arrived !");
6443 #endif
6444                 //priv->NumRxOkInPeriod++;  //YJ,del,080828
6445                 priv->stats.rxint++;
6446                 tasklet_schedule(&priv->irq_rx_tasklet);
6447         }
6448
6449         if(inta & ISR_RQoSOK ){
6450 #ifdef DEBUG_RX
6451                 DMESG("QoS Frame arrived !");
6452 #endif
6453                 //priv->NumRxOkInPeriod++;  //YJ,del,080828
6454                 priv->stats.rxint++;
6455                 tasklet_schedule(&priv->irq_rx_tasklet);
6456         }
6457         if(inta & ISR_BcnInt) {
6458                 //DMESG("Preparing Beacons");
6459                 rtl8180_prepare_beacon(dev);
6460         }
6461
6462         if(inta & ISR_RDU){
6463 //#ifdef DEBUG_RX
6464                 DMESGW("No RX descriptor available");
6465                 priv->stats.rxrdu++;
6466 //#endif
6467                 tasklet_schedule(&priv->irq_rx_tasklet);
6468                 /*queue_work(priv->workqueue ,&priv->restart_work);*/
6469
6470         }
6471         if(inta & ISR_RXFOVW){
6472 #ifdef DEBUG_RX
6473                 DMESGW("RX fifo overflow");
6474 #endif
6475                 priv->stats.rxoverflow++;
6476                 tasklet_schedule(&priv->irq_rx_tasklet);
6477                 //queue_work(priv->workqueue ,&priv->restart_work);
6478         }
6479
6480         if(inta & ISR_TXFOVW) priv->stats.txoverflow++;
6481
6482         if(inta & ISR_TNPDOK){ //Normal priority tx ok
6483 #ifdef DEBUG_TX
6484                 DMESG ("TX normal priority OK");
6485 #endif
6486 //              priv->NumTxOkTotal++;
6487                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
6488                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6489                 //      priv->ieee80211->stats.tx_packets++;
6490                 priv->stats.txnpokint++;
6491                 rtl8180_tx_isr(dev,NORM_PRIORITY,0);
6492         }
6493
6494         if(inta & ISR_TLPDOK){ //Low priority tx ok
6495 #ifdef DEBUG_TX
6496                 DMESG ("TX low priority OK");
6497 #endif
6498 //              priv->NumTxOkTotal++;
6499                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
6500                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6501                 //      priv->ieee80211->stats.tx_packets++;
6502                 priv->stats.txlpokint++;
6503                 rtl8180_tx_isr(dev,LOW_PRIORITY,0);
6504                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
6505         }
6506
6507 #ifdef CONFIG_RTL8185B
6508         if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY
6509                 priv->stats.txbkpokint++;
6510 #ifdef DEBUG_TX
6511                 DMESGW("TX bk priority ok");
6512 #endif
6513 //              priv->NumTxOkTotal++;
6514                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
6515                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6516                 rtl8180_tx_isr(dev,BK_PRIORITY,0);
6517                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6518         }
6519
6520         if(inta & ISR_TBEDOK){ //corresponding to BE_PRIORITY
6521                 priv->stats.txbeperr++;
6522 #ifdef DEBUG_TX
6523                 DMESGW("TX be priority ok");
6524 #endif
6525 //              priv->NumTxOkTotal++;
6526                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
6527                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6528                 rtl8180_tx_isr(dev,BE_PRIORITY,0);
6529                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6530         }
6531 #endif
6532         force_pci_posting(dev);
6533         spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6534
6535         return IRQ_HANDLED;
6536 }
6537
6538
6539 void rtl8180_irq_rx_tasklet(struct r8180_priv* priv)
6540 {
6541 //      unsigned long flags;
6542
6543 /*      spin_lock_irqsave(&priv->irq_lock, flags);
6544         priv->irq_mask &=~IMR_ROK;
6545         priv->irq_mask &=~IMR_RDU;
6546
6547         rtl8180_irq_enable(priv->dev);
6548         spin_unlock_irqrestore(&priv->irq_lock, flags);
6549 */
6550         rtl8180_rx(priv->dev);
6551
6552 /*      spin_lock_irqsave(&priv->irq_lock, flags);
6553         priv->irq_mask |= IMR_ROK;
6554         priv->irq_mask |= IMR_RDU;
6555         rtl8180_irq_enable(priv->dev);
6556         spin_unlock_irqrestore(&priv->irq_lock, flags);
6557 */
6558 }
6559
6560 /****************************************************************************
6561 lizhaoming--------------------------- RF power on/power off -----------------
6562 *****************************************************************************/
6563
6564 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
6565 {
6566         //struct delayed_work *dwork = to_delayed_work(work);
6567         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
6568         struct net_device *dev = ieee->dev;
6569         struct r8180_priv *priv = ieee80211_priv(dev);
6570
6571         //u16 tmp2byte;
6572         u8 btPSR;
6573         u8 btConfig0;
6574         RT_RF_POWER_STATE       eRfPowerStateToSet;
6575         bool    bActuallySet=false;
6576
6577         char *argv[3];
6578         static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
6579         static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
6580         static int readf_count = 0;
6581         //printk("============>%s in \n", __func__);
6582
6583 #ifdef ENABLE_LPS
6584         if(readf_count % 10 == 0)
6585                 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
6586
6587         readf_count = (readf_count+1)%0xffff;
6588 #endif
6589 #if 0
6590         if(priv->up == 0)//driver stopped
6591                 {
6592                         printk("\nDo nothing...");
6593                         goto out;
6594                 }
6595         else
6596 #endif
6597                 {
6598                         // We should turn off LED before polling FF51[4].
6599
6600                         //Turn off LED.
6601                         btPSR = read_nic_byte(dev, PSR);
6602                         write_nic_byte(dev, PSR, (btPSR & ~BIT3));
6603
6604                         //It need to delay 4us suggested by Jong, 2008-01-16
6605                         udelay(4);
6606
6607                         //HW radio On/Off according to the value of FF51[4](config0)
6608                         btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
6609
6610                         //Turn on LED.
6611                         write_nic_byte(dev, PSR, btPSR| BIT3);
6612
6613                         eRfPowerStateToSet = (btConfig0 & BIT4) ?  eRfOn : eRfOff;
6614
6615                         if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn))
6616                         {
6617                                 priv->ieee80211->bHwRadioOff = false;
6618                                 bActuallySet = true;
6619                         }
6620                         else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff))
6621                         {
6622                                 priv->ieee80211->bHwRadioOff = true;
6623                                 bActuallySet = true;
6624                         }
6625
6626                         if(bActuallySet)
6627                         {
6628                                 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
6629
6630                                 /* To update the UI status for Power status changed */
6631                                 if(priv->ieee80211->bHwRadioOff == true)
6632                                         argv[1] = "RFOFF";
6633                                 else{
6634                                         //if(!priv->RfOffReason)
6635                                                 argv[1] = "RFON";
6636                                         //else
6637                                         //      argv[1] = "RFOFF";
6638                                 }
6639                                 argv[0] = RadioPowerPath;
6640                                 argv[2] = NULL;
6641
6642                                 call_usermodehelper(RadioPowerPath,argv,envp,1);
6643                         }
6644
6645                 }
6646
6647 }
6648
6649 static u8 read_acadapter_file(char *filename)
6650 {
6651 #if 0
6652         int fd;
6653         char buf[1];
6654         char ret[50];
6655         int i = 0;
6656         int n = 0;
6657         mm_segment_t old_fs = get_fs();
6658         set_fs(KERNEL_DS);
6659
6660         fd = sys_open(filename, O_RDONLY, 0);
6661         if (fd >= 0) {
6662                 while (sys_read(fd, buf, 1) == 1)
6663                 {
6664                         i++;
6665                         if(i>10)
6666                         {
6667                                 if(buf[0]!=' ')
6668                                 {
6669                                         ret[n]=buf[0];
6670                                         n++;
6671                                 }
6672                         }
6673                 }
6674                 sys_close(fd);
6675         }
6676         ret[n]='\0';
6677 //      printk("%s \n", ret);
6678         set_fs(old_fs);
6679
6680         if(strncmp(ret, "off-line",8) == 0)
6681         {
6682                 return 1;
6683         }
6684 #endif
6685         return 0;
6686 }
6687
6688 /***************************************************************************
6689      ------------------- module init / exit stubs ----------------
6690 ****************************************************************************/
6691 module_init(rtl8180_pci_module_init);
6692 module_exit(rtl8180_pci_module_exit);
6693