SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/staging/rtl8187se/r8180_core.c

   1 /*
   2    This is part of rtl818x pci OpenSource driver - v 0.1
   3    Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
   4    Released under the terms of GPL (General Public License)
   5
   6    Parts of this driver are based on the GPL part of the official
   7    Realtek driver.
   8
   9    Parts of this driver are based on the rtl8180 driver skeleton
  10    from Patric Schenke & Andres Salomon.
  11
  12    Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
  13
  14    Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
  15
  16    RSSI calc function from 'The Deuce'
  17
  18    Some ideas borrowed from the 8139too.c driver included in linux kernel.
  19
  20    We (I?) want to thanks the Authors of those projecs and also the
  21    Ndiswrapper's project Authors.
  22
  23    A big big thanks goes also to Realtek corp. for their help in my attempt to
  24    add RTL8185 and RTL8225 support, and to David Young also.
  25 */
  26
  27 #undef DEBUG_TX_DESC2
  28 #undef RX_DONT_PASS_UL
  29 #undef DEBUG_EPROM
  30 #undef DEBUG_RX_VERBOSE
  31 #undef DUMMY_RX
  32 #undef DEBUG_ZERO_RX
  33 #undef DEBUG_RX_SKB
  34 #undef DEBUG_TX_FRAG
  35 #undef DEBUG_RX_FRAG
  36 #undef DEBUG_TX_FILLDESC
  37 #undef DEBUG_TX
  38 #undef DEBUG_IRQ
  39 #undef DEBUG_RX
  40 #undef DEBUG_RXALLOC
  41 #undef DEBUG_REGISTERS
  42 #undef DEBUG_RING
  43 #undef DEBUG_IRQ_TASKLET
  44 #undef DEBUG_TX_ALLOC
  45 #undef DEBUG_TX_DESC
  46
  47 //#define DEBUG_TX
  48 //#define DEBUG_TX_DESC2
  49 //#define DEBUG_RX
  50 //#define DEBUG_RX_SKB
  51
  52 #include <linux/syscalls.h>
  53 //#include <linux/fcntl.h>
  54 //#include <asm/uaccess.h>
  55 #include "r8180_hw.h"
  56 #include "r8180.h"
  57 #include "r8180_sa2400.h"  /* PHILIPS Radio frontend */
  58 #include "r8180_max2820.h" /* MAXIM Radio frontend */
  59 #include "r8180_gct.h"     /* GCT Radio frontend */
  60 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
  61 #include "r8180_rtl8255.h" /* RTL8255 Radio frontend */
  62 #include "r8180_93cx6.h"   /* Card EEPROM */
  63 #include "r8180_wx.h"
  64 #include "r8180_dm.h"
  65
  66 #include "r8180_pm.h"
  67
  68 #include "ieee80211/dot11d.h"
  69
  70 #ifndef PCI_VENDOR_ID_BELKIN
  71         #define PCI_VENDOR_ID_BELKIN 0x1799
  72 #endif
  73 #ifndef PCI_VENDOR_ID_DLINK
  74         #define PCI_VENDOR_ID_DLINK 0x1186
  75 #endif
  76
  77 static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
  78         {
  79                 .vendor = PCI_VENDOR_ID_REALTEK,
  80 //                .device = 0x8180,
  81                 .device = 0x8199,
  82                 .subvendor = PCI_ANY_ID,
  83                 .subdevice = PCI_ANY_ID,
  84                 .driver_data = 0,
  85         },
  86         {
  87                 .vendor = 0,
  88                 .device = 0,
  89                 .subvendor = 0,
  90                 .subdevice = 0,
  91                 .driver_data = 0,
  92         }
  93 };
  94
  95
  96 static char* ifname = "wlan%d";
  97 static int hwseqnum = 0;
  98 //static char* ifname = "ath%d";
  99 static int hwwep = 0;
 100 static int channels = 0x3fff;
 101
 102 #define eqMacAddr(a,b)          ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
 103 #define cpMacAddr(des,src)            ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
 104 MODULE_LICENSE("GPL");
 105 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
 106 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
 107 MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
 108
 109
 110
 111 /*
 112 MODULE_PARM(ifname, "s");
 113 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
 114
 115 MODULE_PARM(hwseqnum,"i");
 116 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
 117
 118 MODULE_PARM(hwwep,"i");
 119 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
 120
 121 MODULE_PARM(channels,"i");
 122 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
 123 */
 124
 125 module_param(ifname, charp, S_IRUGO|S_IWUSR );
 126 module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
 127 module_param(hwwep,int, S_IRUGO|S_IWUSR);
 128 module_param(channels,int, S_IRUGO|S_IWUSR);
 129
 130 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
 131 //MODULE_PARM_DESC(devname," Net interface name, ath%d=default");
 132 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
 133 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
 134 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
 135
 136
 137 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
 138                                        const struct pci_device_id *id);
 139
 140 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
 141
 142 static void rtl8180_shutdown (struct pci_dev *pdev)
 143 {
 144         struct net_device *dev = pci_get_drvdata(pdev);
 145         if (dev->netdev_ops->ndo_stop)
 146                 dev->netdev_ops->ndo_stop(dev);
 147         pci_disable_device(pdev);
 148 }
 149
 150 static struct pci_driver rtl8180_pci_driver = {
 151         .name           = RTL8180_MODULE_NAME,            /* Driver name   */
 152         .id_table       = rtl8180_pci_id_tbl,             /* PCI_ID table  */
 153         .probe          = rtl8180_pci_probe,              /* probe fn      */
 154         .remove         = __devexit_p(rtl8180_pci_remove),/* remove fn     */
 155         .suspend        = rtl8180_suspend,                /* PM suspend fn */
 156         .resume         = rtl8180_resume,                 /* PM resume fn  */
 157         .shutdown       = rtl8180_shutdown,
 158 };
 159
 160
 161
 162
 163 u8 read_nic_byte(struct net_device *dev, int x)
 164 {
 165         return 0xff&readb((u8*)dev->mem_start +x);
 166 }
 167
 168 u32 read_nic_dword(struct net_device *dev, int x)
 169 {
 170         return readl((u8*)dev->mem_start +x);
 171 }
 172
 173 u16 read_nic_word(struct net_device *dev, int x)
 174 {
 175         return readw((u8*)dev->mem_start +x);
 176 }
 177
 178 void write_nic_byte(struct net_device *dev, int x,u8 y)
 179 {
 180         writeb(y,(u8*)dev->mem_start +x);
 181         udelay(20);
 182 }
 183
 184 void write_nic_dword(struct net_device *dev, int x,u32 y)
 185 {
 186         writel(y,(u8*)dev->mem_start +x);
 187         udelay(20);
 188 }
 189
 190 void write_nic_word(struct net_device *dev, int x,u16 y)
 191 {
 192         writew(y,(u8*)dev->mem_start +x);
 193         udelay(20);
 194 }
 195
 196
 197
 198
 199
 200
 201 inline void force_pci_posting(struct net_device *dev)
 202 {
 203         read_nic_byte(dev,EPROM_CMD);
 204         mb();
 205 }
 206
 207
 208 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
 209 void set_nic_rxring(struct net_device *dev);
 210 void set_nic_txring(struct net_device *dev);
 211 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
 212 void rtl8180_commit(struct net_device *dev);
 213 void rtl8180_start_tx_beacon(struct net_device *dev);
 214
 215 /****************************************************************************
 216    -----------------------------PROCFS STUFF-------------------------
 217 *****************************************************************************/
 218
 219 static struct proc_dir_entry *rtl8180_proc = NULL;
 220
 221 static int proc_get_registers(char *page, char **start,
 222                           off_t offset, int count,
 223                           int *eof, void *data)
 224 {
 225         struct net_device *dev = data;
 226 //      struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 227
 228         int len = 0;
 229         int i,n;
 230
 231         int max=0xff;
 232
 233         /* This dump the current register page */
 234         for(n=0;n<=max;)
 235         {
 236                 //printk( "\nD: %2x> ", n);
 237                 len += snprintf(page + len, count - len,
 238                         "\nD:  %2x > ",n);
 239
 240                 for(i=0;i<16 && n<=max;i++,n++)
 241                 len += snprintf(page + len, count - len,
 242                         "%2x ",read_nic_byte(dev,n));
 243
 244                 //      printk("%2x ",read_nic_byte(dev,n));
 245         }
 246         len += snprintf(page + len, count - len,"\n");
 247
 248
 249
 250         *eof = 1;
 251         return len;
 252
 253 }
 254
 255 int get_curr_tx_free_desc(struct net_device *dev, int priority);
 256
 257 static int proc_get_stats_hw(char *page, char **start,
 258                           off_t offset, int count,
 259                           int *eof, void *data)
 260 {
 261         //struct net_device *dev = data;
 262         //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 263
 264         int len = 0;
 265
 266         *eof = 1;
 267         return len;
 268 }
 269
 270
 271 static int proc_get_stats_rx(char *page, char **start,
 272                           off_t offset, int count,
 273                           int *eof, void *data)
 274 {
 275         struct net_device *dev = data;
 276         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 277
 278         int len = 0;
 279
 280         len += snprintf(page + len, count - len,
 281         /*      "RX descriptor not available: %lu\n"
 282                 "RX incomplete (missing last descriptor): %lu\n"
 283                 "RX not data: %lu\n"
 284                 //"RX descriptor pointer reset: %lu\n"
 285                 "RX descriptor pointer lost: %lu\n"
 286                 //"RX pointer workaround: %lu\n"
 287                 "RX error int: %lu\n"
 288                 "RX fifo overflow: %lu\n"
 289                 "RX int: %lu\n"
 290                 "RX packet: %lu\n"
 291                 "RX bytes: %lu\n"
 292                 "RX DMA fail: %lu\n",
 293                 priv->stats.rxrdu,
 294                 priv->stats.rxnolast,
 295                 priv->stats.rxnodata,
 296                 //priv->stats.rxreset,
 297                 priv->stats.rxnopointer,
 298                 //priv->stats.rxwrkaround,
 299                 priv->stats.rxerr,
 300                 priv->stats.rxoverflow,
 301                 priv->stats.rxint,
 302                 priv->ieee80211->stats.rx_packets,
 303                 priv->ieee80211->stats.rx_bytes,
 304                 priv->stats.rxdmafail  */
 305                 "RX OK: %lu\n"
 306                 "RX Retry: %lu\n"
 307                 "RX CRC Error(0-500): %lu\n"
 308                 "RX CRC Error(500-1000): %lu\n"
 309                 "RX CRC Error(>1000): %lu\n"
 310                 "RX ICV Error: %lu\n",
 311                 priv->stats.rxint,
 312                 priv->stats.rxerr,
 313                 priv->stats.rxcrcerrmin,
 314                 priv->stats.rxcrcerrmid,
 315                 priv->stats.rxcrcerrmax,
 316                 priv->stats.rxicverr
 317                 );
 318
 319         *eof = 1;
 320         return len;
 321 }
 322
 323 static int proc_get_stats_tx(char *page, char **start,
 324                           off_t offset, int count,
 325                           int *eof, void *data)
 326 {
 327         struct net_device *dev = data;
 328         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 329
 330         int len = 0;
 331         unsigned long totalOK;
 332
 333         totalOK=priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
 334         len += snprintf(page + len, count - len,
 335         /*      "TX normal priority ok int: %lu\n"
 336                 "TX normal priority error int: %lu\n"
 337                 "TX high priority ok int: %lu\n"
 338                 "TX high priority failed error int: %lu\n"
 339                 "TX low priority ok int: %lu\n"
 340                 "TX low priority failed error int: %lu\n"
 341                 "TX bytes: %lu\n"
 342                 "TX packets: %lu\n"
 343                 "TX queue resume: %lu\n"
 344                 "TX queue stopped?: %d\n"
 345                 "TX fifo overflow: %lu\n"
 346                 //"SW TX stop: %lu\n"
 347                 //"SW TX wake: %lu\n"
 348                 "TX beacon: %lu\n"
 349                 "TX beacon aborted: %lu\n",
 350                 priv->stats.txnpokint,
 351                 priv->stats.txnperr,
 352                 priv->stats.txhpokint,
 353                 priv->stats.txhperr,
 354                 priv->stats.txlpokint,
 355                 priv->stats.txlperr,
 356                 priv->ieee80211->stats.tx_bytes,
 357                 priv->ieee80211->stats.tx_packets,
 358                 priv->stats.txresumed,
 359                 netif_queue_stopped(dev),
 360                 priv->stats.txoverflow,
 361                 //priv->ieee80211->ieee_stats.swtxstop,
 362                 //priv->ieee80211->ieee_stats.swtxawake,
 363                 priv->stats.txbeacon,
 364                 priv->stats.txbeaconerr  */
 365                 "TX OK: %lu\n"
 366                 "TX Error: %lu\n"
 367                 "TX Retry: %lu\n"
 368                 "TX beacon OK: %lu\n"
 369                 "TX beacon error: %lu\n",
 370                 totalOK,
 371                 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
 372                 priv->stats.txretry,
 373                 priv->stats.txbeacon,
 374                 priv->stats.txbeaconerr
 375         );
 376
 377         *eof = 1;
 378         return len;
 379 }
 380
 381 void rtl8180_proc_module_init(void)
 382 {
 383         DMESG("Initializing proc filesystem");
 384         rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
 385 }
 386
 387
 388 void rtl8180_proc_module_remove(void)
 389 {
 390         remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
 391 }
 392
 393
 394 void rtl8180_proc_remove_one(struct net_device *dev)
 395 {
 396         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 397         if (priv->dir_dev) {
 398                 remove_proc_entry("stats-hw", priv->dir_dev);
 399                 remove_proc_entry("stats-tx", priv->dir_dev);
 400                 remove_proc_entry("stats-rx", priv->dir_dev);
 401 //              remove_proc_entry("stats-ieee", priv->dir_dev);
 402 //              remove_proc_entry("stats-ap", priv->dir_dev);
 403                 remove_proc_entry("registers", priv->dir_dev);
 404                 remove_proc_entry(dev->name, rtl8180_proc);
 405                 priv->dir_dev = NULL;
 406         }
 407 }
 408
 409
 410 void rtl8180_proc_init_one(struct net_device *dev)
 411 {
 412         struct proc_dir_entry *e;
 413         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 414         priv->dir_dev = rtl8180_proc;
 415         if (!priv->dir_dev) {
 416                 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
 417                       dev->name);
 418                 return;
 419         }
 420
 421         e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
 422                                    priv->dir_dev, proc_get_stats_hw, dev);
 423
 424         if (!e) {
 425                 DMESGE("Unable to initialize "
 426                       "/proc/net/r8180/%s/stats-hw\n",
 427                       dev->name);
 428         }
 429
 430         e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
 431                                    priv->dir_dev, proc_get_stats_rx, dev);
 432
 433         if (!e) {
 434                 DMESGE("Unable to initialize "
 435                       "/proc/net/r8180/%s/stats-rx\n",
 436                       dev->name);
 437         }
 438
 439
 440         e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
 441                                    priv->dir_dev, proc_get_stats_tx, dev);
 442
 443         if (!e) {
 444                 DMESGE("Unable to initialize "
 445                       "/proc/net/r8180/%s/stats-tx\n",
 446                       dev->name);
 447         }
 448
 449         e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
 450                                    priv->dir_dev, proc_get_registers, dev);
 451
 452         if (!e) {
 453                 DMESGE("Unable to initialize "
 454                       "/proc/net/r8180/%s/registers\n",
 455                       dev->name);
 456         }
 457 }
 458 /****************************************************************************
 459    -----------------------------MISC STUFF-------------------------
 460 *****************************************************************************/
 461 /*
 462   FIXME: check if we can use some standard already-existent
 463   data type+functions in kernel
 464 */
 465
 466 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
 467                 struct buffer **bufferhead)
 468 {
 469 #ifdef DEBUG_RING
 470         DMESG("adding buffer to TX/RX struct");
 471 #endif
 472
 473         struct buffer *tmp;
 474
 475         if(! *buffer){
 476
 477                 *buffer = kmalloc(sizeof(struct buffer),GFP_KERNEL);
 478
 479                 if (*buffer == NULL) {
 480                         DMESGE("Failed to kmalloc head of TX/RX struct");
 481                         return -1;
 482                 }
 483                 (*buffer)->next=*buffer;
 484                 (*buffer)->buf=buf;
 485                 (*buffer)->dma=dma;
 486                 if(bufferhead !=NULL)
 487                         (*bufferhead) = (*buffer);
 488                 return 0;
 489         }
 490         tmp=*buffer;
 491
 492         while(tmp->next!=(*buffer)) tmp=tmp->next;
 493         if ((tmp->next= kmalloc(sizeof(struct buffer),GFP_KERNEL)) == NULL){
 494                 DMESGE("Failed to kmalloc TX/RX struct");
 495                 return -1;
 496         }
 497         tmp->next->buf=buf;
 498         tmp->next->dma=dma;
 499         tmp->next->next=*buffer;
 500
 501         return 0;
 502 }
 503
 504
 505 void buffer_free(struct net_device *dev,struct buffer **buffer,int len,short
 506 consistent)
 507 {
 508
 509         struct buffer *tmp,*next;
 510         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 511         struct pci_dev *pdev=priv->pdev;
 512         //int i;
 513
 514         if(! *buffer) return;
 515
 516         /*for(tmp=*buffer; tmp->next != *buffer; tmp=tmp->next)
 517
 518         */
 519         tmp=*buffer;
 520         do{
 521                 next=tmp->next;
 522                 if(consistent){
 523                         pci_free_consistent(pdev,len,
 524                                     tmp->buf,tmp->dma);
 525                 }else{
 526                         pci_unmap_single(pdev, tmp->dma,
 527                         len,PCI_DMA_FROMDEVICE);
 528                         kfree(tmp->buf);
 529                 }
 530                 kfree(tmp);
 531                 tmp = next;
 532         }
 533         while(next != *buffer);
 534
 535         *buffer=NULL;
 536 }
 537
 538
 539 void print_buffer(u32 *buffer, int len)
 540 {
 541         int i;
 542         u8 *buf =(u8*)buffer;
 543
 544         printk("ASCII BUFFER DUMP (len: %x):\n",len);
 545
 546         for(i=0;i<len;i++)
 547                 printk("%c",buf[i]);
 548
 549         printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
 550
 551         for(i=0;i<len;i++)
 552                 printk("%02x",buf[i]);
 553
 554         printk("\n");
 555 }
 556
 557
 558 int get_curr_tx_free_desc(struct net_device *dev, int priority)
 559 {
 560         struct r8180_priv *priv = ieee80211_priv(dev);
 561         u32* tail;
 562         u32* head;
 563         int ret;
 564
 565         switch (priority){
 566                 case MANAGE_PRIORITY:
 567                         head = priv->txmapringhead;
 568                         tail = priv->txmapringtail;
 569                         break;
 570                 case BK_PRIORITY:
 571                         head = priv->txbkpringhead;
 572                         tail = priv->txbkpringtail;
 573                         break;
 574                 case BE_PRIORITY:
 575                         head = priv->txbepringhead;
 576                         tail = priv->txbepringtail;
 577                         break;
 578                 case VI_PRIORITY:
 579                         head = priv->txvipringhead;
 580                         tail = priv->txvipringtail;
 581                         break;
 582                 case VO_PRIORITY:
 583                         head = priv->txvopringhead;
 584                         tail = priv->txvopringtail;
 585                         break;
 586                 case HI_PRIORITY:
 587                         head = priv->txhpringhead;
 588                         tail = priv->txhpringtail;
 589                         break;
 590                 default:
 591                         return -1;
 592         }
 593
 594         //DMESG("%x %x", head, tail);
 595
 596         /* FIXME FIXME FIXME FIXME */
 597
 598         if( head <= tail )
 599                 ret = priv->txringcount - (tail - head)/8;
 600         else
 601                 ret = (head - tail)/8;
 602
 603         if(ret > priv->txringcount ) DMESG("BUG");
 604         return ret;
 605 }
 606
 607
 608 short check_nic_enought_desc(struct net_device *dev, int priority)
 609 {
 610         struct r8180_priv *priv = ieee80211_priv(dev);
 611         struct ieee80211_device *ieee = netdev_priv(dev);
 612
 613         int requiredbyte, required;
 614         requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
 615
 616         if(ieee->current_network.QoS_Enable) {
 617                 requiredbyte += 2;
 618         };
 619
 620         required = requiredbyte / (priv->txbuffsize-4);
 621         if (requiredbyte % priv->txbuffsize) required++;
 622         /* for now we keep two free descriptor as a safety boundary
 623          * between the tail and the head
 624          */
 625
 626         return (required+2 < get_curr_tx_free_desc(dev,priority));
 627 }
 628
 629
 630 /* This function is only for debuging purpose */
 631 void check_tx_ring(struct net_device *dev, int pri)
 632 {
 633         static int maxlog =3;
 634         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 635         u32* tmp;
 636         struct buffer *buf;
 637         int i;
 638         int nic;
 639         u32* tail;
 640         u32* head;
 641         u32* begin;
 642         u32 nicbegin;
 643         struct buffer* buffer;
 644
 645         maxlog --;
 646         if (maxlog <0 ) return;
 647
 648         switch(pri) {
 649         case MANAGE_PRIORITY:
 650                 tail = priv->txmapringtail;
 651                 begin = priv->txmapring;
 652                 head = priv->txmapringhead;
 653                 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
 654                 buffer = priv->txmapbufs;
 655                 nicbegin = priv->txmapringdma;
 656                 break;
 657
 658
 659         case BK_PRIORITY:
 660                 tail = priv->txbkpringtail;
 661                 begin = priv->txbkpring;
 662                 head = priv->txbkpringhead;
 663                 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
 664                 buffer = priv->txbkpbufs;
 665                 nicbegin = priv->txbkpringdma;
 666                 break;
 667
 668         case BE_PRIORITY:
 669                 tail = priv->txbepringtail;
 670                 begin = priv->txbepring;
 671                 head = priv->txbepringhead;
 672                 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
 673                 buffer = priv->txbepbufs;
 674                 nicbegin = priv->txbepringdma;
 675                 break;
 676
 677         case VI_PRIORITY:
 678                 tail = priv->txvipringtail;
 679                 begin = priv->txvipring;
 680                 head = priv->txvipringhead;
 681                 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
 682                 buffer = priv->txvipbufs;
 683                 nicbegin = priv->txvipringdma;
 684                 break;
 685
 686
 687         case VO_PRIORITY:
 688                 tail = priv->txvopringtail;
 689                 begin = priv->txvopring;
 690                 head = priv->txvopringhead;
 691                 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
 692                 buffer = priv->txvopbufs;
 693                 nicbegin = priv->txvopringdma;
 694                 break;
 695
 696         case HI_PRIORITY:
 697                 tail = priv->txhpringtail;
 698                 begin = priv->txhpring;
 699                 head = priv->txhpringhead;
 700                 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
 701                 buffer = priv->txhpbufs;
 702                 nicbegin = priv->txhpringdma;
 703                 break;
 704
 705         default:
 706                 return ;
 707                 break;
 708         }
 709
 710         if(!priv->txvopbufs)
 711                 DMESGE ("NIC TX ack, but TX queue corrupted!");
 712         else{
 713
 714                 for(i=0,buf=buffer, tmp=begin;
 715                         tmp<begin+(priv->txringcount)*8;
 716                         tmp+=8,buf=buf->next,i++)
 717
 718                         DMESG("BUF%d %s %x %s. Next : %x",i,
 719                               *tmp & (1<<31) ? "filled" : "empty",
 720                               *(buf->buf),
 721                               *tmp & (1<<15)? "ok": "err", *(tmp+4));
 722         }
 723
 724         return;
 725 }
 726
 727
 728
 729 /* this function is only for debugging purpose */
 730 void check_rxbuf(struct net_device *dev)
 731 {
 732         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 733         u32* tmp;
 734         struct buffer *buf;
 735         u8 rx_desc_size;
 736
 737         rx_desc_size = 8;
 738
 739         if(!priv->rxbuffer)
 740                 DMESGE ("NIC RX ack, but RX queue corrupted!");
 741
 742         else{
 743
 744                 for(buf=priv->rxbuffer, tmp=priv->rxring;
 745                     tmp < priv->rxring+(priv->rxringcount)*rx_desc_size;
 746                     tmp+=rx_desc_size, buf=buf->next)
 747
 748                         DMESG("BUF %s %x",
 749                               *tmp & (1<<31) ? "empty" : "filled",
 750                               *(buf->buf));
 751         }
 752
 753         return;
 754 }
 755
 756
 757 void dump_eprom(struct net_device *dev)
 758 {
 759         int i;
 760         for(i=0; i<63; i++)
 761                 DMESG("EEPROM addr %x : %x", i, eprom_read(dev,i));
 762 }
 763
 764
 765 void rtl8180_dump_reg(struct net_device *dev)
 766 {
 767         int i;
 768         int n;
 769         int max=0xff;
 770
 771         DMESG("Dumping NIC register map");
 772
 773         for(n=0;n<=max;)
 774         {
 775                 printk( "\nD: %2x> ", n);
 776                 for(i=0;i<16 && n<=max;i++,n++)
 777                         printk("%2x ",read_nic_byte(dev,n));
 778         }
 779         printk("\n");
 780 }
 781
 782
 783 void fix_tx_fifo(struct net_device *dev)
 784 {
 785         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 786         u32 *tmp;
 787         int i;
 788 #ifdef DEBUG_TX_ALLOC
 789         DMESG("FIXING TX FIFOs");
 790 #endif
 791         for (tmp=priv->txmapring, i=0;
 792              i < priv->txringcount;
 793              tmp+=8, i++){
 794                 *tmp = *tmp &~ (1<<31);
 795         }
 796
 797         for (tmp=priv->txbkpring, i=0;
 798              i < priv->txringcount;
 799              tmp+=8, i++) {
 800                 *tmp = *tmp &~ (1<<31);
 801         }
 802
 803         for (tmp=priv->txbepring, i=0;
 804              i < priv->txringcount;
 805              tmp+=8, i++){
 806                 *tmp = *tmp &~ (1<<31);
 807         }
 808         for (tmp=priv->txvipring, i=0;
 809              i < priv->txringcount;
 810              tmp+=8, i++) {
 811                 *tmp = *tmp &~ (1<<31);
 812         }
 813
 814         for (tmp=priv->txvopring, i=0;
 815              i < priv->txringcount;
 816              tmp+=8, i++){
 817                 *tmp = *tmp &~ (1<<31);
 818         }
 819
 820         for (tmp=priv->txhpring, i=0;
 821              i < priv->txringcount;
 822              tmp+=8,i++){
 823                 *tmp = *tmp &~ (1<<31);
 824         }
 825
 826         for (tmp=priv->txbeaconring, i=0;
 827              i < priv->txbeaconcount;
 828              tmp+=8, i++){
 829                 *tmp = *tmp &~ (1<<31);
 830         }
 831 #ifdef DEBUG_TX_ALLOC
 832         DMESG("TX FIFOs FIXED");
 833 #endif
 834         priv->txmapringtail = priv->txmapring;
 835         priv->txmapringhead = priv->txmapring;
 836         priv->txmapbufstail = priv->txmapbufs;
 837
 838         priv->txbkpringtail = priv->txbkpring;
 839         priv->txbkpringhead = priv->txbkpring;
 840         priv->txbkpbufstail = priv->txbkpbufs;
 841
 842         priv->txbepringtail = priv->txbepring;
 843         priv->txbepringhead = priv->txbepring;
 844         priv->txbepbufstail = priv->txbepbufs;
 845
 846         priv->txvipringtail = priv->txvipring;
 847         priv->txvipringhead = priv->txvipring;
 848         priv->txvipbufstail = priv->txvipbufs;
 849
 850         priv->txvopringtail = priv->txvopring;
 851         priv->txvopringhead = priv->txvopring;
 852         priv->txvopbufstail = priv->txvopbufs;
 853
 854         priv->txhpringtail = priv->txhpring;
 855         priv->txhpringhead = priv->txhpring;
 856         priv->txhpbufstail = priv->txhpbufs;
 857
 858         priv->txbeaconringtail = priv->txbeaconring;
 859         priv->txbeaconbufstail = priv->txbeaconbufs;
 860         set_nic_txring(dev);
 861
 862         ieee80211_reset_queue(priv->ieee80211);
 863         priv->ack_tx_to_ieee = 0;
 864 }
 865
 866
 867 void fix_rx_fifo(struct net_device *dev)
 868 {
 869         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 870         u32 *tmp;
 871         struct buffer *rxbuf;
 872         u8 rx_desc_size;
 873
 874         rx_desc_size = 8; // 4*8 = 32 bytes
 875
 876 #ifdef DEBUG_RXALLOC
 877         DMESG("FIXING RX FIFO");
 878         check_rxbuf(dev);
 879 #endif
 880
 881         for (tmp=priv->rxring, rxbuf=priv->rxbufferhead;
 882              (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
 883              tmp+=rx_desc_size,rxbuf=rxbuf->next){
 884                 *(tmp+2) = rxbuf->dma;
 885                 *tmp=*tmp &~ 0xfff;
 886                 *tmp=*tmp | priv->rxbuffersize;
 887                 *tmp |= (1<<31);
 888         }
 889
 890 #ifdef DEBUG_RXALLOC
 891         DMESG("RX FIFO FIXED");
 892         check_rxbuf(dev);
 893 #endif
 894
 895         priv->rxringtail=priv->rxring;
 896         priv->rxbuffer=priv->rxbufferhead;
 897         priv->rx_skb_complete=1;
 898         set_nic_rxring(dev);
 899 }
 900
 901
 902 /****************************************************************************
 903       ------------------------------HW STUFF---------------------------
 904 *****************************************************************************/
 905
 906 unsigned char QUALITY_MAP[] = {
 907   0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
 908   0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
 909   0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
 910   0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
 911   0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
 912   0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
 913   0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
 914   0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
 915   0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
 916   0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
 917 };
 918
 919 unsigned char STRENGTH_MAP[] = {
 920   0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
 921   0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
 922   0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
 923   0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
 924   0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
 925   0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
 926   0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
 927   0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
 928   0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
 929   0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
 930 };
 931
 932 void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual){
 933         //void Mlme_UpdateRssiSQ(struct net_device *dev, u8 *rssi, u8 *qual){
 934         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 935         u32 temp;
 936         u32 temp2;
 937         u32 temp3;
 938         u32 lsb;
 939         u32 q;
 940         u32 orig_qual;
 941         u8  _rssi;
 942
 943         q = *qual;
 944         orig_qual = *qual;
 945         _rssi = 0; // avoid gcc complains..
 946
 947         if (q <= 0x4e) {
 948                 temp = QUALITY_MAP[q];
 949         } else {
 950                 if( q & 0x80 ) {
 951                         temp = 0x32;
 952                 } else {
 953                         temp = 1;
 954                 }
 955         }
 956
 957         *qual = temp;
 958         temp2 = *rssi;
 959
 960         switch(priv->rf_chip){
 961         case RFCHIPID_RFMD:
 962                 lsb = temp2 & 1;
 963                 temp2 &= 0x7e;
 964                 if ( !lsb || !(temp2 <= 0x3c) ) {
 965                         temp2 = 0x64;
 966                 } else {
 967                         temp2 = 100 * temp2 / 0x3c;
 968                 }
 969                 *rssi = temp2 & 0xff;
 970                 _rssi = temp2 & 0xff;
 971                 break;
 972         case RFCHIPID_INTERSIL:
 973                 lsb = temp2;
 974                 temp2 &= 0xfffffffe;
 975                 temp2 *= 251;
 976                 temp3 = temp2;
 977                 temp2 <<= 6;
 978                 temp3 += temp2;
 979                 temp3 <<= 1;
 980                 temp2 = 0x4950df;
 981                 temp2 -= temp3;
 982                 lsb &= 1;
 983                 if ( temp2 <= 0x3e0000 ) {
 984                         if ( temp2 < 0xffef0000 )
 985                                 temp2 = 0xffef0000;
 986                 } else {
 987                         temp2 = 0x3e0000;
 988                 }
 989                 if ( !lsb ) {
 990                         temp2 -= 0xf0000;
 991                 } else {
 992                         temp2 += 0xf0000;
 993                 }
 994
 995                 temp3 = 0x4d0000;
 996                 temp3 -= temp2;
 997                 temp3 *= 100;
 998                 temp3 = temp3 / 0x6d;
 999                 temp3 >>= 0x10;
1000                 _rssi = temp3 & 0xff;
1001                 *rssi = temp3 & 0xff;
1002                 break;
1003         case RFCHIPID_GCT:
1004                 lsb = temp2 & 1;
1005                 temp2 &= 0x7e;
1006                 if ( ! lsb || !(temp2 <= 0x3c) ){
1007                         temp2 = 0x64;
1008                 } else {
1009                         temp2 = (100 * temp2) / 0x3c;
1010                 }
1011                 *rssi = temp2 & 0xff;
1012                 _rssi = temp2 & 0xff;
1013                 break;
1014         case RFCHIPID_PHILIPS:
1015                 if( orig_qual <= 0x4e ){
1016                         _rssi = STRENGTH_MAP[orig_qual];
1017                         *rssi = _rssi;
1018                 } else {
1019                         orig_qual -= 0x80;
1020                         if ( !orig_qual ){
1021                                 _rssi = 1;
1022                                 *rssi = 1;
1023                         } else {
1024                                 _rssi = 0x32;
1025                                 *rssi = 0x32;
1026                         }
1027                 }
1028                 break;
1029
1030         /* case 4 */
1031         case RFCHIPID_MAXIM:
1032                 lsb = temp2 & 1;
1033                 temp2 &= 0x7e;
1034                 temp2 >>= 1;
1035                 temp2 += 0x42;
1036                 if( lsb != 0 ){
1037                         temp2 += 0xa;
1038                 }
1039                 *rssi = temp2 & 0xff;
1040                 _rssi = temp2 & 0xff;
1041                 break;
1042         }
1043
1044         if ( _rssi < 0x64 ){
1045                 if ( _rssi == 0 ) {
1046                         *rssi = 1;
1047                 }
1048         } else {
1049                 *rssi = 0x64;
1050         }
1051
1052         return;
1053 }
1054
1055
1056 void rtl8180_irq_enable(struct net_device *dev)
1057 {
1058         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1059         priv->irq_enabled = 1;
1060 /*
1061         write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW |\
1062         INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK |\
1063         INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |\
1064         INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT);
1065 */
1066         write_nic_word(dev,INTA_MASK, priv->irq_mask);
1067 }
1068
1069
1070 void rtl8180_irq_disable(struct net_device *dev)
1071 {
1072         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1073
1074         write_nic_dword(dev,IMR,0);
1075         force_pci_posting(dev);
1076         priv->irq_enabled = 0;
1077 }
1078
1079
1080 void rtl8180_set_mode(struct net_device *dev,int mode)
1081 {
1082         u8 ecmd;
1083         ecmd=read_nic_byte(dev, EPROM_CMD);
1084         ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1085         ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1086         ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1087         ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1088         write_nic_byte(dev, EPROM_CMD, ecmd);
1089 }
1090
1091 void rtl8180_adapter_start(struct net_device *dev);
1092 void rtl8180_beacon_tx_enable(struct net_device *dev);
1093
1094 void rtl8180_update_msr(struct net_device *dev)
1095 {
1096         struct r8180_priv *priv = ieee80211_priv(dev);
1097         u8 msr;
1098         u32 rxconf;
1099
1100         msr  = read_nic_byte(dev, MSR);
1101         msr &= ~ MSR_LINK_MASK;
1102
1103         rxconf=read_nic_dword(dev,RX_CONF);
1104
1105         if(priv->ieee80211->state == IEEE80211_LINKED)
1106         {
1107                 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1108                         msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1109                 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1110                         msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1111                 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1112                         msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1113                 else
1114                         msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1115                 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
1116
1117         }else {
1118                 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1119                 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
1120         }
1121
1122         write_nic_byte(dev, MSR, msr);
1123         write_nic_dword(dev, RX_CONF, rxconf);
1124
1125 }
1126
1127
1128
1129 void rtl8180_set_chan(struct net_device *dev,short ch)
1130 {
1131         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1132
1133         if((ch > 14) || (ch < 1))
1134         {
1135                 printk("In %s: Invalid chnanel %d\n", __func__, ch);
1136                 return;
1137         }
1138
1139         priv->chan=ch;
1140         //printk("in %s:channel is %d\n",__func__,ch);
1141         priv->rf_set_chan(dev,priv->chan);
1142
1143 }
1144
1145
1146 void rtl8180_rx_enable(struct net_device *dev)
1147 {
1148         u8 cmd;
1149         u32 rxconf;
1150         /* for now we accept data, management & ctl frame*/
1151         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1152
1153         rxconf=read_nic_dword(dev,RX_CONF);
1154         rxconf = rxconf &~ MAC_FILTER_MASK;
1155         rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
1156         rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
1157         rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
1158         rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
1159 //      rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1160         if (dev->flags & IFF_PROMISC) DMESG ("NIC in promisc mode");
1161
1162         if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1163            dev->flags & IFF_PROMISC){
1164                 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1165         }else{
1166                 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
1167                 if(priv->card_8185 == 0)
1168                         rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1169         }
1170
1171         /*if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1172                 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1173                 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1174         }*/
1175
1176         if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1177                 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
1178                 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
1179                 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
1180         }
1181
1182         if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1183                 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1184
1185         //if(!priv->card_8185){
1186                 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1187                 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1188         //}
1189
1190         rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1191         rxconf = rxconf &~ MAX_RX_DMA_MASK;
1192         rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
1193
1194         //if(!priv->card_8185)
1195                 rxconf = rxconf | RCR_ONLYERLPKT;
1196
1197         rxconf = rxconf &~ RCR_CS_MASK;
1198         if(!priv->card_8185)
1199                 rxconf |= (priv->rcr_csense<<RCR_CS_SHIFT);
1200 //      rxconf &=~ 0xfff00000;
1201 //      rxconf |= 0x90100000;//9014f76f;
1202         write_nic_dword(dev, RX_CONF, rxconf);
1203
1204         fix_rx_fifo(dev);
1205
1206 #ifdef DEBUG_RX
1207         DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RX_CONF));
1208 #endif
1209         cmd=read_nic_byte(dev,CMD);
1210         write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
1211
1212         /* In rtl8139 driver seems that DMA threshold has to be written
1213          *  after enabling RX, so we rewrite RX_CONFIG register
1214          */
1215         //mdelay(100);
1216 //      write_nic_dword(dev, RX_CONF, rxconf);
1217
1218 }
1219
1220
1221 void set_nic_txring(struct net_device *dev)
1222 {
1223         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1224 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1225
1226         write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
1227 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1228         write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
1229 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1230         write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
1231 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1232         write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
1233 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1234         write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
1235 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1236         write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
1237 //              DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1238
1239         write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
1240 }
1241
1242
1243 void rtl8180_conttx_enable(struct net_device *dev)
1244 {
1245         u32 txconf;
1246         txconf = read_nic_dword(dev,TX_CONF);
1247         txconf = txconf &~ TX_LOOPBACK_MASK;
1248         txconf = txconf | (TX_LOOPBACK_CONTINUE <<TX_LOOPBACK_SHIFT);
1249         write_nic_dword(dev,TX_CONF,txconf);
1250 }
1251
1252
1253 void rtl8180_conttx_disable(struct net_device *dev)
1254 {
1255         u32 txconf;
1256         txconf = read_nic_dword(dev,TX_CONF);
1257         txconf = txconf &~ TX_LOOPBACK_MASK;
1258         txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1259         write_nic_dword(dev,TX_CONF,txconf);
1260 }
1261
1262
1263 void rtl8180_tx_enable(struct net_device *dev)
1264 {
1265         u8 cmd;
1266         u8 tx_agc_ctl;
1267         u8 byte;
1268         u32 txconf;
1269         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1270         txconf= read_nic_dword(dev,TX_CONF);
1271
1272
1273         if(priv->card_8185){
1274
1275
1276                 byte = read_nic_byte(dev,CW_CONF);
1277                 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
1278                 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
1279                 write_nic_byte(dev, CW_CONF, byte);
1280
1281                 tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
1282                 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
1283                 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
1284                 tx_agc_ctl |=(1<<TX_AGC_CTL_FEEDBACK_ANT);
1285                 write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
1286                 /*
1287                 write_nic_word(dev, 0x5e, 0x01);
1288                 force_pci_posting(dev);
1289                 mdelay(1);
1290                 write_nic_word(dev, 0xfe, 0x10);
1291                 force_pci_posting(dev);
1292                 mdelay(1);
1293                 write_nic_word(dev, 0x5e, 0x00);
1294                 force_pci_posting(dev);
1295                 mdelay(1);
1296                 */
1297                 write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
1298         }
1299
1300         if(priv->card_8185){
1301
1302                 txconf = txconf &~ (1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
1303
1304         }else{
1305
1306                 if(hwseqnum)
1307                         txconf= txconf &~ (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1308                 else
1309                         txconf= txconf | (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1310         }
1311
1312         txconf = txconf &~ TX_LOOPBACK_MASK;
1313         txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1314         txconf = txconf &~ TCR_DPRETRY_MASK;
1315         txconf = txconf &~ TCR_RTSRETRY_MASK;
1316         txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
1317         txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
1318         txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
1319
1320         if(priv->card_8185){
1321                 if(priv->hw_plcp_len)
1322                         txconf = txconf &~ TCR_PLCP_LEN;
1323                 else
1324                         txconf = txconf | TCR_PLCP_LEN;
1325         }else{
1326                 txconf = txconf &~ TCR_SAT;
1327         }
1328         txconf = txconf &~ TCR_MXDMA_MASK;
1329         txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
1330         txconf = txconf | TCR_CWMIN;
1331         txconf = txconf | TCR_DISCW;
1332
1333 //      if(priv->ieee80211->hw_wep)
1334 //              txconf=txconf &~ (1<<TX_NOICV_SHIFT);
1335 //      else
1336                 txconf=txconf | (1<<TX_NOICV_SHIFT);
1337
1338         write_nic_dword(dev,TX_CONF,txconf);
1339
1340
1341         fix_tx_fifo(dev);
1342
1343 #ifdef DEBUG_TX
1344         DMESG("txconf: %x %x",txconf,read_nic_dword(dev,TX_CONF));
1345 #endif
1346
1347         cmd=read_nic_byte(dev,CMD);
1348         write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
1349
1350 //      mdelay(100);
1351         write_nic_dword(dev,TX_CONF,txconf);
1352 //      #endif
1353 /*
1354         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1355         write_nic_byte(dev, TX_DMA_POLLING, priv->dma_poll_mask);
1356         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1357         */
1358 }
1359
1360
1361 void rtl8180_beacon_tx_enable(struct net_device *dev)
1362 {
1363         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1364
1365         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1366         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
1367         write_nic_byte(dev,TPPollStop, priv->dma_poll_mask);
1368         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1369 }
1370
1371
1372 void rtl8180_beacon_tx_disable(struct net_device *dev)
1373 {
1374         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1375
1376         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1377         priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
1378         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
1379         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1380
1381 }
1382
1383
1384 void rtl8180_rtx_disable(struct net_device *dev)
1385 {
1386         u8 cmd;
1387         struct r8180_priv *priv = ieee80211_priv(dev);
1388
1389         cmd=read_nic_byte(dev,CMD);
1390         write_nic_byte(dev, CMD, cmd &~ \
1391                        ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
1392         force_pci_posting(dev);
1393         mdelay(10);
1394         /*while (read_nic_byte(dev,CMD) & (1<<CMD_RX_ENABLE_SHIFT))
1395           udelay(10);
1396         */
1397
1398         if(!priv->rx_skb_complete)
1399                 dev_kfree_skb_any(priv->rx_skb);
1400 }
1401
1402 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
1403                          int addr)
1404 {
1405         int i;
1406         u32 *desc;
1407         u32 *tmp;
1408         dma_addr_t dma_desc, dma_tmp;
1409         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1410         struct pci_dev *pdev = priv->pdev;
1411         void *buf;
1412
1413         if((bufsize & 0xfff) != bufsize) {
1414                 DMESGE ("TX buffer allocation too large");
1415                 return 0;
1416         }
1417         desc = (u32*)pci_alloc_consistent(pdev,
1418                                           sizeof(u32)*8*count+256, &dma_desc);
1419         if(desc==NULL) return -1;
1420         if(dma_desc & 0xff){
1421
1422                 /*
1423                  * descriptor's buffer must be 256 byte aligned
1424                  * we shouldn't be here, since we set DMA mask !
1425                  */
1426                 WARN(1, "DMA buffer is not aligned\n");
1427         }
1428         tmp=desc;
1429         for (i=0;i<count;i++)
1430         {
1431                 buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1432                 if (buf == NULL) return -ENOMEM;
1433
1434                 switch(addr) {
1435                 case TX_MANAGEPRIORITY_RING_ADDR:
1436                         if(-1 == buffer_add(&(priv->txmapbufs),buf,dma_tmp,NULL)){
1437                                 DMESGE("Unable to allocate mem for buffer NP");
1438                                 return -ENOMEM;
1439                         }
1440                         break;
1441
1442                 case TX_BKPRIORITY_RING_ADDR:
1443                         if(-1 == buffer_add(&(priv->txbkpbufs),buf,dma_tmp,NULL)){
1444                                 DMESGE("Unable to allocate mem for buffer LP");
1445                                 return -ENOMEM;
1446                         }
1447                         break;
1448                 case TX_BEPRIORITY_RING_ADDR:
1449                         if(-1 == buffer_add(&(priv->txbepbufs),buf,dma_tmp,NULL)){
1450                                 DMESGE("Unable to allocate mem for buffer NP");
1451                                 return -ENOMEM;
1452                         }
1453                         break;
1454
1455                 case TX_VIPRIORITY_RING_ADDR:
1456                         if(-1 == buffer_add(&(priv->txvipbufs),buf,dma_tmp,NULL)){
1457                                 DMESGE("Unable to allocate mem for buffer LP");
1458                                 return -ENOMEM;
1459                         }
1460                         break;
1461                 case TX_VOPRIORITY_RING_ADDR:
1462                         if(-1 == buffer_add(&(priv->txvopbufs),buf,dma_tmp,NULL)){
1463                                 DMESGE("Unable to allocate mem for buffer NP");
1464                                 return -ENOMEM;
1465                         }
1466                         break;
1467                 case TX_HIGHPRIORITY_RING_ADDR:
1468                         if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1469                                 DMESGE("Unable to allocate mem for buffer HP");
1470                                 return -ENOMEM;
1471                         }
1472                         break;
1473                 case TX_BEACON_RING_ADDR:
1474                         if(-1 == buffer_add(&(priv->txbeaconbufs),buf,dma_tmp,NULL)){
1475                         DMESGE("Unable to allocate mem for buffer BP");
1476                                 return -ENOMEM;
1477                         }
1478                         break;
1479                 }
1480                 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1481                 *(tmp+2) = (u32)dma_tmp;
1482                 *(tmp+3) = bufsize;
1483
1484                 if(i+1<count)
1485                         *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1486                 else
1487                         *(tmp+4) = (u32)dma_desc;
1488
1489                 tmp=tmp+8;
1490         }
1491
1492         switch(addr) {
1493         case TX_MANAGEPRIORITY_RING_ADDR:
1494                 priv->txmapringdma=dma_desc;
1495                 priv->txmapring=desc;
1496                 break;
1497
1498         case TX_BKPRIORITY_RING_ADDR:
1499                 priv->txbkpringdma=dma_desc;
1500                 priv->txbkpring=desc;
1501                 break;
1502
1503         case TX_BEPRIORITY_RING_ADDR:
1504                 priv->txbepringdma=dma_desc;
1505                 priv->txbepring=desc;
1506                 break;
1507
1508         case TX_VIPRIORITY_RING_ADDR:
1509                 priv->txvipringdma=dma_desc;
1510                 priv->txvipring=desc;
1511                 break;
1512
1513         case TX_VOPRIORITY_RING_ADDR:
1514                 priv->txvopringdma=dma_desc;
1515                 priv->txvopring=desc;
1516                 break;
1517
1518         case TX_HIGHPRIORITY_RING_ADDR:
1519                 priv->txhpringdma=dma_desc;
1520                 priv->txhpring=desc;
1521                 break;
1522
1523         case TX_BEACON_RING_ADDR:
1524                 priv->txbeaconringdma=dma_desc;
1525                 priv->txbeaconring=desc;
1526                 break;
1527
1528         }
1529
1530 #ifdef DEBUG_TX
1531         DMESG("Tx dma physical address: %x",dma_desc);
1532 #endif
1533
1534         return 0;
1535 }
1536
1537
1538 void free_tx_desc_rings(struct net_device *dev)
1539 {
1540
1541         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1542         struct pci_dev *pdev=priv->pdev;
1543         int count = priv->txringcount;
1544
1545         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1546                             priv->txmapring, priv->txmapringdma);
1547         buffer_free(dev,&(priv->txmapbufs),priv->txbuffsize,1);
1548
1549         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1550                             priv->txbkpring, priv->txbkpringdma);
1551         buffer_free(dev,&(priv->txbkpbufs),priv->txbuffsize,1);
1552
1553         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1554                             priv->txbepring, priv->txbepringdma);
1555         buffer_free(dev,&(priv->txbepbufs),priv->txbuffsize,1);
1556
1557         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1558                             priv->txvipring, priv->txvipringdma);
1559         buffer_free(dev,&(priv->txvipbufs),priv->txbuffsize,1);
1560
1561         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1562                             priv->txvopring, priv->txvopringdma);
1563         buffer_free(dev,&(priv->txvopbufs),priv->txbuffsize,1);
1564
1565         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1566                             priv->txhpring, priv->txhpringdma);
1567         buffer_free(dev,&(priv->txhpbufs),priv->txbuffsize,1);
1568
1569         count = priv->txbeaconcount;
1570         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1571                             priv->txbeaconring, priv->txbeaconringdma);
1572         buffer_free(dev,&(priv->txbeaconbufs),priv->txbuffsize,1);
1573 }
1574
1575 void free_rx_desc_ring(struct net_device *dev)
1576 {
1577         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1578         struct pci_dev *pdev = priv->pdev;
1579
1580         int count = priv->rxringcount;
1581
1582         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1583                             priv->rxring, priv->rxringdma);
1584
1585         buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0);
1586 }
1587
1588
1589 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1590 {
1591         int i;
1592         u32 *desc;
1593         u32 *tmp;
1594         dma_addr_t dma_desc,dma_tmp;
1595         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1596         struct pci_dev *pdev=priv->pdev;
1597         void *buf;
1598         u8 rx_desc_size;
1599
1600         rx_desc_size = 8; // 4*8 = 32 bytes
1601
1602         if((bufsize & 0xfff) != bufsize){
1603                 DMESGE ("RX buffer allocation too large");
1604                 return -1;
1605         }
1606
1607         desc = (u32*)pci_alloc_consistent(pdev,sizeof(u32)*rx_desc_size*count+256,
1608                                           &dma_desc);
1609
1610         if(dma_desc & 0xff){
1611
1612                 /*
1613                  * descriptor's buffer must be 256 byte aligned
1614                  * should never happen since we specify the DMA mask
1615                  */
1616                 WARN(1, "DMA buffer is not aligned\n");
1617         }
1618
1619         priv->rxring=desc;
1620         priv->rxringdma=dma_desc;
1621         tmp=desc;
1622
1623         for (i=0;i<count;i++){
1624
1625                 if ((buf= kmalloc(bufsize * sizeof(u8),GFP_ATOMIC)) == NULL){
1626                         DMESGE("Failed to kmalloc RX buffer");
1627                         return -1;
1628                 }
1629
1630                 dma_tmp = pci_map_single(pdev,buf,bufsize * sizeof(u8),
1631                                          PCI_DMA_FROMDEVICE);
1632
1633 #ifdef DEBUG_ZERO_RX
1634                 int j;
1635                 for(j=0;j<bufsize;j++) ((u8*)buf)[i] = 0;
1636 #endif
1637
1638                 //buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1639                 if(-1 == buffer_add(&(priv->rxbuffer), buf,dma_tmp,
1640                            &(priv->rxbufferhead))){
1641                            DMESGE("Unable to allocate mem RX buf");
1642                            return -1;
1643                 }
1644                 *tmp = 0; //zero pads the header of the descriptor
1645                 *tmp = *tmp |( bufsize&0xfff);
1646                 *(tmp+2) = (u32)dma_tmp;
1647                 *tmp = *tmp |(1<<31); // descriptor void, owned by the NIC
1648
1649 #ifdef DEBUG_RXALLOC
1650                 DMESG("Alloc %x size buffer, DMA mem @ %x, virtual mem @ %x",
1651                       (u32)(bufsize&0xfff), (u32)dma_tmp, (u32)buf);
1652 #endif
1653
1654                 tmp=tmp+rx_desc_size;
1655         }
1656
1657         *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); // this is the last descriptor
1658
1659
1660 #ifdef DEBUG_RXALLOC
1661         DMESG("RX DMA physical address: %x",dma_desc);
1662 #endif
1663
1664         return 0;
1665 }
1666
1667
1668 void set_nic_rxring(struct net_device *dev)
1669 {
1670         u8 pgreg;
1671         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1672
1673         //rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1674
1675         pgreg=read_nic_byte(dev, PGSELECT);
1676         write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
1677
1678         //rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1679
1680         write_nic_dword(dev, RXRING_ADDR,priv->rxringdma);
1681 }
1682
1683
1684 void rtl8180_reset(struct net_device *dev)
1685 {
1686         //u32 txconf = 0x80e00707; //FIXME: Make me understandable
1687         u8 cr;
1688
1689         //write_nic_dword(dev,TX_CONF,txconf);
1690
1691         rtl8180_irq_disable(dev);
1692
1693         cr=read_nic_byte(dev,CMD);
1694         cr = cr & 2;
1695         cr = cr | (1<<CMD_RST_SHIFT);
1696         write_nic_byte(dev,CMD,cr);
1697
1698         force_pci_posting(dev);
1699
1700         mdelay(200);
1701
1702         if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
1703                 DMESGW("Card reset timeout!");
1704         else
1705                 DMESG("Card successfully reset");
1706
1707 //#ifndef CONFIG_RTL8185B
1708         rtl8180_set_mode(dev,EPROM_CMD_LOAD);
1709         force_pci_posting(dev);
1710         mdelay(200);
1711 //#endif
1712 }
1713
1714 inline u16 ieeerate2rtlrate(int rate)
1715 {
1716         switch(rate){
1717         case 10:
1718         return 0;
1719         case 20:
1720         return 1;
1721         case 55:
1722         return 2;
1723         case 110:
1724         return 3;
1725         case 60:
1726         return 4;
1727         case 90:
1728         return 5;
1729         case 120:
1730         return 6;
1731         case 180:
1732         return 7;
1733         case 240:
1734         return 8;
1735         case 360:
1736         return 9;
1737         case 480:
1738         return 10;
1739         case 540:
1740         return 11;
1741         default:
1742         return 3;
1743
1744         }
1745 }
1746
1747 static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720};
1748 inline u16 rtl8180_rate2rate(short rate)
1749 {
1750         if (rate >12) return 10;
1751         return rtl_rate[rate];
1752 }
1753 inline u8 rtl8180_IsWirelessBMode(u16 rate)
1754 {
1755         if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
1756                 return 1;
1757         else return 0;
1758 }
1759 u16 N_DBPSOfRate(u16 DataRate);
1760 u16 ComputeTxTime(
1761         u16             FrameLength,
1762         u16             DataRate,
1763         u8              bManagementFrame,
1764         u8              bShortPreamble
1765 )
1766 {
1767         u16     FrameTime;
1768         u16     N_DBPS;
1769         u16     Ceiling;
1770
1771         if( rtl8180_IsWirelessBMode(DataRate) )
1772         {
1773                 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
1774                 {       // long preamble
1775                         FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1776                 }
1777                 else
1778                 {       // Short preamble
1779                         FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1780                 }
1781                 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
1782                                 FrameTime ++;
1783         } else {        //802.11g DSSS-OFDM PLCP length field calculation.
1784                 N_DBPS = N_DBPSOfRate(DataRate);
1785                 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1786                                 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1787                 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1788         }
1789         return FrameTime;
1790 }
1791 u16 N_DBPSOfRate(u16 DataRate)
1792 {
1793          u16 N_DBPS = 24;
1794
1795          switch(DataRate)
1796          {
1797          case 60:
1798           N_DBPS = 24;
1799           break;
1800
1801          case 90:
1802           N_DBPS = 36;
1803           break;
1804
1805          case 120:
1806           N_DBPS = 48;
1807           break;
1808
1809          case 180:
1810           N_DBPS = 72;
1811           break;
1812
1813          case 240:
1814           N_DBPS = 96;
1815           break;
1816
1817          case 360:
1818           N_DBPS = 144;
1819           break;
1820
1821          case 480:
1822           N_DBPS = 192;
1823           break;
1824
1825          case 540:
1826           N_DBPS = 216;
1827           break;
1828
1829          default:
1830           break;
1831          }
1832
1833          return N_DBPS;
1834 }
1835
1836 //{by amy 080312
1837 //
1838 //      Description:
1839 //      For Netgear case, they want good-looking singal strength.
1840 //              2004.12.05, by rcnjko.
1841 //
1842 long
1843 NetgearSignalStrengthTranslate(
1844         long LastSS,
1845         long CurrSS
1846         )
1847 {
1848         long RetSS;
1849
1850         // Step 1. Scale mapping.
1851         if(CurrSS >= 71 && CurrSS <= 100)
1852         {
1853                 RetSS = 90 + ((CurrSS - 70) / 3);
1854         }
1855         else if(CurrSS >= 41 && CurrSS <= 70)
1856         {
1857                 RetSS = 78 + ((CurrSS - 40) / 3);
1858         }
1859         else if(CurrSS >= 31 && CurrSS <= 40)
1860         {
1861                 RetSS = 66 + (CurrSS - 30);
1862         }
1863         else if(CurrSS >= 21 && CurrSS <= 30)
1864         {
1865                 RetSS = 54 + (CurrSS - 20);
1866         }
1867         else if(CurrSS >= 5 && CurrSS <= 20)
1868         {
1869                 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1870         }
1871         else if(CurrSS == 4)
1872         {
1873                 RetSS = 36;
1874         }
1875         else if(CurrSS == 3)
1876         {
1877                 RetSS = 27;
1878         }
1879         else if(CurrSS == 2)
1880         {
1881                 RetSS = 18;
1882         }
1883         else if(CurrSS == 1)
1884         {
1885                 RetSS = 9;
1886         }
1887         else
1888         {
1889                 RetSS = CurrSS;
1890         }
1891         //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
1892
1893         // Step 2. Smoothing.
1894         if(LastSS > 0)
1895         {
1896                 RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6;
1897         }
1898         //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing:  LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
1899
1900         return RetSS;
1901 }
1902 //
1903 //      Description:
1904 //              Translate 0-100 signal strength index into dBm.
1905 //
1906 long
1907 TranslateToDbm8185(
1908         u8 SignalStrengthIndex  // 0-100 index.
1909         )
1910 {
1911         long    SignalPower; // in dBm.
1912
1913         // Translate to dBm (x=0.5y-95).
1914         SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1915         SignalPower -= 95;
1916
1917         return SignalPower;
1918 }
1919 //
1920 //      Description:
1921 //              Perform signal smoothing for dynamic mechanism.
1922 //              This is different with PerformSignalSmoothing8185 in smoothing fomula.
1923 //              No dramatic adjustion is apply because dynamic mechanism need some degree
1924 //              of correctness. Ported from 8187B.
1925 //      2007-02-26, by Bruce.
1926 //
1927 void
1928 PerformUndecoratedSignalSmoothing8185(
1929         struct r8180_priv *priv,
1930         bool    bCckRate
1931         )
1932 {
1933
1934
1935         // Determin the current packet is CCK rate.
1936         priv->bCurCCKPkt = bCckRate;
1937
1938         if(priv->UndecoratedSmoothedSS >= 0)
1939         {
1940                 priv->UndecoratedSmoothedSS = ( (priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10) ) / 6;
1941         }
1942         else
1943         {
1944                 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
1945         }
1946
1947         priv->UndercorateSmoothedRxPower = ( (priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower* 11)) / 60;
1948
1949 //      printk("Sommthing SignalSterngth (%d) => UndecoratedSmoothedSS (%d)\n", priv->SignalStrength, priv->UndecoratedSmoothedSS);
1950 //      printk("Sommthing RxPower (%d) => UndecoratedRxPower (%d)\n", priv->RxPower, priv->UndercorateSmoothedRxPower);
1951
1952         //if(priv->CurCCKRSSI >= 0 && bCckRate)
1953         if(bCckRate)
1954         {
1955                 priv->CurCCKRSSI = priv->RSSI;
1956         }
1957         else
1958         {
1959                 priv->CurCCKRSSI = 0;
1960         }
1961
1962         // Boundary checking.
1963         // TODO: The overflow condition does happen, if we want to fix,
1964         // we shall recalculate thresholds first.
1965         if(priv->UndecoratedSmoothedSS > 100)
1966         {
1967 //              printk("UndecoratedSmoothedSS(%d) overflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
1968         }
1969         if(priv->UndecoratedSmoothedSS < 0)
1970         {
1971 //              printk("UndecoratedSmoothedSS(%d) underflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
1972         }
1973
1974 }
1975
1976 //by amy 080312}
1977
1978 /* This is rough RX isr handling routine*/
1979 void rtl8180_rx(struct net_device *dev)
1980 {
1981         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1982         struct sk_buff *tmp_skb;
1983
1984         //struct sk_buff *skb;
1985         short first,last;
1986         u32 len;
1987         int lastlen;
1988         unsigned char quality, signal;
1989         u8 rate;
1990         //u32 *prism_hdr;
1991         u32 *tmp,*tmp2;
1992         u8 rx_desc_size;
1993         u8 padding;
1994         //u32 count=0;
1995         char rxpower = 0;
1996         u32 RXAGC = 0;
1997         long RxAGC_dBm = 0;
1998         u8      LNA=0, BB=0;
1999         u8      LNA_gain[4]={02, 17, 29, 39};
2000         u8  Antenna = 0;
2001         struct ieee80211_hdr *hdr;//by amy
2002         u16 fc,type;
2003         u8 bHwError = 0,bCRC = 0,bICV = 0;
2004         //bHwError = 0;
2005         //bCRC = 0;
2006         //bICV = 0;
2007         bool    bCckRate = false;
2008         u8     RSSI = 0;
2009         long    SignalStrengthIndex = 0;//+by amy 080312
2010 //      u8 SignalStrength = 0;
2011         struct ieee80211_rx_stats stats = {
2012                 .signal = 0,
2013                 .noise = -98,
2014                 .rate = 0,
2015         //      .mac_time = jiffies,
2016                 .freq = IEEE80211_24GHZ_BAND,
2017         };
2018
2019         stats.nic_type = NIC_8185B;
2020         rx_desc_size = 8;
2021
2022         //printk("receive frame!%d\n",count++);
2023         //if (!priv->rxbuffer) DMESG ("EE: NIC RX ack, but RX queue corrupted!");
2024         //else {
2025
2026         if ((*(priv->rxringtail)) & (1<<31)) {
2027
2028                 /* we have got an RX int, but the descriptor
2029                  * we are pointing is empty*/
2030
2031                 priv->stats.rxnodata++;
2032                 priv->ieee80211->stats.rx_errors++;
2033
2034         /*      if (! *(priv->rxring) & (1<<31)) {
2035
2036                         priv->stats.rxreset++;
2037                         priv->rxringtail=priv->rxring;
2038                         priv->rxbuffer=priv->rxbufferhead;
2039
2040                 }else{*/
2041
2042                 tmp2 = NULL;
2043                 tmp = priv->rxringtail;
2044                 do{
2045                         if(tmp == priv->rxring)
2046                                 //tmp  = priv->rxring + (priv->rxringcount )*rx_desc_size; xiong-2006-11-15
2047                                 tmp  = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
2048                         else
2049                                 tmp -= rx_desc_size;
2050
2051                         if(! (*tmp & (1<<31)))
2052                                 tmp2 = tmp;
2053                 }while(tmp != priv->rxring);
2054
2055                 if(tmp2) priv->rxringtail = tmp2;
2056                 //}
2057         }
2058
2059         /* while there are filled descriptors */
2060         while(!(*(priv->rxringtail) & (1<<31))){
2061                 if(*(priv->rxringtail) & (1<<26))
2062                         DMESGW("RX buffer overflow");
2063                 if(*(priv->rxringtail) & (1<<12))
2064                         priv->stats.rxicverr++;
2065
2066                 if(*(priv->rxringtail) & (1<<27)){
2067                         priv->stats.rxdmafail++;
2068                         //DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail);
2069                         goto drop;
2070                 }
2071
2072                 pci_dma_sync_single_for_cpu(priv->pdev,
2073                                     priv->rxbuffer->dma,
2074                                     priv->rxbuffersize * \
2075                                     sizeof(u8),
2076                                     PCI_DMA_FROMDEVICE);
2077
2078                 first = *(priv->rxringtail) & (1<<29) ? 1:0;
2079                 if(first) priv->rx_prevlen=0;
2080
2081                 last = *(priv->rxringtail) & (1<<28) ? 1:0;
2082                 if(last){
2083                         lastlen=((*priv->rxringtail) &0xfff);
2084
2085                         /* if the last descriptor (that should
2086                          * tell us the total packet len) tell
2087                          * us something less than the descriptors
2088                          * len we had until now, then there is some
2089                          * problem..
2090                          * workaround to prevent kernel panic
2091                          */
2092                         if(lastlen < priv->rx_prevlen)
2093                                 len=0;
2094                         else
2095                                 len=lastlen-priv->rx_prevlen;
2096
2097                         if(*(priv->rxringtail) & (1<<13)) {
2098 //lastlen=((*priv->rxringtail) &0xfff);
2099                                 if ((*(priv->rxringtail) & 0xfff) <500)
2100                                         priv->stats.rxcrcerrmin++;
2101                                 else if ((*(priv->rxringtail) & 0x0fff) >1000)
2102                                         priv->stats.rxcrcerrmax++;
2103                                 else
2104                                         priv->stats.rxcrcerrmid++;
2105
2106                         }
2107
2108                 }else{
2109                         len = priv->rxbuffersize;
2110                 }
2111
2112                 if(first && last) {
2113                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2114                 }else if(first) {
2115                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2116                         if(padding) {
2117                                 len -= 2;
2118                         }
2119                 }else {
2120                         padding = 0;
2121                 }
2122                padding = 0;
2123                 priv->rx_prevlen+=len;
2124
2125                 if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){
2126                         /* HW is probably passing several buggy frames
2127                         * without FD or LD flag set.
2128                         * Throw this garbage away to prevent skb
2129                         * memory exausting
2130                         */
2131                         if(!priv->rx_skb_complete)
2132                                 dev_kfree_skb_any(priv->rx_skb);
2133                         priv->rx_skb_complete = 1;
2134                 }
2135
2136 #ifdef DEBUG_RX_FRAG
2137                 DMESG("Iteration.. len %x",len);
2138                 if(first) DMESG ("First descriptor");
2139                 if(last) DMESG("Last descriptor");
2140
2141 #endif
2142 #ifdef DEBUG_RX_VERBOSE
2143                 print_buffer( priv->rxbuffer->buf, len);
2144 #endif
2145
2146                 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16);
2147                 signal=(signal&0xfe)>>1;        // Modify by hikaru 6.6
2148
2149                 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff));
2150
2151                 stats.mac_time[0] = *(priv->rxringtail+1);
2152                 stats.mac_time[1] = *(priv->rxringtail+2);
2153                 rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42;
2154                 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f);
2155
2156                 rate=((*(priv->rxringtail)) &
2157                         ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
2158
2159                 stats.rate = rtl8180_rate2rate(rate);
2160                 //DMESG("%d",rate);
2161                 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ;
2162 //              printk("in rtl8180_rx():Antenna is %d\n",Antenna);
2163 //by amy for antenna
2164                 if(!rtl8180_IsWirelessBMode(stats.rate))
2165                 { // OFDM rate.
2166
2167                         RxAGC_dBm = rxpower+1;  //bias
2168                 }
2169                 else
2170                 { // CCK rate.
2171                         RxAGC_dBm = signal;//bit 0 discard
2172
2173                         LNA = (u8) (RxAGC_dBm & 0x60 ) >> 5 ; //bit 6~ bit 5
2174                         BB  = (u8) (RxAGC_dBm & 0x1F);  // bit 4 ~ bit 0
2175
2176                         RxAGC_dBm = -( LNA_gain[LNA] + (BB *2) ); //Pin_11b=-(LNA_gain+BB_gain) (dBm)
2177
2178                         RxAGC_dBm +=4; //bias
2179                 }
2180
2181                 if(RxAGC_dBm & 0x80) //absolute value
2182                         RXAGC= ~(RxAGC_dBm)+1;
2183                 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
2184                 // Translate RXAGC into 1-100.
2185                 if(!rtl8180_IsWirelessBMode(stats.rate))
2186                 { // OFDM rate.
2187                         if(RXAGC>90)
2188                                 RXAGC=90;
2189                         else if(RXAGC<25)
2190                                 RXAGC=25;
2191                         RXAGC=(90-RXAGC)*100/65;
2192                 }
2193                 else
2194                 { // CCK rate.
2195                         if(RXAGC>95)
2196                                 RXAGC=95;
2197                         else if(RXAGC<30)
2198                                 RXAGC=30;
2199                         RXAGC=(95-RXAGC)*100/65;
2200                 }
2201                 priv->SignalStrength = (u8)RXAGC;
2202                 priv->RecvSignalPower = RxAGC_dBm ;  // It can use directly by SD3 CMLin
2203                 priv->RxPower = rxpower;
2204                 priv->RSSI = RSSI;
2205 //{by amy 080312
2206                 // SQ translation formular is provided by SD3 DZ. 2006.06.27, by rcnjko.
2207                 if(quality >= 127)
2208                         quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now;
2209                 else if(quality < 27)
2210                         quality = 100;
2211                 else
2212                         quality = 127 - quality;
2213                 priv->SignalQuality = quality;
2214                 if(!priv->card_8185)
2215                         printk("check your card type\n");
2216
2217                 stats.signal = (u8)quality;//priv->wstats.qual.level = priv->SignalStrength;
2218                 stats.signalstrength = RXAGC;
2219                 if(stats.signalstrength > 100)
2220                         stats.signalstrength = 100;
2221                 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
2222         //      printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength);
2223                 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
2224                 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual;
2225 //by amy 080312}
2226                 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 )
2227                         | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 );
2228                 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
2229                 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
2230             hdr = (struct ieee80211_hdr *)priv->rxbuffer->buf;
2231                     fc = le16_to_cpu(hdr->frame_ctl);
2232                 type = WLAN_FC_GET_TYPE(fc);
2233
2234                         if((IEEE80211_FTYPE_CTL != type) &&
2235                                 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
2236                                  && (!bHwError) && (!bCRC)&& (!bICV))
2237                         {
2238 //by amy 080312
2239                                 // Perform signal smoothing for dynamic mechanism on demand.
2240                                 // This is different with PerformSignalSmoothing8185 in smoothing fomula.
2241                                 // No dramatic adjustion is apply because dynamic mechanism need some degree
2242                                 // of correctness. 2007.01.23, by shien chang.
2243                                 PerformUndecoratedSignalSmoothing8185(priv,bCckRate);
2244                                 //
2245                                 // For good-looking singal strength.
2246                                 //
2247                                 SignalStrengthIndex = NetgearSignalStrengthTranslate(
2248                                                                 priv->LastSignalStrengthInPercent,
2249                                                                 priv->SignalStrength);
2250
2251                                 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
2252                                 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
2253                 //
2254                 // We need more correct power of received packets and the  "SignalStrength" of RxStats is beautified,
2255                 // so we record the correct power here.
2256                 //
2257                                 priv->Stats_SignalQuality =(long) (priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
2258                                 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower -1) / 6;
2259
2260                 // Figure out which antenna that received the lasted packet.
2261                                 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main.
2262 //by amy 080312
2263                             SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
2264                         }
2265
2266 //by amy for antenna
2267
2268
2269
2270
2271
2272
2273 #ifndef DUMMY_RX
2274                 if(first){
2275                         if(!priv->rx_skb_complete){
2276                                 /* seems that HW sometimes fails to reiceve and
2277                                    doesn't provide the last descriptor */
2278 #ifdef DEBUG_RX_SKB
2279                                 DMESG("going to free incomplete skb");
2280 #endif
2281                                 dev_kfree_skb_any(priv->rx_skb);
2282                                 priv->stats.rxnolast++;
2283 #ifdef DEBUG_RX_SKB
2284                                 DMESG("free incomplete skb OK");
2285 #endif
2286                         }
2287                         /* support for prism header has been originally added by Christian */
2288                         if(priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR){
2289
2290                         }else{
2291                                 priv->rx_skb = dev_alloc_skb(len+2);
2292                                 if( !priv->rx_skb) goto drop;
2293 #ifdef DEBUG_RX_SKB
2294                                 DMESG("Alloc initial skb %x",len+2);
2295 #endif
2296                         }
2297
2298                         priv->rx_skb_complete=0;
2299                         priv->rx_skb->dev=dev;
2300                 }else{
2301                         /* if we are here we should  have already RXed
2302                         * the first frame.
2303                         * If we get here and the skb is not allocated then
2304                         * we have just throw out garbage (skb not allocated)
2305                         * and we are still rxing garbage....
2306                         */
2307                         if(!priv->rx_skb_complete){
2308
2309                                 tmp_skb= dev_alloc_skb(priv->rx_skb->len +len+2);
2310
2311                                 if(!tmp_skb) goto drop;
2312
2313                                 tmp_skb->dev=dev;
2314 #ifdef DEBUG_RX_SKB
2315                                 DMESG("Realloc skb %x",len+2);
2316 #endif
2317
2318 #ifdef DEBUG_RX_SKB
2319                                 DMESG("going copy prev frag %x",priv->rx_skb->len);
2320 #endif
2321                                 memcpy(skb_put(tmp_skb,priv->rx_skb->len),
2322                                         priv->rx_skb->data,
2323                                         priv->rx_skb->len);
2324 #ifdef DEBUG_RX_SKB
2325                                 DMESG("skb copy prev frag complete");
2326 #endif
2327
2328                                 dev_kfree_skb_any(priv->rx_skb);
2329 #ifdef DEBUG_RX_SKB
2330                                 DMESG("prev skb free ok");
2331 #endif
2332
2333                                 priv->rx_skb=tmp_skb;
2334                         }
2335                 }
2336 #ifdef DEBUG_RX_SKB
2337                 DMESG("going to copy current payload %x",len);
2338 #endif
2339                 if(!priv->rx_skb_complete) {
2340                         if(padding) {
2341                                 memcpy(skb_put(priv->rx_skb,len),
2342                                         (((unsigned char *)priv->rxbuffer->buf) + 2),len);
2343                         } else {
2344                                 memcpy(skb_put(priv->rx_skb,len),
2345                                         priv->rxbuffer->buf,len);
2346                         }
2347                 }
2348 #ifdef DEBUG_RX_SKB
2349                 DMESG("current fragment skb copy complete");
2350 #endif
2351
2352                 if(last && !priv->rx_skb_complete){
2353
2354 #ifdef DEBUG_RX_SKB
2355                         DMESG("Got last fragment");
2356 #endif
2357
2358                         if(priv->rx_skb->len > 4)
2359                                 skb_trim(priv->rx_skb,priv->rx_skb->len-4);
2360 #ifdef DEBUG_RX_SKB
2361                         DMESG("yanked out crc, passing to the upper layer");
2362 #endif
2363
2364 #ifndef RX_DONT_PASS_UL
2365                         if(!ieee80211_rx(priv->ieee80211,
2366                                          priv->rx_skb, &stats)){
2367 #ifdef DEBUG_RX
2368                                 DMESGW("Packet not consumed");
2369 #endif
2370 #endif // RX_DONT_PASS_UL
2371
2372                                 dev_kfree_skb_any(priv->rx_skb);
2373 #ifndef RX_DONT_PASS_UL
2374                         }
2375 #endif
2376 #ifdef DEBUG_RX
2377                         else{
2378                                         DMESG("Rcv frag");
2379                         }
2380 #endif
2381                         priv->rx_skb_complete=1;
2382                 }
2383
2384 #endif //DUMMY_RX
2385
2386                 pci_dma_sync_single_for_device(priv->pdev,
2387                                     priv->rxbuffer->dma,
2388                                     priv->rxbuffersize * \
2389                                     sizeof(u8),
2390                                     PCI_DMA_FROMDEVICE);
2391
2392
2393 drop: // this is used when we have not enought mem
2394
2395                 /* restore the descriptor */
2396                 *(priv->rxringtail+2)=priv->rxbuffer->dma;
2397                 *(priv->rxringtail)=*(priv->rxringtail) &~ 0xfff;
2398                 *(priv->rxringtail)=
2399                         *(priv->rxringtail) | priv->rxbuffersize;
2400
2401                 *(priv->rxringtail)=
2402                         *(priv->rxringtail) | (1<<31);
2403                         //^empty descriptor
2404
2405                         //wmb();
2406
2407 #ifdef DEBUG_RX
2408                 DMESG("Current descriptor: %x",(u32)priv->rxringtail);
2409 #endif
2410                 //unsigned long flags;
2411                 //spin_lock_irqsave(&priv->irq_lock,flags);
2412
2413                 priv->rxringtail+=rx_desc_size;
2414                 if(priv->rxringtail >=
2415                    (priv->rxring)+(priv->rxringcount )*rx_desc_size)
2416                         priv->rxringtail=priv->rxring;
2417
2418                 //spin_unlock_irqrestore(&priv->irq_lock,flags);
2419
2420
2421                 priv->rxbuffer=(priv->rxbuffer->next);
2422
2423         }
2424
2425
2426
2427 //      if(get_curr_tx_free_desc(dev,priority))
2428 //      ieee80211_sta_ps_sleep(priv->ieee80211, &tmp, &tmp2);
2429
2430
2431
2432 }
2433
2434
2435 void rtl8180_dma_kick(struct net_device *dev, int priority)
2436 {
2437         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2438
2439         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2440 /*
2441
2442         switch(priority){
2443
2444                 case LOW_PRIORITY:
2445
2446                 write_nic_byte(dev,TX_DMA_POLLING,
2447                        (1<< TX_DMA_POLLING_LOWPRIORITY_SHIFT) |
2448                                 priv->dma_poll_mask);
2449                 break;
2450
2451                 case NORM_PRIORITY:
2452
2453                 write_nic_byte(dev,TX_DMA_POLLING,
2454                        (1<< TX_DMA_POLLING_NORMPRIORITY_SHIFT) |
2455                                 priv->dma_poll_mask);
2456                 break;
2457
2458                 case HI_PRIORITY:
2459
2460                 write_nic_byte(dev,TX_DMA_POLLING,
2461                        (1<< TX_DMA_POLLING_HIPRIORITY_SHIFT) |
2462                                 priv->dma_poll_mask);
2463                 break;
2464
2465         }
2466 */
2467         write_nic_byte(dev, TX_DMA_POLLING,
2468                         (1 << (priority + 1)) | priv->dma_poll_mask);
2469         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2470
2471         force_pci_posting(dev);
2472 }
2473
2474 void rtl8180_data_hard_stop(struct net_device *dev)
2475 {
2476         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2477
2478         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2479         priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
2480         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2481         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2482 }
2483
2484
2485 void rtl8180_data_hard_resume(struct net_device *dev)
2486 {
2487         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2488
2489         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2490         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
2491         write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2492         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2493 }
2494
2495
2496 /* this function TX data frames when the ieee80211 stack requires this.
2497  * It checks also if we need to stop the ieee tx queue, eventually do it
2498  */
2499 void rtl8180_hard_data_xmit(struct sk_buff *skb,struct net_device *dev, int
2500 rate)
2501 {
2502         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2503         int mode;
2504         struct ieee80211_hdr_3addr  *h = (struct ieee80211_hdr_3addr  *) skb->data;
2505         short morefrag = (h->frame_ctl) & IEEE80211_FCTL_MOREFRAGS;
2506         unsigned long flags;
2507         int priority;
2508         //static int count = 0;
2509
2510         mode = priv->ieee80211->iw_mode;
2511
2512         rate = ieeerate2rtlrate(rate);
2513         /*
2514         * This function doesn't require lock because we make
2515         * sure it's called with the tx_lock already acquired.
2516         * this come from the kernel's hard_xmit callback (trought
2517         * the ieee stack, or from the try_wake_queue (again trought
2518         * the ieee stack.
2519         */
2520         priority = AC2Q(skb->priority);
2521         spin_lock_irqsave(&priv->tx_lock,flags);
2522
2523         if(priv->ieee80211->bHwRadioOff)
2524         {
2525                 spin_unlock_irqrestore(&priv->tx_lock,flags);
2526
2527                 return;
2528         }
2529
2530         //printk(KERN_WARNING "priority = %d@%d\n", priority, count++);
2531         if (!check_nic_enought_desc(dev, priority)){
2532                 //DMESG("Error: no descriptor left by previous TX (avail %d) ",
2533                 //      get_curr_tx_free_desc(dev, priority));
2534                 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
2535                         get_curr_tx_free_desc(dev, priority));
2536         //printk(KERN_WARNING "==============================================================> \n");
2537                 ieee80211_stop_queue(priv->ieee80211);
2538         }
2539         rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate);
2540         if (!check_nic_enought_desc(dev, priority))
2541                 ieee80211_stop_queue(priv->ieee80211);
2542
2543         //dev_kfree_skb_any(skb);
2544         spin_unlock_irqrestore(&priv->tx_lock,flags);
2545
2546 }
2547
2548 /* This is a rough attempt to TX a frame
2549  * This is called by the ieee 80211 stack to TX management frames.
2550  * If the ring is full packet are dropped (for data frame the queue
2551  * is stopped before this can happen). For this reason it is better
2552  * if the descriptors are larger than the largest management frame
2553  * we intend to TX: i'm unsure what the HW does if it will not found
2554  * the last fragment of a frame because it has been dropped...
2555  * Since queues for Management and Data frames are different we
2556  * might use a different lock than tx_lock (for example mgmt_tx_lock)
2557  */
2558 /* these function may loops if invoked with 0 descriptors or 0 len buffer*/
2559 int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
2560 {
2561         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2562
2563         unsigned long flags;
2564
2565         int priority;
2566
2567         priority = MANAGE_PRIORITY;
2568
2569         spin_lock_irqsave(&priv->tx_lock,flags);
2570
2571         if(priv->ieee80211->bHwRadioOff)
2572         {
2573                 spin_unlock_irqrestore(&priv->tx_lock,flags);
2574
2575                 dev_kfree_skb_any(skb);
2576                 return NETDEV_TX_OK;
2577         }
2578
2579         rtl8180_tx(dev, skb->data, skb->len, priority,
2580                 0, 0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
2581
2582         priv->ieee80211->stats.tx_bytes+=skb->len;
2583         priv->ieee80211->stats.tx_packets++;
2584         spin_unlock_irqrestore(&priv->tx_lock,flags);
2585
2586         dev_kfree_skb_any(skb);
2587         return NETDEV_TX_OK;
2588 }
2589
2590 // longpre 144+48 shortpre 72+24
2591 u16 rtl8180_len2duration(u32 len, short rate,short* ext)
2592 {
2593         u16 duration;
2594         u16 drift;
2595         *ext=0;
2596
2597         switch(rate){
2598         case 0://1mbps
2599                 *ext=0;
2600                 duration = ((len+4)<<4) /0x2;
2601                 drift = ((len+4)<<4) % 0x2;
2602                 if(drift ==0 ) break;
2603                 duration++;
2604                 break;
2605
2606         case 1://2mbps
2607                 *ext=0;
2608                 duration = ((len+4)<<4) /0x4;
2609                 drift = ((len+4)<<4) % 0x4;
2610                 if(drift ==0 ) break;
2611                 duration++;
2612                 break;
2613
2614         case 2: //5.5mbps
2615                 *ext=0;
2616                 duration = ((len+4)<<4) /0xb;
2617                 drift = ((len+4)<<4) % 0xb;
2618                 if(drift ==0 )
2619                         break;
2620                 duration++;
2621                 break;
2622
2623         default:
2624         case 3://11mbps
2625                 *ext=0;
2626                 duration = ((len+4)<<4) /0x16;
2627                 drift = ((len+4)<<4) % 0x16;
2628                 if(drift ==0 )
2629                         break;
2630                 duration++;
2631                 if(drift > 6)
2632                         break;
2633                 *ext=1;
2634                 break;
2635         }
2636
2637         return duration;
2638 }
2639
2640
2641 void rtl8180_prepare_beacon(struct net_device *dev)
2642 {
2643
2644         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2645
2646         struct sk_buff *skb;
2647
2648         u16 word  = read_nic_word(dev, BcnItv);
2649         word &= ~BcnItv_BcnItv; // clear Bcn_Itv
2650         word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);//0x64;
2651         write_nic_word(dev, BcnItv, word);
2652
2653
2654         skb = ieee80211_get_beacon(priv->ieee80211);
2655         if(skb){
2656                 rtl8180_tx(dev,skb->data,skb->len,BEACON_PRIORITY,
2657                         0,0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
2658                 dev_kfree_skb_any(skb);
2659         }
2660 }
2661
2662 /* This function do the real dirty work: it enqueues a TX command
2663  * descriptor in the ring buffer, copyes the frame in a TX buffer
2664  * and kicks the NIC to ensure it does the DMA transfer.
2665  */
2666 short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
2667                  short morefrag, short descfrag, int rate)
2668 {
2669         struct r8180_priv *priv = ieee80211_priv(dev);
2670         u32 *tail,*temp_tail;
2671         u32 *begin;
2672         u32 *buf;
2673         int i;
2674         int remain;
2675         int buflen;
2676         int count;
2677         //u16   AckCtsTime;
2678         //u16   FrameTime;
2679         u16 duration;
2680         short ext;
2681         struct buffer* buflist;
2682         //unsigned long flags;
2683         struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
2684         u8 dest[ETH_ALEN];
2685         u8                      bUseShortPreamble = 0;
2686         u8                      bCTSEnable = 0;
2687         u8                      bRTSEnable = 0;
2688         //u16                   RTSRate = 22;
2689         //u8                    RetryLimit = 0;
2690         u16                     Duration = 0;
2691         u16                     RtsDur = 0;
2692         u16                     ThisFrameTime = 0;
2693         u16                     TxDescDuration = 0;
2694         u8                      ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14
2695
2696         switch(priority) {
2697         case MANAGE_PRIORITY:
2698                 tail=priv->txmapringtail;
2699                 begin=priv->txmapring;
2700                 buflist = priv->txmapbufstail;
2701                 count = priv->txringcount;
2702                 break;
2703
2704         case BK_PRIORITY:
2705                 tail=priv->txbkpringtail;
2706                 begin=priv->txbkpring;
2707                 buflist = priv->txbkpbufstail;
2708                 count = priv->txringcount;
2709                 break;
2710
2711         case BE_PRIORITY:
2712                 tail=priv->txbepringtail;
2713                 begin=priv->txbepring;
2714                 buflist = priv->txbepbufstail;
2715                 count = priv->txringcount;
2716                 break;
2717
2718         case VI_PRIORITY:
2719                 tail=priv->txvipringtail;
2720                 begin=priv->txvipring;
2721                 buflist = priv->txvipbufstail;
2722                 count = priv->txringcount;
2723                 break;
2724
2725         case VO_PRIORITY:
2726                 tail=priv->txvopringtail;
2727                 begin=priv->txvopring;
2728                 buflist = priv->txvopbufstail;
2729                 count = priv->txringcount;
2730                 break;
2731
2732         case HI_PRIORITY:
2733                 tail=priv->txhpringtail;
2734                 begin=priv->txhpring;
2735                 buflist = priv->txhpbufstail;
2736                 count = priv->txringcount;
2737                 break;
2738
2739         case BEACON_PRIORITY:
2740                 tail=priv->txbeaconringtail;
2741                 begin=priv->txbeaconring;
2742                 buflist = priv->txbeaconbufstail;
2743                 count = priv->txbeaconcount;
2744                 break;
2745
2746         default:
2747                 return -1;
2748                 break;
2749         }
2750
2751         //printk("in rtl8180_tx(): rate is %d\n",priv->ieee80211->rate);
2752 #if 1
2753                 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
2754                 if (is_multicast_ether_addr(dest) ||
2755                                 is_broadcast_ether_addr(dest))
2756                 {
2757                         Duration = 0;
2758                         RtsDur = 0;
2759                         bRTSEnable = 0;
2760                         bCTSEnable = 0;
2761
2762                         ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
2763                         TxDescDuration = ThisFrameTime;
2764                 } else {// Unicast packet
2765                         //u8 AckRate;
2766                         u16 AckTime;
2767
2768                         //YJ,add,080828,for Keep alive
2769                         priv->NumTxUnicast++;
2770
2771                         // Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko.
2772                         //AckRate = ComputeAckRate( pMgntInfo->mBrates, (u1Byte)(pTcb->DataRate) );
2773                         // Figure out ACK time according to the AckRate and assume long preamble is used on receiver, 2006.03.08, by rcnjko.
2774                         //AckTime = ComputeTxTime( sAckCtsLng/8, AckRate, FALSE, FALSE);
2775                         //For simplicity, just use the 1M basic rate
2776                         //AckTime = ComputeTxTime(14, 540,0, 0);        // AckCTSLng = 14 use 1M bps send
2777                         AckTime = ComputeTxTime(14, 10,0, 0);   // AckCTSLng = 14 use 1M bps send
2778                         //AckTime = ComputeTxTime(14, 2,false, false);  // AckCTSLng = 14 use 1M bps send
2779
2780                         if ( ((len + sCrcLng) > priv->rts) && priv->rts )
2781                         { // RTS/CTS.
2782                                 u16 RtsTime, CtsTime;
2783                                 //u16 CtsRate;
2784                                 bRTSEnable = 1;
2785                                 bCTSEnable = 0;
2786
2787                                 // Rate and time required for RTS.
2788                                 RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, 0, 0);
2789                                 // Rate and time required for CTS.
2790                                 CtsTime = ComputeTxTime(14, 10,0, 0);   // AckCTSLng = 14 use 1M bps send
2791
2792                                 // Figure out time required to transmit this frame.
2793                                 ThisFrameTime = ComputeTxTime(len + sCrcLng,
2794                                                 rtl8180_rate2rate(rate),
2795                                                 0,
2796                                                 bUseShortPreamble);
2797
2798                                 // RTS-CTS-ThisFrame-ACK.
2799                                 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
2800
2801                                 TxDescDuration = RtsTime + RtsDur;
2802                         }
2803                         else {// Normal case.
2804                                 bCTSEnable = 0;
2805                                 bRTSEnable = 0;
2806                                 RtsDur = 0;
2807
2808                                 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
2809                                 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
2810                         }
2811
2812                         if(!(frag_hdr->frame_ctl & IEEE80211_FCTL_MOREFRAGS)) { //no more fragment
2813                                 // ThisFrame-ACK.
2814                                 Duration = aSifsTime + AckTime;
2815                         } else { // One or more fragments remained.
2816                                 u16 NextFragTime;
2817                                 NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet
2818                                                 rtl8180_rate2rate(rate),
2819                                                 0,
2820                                                 bUseShortPreamble );
2821
2822                                 //ThisFrag-ACk-NextFrag-ACK.
2823                                 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
2824                         }
2825
2826                 } // End of Unicast packet
2827
2828                 frag_hdr->duration_id = Duration;
2829 #endif
2830
2831         buflen=priv->txbuffsize;
2832         remain=len;
2833         temp_tail = tail;
2834 //printk("================================>buflen = %d, remain = %d!\n", buflen,remain);
2835         while(remain!=0){
2836 #ifdef DEBUG_TX_FRAG
2837                 DMESG("TX iteration");
2838 #endif
2839 #ifdef DEBUG_TX
2840                 DMESG("TX: filling descriptor %x",(u32)tail);
2841 #endif
2842                 mb();
2843                 if(!buflist){
2844                         DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
2845                         //spin_unlock_irqrestore(&priv->tx_lock,flags);
2846                         return -1;
2847                 }
2848                 buf=buflist->buf;
2849
2850                 if( (*tail & (1<<31)) && (priority != BEACON_PRIORITY)){
2851
2852                                 DMESGW("No more TX desc, returning %x of %x",
2853                                 remain,len);
2854                                 priv->stats.txrdu++;
2855 #ifdef DEBUG_TX_DESC
2856                                 check_tx_ring(dev,priority);
2857                         //      netif_stop_queue(dev);
2858                         //      netif_carrier_off(dev);
2859 #endif
2860                         //      spin_unlock_irqrestore(&priv->tx_lock,flags);
2861
2862                         return remain;
2863
2864                 }
2865
2866                 *tail= 0; // zeroes header
2867                 *(tail+1) = 0;
2868                 *(tail+3) = 0;
2869                 *(tail+5) = 0;
2870                 *(tail+6) = 0;
2871                 *(tail+7) = 0;
2872
2873                 if(priv->card_8185){
2874                         //FIXME: this should be triggered by HW encryption parameters.
2875                         *tail |= (1<<15); //no encrypt
2876 //                      *tail |= (1<<30); //raise int when completed
2877                 }
2878         //      *tail = *tail | (1<<16);
2879                 if(remain==len && !descfrag) {
2880                         ownbit_flag = false;    //added by david woo,2007.12.14
2881 #ifdef DEBUG_TX_FRAG
2882                         DMESG("First descriptor");
2883 #endif
2884                         *tail = *tail| (1<<29) ; //fist segment of the packet
2885                         *tail = *tail |(len);
2886                 } else {
2887                         ownbit_flag = true;
2888                 }
2889
2890                 for(i=0;i<buflen&& remain >0;i++,remain--){
2891                         ((u8*)buf)[i]=txbuf[i]; //copy data into descriptor pointed DMAble buffer
2892                         if(remain == 4 && i+4 >= buflen) break;
2893                         /* ensure the last desc has at least 4 bytes payload */
2894
2895                 }
2896                 txbuf = txbuf + i;
2897                 *(tail+3)=*(tail+3) &~ 0xfff;
2898                 *(tail+3)=*(tail+3) | i; // buffer lenght
2899                 // Use short preamble or not
2900                 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
2901                         if (priv->plcp_preamble_mode==1 && rate!=0)     //  short mode now, not long!
2902                         //      *tail |= (1<<16);                               // enable short preamble mode.
2903
2904                 if(bCTSEnable) {
2905                         *tail |= (1<<18);
2906                 }
2907
2908                 if(bRTSEnable) //rts enable
2909                 {
2910                         *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE
2911                         *tail |= (1<<23);//rts enable
2912                         *(tail+1) |=(RtsDur&0xffff);//RTS Duration
2913                 }
2914                 *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION
2915 //              *(tail+3) |= (0xe6<<16);
2916                 *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ;
2917
2918                 *tail = *tail | ((rate&0xf) << 24);
2919                 //DMESG("rate %d",rate);
2920
2921                 if(priv->card_8185){
2922            //           *(tail+5) = 0;
2923                 }
2924
2925                 /* hw_plcp_len is not used for rtl8180 chip */
2926                 /* FIXME */
2927                 if(priv->card_8185 == 0 || !priv->hw_plcp_len){
2928
2929                         duration = rtl8180_len2duration(len,
2930                                 rate,&ext);
2931
2932
2933 #ifdef DEBUG_TX
2934                         DMESG("PLCP duration %d",duration );
2935                         //DMESG("drift %d",drift);
2936                         DMESG("extension %s", (ext==1) ? "on":"off");
2937 #endif
2938                         *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
2939                         if(ext) *(tail+1) = *(tail+1) |(1<<31); //plcp length extension
2940                 }
2941
2942                 if(morefrag) *tail = (*tail) | (1<<17); // more fragment
2943                 if(!remain) *tail = (*tail) | (1<<28); // last segment of frame
2944
2945 #ifdef DEBUG_TX_FRAG
2946                 if(!remain)DMESG("Last descriptor");
2947                 if(morefrag)DMESG("More frag");
2948 #endif
2949                *(tail+5) = *(tail+5)|(2<<27);
2950                 *(tail+7) = *(tail+7)|(1<<4);
2951
2952                 wmb();
2953                 if(ownbit_flag)
2954                 {
2955                         *tail = *tail | (1<<31); // descriptor ready to be txed
2956                 }
2957
2958 #ifdef DEBUG_TX_DESC2
2959                 printk("tx desc is:\n");
2960                 DMESG("%8x %8x %8x %8x %8x %8x %8x %8x", tail[0], tail[1], tail[2], tail[3],
2961                         tail[4], tail[5], tail[6], tail[7]);
2962 #endif
2963
2964                 if((tail - begin)/8 == count-1)
2965                         tail=begin;
2966
2967                 else
2968                         tail=tail+8;
2969
2970                 buflist=buflist->next;
2971
2972                 mb();
2973
2974                 switch(priority) {
2975                         case MANAGE_PRIORITY:
2976                                 priv->txmapringtail=tail;
2977                                 priv->txmapbufstail=buflist;
2978                                 break;
2979
2980                         case BK_PRIORITY:
2981                                 priv->txbkpringtail=tail;
2982                                 priv->txbkpbufstail=buflist;
2983                                 break;
2984
2985                         case BE_PRIORITY:
2986                                 priv->txbepringtail=tail;
2987                                 priv->txbepbufstail=buflist;
2988                                 break;
2989
2990                         case VI_PRIORITY:
2991                                 priv->txvipringtail=tail;
2992                                 priv->txvipbufstail=buflist;
2993                                 break;
2994
2995                         case VO_PRIORITY:
2996                                 priv->txvopringtail=tail;
2997                                 priv->txvopbufstail=buflist;
2998                                 break;
2999
3000                         case HI_PRIORITY:
3001                                 priv->txhpringtail=tail;
3002                                 priv->txhpbufstail = buflist;
3003                                 break;
3004
3005                         case BEACON_PRIORITY:
3006                                 /* the HW seems to be happy with the 1st
3007                                  * descriptor filled and the 2nd empty...
3008                                  * So always update descriptor 1 and never
3009                                  * touch 2nd
3010                                  */
3011                         //      priv->txbeaconringtail=tail;
3012                         //      priv->txbeaconbufstail=buflist;
3013
3014                                 break;
3015
3016                 }
3017
3018                 //rtl8180_dma_kick(dev,priority);
3019         }
3020         *temp_tail = *temp_tail | (1<<31); // descriptor ready to be txed
3021         rtl8180_dma_kick(dev,priority);
3022         //spin_unlock_irqrestore(&priv->tx_lock,flags);
3023
3024         return 0;
3025
3026 }
3027
3028
3029 void rtl8180_irq_rx_tasklet(struct r8180_priv * priv);
3030
3031
3032 void rtl8180_link_change(struct net_device *dev)
3033 {
3034         struct r8180_priv *priv = ieee80211_priv(dev);
3035         u16 beacon_interval;
3036
3037         struct ieee80211_network *net = &priv->ieee80211->current_network;
3038 //      rtl8180_adapter_start(dev);
3039         rtl8180_update_msr(dev);
3040
3041
3042         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
3043
3044         write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]);
3045         write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]);
3046
3047
3048         beacon_interval  = read_nic_dword(dev,BEACON_INTERVAL);
3049         beacon_interval &= ~ BEACON_INTERVAL_MASK;
3050         beacon_interval |= net->beacon_interval;
3051         write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
3052
3053         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3054
3055
3056         /*
3057         u16 atim = read_nic_dword(dev,ATIM);
3058         u16 = u16 &~ ATIM_MASK;
3059         u16 = u16 | beacon->atim;
3060         */
3061
3062         if(priv->card_8185)
3063                 rtl8180_set_chan(dev, priv->chan);
3064
3065
3066 }
3067
3068 void rtl8180_rq_tx_ack(struct net_device *dev){
3069
3070         struct r8180_priv *priv = ieee80211_priv(dev);
3071 //      printk("====================>%s\n",__func__);
3072         write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)|CONFIG4_PWRMGT);
3073         priv->ack_tx_to_ieee = 1;
3074 }
3075
3076 short rtl8180_is_tx_queue_empty(struct net_device *dev){
3077
3078         struct r8180_priv *priv = ieee80211_priv(dev);
3079         u32* d;
3080
3081         for (d = priv->txmapring;
3082                 d < priv->txmapring + priv->txringcount;d+=8)
3083                         if(*d & (1<<31)) return 0;
3084
3085         for (d = priv->txbkpring;
3086                 d < priv->txbkpring + priv->txringcount;d+=8)
3087                         if(*d & (1<<31)) return 0;
3088
3089         for (d = priv->txbepring;
3090                 d < priv->txbepring + priv->txringcount;d+=8)
3091                         if(*d & (1<<31)) return 0;
3092
3093         for (d = priv->txvipring;
3094                 d < priv->txvipring + priv->txringcount;d+=8)
3095                         if(*d & (1<<31)) return 0;
3096
3097         for (d = priv->txvopring;
3098                 d < priv->txvopring + priv->txringcount;d+=8)
3099                         if(*d & (1<<31)) return 0;
3100
3101         for (d = priv->txhpring;
3102                 d < priv->txhpring + priv->txringcount;d+=8)
3103                         if(*d & (1<<31)) return 0;
3104         return 1;
3105 }
3106 /* FIXME FIXME 5msecs is random */
3107 #define HW_WAKE_DELAY 5
3108
3109 void rtl8180_hw_wakeup(struct net_device *dev)
3110 {
3111         unsigned long flags;
3112
3113         struct r8180_priv *priv = ieee80211_priv(dev);
3114
3115         spin_lock_irqsave(&priv->ps_lock,flags);
3116         //DMESG("Waken up!");
3117         write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)&~CONFIG4_PWRMGT);
3118
3119         if(priv->rf_wakeup)
3120                 priv->rf_wakeup(dev);
3121 //      mdelay(HW_WAKE_DELAY);
3122         spin_unlock_irqrestore(&priv->ps_lock,flags);
3123 }
3124
3125 void rtl8180_hw_sleep_down(struct net_device *dev)
3126 {
3127         unsigned long flags;
3128
3129         struct r8180_priv *priv = ieee80211_priv(dev);
3130
3131         spin_lock_irqsave(&priv->ps_lock,flags);
3132        //DMESG("Sleep!");
3133
3134         if(priv->rf_sleep)
3135                 priv->rf_sleep(dev);
3136         spin_unlock_irqrestore(&priv->ps_lock,flags);
3137 }
3138
3139
3140 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
3141 {
3142
3143         struct r8180_priv *priv = ieee80211_priv(dev);
3144
3145         u32 rb = jiffies;
3146         unsigned long flags;
3147
3148         spin_lock_irqsave(&priv->ps_lock,flags);
3149
3150         /* Writing HW register with 0 equals to disable
3151          * the timer, that is not really what we want
3152          */
3153         tl -= MSECS(4+16+7);
3154
3155         //if(tl == 0) tl = 1;
3156
3157         /* FIXME HACK FIXME HACK */
3158 //      force_pci_posting(dev);
3159         //mdelay(1);
3160
3161 //      rb = read_nic_dword(dev, TSFTR);
3162
3163         /* If the interval in witch we are requested to sleep is too
3164          * short then give up and remain awake
3165          */
3166         if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3167                 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3168                 spin_unlock_irqrestore(&priv->ps_lock,flags);
3169                 printk("too short to sleep\n");
3170                 return;
3171         }
3172
3173 //      write_nic_dword(dev, TimerInt, tl);
3174 //      rb = read_nic_dword(dev, TSFTR);
3175         {
3176                 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3177         //      if (tl<rb)
3178
3179                 //lzm,add,080828
3180                 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
3181
3182                 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
3183         }
3184         /* if we suspect the TimerInt is gone beyond tl
3185          * while setting it, then give up
3186          */
3187 #if 1
3188         if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3189                 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3190                 spin_unlock_irqrestore(&priv->ps_lock,flags);
3191                 return;
3192         }
3193 #endif
3194 //      if(priv->rf_sleep)
3195 //              priv->rf_sleep(dev);
3196
3197         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
3198         spin_unlock_irqrestore(&priv->ps_lock,flags);
3199 }
3200
3201
3202 //void rtl8180_wmm_param_update(struct net_device *dev,u8 *ac_param)
3203 void rtl8180_wmm_param_update(struct work_struct * work)
3204 {
3205         struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq);
3206         //struct r8180_priv *priv = (struct r8180_priv*)(ieee->priv);
3207         struct net_device *dev = ieee->dev;
3208         u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
3209         u8 mode = ieee->current_network.mode;
3210         AC_CODING       eACI;
3211         AC_PARAM        AcParam;
3212         PAC_PARAM       pAcParam;
3213         u8 i;
3214
3215         if(!ieee->current_network.QoS_Enable){
3216                 //legacy ac_xx_param update
3217                 AcParam.longData = 0;
3218                 AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
3219                 AcParam.f.AciAifsn.f.ACM = 0;
3220                 AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin.
3221                 AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax.
3222                 AcParam.f.TXOPLimit = 0;
3223                 for(eACI = 0; eACI < AC_MAX; eACI++){
3224                         AcParam.f.AciAifsn.f.ACI = (u8)eACI;
3225                         {
3226                                 u8              u1bAIFS;
3227                                 u32             u4bAcParam;
3228                                 pAcParam = (PAC_PARAM)(&AcParam);
3229                                 // Retrive paramters to udpate.
3230                                 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3231                                 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
3232                                               (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
3233                                               (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
3234                                                (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3235                                 switch(eACI){
3236                                         case AC1_BK:
3237                                                 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3238                                                 break;
3239
3240                                         case AC0_BE:
3241                                                 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3242                                                 break;
3243
3244                                         case AC2_VI:
3245                                                 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3246                                                 break;
3247
3248                                         case AC3_VO:
3249                                                 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3250                                                 break;
3251
3252                                         default:
3253                                                 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
3254                                                 break;
3255                                 }
3256                         }
3257                 }
3258                 return;
3259         }
3260
3261         for(i = 0; i < AC_MAX; i++){
3262                 //AcParam.longData = 0;
3263                 pAcParam = (AC_PARAM * )ac_param;
3264                 {
3265                         AC_CODING       eACI;
3266                         u8              u1bAIFS;
3267                         u32             u4bAcParam;
3268
3269                         // Retrive paramters to udpate.
3270                         eACI = pAcParam->f.AciAifsn.f.ACI;
3271                         //Mode G/A: slotTimeTimer = 9; Mode B: 20
3272                         u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3273                         u4bAcParam = (  (((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)  |
3274                                         (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)  |
3275                                         (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)  |
3276                                         (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3277
3278                         switch(eACI){
3279                                 case AC1_BK:
3280                                         write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3281                                         break;
3282
3283                                 case AC0_BE:
3284                                         write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3285                                         break;
3286
3287                                 case AC2_VI:
3288                                         write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3289                                         break;
3290
3291                                 case AC3_VO:
3292                                         write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3293                                         break;
3294
3295                                 default:
3296                                         printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
3297                                         break;
3298                         }
3299                 }
3300                 ac_param += (sizeof(AC_PARAM));
3301         }
3302 }
3303
3304 void rtl8180_tx_irq_wq(struct work_struct *work);
3305 void rtl8180_restart_wq(struct work_struct *work);
3306 //void rtl8180_rq_tx_ack(struct work_struct *work);
3307 void rtl8180_watch_dog_wq(struct work_struct *work);
3308 void rtl8180_hw_wakeup_wq(struct work_struct *work);
3309 void rtl8180_hw_sleep_wq(struct work_struct *work);
3310 void rtl8180_sw_antenna_wq(struct work_struct *work);
3311 void rtl8180_watch_dog(struct net_device *dev);
3312
3313 void watch_dog_adaptive(unsigned long data)
3314 {
3315     struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
3316 //      DMESG("---->watch_dog_adaptive()\n");
3317         if(!priv->up)
3318         {
3319                 DMESG("<----watch_dog_adaptive():driver is not up!\n");
3320                 return;
3321         }
3322
3323   //      queue_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq);
3324 //{by amy 080312
3325 #if 1
3326         // Tx High Power Mechanism.
3327 #ifdef HIGH_POWER
3328         if(CheckHighPower((struct net_device *)data))
3329         {
3330                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
3331         }
3332 #endif
3333
3334         // Tx Power Tracking on 87SE.
3335 #ifdef TX_TRACK
3336         //if( priv->bTxPowerTrack )     //lzm mod 080826
3337         if( CheckTxPwrTracking((struct net_device *)data));
3338                 TxPwrTracking87SE((struct net_device *)data);
3339 #endif
3340
3341         // Perform DIG immediately.
3342 #ifdef SW_DIG
3343         if(CheckDig((struct net_device *)data) == true)
3344         {
3345                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
3346         }
3347 #endif
3348 #endif
3349 //by amy 080312}
3350         rtl8180_watch_dog((struct net_device *)data);
3351
3352
3353         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
3354
3355         priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
3356         add_timer(&priv->watch_dog_timer);
3357 //        DMESG("<----watch_dog_adaptive()\n");
3358 }
3359
3360
3361 static CHANNEL_LIST ChannelPlan[] = {
3362         {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},                 //FCC
3363         {{1,2,3,4,5,6,7,8,9,10,11},11},                                                 //IC
3364         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //ETSI
3365         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},    //Spain. Change to ETSI.
3366         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //France. Change to ETSI.
3367         {{14,36,40,44,48,52,56,60,64},9},                                               //MKK
3368         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1
3369         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //Israel.
3370         {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17},                       // For 11a , TELEC
3371         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},  //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
3372         {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826
3373 };
3374
3375 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
3376 {
3377         int i;
3378
3379         //lzm add 080826
3380         ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1;
3381         ieee->IbssStartChnl=0;
3382
3383         switch (channel_plan)
3384         {
3385                 case COUNTRY_CODE_FCC:
3386                 case COUNTRY_CODE_IC:
3387                 case COUNTRY_CODE_ETSI:
3388                 case COUNTRY_CODE_SPAIN:
3389                 case COUNTRY_CODE_FRANCE:
3390                 case COUNTRY_CODE_MKK:
3391                 case COUNTRY_CODE_MKK1:
3392                 case COUNTRY_CODE_ISRAEL:
3393                 case COUNTRY_CODE_TELEC:
3394                 {
3395                         Dot11d_Init(ieee);
3396                         ieee->bGlobalDomain = false;
3397                         if (ChannelPlan[channel_plan].Len != 0){
3398                                 // Clear old channel map
3399                                 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
3400                                 // Set new channel map
3401                                 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
3402                                 {
3403                                         if(ChannelPlan[channel_plan].Channel[i] <= 14)
3404                                                 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
3405                                 }
3406                         }
3407                         break;
3408                 }
3409                 case COUNTRY_CODE_GLOBAL_DOMAIN:
3410                 {
3411                         GET_DOT11D_INFO(ieee)->bEnabled = 0;
3412                         Dot11d_Reset(ieee);
3413                         ieee->bGlobalDomain = true;
3414                         break;
3415                 }
3416                 case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 080826
3417                 {
3418                 ieee->MinPassiveChnlNum=12;
3419                 ieee->IbssStartChnl= 10;
3420                 break;
3421                 }
3422                 default:
3423                 {
3424                         Dot11d_Init(ieee);
3425                         ieee->bGlobalDomain = false;
3426                         memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
3427                         for (i=1;i<=14;i++)
3428                         {
3429                                 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
3430                         }
3431                         break;
3432                 }
3433         }
3434 }
3435
3436 //Add for RF power on power off by lizhaoming 080512
3437 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
3438
3439 //YJ,add,080828
3440 static void rtl8180_statistics_init(struct Stats *pstats)
3441 {
3442         memset(pstats, 0, sizeof(struct Stats));
3443 }
3444 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
3445 {
3446         memset(plink_detect, 0, sizeof(link_detect_t));
3447         plink_detect->SlotNum = DEFAULT_SLOT_NUM;
3448 }
3449 //YJ,add,080828,end
3450
3451 short rtl8180_init(struct net_device *dev)
3452 {
3453         struct r8180_priv *priv = ieee80211_priv(dev);
3454         u16 word;
3455         u16 version;
3456         u8 hw_version;
3457         //u8 config3;
3458         u32 usValue;
3459         u16 tmpu16;
3460         int i, j;
3461
3462         priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF;
3463         if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
3464                 printk("rtl8180_init:Error channel plan! Set to default.\n");
3465                 priv->channel_plan = 0;
3466         }
3467         //priv->channel_plan = 9;  //Global Domain
3468
3469         DMESG("Channel plan is %d\n",priv->channel_plan);
3470         rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
3471
3472         //memcpy(priv->stats,0,sizeof(struct Stats));
3473
3474         //FIXME: these constants are placed in a bad pleace.
3475         priv->txbuffsize = 2048;//1024;
3476         priv->txringcount = 32;//32;
3477         priv->rxbuffersize = 2048;//1024;
3478         priv->rxringcount = 64;//32;
3479         priv->txbeaconcount = 2;
3480         priv->rx_skb_complete = 1;
3481         //priv->txnp_pending.ispending=0;
3482         /* ^^ the SKB does not containt a partial RXed
3483          * packet (is empty)
3484          */
3485
3486         priv->RegThreeWireMode = HW_THREE_WIRE_SI;
3487
3488 //Add for RF power on power off by lizhaoming 080512
3489         priv->RFChangeInProgress = false;
3490         priv->SetRFPowerStateInProgress = false;
3491         priv->RFProgType = 0;
3492         priv->bInHctTest = false;
3493
3494         priv->irq_enabled=0;
3495
3496 //YJ,modified,080828
3497         rtl8180_statistics_init(&priv->stats);
3498         rtl8180_link_detect_init(&priv->link_detect);
3499 //YJ,modified,080828,end
3500
3501
3502         priv->ack_tx_to_ieee = 0;
3503         priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
3504         priv->ieee80211->iw_mode = IW_MODE_INFRA;
3505         priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN |
3506                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
3507                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
3508         priv->ieee80211->active_scan = 1;
3509         priv->ieee80211->rate = 110; //11 mbps
3510         priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
3511         priv->ieee80211->host_encrypt = 1;
3512         priv->ieee80211->host_decrypt = 1;
3513         priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
3514         priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
3515         priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
3516         priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
3517
3518         priv->hw_wep = hwwep;
3519         priv->prism_hdr=0;
3520         priv->dev=dev;
3521         priv->retry_rts = DEFAULT_RETRY_RTS;
3522         priv->retry_data = DEFAULT_RETRY_DATA;
3523         priv->RFChangeInProgress = false;
3524         priv->SetRFPowerStateInProgress = false;
3525         priv->RFProgType = 0;
3526         priv->bInHctTest = false;
3527         priv->bInactivePs = true;//false;
3528         priv->ieee80211->bInactivePs = priv->bInactivePs;
3529         priv->bSwRfProcessing = false;
3530         priv->eRFPowerState = eRfOff;
3531         priv->RfOffReason = 0;
3532         priv->LedStrategy = SW_LED_MODE0;
3533         //priv->NumRxOkInPeriod = 0;  //YJ,del,080828
3534         //priv->NumTxOkInPeriod = 0;  //YJ,del,080828
3535         priv->TxPollingTimes = 0;//lzm add 080826
3536         priv->bLeisurePs = true;
3537         priv->dot11PowerSaveMode = eActive;
3538 //by amy for antenna
3539         priv->AdMinCheckPeriod = 5;
3540         priv->AdMaxCheckPeriod = 10;
3541 // Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312
3542         priv->AdMaxRxSsThreshold = 30;//60->30
3543         priv->AdRxSsThreshold = 20;//50->20
3544         priv->AdCheckPeriod = priv->AdMinCheckPeriod;
3545         priv->AdTickCount = 0;
3546         priv->AdRxSignalStrength = -1;
3547         priv->RegSwAntennaDiversityMechanism = 0;
3548         priv->RegDefaultAntenna = 0;
3549         priv->SignalStrength = 0;
3550         priv->AdRxOkCnt = 0;
3551         priv->CurrAntennaIndex = 0;
3552         priv->AdRxSsBeforeSwitched = 0;
3553         init_timer(&priv->SwAntennaDiversityTimer);
3554         priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
3555         priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
3556 //by amy for antenna
3557 //{by amy 080312
3558         priv->bDigMechanism = 1;
3559         priv->InitialGain = 6;
3560         priv->bXtalCalibration = false;
3561         priv->XtalCal_Xin = 0;
3562         priv->XtalCal_Xout = 0;
3563         priv->bTxPowerTrack = false;
3564         priv->ThermalMeter = 0;
3565         priv->FalseAlarmRegValue = 0;
3566         priv->RegDigOfdmFaUpTh = 0xc; // Upper threhold of OFDM false alarm, which is used in DIG.
3567         priv->DIG_NumberFallbackVote = 0;
3568         priv->DIG_NumberUpgradeVote = 0;
3569         priv->LastSignalStrengthInPercent = 0;
3570         priv->Stats_SignalStrength = 0;
3571         priv->LastRxPktAntenna = 0;
3572         priv->SignalQuality = 0; // in 0-100 index.
3573         priv->Stats_SignalQuality = 0;
3574         priv->RecvSignalPower = 0; // in dBm.
3575         priv->Stats_RecvSignalPower = 0;
3576         priv->AdMainAntennaRxOkCnt = 0;
3577         priv->AdAuxAntennaRxOkCnt = 0;
3578         priv->bHWAdSwitched = false;
3579         priv->bRegHighPowerMechanism = true;
3580         priv->RegHiPwrUpperTh = 77;
3581         priv->RegHiPwrLowerTh = 75;
3582         priv->RegRSSIHiPwrUpperTh = 70;
3583         priv->RegRSSIHiPwrLowerTh = 20;
3584         priv->bCurCCKPkt = false;
3585         priv->UndecoratedSmoothedSS = -1;
3586         priv->bToUpdateTxPwr = false;
3587         priv->CurCCKRSSI = 0;
3588         priv->RxPower = 0;
3589         priv->RSSI = 0;
3590         //YJ,add,080828
3591         priv->NumTxOkTotal = 0;
3592         priv->NumTxUnicast = 0;
3593         priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
3594         priv->PowerProfile = POWER_PROFILE_AC;
3595         //YJ,add,080828,end
3596 //by amy for rate adaptive
3597     priv->CurrRetryCnt=0;
3598     priv->LastRetryCnt=0;
3599     priv->LastTxokCnt=0;
3600     priv->LastRxokCnt=0;
3601     priv->LastRetryRate=0;
3602     priv->bTryuping=0;
3603     priv->CurrTxRate=0;
3604     priv->CurrRetryRate=0;
3605     priv->TryupingCount=0;
3606     priv->TryupingCountNoData=0;
3607     priv->TryDownCountLowData=0;
3608     priv->LastTxOKBytes=0;
3609     priv->LastFailTxRate=0;
3610     priv->LastFailTxRateSS=0;
3611     priv->FailTxRateCount=0;
3612     priv->LastTxThroughput=0;
3613     priv->NumTxOkBytesTotal=0;
3614         priv->ForcedDataRate = 0;
3615         priv->RegBModeGainStage = 1;
3616
3617 //by amy for rate adaptive
3618 //by amy 080312}
3619         priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
3620         spin_lock_init(&priv->irq_lock);
3621         spin_lock_init(&priv->irq_th_lock);
3622         spin_lock_init(&priv->tx_lock);
3623         spin_lock_init(&priv->ps_lock);
3624         spin_lock_init(&priv->rf_ps_lock);
3625         sema_init(&priv->wx_sem,1);
3626         sema_init(&priv->rf_state,1);
3627         INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq);
3628         INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq);
3629         INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq);
3630         INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq);
3631         //INIT_DELAYED_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq);
3632         //INIT_DELAYED_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq);
3633         INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update);
3634         INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);//+by amy 080312
3635         INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);//+by amy 080312
3636         INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);//+by amy 080312
3637
3638         //add for RF power on power off by lizhaoming 080512
3639         INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack);
3640         //INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
3641
3642         tasklet_init(&priv->irq_rx_tasklet,
3643                      (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
3644                      (unsigned long)priv);
3645 //by amy
3646     init_timer(&priv->watch_dog_timer);
3647         priv->watch_dog_timer.data = (unsigned long)dev;
3648         priv->watch_dog_timer.function = watch_dog_adaptive;
3649 //by amy
3650
3651 //{by amy 080312
3652 //by amy for rate adaptive
3653     init_timer(&priv->rateadapter_timer);
3654         priv->rateadapter_timer.data = (unsigned long)dev;
3655         priv->rateadapter_timer.function = timer_rate_adaptive;
3656                 priv->RateAdaptivePeriod= RATE_ADAPTIVE_TIMER_PERIOD;
3657                 priv->bEnhanceTxPwr=false;
3658 //by amy for rate adaptive
3659 //by amy 080312}
3660         //priv->ieee80211->func =
3661         //      kmalloc(sizeof(struct ieee80211_helper_functions),GFP_KERNEL);
3662         //memset(priv->ieee80211->func, 0,
3663           //     sizeof(struct ieee80211_helper_functions));
3664
3665         priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
3666         priv->ieee80211->set_chan = rtl8180_set_chan;
3667         priv->ieee80211->link_change = rtl8180_link_change;
3668         priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
3669         priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
3670         priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
3671
3672         priv->ieee80211->init_wmmparam_flag = 0;
3673
3674         priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
3675         priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
3676         priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
3677
3678         priv->MWIEnable = 0;
3679
3680         priv->ShortRetryLimit = 7;
3681         priv->LongRetryLimit = 7;
3682         priv->EarlyRxThreshold = 7;
3683
3684         priv->CSMethod = (0x01 << 29);
3685
3686         priv->TransmitConfig    =
3687                                                                         1<<TCR_DurProcMode_OFFSET |             //for RTL8185B, duration setting by HW
3688                                                                         (7<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
3689                                                                         (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |       // Short retry limit
3690                                                                         (priv->LongRetryLimit<<TCR_LRL_OFFSET) |        // Long retry limit
3691                                                                         (0 ? TCR_SAT : 0);      // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
3692
3693         priv->ReceiveConfig     =
3694 //                                                              RCR_ENMARP |
3695                                                                 RCR_AMF | RCR_ADF |                             //accept management/data
3696                                                                 RCR_ACF |                                               //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
3697                                                                 RCR_AB | RCR_AM | RCR_APM |             //accept BC/MC/UC
3698                                                                 //RCR_AICV | RCR_ACRC32 |               //accept ICV/CRC error packet
3699                                                                 (7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
3700                                                                 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
3701                                                                 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
3702
3703         priv->IntrMask          = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
3704                                                                 IMR_THPDER | IMR_THPDOK |
3705                                                                 IMR_TVODER | IMR_TVODOK |
3706                                                                 IMR_TVIDER | IMR_TVIDOK |
3707                                                                 IMR_TBEDER | IMR_TBEDOK |
3708                                                                 IMR_TBKDER | IMR_TBKDOK |
3709                                                                 IMR_RDU |                                               // To handle the defragmentation not enough Rx descriptors case. Annie, 2006-03-27.
3710                                                                 IMR_RER | IMR_ROK |
3711                                                                 IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko.
3712
3713         priv->InitialGain = 6;
3714
3715         hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
3716
3717         switch (hw_version){
3718                 case HW_VERID_R8185B_B:
3719                         priv->card_8185 = VERSION_8187S_C;
3720                         DMESG("MAC controller is a RTL8187SE b/g");
3721                         priv->phy_ver = 2;
3722                         break;
3723                 case HW_VERID_R8185_ABC:
3724                         DMESG("MAC controller is a RTL8185 b/g");
3725                         priv->card_8185 = 1;
3726                         /* you should not find a card with 8225 PHY ver < C*/
3727                         priv->phy_ver = 2;
3728                         break;
3729
3730                 case HW_VERID_R8185_D:
3731                         DMESG("MAC controller is a RTL8185 b/g (V. D)");
3732                         priv->card_8185 = 2;
3733                         /* you should not find a card with 8225 PHY ver < C*/
3734                         priv->phy_ver = 2;
3735                         break;
3736
3737                 case HW_VERID_R8180_ABCD:
3738                         DMESG("MAC controller is a RTL8180");
3739                         priv->card_8185 = 0;
3740                         break;
3741
3742                 case HW_VERID_R8180_F:
3743                         DMESG("MAC controller is a RTL8180 (v. F)");
3744                         priv->card_8185 = 0;
3745                         break;
3746
3747                 default:
3748                         DMESGW("MAC chip not recognized: version %x. Assuming RTL8180",hw_version);
3749                         priv->card_8185 = 0;
3750                         break;
3751         }
3752
3753         if(priv->card_8185){
3754                 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
3755                 priv->ieee80211->short_slot = 1;
3756         }
3757         /* you should not found any 8185 Ver B Card */
3758         priv->card_8185_Bversion = 0;
3759
3760         // just for sync 85
3761         priv->card_type = PCI;
3762         DMESG("This is a PCI NIC");
3763         priv->enable_gpio0 = 0;
3764
3765 //by amy for antenna
3766         usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET);
3767         DMESG("usValue is 0x%x\n",usValue);
3768         //3Read AntennaDiversity
3769         // SW Antenna Diversity.
3770         if(     (usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE )
3771         {
3772                 priv->EEPROMSwAntennaDiversity = false;
3773                 //printk("EEPROM Disable SW Antenna Diversity\n");
3774         }
3775         else
3776         {
3777                 priv->EEPROMSwAntennaDiversity = true;
3778                 //printk("EEPROM Enable SW Antenna Diversity\n");
3779         }
3780         // Default Antenna to use.
3781         if( (usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1 )
3782         {
3783                 priv->EEPROMDefaultAntenna1 = false;
3784                 //printk("EEPROM Default Antenna 0\n");
3785         }
3786         else
3787         {
3788                 priv->EEPROMDefaultAntenna1 = true;
3789                 //printk("EEPROM Default Antenna 1\n");
3790         }
3791
3792         //
3793         // Antenna diversity mechanism. Added by Roger, 2007.11.05.
3794         //
3795         if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto
3796         {// 0: default from EEPROM.
3797                 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
3798         }
3799         else
3800         {// 1:disable antenna diversity, 2: enable antenna diversity.
3801                 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true);
3802         }
3803         //printk("bSwAntennaDiverity = %d\n", priv->bSwAntennaDiverity);
3804
3805
3806         //
3807         // Default antenna settings. Added by Roger, 2007.11.05.
3808         //
3809         if( priv->RegDefaultAntenna == 0)
3810         {// 0: default from EEPROM.
3811                 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
3812         }
3813         else
3814         {// 1: main, 2: aux.
3815                 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false);
3816         }
3817         //printk("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1);
3818 //by amy for antenna
3819         /* rtl8185 can calc plcp len in HW.*/
3820         priv->hw_plcp_len = 1;
3821
3822         priv->plcp_preamble_mode = 2;
3823         /*the eeprom type is stored in RCR register bit #6 */
3824         if (RCR_9356SEL & read_nic_dword(dev, RCR)){
3825                 priv->epromtype=EPROM_93c56;
3826                 //DMESG("Reported EEPROM chip is a 93c56 (2Kbit)");
3827         }else{
3828                 priv->epromtype=EPROM_93c46;
3829                 //DMESG("Reported EEPROM chip is a 93c46 (1Kbit)");
3830         }
3831
3832         dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff;
3833         dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8;
3834         dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
3835         dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
3836         dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
3837         dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8;
3838         //DMESG("Card MAC address is "MAC_FMT, MAC_ARG(dev->dev_addr));
3839
3840
3841         for(i=1,j=0; i<14; i+=2,j++){
3842
3843                 word = eprom_read(dev,EPROM_TXPW_CH1_2 + j);
3844                 priv->chtxpwr[i]=word & 0xff;
3845                 priv->chtxpwr[i+1]=(word & 0xff00)>>8;
3846 #ifdef DEBUG_EPROM
3847                 DMESG("tx word %x:%x",j,word);
3848                 DMESG("ch %d pwr %x",i,priv->chtxpwr[i]);
3849                 DMESG("ch %d pwr %x",i+1,priv->chtxpwr[i+1]);
3850 #endif
3851         }
3852         if(priv->card_8185){
3853                 for(i=1,j=0; i<14; i+=2,j++){
3854
3855                         word = eprom_read(dev,EPROM_TXPW_OFDM_CH1_2 + j);
3856                         priv->chtxpwr_ofdm[i]=word & 0xff;
3857                         priv->chtxpwr_ofdm[i+1]=(word & 0xff00)>>8;
3858 #ifdef DEBUG_EPROM
3859                         DMESG("ofdm tx word %x:%x",j,word);
3860                         DMESG("ofdm ch %d pwr %x",i,priv->chtxpwr_ofdm[i]);
3861                         DMESG("ofdm ch %d pwr %x",i+1,priv->chtxpwr_ofdm[i+1]);
3862 #endif
3863                 }
3864         }
3865 //{by amy 080312
3866         //3Read crystal calibtration and thermal meter indication on 87SE.
3867
3868         // By SD3 SY's request. Added by Roger, 2007.12.11.
3869
3870         tmpu16 = eprom_read(dev, EEPROM_RSV>>1);
3871
3872         //printk("ReadAdapterInfo8185(): EEPROM_RSV(%04x)\n", tmpu16);
3873
3874                 // Crystal calibration for Xin and Xout resp.
3875                 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK; // 0~7.5pF
3876                 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK)>>4; // 0~7.5pF
3877                 if((tmpu16 & EEPROM_XTAL_CAL_ENABLE)>>12)
3878                         priv->bXtalCalibration = true;
3879
3880                 // Thermal meter reference indication.
3881                 priv->ThermalMeter =  (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK)>>8);
3882                 if((tmpu16 & EEPROM_THERMAL_METER_ENABLE)>>13)
3883                         priv->bTxPowerTrack = true;
3884
3885 //by amy 080312}
3886         word = eprom_read(dev,EPROM_TXPW_BASE);
3887         priv->cck_txpwr_base = word & 0xf;
3888         priv->ofdm_txpwr_base = (word>>4) & 0xf;
3889
3890         version = eprom_read(dev,EPROM_VERSION);
3891         DMESG("EEPROM version %x",version);
3892         if( (!priv->card_8185) && version < 0x0101){
3893                 DMESG ("EEPROM version too old, assuming defaults");
3894                 DMESG ("If you see this message *plase* send your \
3895 DMESG output to andreamrl@tiscali.it THANKS");
3896                 priv->digphy=1;
3897                 priv->antb=0;
3898                 priv->diversity=1;
3899                 priv->cs_treshold=0xc;
3900                 priv->rcr_csense=1;
3901                 priv->rf_chip=RFCHIPID_PHILIPS;
3902         }else{
3903                 if(!priv->card_8185){
3904                         u8 rfparam = eprom_read(dev,RF_PARAM);
3905                         DMESG("RfParam: %x",rfparam);
3906
3907                         priv->digphy = rfparam & (1<<RF_PARAM_DIGPHY_SHIFT) ? 0:1;
3908                         priv->antb =  rfparam & (1<<RF_PARAM_ANTBDEFAULT_SHIFT) ? 1:0;
3909
3910                         priv->rcr_csense = (rfparam & RF_PARAM_CARRIERSENSE_MASK) >>
3911                                         RF_PARAM_CARRIERSENSE_SHIFT;
3912
3913                         priv->diversity =
3914                                 (read_nic_byte(dev,CONFIG2)&(1<<CONFIG2_ANTENNA_SHIFT)) ? 1:0;
3915                 }else{
3916                         priv->rcr_csense = 3;
3917                 }
3918
3919                 priv->cs_treshold = (eprom_read(dev,ENERGY_TRESHOLD)&0xff00) >>8;
3920
3921                 priv->rf_chip = 0xff & eprom_read(dev,RFCHIPID);
3922         }
3923
3924         priv->rf_chip = RF_ZEBRA4;
3925         priv->rf_sleep = rtl8225z4_rf_sleep;
3926         priv->rf_wakeup = rtl8225z4_rf_wakeup;
3927         //DMESG("Card reports RF frontend Realtek 8225z2");
3928         //DMESGW("This driver has EXPERIMENTAL support for this chipset.");
3929         //DMESGW("use it with care and at your own risk and");
3930         DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
3931
3932         priv->rf_close = rtl8225z2_rf_close;
3933         priv->rf_init = rtl8225z2_rf_init;
3934         priv->rf_set_chan = rtl8225z2_rf_set_chan;
3935         priv->rf_set_sens = NULL;
3936         //priv->rf_sleep = rtl8225_rf_sleep;
3937         //priv->rf_wakeup = rtl8225_rf_wakeup;
3938
3939
3940
3941         if(!priv->card_8185){
3942                 if(priv->antb)
3943                         DMESG ("Antenna B is default antenna");
3944                 else
3945                         DMESG ("Antenna A is default antenna");
3946
3947                 if(priv->diversity)
3948                         DMESG ("Antenna diversity is enabled");
3949                 else
3950                         DMESG("Antenna diversity is disabled");
3951
3952                 DMESG("Carrier sense %d",priv->rcr_csense);
3953         }
3954
3955         if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
3956                 return -ENOMEM;
3957
3958         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
3959                                   TX_MANAGEPRIORITY_RING_ADDR))
3960                 return -ENOMEM;
3961
3962         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
3963                                  TX_BKPRIORITY_RING_ADDR))
3964                 return -ENOMEM;
3965
3966         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
3967                                  TX_BEPRIORITY_RING_ADDR))
3968                 return -ENOMEM;
3969
3970         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
3971                                   TX_VIPRIORITY_RING_ADDR))
3972                 return -ENOMEM;
3973
3974         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
3975                                   TX_VOPRIORITY_RING_ADDR))
3976                 return -ENOMEM;
3977
3978         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
3979                                   TX_HIGHPRIORITY_RING_ADDR))
3980                 return -ENOMEM;
3981
3982         if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
3983                                   TX_BEACON_RING_ADDR))
3984                 return -ENOMEM;
3985
3986
3987         //priv->beacon_buf=NULL;
3988
3989         if(!priv->card_8185){
3990
3991                 if(read_nic_byte(dev, CONFIG0) & (1<<CONFIG0_WEP40_SHIFT))
3992                         DMESG ("40-bit WEP is supported in hardware");
3993                 else
3994                         DMESG ("40-bit WEP is NOT supported in hardware");
3995
3996                 if(read_nic_byte(dev,CONFIG0) & (1<<CONFIG0_WEP104_SHIFT))
3997                         DMESG ("104-bit WEP is supported in hardware");
3998                 else
3999                         DMESG ("104-bit WEP is NOT supported in hardware");
4000         }
4001 #if !defined(SA_SHIRQ)
4002         if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){
4003 #else
4004         if(request_irq(dev->irq, (void *)rtl8180_interrupt, SA_SHIRQ, dev->name, dev)){
4005 #endif
4006                 DMESGE("Error allocating IRQ %d",dev->irq);
4007                 return -1;
4008         }else{
4009                 priv->irq=dev->irq;
4010                 DMESG("IRQ %d",dev->irq);
4011         }
4012
4013 #ifdef DEBUG_EPROM
4014         dump_eprom(dev);
4015 #endif
4016
4017         return 0;
4018
4019 }
4020
4021
4022 void rtl8180_no_hw_wep(struct net_device *dev)
4023 {
4024         struct r8180_priv *priv = ieee80211_priv(dev);
4025
4026         if(!priv->card_8185)
4027         {
4028                 u8 security;
4029
4030                 security  = read_nic_byte(dev, SECURITY);
4031                 security &=~(1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4032                 security &=~(1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4033
4034                 write_nic_byte(dev, SECURITY, security);
4035
4036         }else{
4037
4038                 //FIXME!!!
4039         }
4040         /*
4041           write_nic_dword(dev,TX_CONF,read_nic_dword(dev,TX_CONF) |
4042           (1<<TX_NOICV_SHIFT) );
4043         */
4044 //      priv->ieee80211->hw_wep=0;
4045 }
4046
4047
4048 void rtl8180_set_hw_wep(struct net_device *dev)
4049 {
4050         struct r8180_priv *priv = ieee80211_priv(dev);
4051         u8 pgreg;
4052         u8 security;
4053         u32 key0_word4;
4054
4055         pgreg=read_nic_byte(dev, PGSELECT);
4056         write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
4057
4058         key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
4059         key0_word4 &= ~ 0xff;
4060         key0_word4 |= priv->key0[3]& 0xff;
4061         write_nic_dword(dev,KEY0,(priv->key0[0]));
4062         write_nic_dword(dev,KEY0+4,(priv->key0[1]));
4063         write_nic_dword(dev,KEY0+4+4,(priv->key0[2]));
4064         write_nic_dword(dev,KEY0+4+4+4,(key0_word4));
4065
4066         /*
4067           TX_CONF,read_nic_dword(dev,TX_CONF) &~(1<<TX_NOICV_SHIFT));
4068         */
4069
4070         security  = read_nic_byte(dev,SECURITY);
4071         security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4072         security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4073         security &= ~ SECURITY_ENCRYP_MASK;
4074         security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
4075
4076         write_nic_byte(dev, SECURITY, security);
4077
4078         DMESG("key %x %x %x %x",read_nic_dword(dev,KEY0+4+4+4),
4079               read_nic_dword(dev,KEY0+4+4),read_nic_dword(dev,KEY0+4),
4080               read_nic_dword(dev,KEY0));
4081
4082         //priv->ieee80211->hw_wep=1;
4083 }
4084
4085
4086 void rtl8185_rf_pins_enable(struct net_device *dev)
4087 {
4088 //      u16 tmp;
4089 //      tmp = read_nic_word(dev, RFPinsEnable);
4090         write_nic_word(dev, RFPinsEnable, 0x1fff);// | tmp);
4091 //      write_nic_word(dev, RFPinsEnable,7 | tmp);
4092 }
4093
4094
4095 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
4096 {
4097         u8 conf3;
4098
4099         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4100
4101         conf3 = read_nic_byte(dev, CONFIG3);
4102         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4103         write_nic_dword(dev, ANAPARAM2, a);
4104
4105         conf3 = read_nic_byte(dev, CONFIG3);
4106         write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4107         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4108
4109 }
4110
4111
4112 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
4113 {
4114         u8 conf3;
4115
4116         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4117
4118         conf3 = read_nic_byte(dev, CONFIG3);
4119         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4120         write_nic_dword(dev, ANAPARAM, a);
4121
4122         conf3 = read_nic_byte(dev, CONFIG3);
4123         write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4124         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4125 }
4126
4127
4128 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
4129 {
4130         write_nic_byte(dev, TX_ANTENNA, ant);
4131         force_pci_posting(dev);
4132         mdelay(1);
4133 }
4134
4135
4136 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
4137 {
4138         //u8 phyr;
4139         u32 phyw;
4140         //int i;
4141
4142         adr |= 0x80;
4143
4144         phyw= ((data<<8) | adr);
4145
4146         // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register.
4147         write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
4148         write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
4149         write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
4150         write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
4151
4152         /* this is ok to fail when we write AGC table. check for AGC table might be
4153          * done by masking with 0x7f instead of 0xff
4154          */
4155         //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data,adr);
4156 }
4157
4158
4159 inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data)
4160 {
4161         data = data & 0xff;
4162         rtl8185_write_phy(dev, adr, data);
4163 }
4164
4165
4166 void write_phy_cck (struct net_device *dev, u8 adr, u32 data)
4167 {
4168         data = data & 0xff;
4169         rtl8185_write_phy(dev, adr, data | 0x10000);
4170 }
4171
4172
4173 /* 70*3 = 210 ms
4174  * I hope this is enougth
4175  */
4176 #define MAX_PHY 70
4177 void write_phy(struct net_device *dev, u8 adr, u8 data)
4178 {
4179         u32 phy;
4180         int i;
4181
4182         phy = 0xff0000;
4183         phy |= adr;
4184         phy |= 0x80; /* this should enable writing */
4185         phy |= (data<<8);
4186
4187         //PHY_ADR, PHY_R and PHY_W  are contig and treated as one dword
4188         write_nic_dword(dev,PHY_ADR, phy);
4189
4190         phy= 0xffff00;
4191         phy |= adr;
4192
4193         write_nic_dword(dev,PHY_ADR, phy);
4194         for(i=0;i<MAX_PHY;i++){
4195                 phy=read_nic_dword(dev,PHY_ADR);
4196                 phy= phy & 0xff0000;
4197                 phy= phy >> 16;
4198                 if(phy == data){ //SUCCESS!
4199                         force_pci_posting(dev);
4200                         mdelay(3); //random value
4201 #ifdef DEBUG_BB
4202                         DMESG("Phy wr %x,%x",adr,data);
4203 #endif
4204                         return;
4205                 }else{
4206                         force_pci_posting(dev);
4207                         mdelay(3); //random value
4208                 }
4209         }
4210         DMESGW ("Phy writing %x %x failed!", adr,data);
4211 }
4212
4213 void rtl8185_set_rate(struct net_device *dev)
4214 {
4215         int i;
4216         u16 word;
4217         int basic_rate,min_rr_rate,max_rr_rate;
4218
4219 //      struct r8180_priv *priv = ieee80211_priv(dev);
4220
4221         //if (ieee80211_is_54g(priv->ieee80211->current_network) &&
4222 //              priv->ieee80211->state == IEEE80211_LINKED){
4223         basic_rate = ieeerate2rtlrate(240);
4224         min_rr_rate = ieeerate2rtlrate(60);
4225         max_rr_rate = ieeerate2rtlrate(240);
4226
4227 //
4228 //      }else{
4229 //              basic_rate = ieeerate2rtlrate(20);
4230 //              min_rr_rate = ieeerate2rtlrate(10);
4231 //              max_rr_rate = ieeerate2rtlrate(110);
4232 //      }
4233
4234         write_nic_byte(dev, RESP_RATE,
4235                         max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
4236
4237         word  = read_nic_word(dev, BRSR);
4238         word &= ~BRSR_MBR_8185;
4239
4240
4241         for(i=0;i<=basic_rate;i++)
4242                 word |= (1<<i);
4243
4244         write_nic_word(dev, BRSR, word);
4245         //DMESG("RR:%x BRSR: %x", read_nic_byte(dev,RESP_RATE),read_nic_word(dev,BRSR));
4246 }
4247
4248
4249
4250 void rtl8180_adapter_start(struct net_device *dev)
4251 {
4252         struct r8180_priv *priv = ieee80211_priv(dev);
4253         u32 anaparam;
4254         u16 word;
4255         u8 config3;
4256 //      int i;
4257
4258         rtl8180_rtx_disable(dev);
4259         rtl8180_reset(dev);
4260
4261         /* seems that 0xffff or 0xafff will cause
4262          * HW interrupt line crash
4263          */
4264
4265         //priv->irq_mask = 0xafff;
4266 //      priv->irq_mask = 0x4fcf;
4267
4268         /* enable beacon timeout, beacon TX ok and err
4269          * LP tx ok and err, HP TX ok and err, NP TX ok and err,
4270          * RX ok and ERR, and GP timer */
4271         priv->irq_mask = 0x6fcf;
4272
4273         priv->dma_poll_mask = 0;
4274
4275         rtl8180_beacon_tx_disable(dev);
4276
4277         if(priv->card_type == CARDBUS ){
4278                 config3=read_nic_byte(dev, CONFIG3);
4279                 write_nic_byte(dev,CONFIG3,config3 | CONFIG3_FuncRegEn);
4280                 write_nic_word(dev,FEMR, FEMR_INTR | FEMR_WKUP | FEMR_GWAKE |
4281                         read_nic_word(dev, FEMR));
4282         }
4283         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4284         write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
4285         write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
4286         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4287
4288         rtl8180_update_msr(dev);
4289
4290         if(!priv->card_8185){
4291                 anaparam  = eprom_read(dev,EPROM_ANAPARAM_ADDRLWORD);
4292                 anaparam |= eprom_read(dev,EPROM_ANAPARAM_ADDRHWORD)<<16;
4293
4294                 rtl8180_set_anaparam(dev,anaparam);
4295         }
4296         /* These might be unnecessary since we do in rx_enable / tx_enable */
4297         fix_rx_fifo(dev);
4298         fix_tx_fifo(dev);
4299         /*set_nic_rxring(dev);
4300           set_nic_txring(dev);*/
4301
4302         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4303
4304         /*
4305            The following is very strange. seems to be that 1 means test mode,
4306            but we need to acknolwledges the nic when a packet is ready
4307            altought we set it to 0
4308         */
4309
4310         write_nic_byte(dev,
4311                        CONFIG2, read_nic_byte(dev,CONFIG2) &~\
4312                        (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
4313         //^the nic isn't in test mode
4314         if(priv->card_8185)
4315                         write_nic_byte(dev,
4316                        CONFIG2, read_nic_byte(dev,CONFIG2)|(1<<4));
4317
4318         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
4319
4320         write_nic_dword(dev,INT_TIMEOUT,0);
4321 #ifdef DEBUG_REGISTERS
4322         rtl8180_dump_reg(dev);
4323 #endif
4324
4325         if(!priv->card_8185)
4326         {
4327                 /*
4328                 experimental - this might be needed to calibrate AGC,
4329                 anyway it shouldn't hurt
4330                 */
4331                 write_nic_byte(dev, CONFIG5,
4332                         read_nic_byte(dev, CONFIG5) | (1<<AGCRESET_SHIFT));
4333                 read_nic_byte(dev, CONFIG5);
4334                 udelay(15);
4335                 write_nic_byte(dev, CONFIG5,
4336                         read_nic_byte(dev, CONFIG5) &~ (1<<AGCRESET_SHIFT));
4337         }else{
4338
4339                 write_nic_byte(dev, WPA_CONFIG, 0);
4340                 //write_nic_byte(dev, TESTR, 0xd);
4341         }
4342
4343         rtl8180_no_hw_wep(dev);
4344
4345         if(priv->card_8185){
4346                 rtl8185_set_rate(dev);
4347                 write_nic_byte(dev, RATE_FALLBACK, 0x81);
4348         //      write_nic_byte(dev, 0xdf, 0x15);
4349         }else{
4350                 word  = read_nic_word(dev, BRSR);
4351                 word &= ~BRSR_MBR;
4352                 word &= ~BRSR_BPLCP;
4353                 word |= ieeerate2rtlrate(priv->ieee80211->basic_rate);
4354 //by amy
4355               word |= 0x0f;
4356 //by amy
4357                 write_nic_word(dev, BRSR, word);
4358         }
4359
4360
4361         if(priv->card_8185){
4362                 write_nic_byte(dev, GP_ENABLE,read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
4363
4364                 //FIXME cfg 3 ClkRun enable - isn't it ReadOnly ?
4365                 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4366                 write_nic_byte(dev,CONFIG3, read_nic_byte(dev, CONFIG3)
4367 |(1<<CONFIG3_CLKRUN_SHIFT));
4368                 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4369
4370         }
4371
4372         priv->rf_init(dev);
4373
4374         if(priv->rf_set_sens != NULL)
4375                 priv->rf_set_sens(dev,priv->sens);
4376         rtl8180_irq_enable(dev);
4377
4378         netif_start_queue(dev);
4379         /*DMESG ("lfree %d",get_curr_tx_free_desc(dev,LOW_PRIORITY));
4380
4381         DMESG ("nfree %d",get_curr_tx_free_desc(dev,NORM_PRIORITY));
4382
4383         DMESG ("hfree %d",get_curr_tx_free_desc(dev,HI_PRIORITY));
4384         if(check_nic_enought_desc(dev,NORM_PRIORITY)) DMESG("NORM OK");
4385         if(check_nic_enought_desc(dev,HI_PRIORITY)) DMESG("HI OK");
4386         if(check_nic_enought_desc(dev,LOW_PRIORITY)) DMESG("LOW OK");*/
4387 }
4388
4389
4390
4391 /* this configures registers for beacon tx and enables it via
4392  * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
4393  * be used to stop beacon transmission
4394  */
4395 void rtl8180_start_tx_beacon(struct net_device *dev)
4396 {
4397 //      struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
4398         u16 word;
4399 //      DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
4400
4401         DMESG("Enabling beacon TX");
4402         //write_nic_byte(dev, 0x42,0xe6);// TCR
4403 //      set_nic_txring(dev);
4404 //      fix_tx_fifo(dev);
4405         rtl8180_prepare_beacon(dev);
4406         rtl8180_irq_disable(dev);
4407         rtl8180_beacon_tx_enable(dev);
4408
4409         word = read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd;
4410         write_nic_word(dev, AtimWnd,word);// word |=
4411 //priv->ieee80211->current_network.atim_window);
4412
4413         word  = read_nic_word(dev, BintrItv);
4414         word &= ~BintrItv_BintrItv;
4415         word |= 1000;/*priv->ieee80211->current_network.beacon_interval *
4416                 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
4417         // FIXME: check if correct ^^ worked with 0x3e8;
4418         */
4419         write_nic_word(dev, BintrItv, word);
4420
4421
4422         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4423
4424 //      rtl8180_beacon_tx_enable(dev);
4425         rtl8185b_irq_enable(dev);
4426         /* VV !!!!!!!!!! VV*/
4427         /*
4428         rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
4429         write_nic_byte(dev,0x9d,0x00);
4430         rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
4431 */
4432 //      DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
4433
4434 }
4435
4436
4437
4438 /***************************************************************************
4439     -------------------------------NET STUFF---------------------------
4440 ***************************************************************************/
4441 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
4442 {
4443         struct r8180_priv *priv = ieee80211_priv(dev);
4444
4445         return &priv->ieee80211->stats;
4446 }
4447 //
4448 // Change current and default preamble mode.
4449 // 2005.01.06, by rcnjko.
4450 //
4451 bool
4452 MgntActSet_802_11_PowerSaveMode(
4453         struct r8180_priv *priv,
4454         RT_PS_MODE              rtPsMode
4455 )
4456 {
4457
4458         // Currently, we do not change power save mode on IBSS mode.
4459         if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4460         {
4461                 return false;
4462         }
4463
4464         //
4465         // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
4466         // some AP will not response to our mgnt frames with PwrMgt bit set,
4467         // e.g. cannot associate the AP.
4468         // So I commented out it. 2005.02.16, by rcnjko.
4469         //
4470 //      // Change device's power save mode.
4471 //      Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
4472
4473         // Update power save mode configured.
4474 //      priv->dot11PowerSaveMode = rtPsMode;
4475         priv->ieee80211->ps = rtPsMode;
4476         // Determine ListenInterval.
4477
4478         return true;
4479 }
4480
4481 //================================================================================
4482 // Leisure Power Save in linked state.
4483 //================================================================================
4484
4485 //
4486 //      Description:
4487 //              Enter the leisure power save mode.
4488 //
4489 void
4490 LeisurePSEnter(
4491         struct r8180_priv *priv
4492         )
4493 {
4494         if (priv->bLeisurePs)
4495         {
4496                 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
4497                 {
4498                         //printk("----Enter PS\n");
4499                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);//IEEE80211_PS_ENABLE
4500                 }
4501         }
4502 }
4503
4504
4505 //
4506 //      Description:
4507 //              Leave the leisure power save mode.
4508 //
4509 void
4510 LeisurePSLeave(
4511         struct r8180_priv *priv
4512         )
4513 {
4514         if (priv->bLeisurePs)
4515         {
4516                 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
4517                 {
4518                         //printk("----Leave PS\n");
4519                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
4520                 }
4521         }
4522 }
4523
4524 void rtl8180_hw_wakeup_wq (struct work_struct *work)
4525 {
4526 //      struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
4527 //      struct ieee80211_device * ieee = (struct ieee80211_device*)
4528 //                                             container_of(work, struct ieee80211_device, watch_dog_wq);
4529         struct delayed_work *dwork = to_delayed_work(work);
4530         struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
4531         struct net_device *dev = ieee->dev;
4532
4533 //      printk("dev is %d\n",dev);
4534 //      printk("&*&(^*(&(&=========>%s()\n", __func__);
4535         rtl8180_hw_wakeup(dev);
4536
4537 }
4538
4539 void rtl8180_hw_sleep_wq (struct work_struct *work)
4540 {
4541 //      struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
4542 //      struct ieee80211_device * ieee = (struct ieee80211_device*)
4543 //                                             container_of(work, struct ieee80211_device, watch_dog_wq);
4544         struct delayed_work *dwork = to_delayed_work(work);
4545         struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
4546         struct net_device *dev = ieee->dev;
4547
4548         rtl8180_hw_sleep_down(dev);
4549 }
4550
4551 //YJ,add,080828,for KeepAlive
4552 static void MgntLinkKeepAlive(struct r8180_priv *priv )
4553 {
4554         if (priv->keepAliveLevel == 0)
4555                 return;
4556
4557         if(priv->ieee80211->state == IEEE80211_LINKED)
4558         {
4559                 //
4560                 // Keep-Alive.
4561                 //
4562                 //printk("LastTx:%d Tx:%d LastRx:%d Rx:%ld Idle:%d\n",priv->link_detect.LastNumTxUnicast,priv->NumTxUnicast, priv->link_detect.LastNumRxUnicast, priv->ieee80211->NumRxUnicast, priv->link_detect.IdleCount);
4563
4564                 if ( (priv->keepAliveLevel== 2) ||
4565                         (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
4566                         priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast )
4567                         )
4568                 {
4569                         priv->link_detect.IdleCount++;
4570
4571                         //
4572                         // Send a Keep-Alive packet packet to AP if we had been idle for a while.
4573                         //
4574                         if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) )
4575                         {
4576                                 priv->link_detect.IdleCount = 0;
4577                                 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
4578                         }
4579                 }
4580                 else
4581                 {
4582                         priv->link_detect.IdleCount = 0;
4583                 }
4584                 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
4585                 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
4586         }
4587 }
4588 //YJ,add,080828,for KeepAlive,end
4589
4590 static u8 read_acadapter_file(char *filename);
4591 void rtl8180_watch_dog(struct net_device *dev)
4592 {
4593         struct r8180_priv *priv = ieee80211_priv(dev);
4594         bool bEnterPS = false;
4595         bool bBusyTraffic = false;
4596         u32 TotalRxNum = 0;
4597         u16 SlotIndex = 0;
4598         u16 i = 0;
4599 #ifdef ENABLE_IPS
4600         if(priv->ieee80211->actscanning == false){
4601                 if((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn)){
4602                         IPSEnter(dev);
4603                 }
4604         }
4605 #endif
4606         //YJ,add,080828,for link state check
4607         if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){
4608                 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
4609                 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
4610                 for( i=0; i<priv->link_detect.SlotNum; i++ )
4611                         TotalRxNum+= priv->link_detect.RxFrameNum[i];
4612                 //printk("&&&&&=== TotalRxNum = %d\n", TotalRxNum);
4613                 if(TotalRxNum == 0){
4614                         priv->ieee80211->state = IEEE80211_ASSOCIATING;
4615                         queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
4616                 }
4617         }
4618
4619         //YJ,add,080828,for KeepAlive
4620         MgntLinkKeepAlive(priv);
4621
4622         //YJ,add,080828,for LPS
4623 #ifdef ENABLE_LPS
4624         if(priv->PowerProfile == POWER_PROFILE_BATTERY )
4625         {
4626                 //Turn on LeisurePS on battery power
4627                 //printk("!!!!!On battery power\n");
4628                 priv->bLeisurePs = true;
4629         }
4630         else if(priv->PowerProfile == POWER_PROFILE_AC )
4631         {
4632                 // Turn off LeisurePS on AC power
4633                 //printk("----On AC power\n");
4634                 LeisurePSLeave(priv);
4635                 priv->bLeisurePs= false;
4636         }
4637 #endif
4638
4639 #ifdef ENABLE_LPS
4640         if(priv->ieee80211->state == IEEE80211_LINKED){
4641                 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
4642                 //printk("TxOk=%d RxOk=%d\n", priv->link_detect.NumTxOkInPeriod, priv->link_detect.NumRxOkInPeriod);
4643                 if(     priv->link_detect.NumRxOkInPeriod> 666 ||
4644                         priv->link_detect.NumTxOkInPeriod> 666 ) {
4645                         bBusyTraffic = true;
4646                 }
4647                 if(((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
4648                         || (priv->link_detect.NumRxOkInPeriod > 2)) {
4649                         bEnterPS= false;
4650                 }
4651                 else {
4652                         bEnterPS= true;
4653                 }
4654
4655                 if(bEnterPS) {
4656                         LeisurePSEnter(priv);
4657                 }
4658                 else {
4659                         LeisurePSLeave(priv);
4660                 }
4661         }
4662         else{
4663                 LeisurePSLeave(priv);
4664         }
4665 #endif
4666         priv->link_detect.bBusyTraffic = bBusyTraffic;
4667         priv->link_detect.NumRxOkInPeriod = 0;
4668         priv->link_detect.NumTxOkInPeriod = 0;
4669         priv->ieee80211->NumRxDataInPeriod = 0;
4670         priv->ieee80211->NumRxBcnInPeriod = 0;
4671 }
4672 int _rtl8180_up(struct net_device *dev)
4673 {
4674         struct r8180_priv *priv = ieee80211_priv(dev);
4675         //int i;
4676
4677         priv->up=1;
4678
4679         DMESG("Bringing up iface");
4680         rtl8185b_adapter_start(dev);
4681         rtl8185b_rx_enable(dev);
4682         rtl8185b_tx_enable(dev);
4683 #ifdef ENABLE_IPS
4684         if(priv->bInactivePs){
4685                 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
4686                         IPSLeave(dev);
4687         }
4688 #endif
4689 //by amy 080312
4690 #ifdef RATE_ADAPT
4691        timer_rate_adaptive((unsigned long)dev);
4692 #endif
4693 //by amy 080312
4694         watch_dog_adaptive((unsigned long)dev);
4695 #ifdef SW_ANTE
4696         if(priv->bSwAntennaDiverity)
4697                         SwAntennaDiversityTimerCallback(dev);
4698 #endif
4699 //      IPSEnter(dev);
4700         ieee80211_softmac_start_protocol(priv->ieee80211);
4701
4702 //Add for RF power on power off by lizhaoming 080512
4703 //      priv->eRFPowerState = eRfOn;
4704 //      printk("\n--------Start queue_work:GPIOChangeRFWorkItem");
4705 //      queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem,1000);
4706
4707         return 0;
4708 }
4709
4710
4711 int rtl8180_open(struct net_device *dev)
4712 {
4713         struct r8180_priv *priv = ieee80211_priv(dev);
4714         int ret;
4715
4716         down(&priv->wx_sem);
4717         ret = rtl8180_up(dev);
4718         up(&priv->wx_sem);
4719         return ret;
4720
4721 }
4722
4723
4724 int rtl8180_up(struct net_device *dev)
4725 {
4726         struct r8180_priv *priv = ieee80211_priv(dev);
4727
4728         if (priv->up == 1) return -1;
4729
4730         return _rtl8180_up(dev);
4731 }
4732
4733
4734 int rtl8180_close(struct net_device *dev)
4735 {
4736         struct r8180_priv *priv = ieee80211_priv(dev);
4737         int ret;
4738
4739         down(&priv->wx_sem);
4740         ret = rtl8180_down(dev);
4741         up(&priv->wx_sem);
4742
4743         return ret;
4744
4745 }
4746
4747 int rtl8180_down(struct net_device *dev)
4748 {
4749         struct r8180_priv *priv = ieee80211_priv(dev);
4750
4751         if (priv->up == 0) return -1;
4752
4753         priv->up=0;
4754
4755         ieee80211_softmac_stop_protocol(priv->ieee80211);
4756         /* FIXME */
4757         if (!netif_queue_stopped(dev))
4758                 netif_stop_queue(dev);
4759         rtl8180_rtx_disable(dev);
4760         rtl8180_irq_disable(dev);
4761         del_timer_sync(&priv->watch_dog_timer);
4762         //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
4763 //{by amy 080312
4764     del_timer_sync(&priv->rateadapter_timer);
4765     cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
4766 //by amy 080312}
4767         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
4768         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
4769         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
4770         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
4771         del_timer_sync(&priv->SwAntennaDiversityTimer);
4772         SetZebraRFPowerState8185(dev,eRfOff);
4773         //ieee80211_softmac_stop_protocol(priv->ieee80211);
4774         memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network));
4775         priv->ieee80211->state = IEEE80211_NOLINK;
4776         return 0;
4777 }
4778
4779 void rtl8180_restart_wq(struct work_struct *work)
4780 {
4781         struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
4782         struct net_device *dev = priv->dev;
4783
4784         down(&priv->wx_sem);
4785
4786         rtl8180_commit(dev);
4787
4788         up(&priv->wx_sem);
4789 }
4790
4791 void rtl8180_restart(struct net_device *dev)
4792 {
4793         struct r8180_priv *priv = ieee80211_priv(dev);
4794         //rtl8180_commit(dev);
4795         schedule_work(&priv->reset_wq);
4796         //DMESG("TXTIMEOUT");
4797 }
4798
4799
4800 void rtl8180_commit(struct net_device *dev)
4801 {
4802         struct r8180_priv *priv = ieee80211_priv(dev);
4803
4804         if (priv->up == 0) return ;
4805 //+by amy 080312
4806         del_timer_sync(&priv->watch_dog_timer);
4807         //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
4808 //{by amy 080312
4809 //by amy for rate adaptive
4810     del_timer_sync(&priv->rateadapter_timer);
4811     cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
4812 //by amy for rate adaptive
4813 //by amy 080312}
4814         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
4815         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
4816         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
4817         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
4818         del_timer_sync(&priv->SwAntennaDiversityTimer);
4819         ieee80211_softmac_stop_protocol(priv->ieee80211);
4820         rtl8180_irq_disable(dev);
4821         rtl8180_rtx_disable(dev);
4822         _rtl8180_up(dev);
4823 }
4824
4825
4826 static void r8180_set_multicast(struct net_device *dev)
4827 {
4828         struct r8180_priv *priv = ieee80211_priv(dev);
4829         short promisc;
4830
4831         //down(&priv->wx_sem);
4832
4833         promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4834
4835         if (promisc != priv->promisc)
4836                 rtl8180_restart(dev);
4837
4838         priv->promisc = promisc;
4839
4840         //up(&priv->wx_sem);
4841 }
4842
4843 int r8180_set_mac_adr(struct net_device *dev, void *mac)
4844 {
4845         struct r8180_priv *priv = ieee80211_priv(dev);
4846         struct sockaddr *addr = mac;
4847
4848         down(&priv->wx_sem);
4849
4850         memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
4851
4852         if(priv->ieee80211->iw_mode == IW_MODE_MASTER)
4853                 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
4854
4855         if (priv->up) {
4856                 rtl8180_down(dev);
4857                 rtl8180_up(dev);
4858         }
4859
4860         up(&priv->wx_sem);
4861
4862         return 0;
4863 }
4864
4865 /* based on ipw2200 driver */
4866 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
4867 {
4868         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
4869
4870         struct iwreq *wrq = (struct iwreq *) rq;
4871         int ret=-1;
4872         switch (cmd) {
4873             case RTL_IOCTL_WPA_SUPPLICANT:
4874                 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
4875                 return ret;
4876
4877             default:
4878                 return -EOPNOTSUPP;
4879         }
4880
4881         return -EOPNOTSUPP;
4882 }
4883
4884
4885
4886 /****************************************************************************
4887      -----------------------------PCI STUFF---------------------------
4888 *****************************************************************************/
4889
4890 static const struct net_device_ops rtl8180_netdev_ops = {
4891         .ndo_open               = rtl8180_open,
4892         .ndo_stop               = rtl8180_close,
4893         .ndo_get_stats          = rtl8180_stats,
4894         .ndo_tx_timeout         = rtl8180_restart,
4895         .ndo_do_ioctl           = rtl8180_ioctl,
4896         .ndo_set_multicast_list = r8180_set_multicast,
4897         .ndo_set_mac_address    = r8180_set_mac_adr,
4898         .ndo_validate_addr      = eth_validate_addr,
4899         .ndo_change_mtu         = eth_change_mtu,
4900         .ndo_start_xmit         = ieee80211_xmit,
4901 };
4902
4903 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
4904                                        const struct pci_device_id *id)
4905 {
4906         unsigned long ioaddr = 0;
4907         struct net_device *dev = NULL;
4908         struct r8180_priv *priv= NULL;
4909         //u8 *ptr;
4910         u8 unit = 0;
4911
4912         unsigned long pmem_start, pmem_len, pmem_flags;
4913
4914         DMESG("Configuring chip resources");
4915
4916         if( pci_enable_device (pdev) ){
4917                 DMESG("Failed to enable PCI device");
4918                 return -EIO;
4919         }
4920
4921         pci_set_master(pdev);
4922         //pci_set_wmi(pdev);
4923         pci_set_dma_mask(pdev, 0xffffff00ULL);
4924         pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
4925         dev = alloc_ieee80211(sizeof(struct r8180_priv));
4926         if (!dev)
4927                 return -ENOMEM;
4928         priv = ieee80211_priv(dev);
4929         priv->ieee80211 = netdev_priv(dev);
4930
4931         pci_set_drvdata(pdev, dev);
4932         SET_NETDEV_DEV(dev, &pdev->dev);
4933
4934         priv = ieee80211_priv(dev);
4935 //      memset(priv,0,sizeof(struct r8180_priv));
4936         priv->pdev=pdev;
4937
4938
4939
4940         pmem_start = pci_resource_start(pdev, 1);
4941         pmem_len = pci_resource_len(pdev, 1);
4942         pmem_flags = pci_resource_flags (pdev, 1);
4943
4944         if (!(pmem_flags & IORESOURCE_MEM)) {
4945                 DMESG("region #1 not a MMIO resource, aborting");
4946                 goto fail;
4947         }
4948
4949         //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
4950         if( ! request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
4951                 DMESG("request_mem_region failed!");
4952                 goto fail;
4953         }
4954
4955
4956         ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
4957         if( ioaddr == (unsigned long)NULL ){
4958                 DMESG("ioremap failed!");
4959                // release_mem_region( pmem_start, pmem_len );
4960                 goto fail1;
4961         }
4962
4963         dev->mem_start = ioaddr; // shared mem start
4964         dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
4965
4966
4967         //pci_read_config_byte(pdev, 0x05, ptr);
4968         //pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04));
4969         pci_read_config_byte(pdev, 0x05, &unit);
4970         pci_write_config_byte(pdev, 0x05, unit & (~0x04));
4971
4972         dev->irq = pdev->irq;
4973         priv->irq = 0;
4974
4975         dev->netdev_ops = &rtl8180_netdev_ops;
4976         dev->wireless_handlers = &r8180_wx_handlers_def;
4977
4978         dev->type=ARPHRD_ETHER;
4979         dev->watchdog_timeo = HZ*3; //added by david woo, 2007.12.13
4980
4981         if (dev_alloc_name(dev, ifname) < 0){
4982                 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
4983                 ifname = "wlan%d";
4984         //      ifname = "ath%d";
4985                 dev_alloc_name(dev, ifname);
4986         }
4987
4988
4989         if(rtl8180_init(dev)!=0){
4990                 DMESG("Initialization failed");
4991                 goto fail1;
4992         }
4993
4994         netif_carrier_off(dev);
4995
4996         register_netdev(dev);
4997
4998         rtl8180_proc_init_one(dev);
4999
5000         DMESG("Driver probe completed\n");
5001         return 0;
5002
5003 fail1:
5004
5005         if( dev->mem_start != (unsigned long)NULL ){
5006                 iounmap( (void *)dev->mem_start );
5007                 release_mem_region( pci_resource_start(pdev, 1),
5008                                     pci_resource_len(pdev, 1) );
5009         }
5010
5011
5012 fail:
5013         if(dev){
5014
5015                 if (priv->irq) {
5016                         free_irq(dev->irq, dev);
5017                         dev->irq=0;
5018                 }
5019                 free_ieee80211(dev);
5020         }
5021
5022         pci_disable_device(pdev);
5023
5024         DMESG("wlan driver load failed\n");
5025         pci_set_drvdata(pdev, NULL);
5026         return -ENODEV;
5027
5028 }
5029
5030
5031 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
5032 {
5033         struct r8180_priv *priv;
5034         struct net_device *dev = pci_get_drvdata(pdev);
5035         if(dev){
5036
5037                 unregister_netdev(dev);
5038
5039                 priv=ieee80211_priv(dev);
5040
5041                 rtl8180_proc_remove_one(dev);
5042                 rtl8180_down(dev);
5043                 priv->rf_close(dev);
5044                 rtl8180_reset(dev);
5045                 //rtl8180_rtx_disable(dev);
5046                 //rtl8180_irq_disable(dev);
5047                 mdelay(10);
5048                 //write_nic_word(dev,INTA,read_nic_word(dev,INTA));
5049                 //force_pci_posting(dev);
5050                 //mdelay(10);
5051
5052                 if(priv->irq){
5053
5054                         DMESG("Freeing irq %d",dev->irq);
5055                         free_irq(dev->irq, dev);
5056                         priv->irq=0;
5057
5058                 }
5059
5060                 free_rx_desc_ring(dev);
5061                 free_tx_desc_rings(dev);
5062         //      free_beacon_desc_ring(dev,priv->txbeaconcount);
5063
5064                 if( dev->mem_start != (unsigned long)NULL ){
5065                         iounmap( (void *)dev->mem_start );
5066                         release_mem_region( pci_resource_start(pdev, 1),
5067                                             pci_resource_len(pdev, 1) );
5068                 }
5069
5070                 free_ieee80211(dev);
5071         }
5072         pci_disable_device(pdev);
5073
5074         DMESG("wlan driver removed\n");
5075 }
5076
5077
5078 /* fun with the built-in ieee80211 stack... */
5079 extern int ieee80211_crypto_init(void);
5080 extern void ieee80211_crypto_deinit(void);
5081 extern int ieee80211_crypto_tkip_init(void);
5082 extern void ieee80211_crypto_tkip_exit(void);
5083 extern int ieee80211_crypto_ccmp_init(void);
5084 extern void ieee80211_crypto_ccmp_exit(void);
5085 extern int ieee80211_crypto_wep_init(void);
5086 extern void ieee80211_crypto_wep_exit(void);
5087
5088 static int __init rtl8180_pci_module_init(void)
5089 {
5090         int ret;
5091
5092         ret = ieee80211_crypto_init();
5093         if (ret) {
5094                 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
5095                 return ret;
5096         }
5097         ret = ieee80211_crypto_tkip_init();
5098         if (ret) {
5099                 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
5100                 return ret;
5101         }
5102         ret = ieee80211_crypto_ccmp_init();
5103         if (ret) {
5104                 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
5105                 return ret;
5106         }
5107         ret = ieee80211_crypto_wep_init();
5108         if (ret) {
5109                 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
5110                 return ret;
5111         }
5112
5113         printk(KERN_INFO "\nLinux kernel driver for RTL8180 \
5114 / RTL8185 based WLAN cards\n");
5115         printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
5116         DMESG("Initializing module");
5117         DMESG("Wireless extensions version %d", WIRELESS_EXT);
5118         rtl8180_proc_module_init();
5119
5120       if(0!=pci_register_driver(&rtl8180_pci_driver))
5121         //if(0!=pci_module_init(&rtl8180_pci_driver))
5122         {
5123                 DMESG("No device found");
5124                 /*pci_unregister_driver (&rtl8180_pci_driver);*/
5125                 return -ENODEV;
5126         }
5127         return 0;
5128 }
5129
5130
5131 static void __exit rtl8180_pci_module_exit(void)
5132 {
5133         pci_unregister_driver (&rtl8180_pci_driver);
5134         rtl8180_proc_module_remove();
5135         ieee80211_crypto_tkip_exit();
5136         ieee80211_crypto_ccmp_exit();
5137         ieee80211_crypto_wep_exit();
5138         ieee80211_crypto_deinit();
5139         DMESG("Exiting");
5140 }
5141
5142
5143 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
5144 {
5145         unsigned long flags;
5146         short enough_desc;
5147         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5148
5149         spin_lock_irqsave(&priv->tx_lock,flags);
5150         enough_desc = check_nic_enought_desc(dev,pri);
5151         spin_unlock_irqrestore(&priv->tx_lock,flags);
5152
5153         if(enough_desc)
5154                 ieee80211_wake_queue(priv->ieee80211);
5155 }
5156
5157 /*****************************************************************************
5158       -----------------------------IRQ STUFF---------------------------
5159 ******************************************************************************/
5160
5161 void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
5162 {
5163         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5164
5165         u32 *tail; //tail virtual addr
5166         u32 *head; //head virtual addr
5167         u32 *begin;//start of ring virtual addr
5168         u32 *nicv; //nic pointer virtual addr
5169 //      u32 *txdv; //packet just TXed
5170         u32 nic; //nic pointer physical addr
5171         u32 nicbegin;// start of ring physical addr
5172 //      short txed;
5173         unsigned long flag;
5174         /* physical addr are ok on 32 bits since we set DMA mask*/
5175
5176         int offs;
5177         int j,i;
5178         int hd;
5179         if (error) priv->stats.txretry++; //tony 20060601
5180         spin_lock_irqsave(&priv->tx_lock,flag);
5181         switch(pri) {
5182         case MANAGE_PRIORITY:
5183                 tail = priv->txmapringtail;
5184                 begin = priv->txmapring;
5185                 head = priv->txmapringhead;
5186                 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
5187                 nicbegin = priv->txmapringdma;
5188                 break;
5189
5190         case BK_PRIORITY:
5191                 tail = priv->txbkpringtail;
5192                 begin = priv->txbkpring;
5193                 head = priv->txbkpringhead;
5194                 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
5195                 nicbegin = priv->txbkpringdma;
5196                 break;
5197
5198         case BE_PRIORITY:
5199                 tail = priv->txbepringtail;
5200                 begin = priv->txbepring;
5201                 head = priv->txbepringhead;
5202                 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
5203                 nicbegin = priv->txbepringdma;
5204                 break;
5205
5206         case VI_PRIORITY:
5207                 tail = priv->txvipringtail;
5208                 begin = priv->txvipring;
5209                 head = priv->txvipringhead;
5210                 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
5211                 nicbegin = priv->txvipringdma;
5212                 break;
5213
5214         case VO_PRIORITY:
5215                 tail = priv->txvopringtail;
5216                 begin = priv->txvopring;
5217                 head = priv->txvopringhead;
5218                 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
5219                 nicbegin = priv->txvopringdma;
5220                 break;
5221
5222         case HI_PRIORITY:
5223                 tail = priv->txhpringtail;
5224                 begin = priv->txhpring;
5225                 head = priv->txhpringhead;
5226                 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
5227                 nicbegin = priv->txhpringdma;
5228                 break;
5229
5230         default:
5231                 spin_unlock_irqrestore(&priv->tx_lock,flag);
5232                 return ;
5233         }
5234 /*      DMESG("%x %s %x %x",((int)nic & 0xfff)/8/4,
5235         *(priv->txnpring + ((int)nic&0xfff)/4/8) & (1<<31) ? "filled" : "empty",
5236         (priv->txnpringtail - priv->txnpring)/8,(priv->txnpringhead -
5237 priv->txnpring)/8);
5238 */
5239         //nicv = (u32*) ((nic - nicbegin) + (int)begin);
5240         nicv = (u32*) ((nic - nicbegin) + (u8*)begin);
5241         if((head <= tail && (nicv > tail || nicv < head)) ||
5242                 (head > tail && (nicv > tail && nicv < head))){
5243
5244                         DMESGW("nic has lost pointer");
5245 #ifdef DEBUG_TX_DESC
5246                         //check_tx_ring(dev,NORM_PRIORITY);
5247                         check_tx_ring(dev,pri);
5248 #endif
5249                         spin_unlock_irqrestore(&priv->tx_lock,flag);
5250                         rtl8180_restart(dev);
5251                         return;
5252                 }
5253
5254         /* we check all the descriptors between the head and the nic,
5255          * but not the currenly pointed by the nic (the next to be txed)
5256          * and the previous of the pointed (might be in process ??)
5257         */
5258         //if (head == nic) return;
5259         //DMESG("%x %x",head,nic);
5260         offs = (nic - nicbegin);
5261         //DMESG("%x %x %x",nic ,(u32)nicbegin, (int)nic -nicbegin);
5262
5263         offs = offs / 8 /4;
5264
5265         hd = (head - begin) /8;
5266
5267         if(offs >= hd)
5268                 j = offs - hd;
5269         else
5270                 j = offs + (priv->txringcount -1 -hd);
5271         //      j= priv->txringcount -1- (hd - offs);
5272
5273         j-=2;
5274         if(j<0) j=0;
5275
5276
5277         for(i=0;i<j;i++)
5278         {
5279 //              printk("+++++++++++++check status desc\n");
5280                 if((*head) & (1<<31))
5281                         break;
5282                 if(((*head)&(0x10000000)) != 0){
5283 //                      printk("++++++++++++++last desc,retry count is %d\n",((*head) & (0x000000ff)));
5284                         priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
5285 #if 1
5286                         if(!error)
5287                         {
5288                                 priv->NumTxOkTotal++;
5289 //                              printk("NumTxOkTotal is %d\n",priv->NumTxOkTotal++);
5290                         }
5291 #endif
5292                         //      printk("in function %s:curr_retry_count is %d\n",__func__,((*head) & (0x000000ff)));
5293                 }
5294                 if(!error){
5295                         priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
5296                 }
5297 //              printk("in function %s:curr_txokbyte_count is %d\n",__func__,(*(head+3)) & (0x00000fff));
5298                 *head = *head &~ (1<<31);
5299
5300                 if((head - begin)/8 == priv->txringcount-1)
5301                         head=begin;
5302
5303                 else
5304                         head+=8;
5305         }
5306
5307         //DMESG("%x",txdv[0]);
5308         /* the head has been moved to the last certainly TXed
5309          * (or at least processed by the nic) packet.
5310          * The driver take forcefully owning of all these packets
5311          * If the packet previous of the nic pointer has been
5312          * processed this doesn't matter: it will be checked
5313          * here at the next round. Anyway if no more packet are
5314          * TXed no memory leak occour at all.
5315          */
5316
5317         switch(pri) {
5318         case MANAGE_PRIORITY:
5319                 priv->txmapringhead = head;
5320                         //printk("1==========================================> priority check!\n");
5321                 if(priv->ack_tx_to_ieee){
5322                                 // try to implement power-save mode 2008.1.22
5323                 //      printk("2==========================================> priority check!\n");
5324 #if 1
5325                         if(rtl8180_is_tx_queue_empty(dev)){
5326                         //      printk("tx queue empty, after send null sleep packet, try to sleep !\n");
5327                                 priv->ack_tx_to_ieee = 0;
5328                                 ieee80211_ps_tx_ack(priv->ieee80211,!error);
5329                         }
5330 #endif
5331                 }
5332                 break;
5333
5334         case BK_PRIORITY:
5335                 priv->txbkpringhead = head;
5336                 break;
5337
5338         case BE_PRIORITY:
5339                 priv->txbepringhead = head;
5340                 break;
5341
5342         case VI_PRIORITY:
5343                 priv->txvipringhead = head;
5344                 break;
5345
5346         case VO_PRIORITY:
5347                 priv->txvopringhead = head;
5348                 break;
5349
5350         case HI_PRIORITY:
5351                 priv->txhpringhead = head;
5352                 break;
5353         }
5354
5355         /*DMESG("%x %x %x", (priv->txnpringhead - priv->txnpring) /8 ,
5356                 (priv->txnpringtail - priv->txnpring) /8,
5357                 offs );
5358         */
5359
5360         spin_unlock_irqrestore(&priv->tx_lock,flag);
5361
5362 }
5363
5364 void rtl8180_tx_irq_wq(struct work_struct *work)
5365 {
5366         //struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
5367         struct delayed_work *dwork = to_delayed_work(work);
5368         struct ieee80211_device * ieee = (struct ieee80211_device*)
5369                                                container_of(dwork, struct ieee80211_device, watch_dog_wq);
5370         struct net_device *dev = ieee->dev;
5371
5372         rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
5373 }
5374 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
5375 {
5376         struct net_device *dev = (struct net_device *) netdev;
5377         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5378         unsigned long flags;
5379         u32 inta;
5380
5381         /* We should return IRQ_NONE, but for now let me keep this */
5382         if(priv->irq_enabled == 0) return IRQ_HANDLED;
5383
5384         spin_lock_irqsave(&priv->irq_th_lock,flags);
5385
5386         //ISR: 4bytes
5387         inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
5388         write_nic_dword(dev,ISR,inta); // reset int situation
5389
5390         priv->stats.shints++;
5391
5392         //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
5393
5394         if(!inta){
5395                 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
5396                 return IRQ_HANDLED;
5397         /*
5398            most probably we can safely return IRQ_NONE,
5399            but for now is better to avoid problems
5400         */
5401         }
5402
5403         if(inta == 0xffff){
5404                         /* HW disappared */
5405                         spin_unlock_irqrestore(&priv->irq_th_lock,flags);
5406                         return IRQ_HANDLED;
5407         }
5408
5409         priv->stats.ints++;
5410 #ifdef DEBUG_IRQ
5411         DMESG("NIC irq %x",inta);
5412 #endif
5413         //priv->irqpending = inta;
5414
5415
5416         if(!netif_running(dev)) {
5417                 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
5418                 return IRQ_HANDLED;
5419         }
5420
5421         if(inta & ISR_TimeOut){
5422                 write_nic_dword(dev, TimerInt, 0);
5423                 //DMESG("=================>waking up");
5424 //              rtl8180_hw_wakeup(dev);
5425         }
5426
5427         if(inta & ISR_TBDOK){
5428                 priv->stats.txbeacon++;
5429         }
5430
5431         if(inta & ISR_TBDER){
5432                 priv->stats.txbeaconerr++;
5433         }
5434
5435         if(inta  & IMR_TMGDOK ) {
5436 //              priv->NumTxOkTotal++;
5437                 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
5438 //                      schedule_work(&priv->tx_irq_wq);
5439
5440         }
5441
5442         if(inta & ISR_THPDER){
5443 #ifdef DEBUG_TX
5444                 DMESG ("TX high priority ERR");
5445 #endif
5446                 priv->stats.txhperr++;
5447                 rtl8180_tx_isr(dev,HI_PRIORITY,1);
5448                 priv->ieee80211->stats.tx_errors++;
5449         }
5450
5451         if(inta & ISR_THPDOK){ //High priority tx ok
5452 #ifdef DEBUG_TX
5453                 DMESG ("TX high priority OK");
5454 #endif
5455 //              priv->NumTxOkTotal++;
5456                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
5457                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
5458                 priv->stats.txhpokint++;
5459                 rtl8180_tx_isr(dev,HI_PRIORITY,0);
5460         }
5461
5462         if(inta & ISR_RER) {
5463                 priv->stats.rxerr++;
5464 #ifdef DEBUG_RX
5465                 DMESGW("RX error int");
5466 #endif
5467         }
5468         if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY
5469                 priv->stats.txbkperr++;
5470                 priv->ieee80211->stats.tx_errors++;
5471 #ifdef DEBUG_TX
5472                 DMESGW("TX bkp error int");
5473 #endif
5474                 //tasklet_schedule(&priv->irq_tx_tasklet);
5475                 rtl8180_tx_isr(dev,BK_PRIORITY,1);
5476                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
5477         }
5478
5479         if(inta & ISR_TBEDER){ //corresponding to BE_PRIORITY
5480                 priv->stats.txbeperr++;
5481                 priv->ieee80211->stats.tx_errors++;
5482 #ifdef DEBUG_TX
5483                 DMESGW("TX bep error int");
5484 #endif
5485                 rtl8180_tx_isr(dev,BE_PRIORITY,1);
5486                 //tasklet_schedule(&priv->irq_tx_tasklet);
5487                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
5488         }
5489         if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY
5490                 priv->stats.txnperr++;
5491                 priv->ieee80211->stats.tx_errors++;
5492 #ifdef DEBUG_TX
5493                 DMESGW("TX np error int");
5494 #endif
5495                 //tasklet_schedule(&priv->irq_tx_tasklet);
5496                 rtl8180_tx_isr(dev,NORM_PRIORITY,1);
5497                 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
5498         }
5499
5500         if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY
5501                 priv->stats.txlperr++;
5502                 priv->ieee80211->stats.tx_errors++;
5503 #ifdef DEBUG_TX
5504                 DMESGW("TX lp error int");
5505 #endif
5506                 rtl8180_tx_isr(dev,LOW_PRIORITY,1);
5507                 //tasklet_schedule(&priv->irq_tx_tasklet);
5508                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
5509         }
5510
5511         if(inta & ISR_ROK){
5512 #ifdef DEBUG_RX
5513                 DMESG("Frame arrived !");
5514 #endif
5515                 //priv->NumRxOkInPeriod++;  //YJ,del,080828
5516                 priv->stats.rxint++;
5517                 tasklet_schedule(&priv->irq_rx_tasklet);
5518         }
5519
5520         if(inta & ISR_RQoSOK ){
5521 #ifdef DEBUG_RX
5522                 DMESG("QoS Frame arrived !");
5523 #endif
5524                 //priv->NumRxOkInPeriod++;  //YJ,del,080828
5525                 priv->stats.rxint++;
5526                 tasklet_schedule(&priv->irq_rx_tasklet);
5527         }
5528         if(inta & ISR_BcnInt) {
5529                 //DMESG("Preparing Beacons");
5530                 rtl8180_prepare_beacon(dev);
5531         }
5532
5533         if(inta & ISR_RDU){
5534 //#ifdef DEBUG_RX
5535                 DMESGW("No RX descriptor available");
5536                 priv->stats.rxrdu++;
5537 //#endif
5538                 tasklet_schedule(&priv->irq_rx_tasklet);
5539                 /*queue_work(priv->workqueue ,&priv->restart_work);*/
5540
5541         }
5542         if(inta & ISR_RXFOVW){
5543 #ifdef DEBUG_RX
5544                 DMESGW("RX fifo overflow");
5545 #endif
5546                 priv->stats.rxoverflow++;
5547                 tasklet_schedule(&priv->irq_rx_tasklet);
5548                 //queue_work(priv->workqueue ,&priv->restart_work);
5549         }
5550
5551         if(inta & ISR_TXFOVW) priv->stats.txoverflow++;
5552
5553         if(inta & ISR_TNPDOK){ //Normal priority tx ok
5554 #ifdef DEBUG_TX
5555                 DMESG ("TX normal priority OK");
5556 #endif
5557 //              priv->NumTxOkTotal++;
5558                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
5559                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
5560                 //      priv->ieee80211->stats.tx_packets++;
5561                 priv->stats.txnpokint++;
5562                 rtl8180_tx_isr(dev,NORM_PRIORITY,0);
5563         }
5564
5565         if(inta & ISR_TLPDOK){ //Low priority tx ok
5566 #ifdef DEBUG_TX
5567                 DMESG ("TX low priority OK");
5568 #endif
5569 //              priv->NumTxOkTotal++;
5570                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
5571                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
5572                 //      priv->ieee80211->stats.tx_packets++;
5573                 priv->stats.txlpokint++;
5574                 rtl8180_tx_isr(dev,LOW_PRIORITY,0);
5575                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
5576         }
5577
5578         if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY
5579                 priv->stats.txbkpokint++;
5580 #ifdef DEBUG_TX
5581                 DMESGW("TX bk priority ok");
5582 #endif
5583 //              priv->NumTxOkTotal++;
5584                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
5585                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
5586                 rtl8180_tx_isr(dev,BK_PRIORITY,0);
5587                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
5588         }
5589
5590         if(inta & ISR_TBEDOK){ //corresponding to BE_PRIORITY
5591                 priv->stats.txbeperr++;
5592 #ifdef DEBUG_TX
5593                 DMESGW("TX be priority ok");
5594 #endif
5595 //              priv->NumTxOkTotal++;
5596                 //priv->NumTxOkInPeriod++;  //YJ,del,080828
5597                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
5598                 rtl8180_tx_isr(dev,BE_PRIORITY,0);
5599                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
5600         }
5601         force_pci_posting(dev);
5602         spin_unlock_irqrestore(&priv->irq_th_lock,flags);
5603
5604         return IRQ_HANDLED;
5605 }
5606
5607
5608 void rtl8180_irq_rx_tasklet(struct r8180_priv* priv)
5609 {
5610 //      unsigned long flags;
5611
5612 /*      spin_lock_irqsave(&priv->irq_lock, flags);
5613         priv->irq_mask &=~IMR_ROK;
5614         priv->irq_mask &=~IMR_RDU;
5615
5616         rtl8180_irq_enable(priv->dev);
5617         spin_unlock_irqrestore(&priv->irq_lock, flags);
5618 */
5619         rtl8180_rx(priv->dev);
5620
5621 /*      spin_lock_irqsave(&priv->irq_lock, flags);
5622         priv->irq_mask |= IMR_ROK;
5623         priv->irq_mask |= IMR_RDU;
5624         rtl8180_irq_enable(priv->dev);
5625         spin_unlock_irqrestore(&priv->irq_lock, flags);
5626 */
5627 }
5628
5629 /****************************************************************************
5630 lizhaoming--------------------------- RF power on/power off -----------------
5631 *****************************************************************************/
5632
5633 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
5634 {
5635         //struct delayed_work *dwork = to_delayed_work(work);
5636         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
5637         struct net_device *dev = ieee->dev;
5638         struct r8180_priv *priv = ieee80211_priv(dev);
5639
5640         //u16 tmp2byte;
5641         u8 btPSR;
5642         u8 btConfig0;
5643         RT_RF_POWER_STATE       eRfPowerStateToSet;
5644         bool    bActuallySet=false;
5645
5646         char *argv[3];
5647         static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
5648         static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
5649         static int readf_count = 0;
5650         //printk("============>%s in \n", __func__);
5651
5652 #ifdef ENABLE_LPS
5653         if(readf_count % 10 == 0)
5654                 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
5655
5656         readf_count = (readf_count+1)%0xffff;
5657 #endif
5658                 {
5659                         // We should turn off LED before polling FF51[4].
5660
5661                         //Turn off LED.
5662                         btPSR = read_nic_byte(dev, PSR);
5663                         write_nic_byte(dev, PSR, (btPSR & ~BIT3));
5664
5665                         //It need to delay 4us suggested by Jong, 2008-01-16
5666                         udelay(4);
5667
5668                         //HW radio On/Off according to the value of FF51[4](config0)
5669                         btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
5670
5671                         //Turn on LED.
5672                         write_nic_byte(dev, PSR, btPSR| BIT3);
5673
5674                         eRfPowerStateToSet = (btConfig0 & BIT4) ?  eRfOn : eRfOff;
5675
5676                         if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn))
5677                         {
5678                                 priv->ieee80211->bHwRadioOff = false;
5679                                 bActuallySet = true;
5680                         }
5681                         else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff))
5682                         {
5683                                 priv->ieee80211->bHwRadioOff = true;
5684                                 bActuallySet = true;
5685                         }
5686
5687                         if(bActuallySet)
5688                         {
5689                                 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
5690
5691                                 /* To update the UI status for Power status changed */
5692                                 if(priv->ieee80211->bHwRadioOff == true)
5693                                         argv[1] = "RFOFF";
5694                                 else{
5695                                         //if(!priv->RfOffReason)
5696                                                 argv[1] = "RFON";
5697                                         //else
5698                                         //      argv[1] = "RFOFF";
5699                                 }
5700                                 argv[0] = RadioPowerPath;
5701                                 argv[2] = NULL;
5702
5703                                 call_usermodehelper(RadioPowerPath,argv,envp,1);
5704                         }
5705
5706                 }
5707
5708 }
5709
5710 static u8 read_acadapter_file(char *filename)
5711 {
5712         return 0;
5713 }
5714
5715 /***************************************************************************
5716      ------------------- module init / exit stubs ----------------
5717 ****************************************************************************/
5718 module_init(rtl8180_pci_module_init);
5719 module_exit(rtl8180_pci_module_exit);
5720