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   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         rtmp_init.c
  29
  30         Abstract:
  31         Miniport generic portion header file
  32
  33         Revision History:
  34         Who         When          What
  35         --------    ----------    ----------------------------------------------
  36         Paul Lin    2002-08-01    created
  37     John Chang  2004-08-20    RT2561/2661 use scatter-gather scheme
  38     Jan Lee  2006-09-15    RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
  39 */
  40 #include "../rt_config.h"
  41 #ifndef RT30xx
  42 #ifdef RT2860
  43 #include "firmware.h"
  44 #include <linux/bitrev.h>
  45 #endif
  46 #ifdef RT2870
  47 #include "../../rt2870/common/firmware.h"
  48 #endif
  49 #endif
  50 #ifdef RT30xx
  51 #include "../../rt3070/firmware.h"
  52 #endif
  53
  54 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  55 ULONG    BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
  56                                         0x00000010, 0x00000020, 0x00000040, 0x00000080,
  57                                         0x00000100, 0x00000200, 0x00000400, 0x00000800,
  58                                         0x00001000, 0x00002000, 0x00004000, 0x00008000,
  59                                         0x00010000, 0x00020000, 0x00040000, 0x00080000,
  60                                         0x00100000, 0x00200000, 0x00400000, 0x00800000,
  61                                         0x01000000, 0x02000000, 0x04000000, 0x08000000,
  62                                         0x10000000, 0x20000000, 0x40000000, 0x80000000};
  63
  64 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  65
  66 const unsigned short ccitt_16Table[] = {
  67         0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
  68         0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
  69         0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
  70         0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
  71         0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
  72         0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
  73         0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
  74         0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
  75         0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
  76         0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
  77         0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
  78         0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
  79         0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
  80         0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
  81         0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
  82         0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
  83         0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
  84         0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
  85         0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
  86         0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
  87         0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
  88         0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
  89         0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
  90         0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
  91         0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
  92         0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
  93         0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
  94         0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
  95         0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
  96         0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
  97         0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
  98         0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
  99 };
 100 #define ByteCRC16(v, crc) \
 101         (unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
 102
 103 #ifdef RT2870
 104 unsigned char BitReverse(unsigned char x)
 105 {
 106         int i;
 107         unsigned char Temp=0;
 108         for(i=0; ; i++)
 109         {
 110                 if(x & 0x80)    Temp |= 0x80;
 111                 if(i==7)                break;
 112                 x       <<= 1;
 113                 Temp >>= 1;
 114         }
 115         return Temp;
 116 }
 117 #endif
 118
 119 //
 120 // BBP register initialization set
 121 //
 122 REG_PAIR   BBPRegTable[] = {
 123         {BBP_R65,               0x2C},          // fix rssi issue
 124         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
 125         {BBP_R69,               0x12},
 126         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
 127         {BBP_R73,               0x10},
 128         {BBP_R81,               0x37},
 129         {BBP_R82,               0x62},
 130         {BBP_R83,               0x6A},
 131         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
 132         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
 133         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
 134         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
 135         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
 136         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
 137 };
 138 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
 139
 140 //
 141 // RF register initialization set
 142 //
 143 #ifdef RT2870
 144 REG_PAIR   RT30xx_RFRegTable[] = {
 145         {RF_R04,          0x40},
 146         {RF_R05,          0x03},
 147         {RF_R06,          0x02},
 148         {RF_R07,          0x70},
 149         {RF_R09,          0x0F},
 150 #ifndef RT30xx
 151         {RF_R10,          0x71},
 152 #endif
 153 #ifdef RT30xx
 154         {RF_R10,          0x41},
 155 #endif
 156         {RF_R11,          0x21},
 157         {RF_R12,          0x7B},
 158         {RF_R14,          0x90},
 159         {RF_R15,          0x58},
 160         {RF_R16,          0xB3},
 161         {RF_R17,          0x92},
 162         {RF_R18,          0x2C},
 163         {RF_R19,          0x02},
 164         {RF_R20,          0xBA},
 165         {RF_R21,          0xDB},
 166         {RF_R24,          0x16},
 167         {RF_R25,          0x01},
 168 #ifndef RT30xx
 169         {RF_R27,          0x03},
 170 #endif
 171         {RF_R29,          0x1F},
 172 };
 173 #define NUM_RF_REG_PARMS        (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR))
 174 #endif // RT2870 //
 175
 176 //
 177 // ASIC register initialization sets
 178 //
 179
 180 RTMP_REG_PAIR   MACRegTable[] = {
 181 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
 182         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
 183         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
 184 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
 185         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 186         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 187 #else
 188     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
 189 #endif // HW_BEACON_OFFSET //
 190
 191         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
 192         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
 193         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
 194         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
 195         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
 196         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
 197         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
 198         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
 199         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
 200         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
 201         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
 202         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
 203         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
 204         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
 205         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 206         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 207 //PS packets use Tx1Q (for HCCA) when dequeue from PS unicast queue (WiFi WPA2 MA9_DT1 for Marvell B STA)
 208 #ifdef RT2870
 209         {PBF_CFG,                               0xf40006},              // Only enable Queue 2
 210         {MM40_PROT_CFG,                 0x3F44084},             // Initial Auto_Responder, because QA will turn off Auto-Responder
 211         {WPDMA_GLO_CFG,                 0x00000030},
 212 #endif // RT2870 //
 213         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 214         {GF40_PROT_CFG,                 0x03F44084},
 215         {MM20_PROT_CFG,                 0x01744004},
 216 #ifdef RT2860
 217         {MM40_PROT_CFG,                 0x03F54084},
 218 #endif
 219         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 220         {TX_RTS_CFG,                    0x00092b20},
 221         {EXP_ACK_TIME,                  0x002400ca},    // default value
 222         {TXOP_HLDR_ET,                  0x00000002},
 223
 224         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 225                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 226                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 227                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
 228         {XIFS_TIME_CFG,                 0x33a41010},
 229         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 230 };
 231
 232 RTMP_REG_PAIR   STAMACRegTable[] =      {
 233         {WMM_AIFSN_CFG,         0x00002273},
 234         {WMM_CWMIN_CFG, 0x00002344},
 235         {WMM_CWMAX_CFG, 0x000034aa},
 236 };
 237
 238 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 239 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 240
 241 #ifdef RT2870
 242 //
 243 // RT2870 Firmware Spec only used 1 oct for version expression
 244 //
 245 #define FIRMWARE_MINOR_VERSION  7
 246
 247 #endif // RT2870 //
 248
 249 // New 8k byte firmware size for RT3071/RT3072
 250 #define FIRMWAREIMAGE_MAX_LENGTH        0x2000
 251 #define FIRMWAREIMAGE_LENGTH            (sizeof (FirmwareImage) / sizeof(UCHAR))
 252 #define FIRMWARE_MAJOR_VERSION  0
 253
 254 #define FIRMWAREIMAGEV1_LENGTH  0x1000
 255 #define FIRMWAREIMAGEV2_LENGTH  0x1000
 256
 257 #ifdef RT2860
 258 #define FIRMWARE_MINOR_VERSION  2
 259 #endif
 260
 261
 262 /*
 263         ========================================================================
 264
 265         Routine Description:
 266                 Allocate RTMP_ADAPTER data block and do some initialization
 267
 268         Arguments:
 269                 Adapter         Pointer to our adapter
 270
 271         Return Value:
 272                 NDIS_STATUS_SUCCESS
 273                 NDIS_STATUS_FAILURE
 274
 275         IRQL = PASSIVE_LEVEL
 276
 277         Note:
 278
 279         ========================================================================
 280 */
 281 NDIS_STATUS     RTMPAllocAdapterBlock(
 282         IN  PVOID       handle,
 283         OUT     PRTMP_ADAPTER   *ppAdapter)
 284 {
 285         PRTMP_ADAPTER   pAd;
 286         NDIS_STATUS             Status;
 287         INT                     index;
 288         UCHAR                   *pBeaconBuf = NULL;
 289
 290         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 291
 292         *ppAdapter = NULL;
 293
 294         do
 295         {
 296                 // Allocate RTMP_ADAPTER memory block
 297                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 298                 if (pBeaconBuf == NULL)
 299                 {
 300                         Status = NDIS_STATUS_FAILURE;
 301                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 302                         break;
 303                 }
 304
 305                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 306                 if (Status != NDIS_STATUS_SUCCESS)
 307                 {
 308                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 309                         break;
 310                 }
 311                 pAd->BeaconBuf = pBeaconBuf;
 312                 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
 313
 314
 315                 // Init spin locks
 316                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
 317 #ifdef RT2860
 318                 NdisAllocateSpinLock(&pAd->RxRingLock);
 319 #endif
 320
 321                 for (index =0 ; index < NUM_OF_TX_RING; index++)
 322                 {
 323                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 324                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 325                         pAd->DeQueueRunning[index] = FALSE;
 326                 }
 327
 328                 NdisAllocateSpinLock(&pAd->irq_lock);
 329
 330         } while (FALSE);
 331
 332         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 333                 kfree(pBeaconBuf);
 334
 335         *ppAdapter = pAd;
 336
 337         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 338         return Status;
 339 }
 340
 341 /*
 342         ========================================================================
 343
 344         Routine Description:
 345                 Read initial Tx power per MCS and BW from EEPROM
 346
 347         Arguments:
 348                 Adapter                                         Pointer to our adapter
 349
 350         Return Value:
 351                 None
 352
 353         IRQL = PASSIVE_LEVEL
 354
 355         Note:
 356
 357         ========================================================================
 358 */
 359 VOID    RTMPReadTxPwrPerRate(
 360         IN      PRTMP_ADAPTER   pAd)
 361 {
 362         ULONG           data, Adata, Gdata;
 363         USHORT          i, value, value2;
 364         INT                     Apwrdelta, Gpwrdelta;
 365         UCHAR           t1,t2,t3,t4;
 366         BOOLEAN         bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 367
 368         //
 369         // Get power delta for 20MHz and 40MHz.
 370         //
 371         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 372         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 373         Apwrdelta = 0;
 374         Gpwrdelta = 0;
 375
 376         if ((value2 & 0xff) != 0xff)
 377         {
 378                 if ((value2 & 0x80))
 379                         Gpwrdelta = (value2&0xf);
 380
 381                 if ((value2 & 0x40))
 382                         bGpwrdeltaMinus = FALSE;
 383                 else
 384                         bGpwrdeltaMinus = TRUE;
 385         }
 386         if ((value2 & 0xff00) != 0xff00)
 387         {
 388                 if ((value2 & 0x8000))
 389                         Apwrdelta = ((value2&0xf00)>>8);
 390
 391                 if ((value2 & 0x4000))
 392                         bApwrdeltaMinus = FALSE;
 393                 else
 394                         bApwrdeltaMinus = TRUE;
 395         }
 396         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 397
 398         //
 399         // Get Txpower per MCS for 20MHz in 2.4G.
 400         //
 401         for (i=0; i<5; i++)
 402         {
 403                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 404                 data = value;
 405                 if (bApwrdeltaMinus == FALSE)
 406                 {
 407                         t1 = (value&0xf)+(Apwrdelta);
 408                         if (t1 > 0xf)
 409                                 t1 = 0xf;
 410                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 411                         if (t2 > 0xf)
 412                                 t2 = 0xf;
 413                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 414                         if (t3 > 0xf)
 415                                 t3 = 0xf;
 416                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 417                         if (t4 > 0xf)
 418                                 t4 = 0xf;
 419                 }
 420                 else
 421                 {
 422                         if ((value&0xf) > Apwrdelta)
 423                                 t1 = (value&0xf)-(Apwrdelta);
 424                         else
 425                                 t1 = 0;
 426                         if (((value&0xf0)>>4) > Apwrdelta)
 427                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 428                         else
 429                                 t2 = 0;
 430                         if (((value&0xf00)>>8) > Apwrdelta)
 431                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 432                         else
 433                                 t3 = 0;
 434                         if (((value&0xf000)>>12) > Apwrdelta)
 435                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 436                         else
 437                                 t4 = 0;
 438                 }
 439                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 440                 if (bGpwrdeltaMinus == FALSE)
 441                 {
 442                         t1 = (value&0xf)+(Gpwrdelta);
 443                         if (t1 > 0xf)
 444                                 t1 = 0xf;
 445                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 446                         if (t2 > 0xf)
 447                                 t2 = 0xf;
 448                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 449                         if (t3 > 0xf)
 450                                 t3 = 0xf;
 451                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 452                         if (t4 > 0xf)
 453                                 t4 = 0xf;
 454                 }
 455                 else
 456                 {
 457                         if ((value&0xf) > Gpwrdelta)
 458                                 t1 = (value&0xf)-(Gpwrdelta);
 459                         else
 460                                 t1 = 0;
 461                         if (((value&0xf0)>>4) > Gpwrdelta)
 462                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 463                         else
 464                                 t2 = 0;
 465                         if (((value&0xf00)>>8) > Gpwrdelta)
 466                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 467                         else
 468                                 t3 = 0;
 469                         if (((value&0xf000)>>12) > Gpwrdelta)
 470                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 471                         else
 472                                 t4 = 0;
 473                 }
 474                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 475
 476                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 477                 if (bApwrdeltaMinus == FALSE)
 478                 {
 479                         t1 = (value&0xf)+(Apwrdelta);
 480                         if (t1 > 0xf)
 481                                 t1 = 0xf;
 482                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 483                         if (t2 > 0xf)
 484                                 t2 = 0xf;
 485                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 486                         if (t3 > 0xf)
 487                                 t3 = 0xf;
 488                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 489                         if (t4 > 0xf)
 490                                 t4 = 0xf;
 491                 }
 492                 else
 493                 {
 494                         if ((value&0xf) > Apwrdelta)
 495                                 t1 = (value&0xf)-(Apwrdelta);
 496                         else
 497                                 t1 = 0;
 498                         if (((value&0xf0)>>4) > Apwrdelta)
 499                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 500                         else
 501                                 t2 = 0;
 502                         if (((value&0xf00)>>8) > Apwrdelta)
 503                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 504                         else
 505                                 t3 = 0;
 506                         if (((value&0xf000)>>12) > Apwrdelta)
 507                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 508                         else
 509                                 t4 = 0;
 510                 }
 511                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 512                 if (bGpwrdeltaMinus == FALSE)
 513                 {
 514                         t1 = (value&0xf)+(Gpwrdelta);
 515                         if (t1 > 0xf)
 516                                 t1 = 0xf;
 517                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 518                         if (t2 > 0xf)
 519                                 t2 = 0xf;
 520                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 521                         if (t3 > 0xf)
 522                                 t3 = 0xf;
 523                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 524                         if (t4 > 0xf)
 525                                 t4 = 0xf;
 526                 }
 527                 else
 528                 {
 529                         if ((value&0xf) > Gpwrdelta)
 530                                 t1 = (value&0xf)-(Gpwrdelta);
 531                         else
 532                                 t1 = 0;
 533                         if (((value&0xf0)>>4) > Gpwrdelta)
 534                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 535                         else
 536                                 t2 = 0;
 537                         if (((value&0xf00)>>8) > Gpwrdelta)
 538                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 539                         else
 540                                 t3 = 0;
 541                         if (((value&0xf000)>>12) > Gpwrdelta)
 542                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 543                         else
 544                                 t4 = 0;
 545                 }
 546                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 547                 data |= (value<<16);
 548
 549                 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
 550                 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
 551
 552                 if (data != 0xffffffff)
 553                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 554                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 555         }
 556
 557         //
 558         // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
 559         //
 560         bValid = TRUE;
 561         for (i=0; i<6; i++)
 562         {
 563                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
 564                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 565                 {
 566                         bValid = FALSE;
 567                         break;
 568                 }
 569         }
 570
 571         //
 572         // Get Txpower per MCS for 40MHz in 2.4G.
 573         //
 574         if (bValid)
 575         {
 576                 for (i=0; i<4; i++)
 577                 {
 578                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
 579                         if (bGpwrdeltaMinus == FALSE)
 580                         {
 581                                 t1 = (value&0xf)+(Gpwrdelta);
 582                                 if (t1 > 0xf)
 583                                         t1 = 0xf;
 584                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 585                                 if (t2 > 0xf)
 586                                         t2 = 0xf;
 587                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 588                                 if (t3 > 0xf)
 589                                         t3 = 0xf;
 590                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 591                                 if (t4 > 0xf)
 592                                         t4 = 0xf;
 593                         }
 594                         else
 595                         {
 596                                 if ((value&0xf) > Gpwrdelta)
 597                                         t1 = (value&0xf)-(Gpwrdelta);
 598                                 else
 599                                         t1 = 0;
 600                                 if (((value&0xf0)>>4) > Gpwrdelta)
 601                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 602                                 else
 603                                         t2 = 0;
 604                                 if (((value&0xf00)>>8) > Gpwrdelta)
 605                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 606                                 else
 607                                         t3 = 0;
 608                                 if (((value&0xf000)>>12) > Gpwrdelta)
 609                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 610                                 else
 611                                         t4 = 0;
 612                         }
 613                         Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 614
 615                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
 616                         if (bGpwrdeltaMinus == FALSE)
 617                         {
 618                                 t1 = (value&0xf)+(Gpwrdelta);
 619                                 if (t1 > 0xf)
 620                                         t1 = 0xf;
 621                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 622                                 if (t2 > 0xf)
 623                                         t2 = 0xf;
 624                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 625                                 if (t3 > 0xf)
 626                                         t3 = 0xf;
 627                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 628                                 if (t4 > 0xf)
 629                                         t4 = 0xf;
 630                         }
 631                         else
 632                         {
 633                                 if ((value&0xf) > Gpwrdelta)
 634                                         t1 = (value&0xf)-(Gpwrdelta);
 635                                 else
 636                                         t1 = 0;
 637                                 if (((value&0xf0)>>4) > Gpwrdelta)
 638                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 639                                 else
 640                                         t2 = 0;
 641                                 if (((value&0xf00)>>8) > Gpwrdelta)
 642                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 643                                 else
 644                                         t3 = 0;
 645                                 if (((value&0xf000)>>12) > Gpwrdelta)
 646                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 647                                 else
 648                                         t4 = 0;
 649                         }
 650                         Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 651
 652                         if (i == 0)
 653                                 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
 654                         else
 655                                 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
 656
 657                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
 658                 }
 659         }
 660
 661         //
 662         // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 663         //
 664         bValid = TRUE;
 665         for (i=0; i<8; i++)
 666         {
 667                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
 668                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 669                 {
 670                         bValid = FALSE;
 671                         break;
 672                 }
 673         }
 674
 675         //
 676         // Get Txpower per MCS for 20MHz in 5G.
 677         //
 678         if (bValid)
 679         {
 680                 for (i=0; i<5; i++)
 681                 {
 682                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
 683                         if (bApwrdeltaMinus == FALSE)
 684                         {
 685                                 t1 = (value&0xf)+(Apwrdelta);
 686                                 if (t1 > 0xf)
 687                                         t1 = 0xf;
 688                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 689                                 if (t2 > 0xf)
 690                                         t2 = 0xf;
 691                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 692                                 if (t3 > 0xf)
 693                                         t3 = 0xf;
 694                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 695                                 if (t4 > 0xf)
 696                                         t4 = 0xf;
 697                         }
 698                         else
 699                         {
 700                                 if ((value&0xf) > Apwrdelta)
 701                                         t1 = (value&0xf)-(Apwrdelta);
 702                                 else
 703                                         t1 = 0;
 704                                 if (((value&0xf0)>>4) > Apwrdelta)
 705                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 706                                 else
 707                                         t2 = 0;
 708                                 if (((value&0xf00)>>8) > Apwrdelta)
 709                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 710                                 else
 711                                         t3 = 0;
 712                                 if (((value&0xf000)>>12) > Apwrdelta)
 713                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 714                                 else
 715                                         t4 = 0;
 716                         }
 717                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 718
 719                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
 720                         if (bApwrdeltaMinus == FALSE)
 721                         {
 722                                 t1 = (value&0xf)+(Apwrdelta);
 723                                 if (t1 > 0xf)
 724                                         t1 = 0xf;
 725                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 726                                 if (t2 > 0xf)
 727                                         t2 = 0xf;
 728                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 729                                 if (t3 > 0xf)
 730                                         t3 = 0xf;
 731                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 732                                 if (t4 > 0xf)
 733                                         t4 = 0xf;
 734                         }
 735                         else
 736                         {
 737                                 if ((value&0xf) > Apwrdelta)
 738                                         t1 = (value&0xf)-(Apwrdelta);
 739                                 else
 740                                         t1 = 0;
 741                                 if (((value&0xf0)>>4) > Apwrdelta)
 742                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 743                                 else
 744                                         t2 = 0;
 745                                 if (((value&0xf00)>>8) > Apwrdelta)
 746                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 747                                 else
 748                                         t3 = 0;
 749                                 if (((value&0xf000)>>12) > Apwrdelta)
 750                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 751                                 else
 752                                         t4 = 0;
 753                         }
 754                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 755
 756                         if (i == 0)
 757                                 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 758                         else
 759                                 pAd->Tx20MPwrCfgABand[i] = Adata;
 760
 761                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
 762                 }
 763         }
 764
 765         //
 766         // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 767         //
 768         bValid = TRUE;
 769         for (i=0; i<6; i++)
 770         {
 771                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
 772                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 773                 {
 774                         bValid = FALSE;
 775                         break;
 776                 }
 777         }
 778
 779         //
 780         // Get Txpower per MCS for 40MHz in 5G.
 781         //
 782         if (bValid)
 783         {
 784                 for (i=0; i<4; i++)
 785                 {
 786                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
 787                         if (bApwrdeltaMinus == FALSE)
 788                         {
 789                                 t1 = (value&0xf)+(Apwrdelta);
 790                                 if (t1 > 0xf)
 791                                         t1 = 0xf;
 792                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 793                                 if (t2 > 0xf)
 794                                         t2 = 0xf;
 795                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 796                                 if (t3 > 0xf)
 797                                         t3 = 0xf;
 798                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 799                                 if (t4 > 0xf)
 800                                         t4 = 0xf;
 801                         }
 802                         else
 803                         {
 804                                 if ((value&0xf) > Apwrdelta)
 805                                         t1 = (value&0xf)-(Apwrdelta);
 806                                 else
 807                                         t1 = 0;
 808                                 if (((value&0xf0)>>4) > Apwrdelta)
 809                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 810                                 else
 811                                         t2 = 0;
 812                                 if (((value&0xf00)>>8) > Apwrdelta)
 813                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 814                                 else
 815                                         t3 = 0;
 816                                 if (((value&0xf000)>>12) > Apwrdelta)
 817                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 818                                 else
 819                                         t4 = 0;
 820                         }
 821                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 822
 823                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
 824                         if (bApwrdeltaMinus == FALSE)
 825                         {
 826                                 t1 = (value&0xf)+(Apwrdelta);
 827                                 if (t1 > 0xf)
 828                                         t1 = 0xf;
 829                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 830                                 if (t2 > 0xf)
 831                                         t2 = 0xf;
 832                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 833                                 if (t3 > 0xf)
 834                                         t3 = 0xf;
 835                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 836                                 if (t4 > 0xf)
 837                                         t4 = 0xf;
 838                         }
 839                         else
 840                         {
 841                                 if ((value&0xf) > Apwrdelta)
 842                                         t1 = (value&0xf)-(Apwrdelta);
 843                                 else
 844                                         t1 = 0;
 845                                 if (((value&0xf0)>>4) > Apwrdelta)
 846                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 847                                 else
 848                                         t2 = 0;
 849                                 if (((value&0xf00)>>8) > Apwrdelta)
 850                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 851                                 else
 852                                         t3 = 0;
 853                                 if (((value&0xf000)>>12) > Apwrdelta)
 854                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 855                                 else
 856                                         t4 = 0;
 857                         }
 858                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 859
 860                         if (i == 0)
 861                                 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 862                         else
 863                                 pAd->Tx40MPwrCfgABand[i+1] = Adata;
 864
 865                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
 866                 }
 867         }
 868 }
 869
 870
 871 /*
 872         ========================================================================
 873
 874         Routine Description:
 875                 Read initial channel power parameters from EEPROM
 876
 877         Arguments:
 878                 Adapter                                         Pointer to our adapter
 879
 880         Return Value:
 881                 None
 882
 883         IRQL = PASSIVE_LEVEL
 884
 885         Note:
 886
 887         ========================================================================
 888 */
 889 VOID    RTMPReadChannelPwr(
 890         IN      PRTMP_ADAPTER   pAd)
 891 {
 892         UCHAR                           i, choffset;
 893         EEPROM_TX_PWR_STRUC         Power;
 894         EEPROM_TX_PWR_STRUC         Power2;
 895
 896         // Read Tx power value for all channels
 897         // Value from 1 - 0x7f. Default value is 24.
 898         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 899         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 900
 901         // 0. 11b/g, ch1 - ch 14
 902         for (i = 0; i < 7; i++)
 903         {
 904                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 905                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 906                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
 907                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 908
 909                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 910                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 911                 else
 912                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
 913
 914                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 915                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 916                 else
 917                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 918
 919                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 920                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 921                 else
 922                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 923
 924                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 925                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 926                 else
 927                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 928         }
 929
 930         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 931         // 1.1 Fill up channel
 932         choffset = 14;
 933         for (i = 0; i < 4; i++)
 934         {
 935                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 936                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 937                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 938
 939                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 940                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 941                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 942
 943                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 944                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 945                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 946         }
 947
 948         // 1.2 Fill up power
 949         for (i = 0; i < 6; i++)
 950         {
 951                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 952                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 953
 954                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 955                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 956
 957                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 958                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 959
 960                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 961                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 962
 963                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 964                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 965         }
 966
 967         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 968         // 2.1 Fill up channel
 969         choffset = 14 + 12;
 970         for (i = 0; i < 5; i++)
 971         {
 972                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 973                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 974                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 975
 976                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 977                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 978                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 979
 980                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 981                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 982                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 983         }
 984         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 985         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 986         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 987
 988         // 2.2 Fill up power
 989         for (i = 0; i < 8; i++)
 990         {
 991                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 992                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 993
 994                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 995                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 996
 997                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 998                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 999
1000                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1001                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1002
1003                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1004                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1005         }
1006
1007         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
1008         // 3.1 Fill up channel
1009         choffset = 14 + 12 + 16;
1010         for (i = 0; i < 2; i++)
1011         {
1012                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
1013                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
1014                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
1015
1016                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
1017                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
1018                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
1019
1020                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
1021                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
1022                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
1023         }
1024         pAd->TxPower[3 * 2 + choffset + 0].Channel              = 165;
1025         pAd->TxPower[3 * 2 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
1026         pAd->TxPower[3 * 2 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
1027
1028         // 3.2 Fill up power
1029         for (i = 0; i < 4; i++)
1030         {
1031                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
1032                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
1033
1034                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
1035                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
1036
1037                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
1038                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
1039
1040                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1041                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1042
1043                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1044                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1045         }
1046
1047         // 4. Print and Debug
1048         choffset = 14 + 12 + 16 + 7;
1049 }
1050
1051 /*
1052         ========================================================================
1053
1054         Routine Description:
1055                 Read the following from the registry
1056                 1. All the parameters
1057                 2. NetworkAddres
1058
1059         Arguments:
1060                 Adapter                                         Pointer to our adapter
1061                 WrapperConfigurationContext     For use by NdisOpenConfiguration
1062
1063         Return Value:
1064                 NDIS_STATUS_SUCCESS
1065                 NDIS_STATUS_FAILURE
1066                 NDIS_STATUS_RESOURCES
1067
1068         IRQL = PASSIVE_LEVEL
1069
1070         Note:
1071
1072         ========================================================================
1073 */
1074 NDIS_STATUS     NICReadRegParameters(
1075         IN      PRTMP_ADAPTER           pAd,
1076         IN      NDIS_HANDLE                     WrapperConfigurationContext
1077         )
1078 {
1079         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
1080         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1081         return Status;
1082 }
1083
1084
1085 #ifdef RT2870
1086 /*
1087         ========================================================================
1088
1089         Routine Description:
1090                 For RF filter calibration purpose
1091
1092         Arguments:
1093                 pAd                          Pointer to our adapter
1094
1095         Return Value:
1096                 None
1097
1098         IRQL = PASSIVE_LEVEL
1099
1100         ========================================================================
1101 */
1102 VOID RTMPFilterCalibration(
1103         IN PRTMP_ADAPTER pAd)
1104 {
1105         UCHAR   R55x = 0, value, FilterTarget = 0x1E, BBPValue=0;
1106         UINT    loop = 0, count = 0, loopcnt = 0, ReTry = 0;
1107         UCHAR   RF_R24_Value = 0;
1108
1109         // Give bbp filter initial value
1110 #ifndef RT30xx
1111         pAd->Mlme.CaliBW20RfR24 = 0x16;
1112         pAd->Mlme.CaliBW40RfR24 = 0x36;  //Bit[5] must be 1 for BW 40
1113 #else
1114         pAd->Mlme.CaliBW20RfR24 = 0x1F;
1115         pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40
1116 #endif
1117         do
1118         {
1119                 if (loop == 1)  //BandWidth = 40 MHz
1120                 {
1121                         // Write 0x27 to RF_R24 to program filter
1122                         RF_R24_Value = 0x27;
1123                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1124                         if (IS_RT3090(pAd))
1125                                 FilterTarget = 0x15;
1126                         else
1127                                 FilterTarget = 0x19;
1128
1129                         // when calibrate BW40, BBP mask must set to BW40.
1130                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1131                         BBPValue&= (~0x18);
1132                         BBPValue|= (0x10);
1133                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1134 #ifdef RT30xx
1135                         // set to BW40
1136                         RT30xxReadRFRegister(pAd, RF_R31, &value);
1137                         value |= 0x20;
1138                         RT30xxWriteRFRegister(pAd, RF_R31, value);
1139 #endif
1140                 }
1141                 else                    //BandWidth = 20 MHz
1142                 {
1143                         // Write 0x07 to RF_R24 to program filter
1144                         RF_R24_Value = 0x07;
1145                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1146                         if (IS_RT3090(pAd))
1147                                 FilterTarget = 0x13;
1148                         else
1149                                 FilterTarget = 0x16;
1150 #ifdef RT30xx
1151                         // set to BW20
1152                         RT30xxReadRFRegister(pAd, RF_R31, &value);
1153                         value &= (~0x20);
1154                         RT30xxWriteRFRegister(pAd, RF_R31, value);
1155 #endif
1156                 }
1157
1158                 // Write 0x01 to RF_R22 to enable baseband loopback mode
1159                 RT30xxReadRFRegister(pAd, RF_R22, &value);
1160                 value |= 0x01;
1161                 RT30xxWriteRFRegister(pAd, RF_R22, value);
1162
1163                 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
1164                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1165
1166                 do
1167                 {
1168                         // Write 0x90 to BBP_R25 to transmit test tone
1169                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1170
1171                         RTMPusecDelay(1000);
1172                         // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
1173                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1174                         R55x = value & 0xFF;
1175
1176                 } while ((ReTry++ < 100) && (R55x == 0));
1177
1178                 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
1179                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06);
1180
1181                 while(TRUE)
1182                 {
1183                         // Write 0x90 to BBP_R25 to transmit test tone
1184                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90);
1185
1186                         //We need to wait for calibration
1187                         RTMPusecDelay(1000);
1188                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value);
1189                         value &= 0xFF;
1190                         if ((R55x - value) < FilterTarget)
1191                         {
1192                                 RF_R24_Value ++;
1193                         }
1194                         else if ((R55x - value) == FilterTarget)
1195                         {
1196                                 RF_R24_Value ++;
1197                                 count ++;
1198                         }
1199                         else
1200                         {
1201                                 break;
1202                         }
1203
1204                         // prevent infinite loop cause driver hang.
1205                         if (loopcnt++ > 100)
1206                         {
1207                                 DBGPRINT(RT_DEBUG_ERROR, ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
1208                                 break;
1209                         }
1210
1211                         // Write RF_R24 to program filter
1212                         RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1213                 }
1214
1215                 if (count > 0)
1216                 {
1217                         RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
1218                 }
1219
1220                 // Store for future usage
1221                 if (loopcnt < 100)
1222                 {
1223                         if (loop++ == 0)
1224                         {
1225                                 //BandWidth = 20 MHz
1226                                 pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
1227                         }
1228                         else
1229                         {
1230                                 //BandWidth = 40 MHz
1231                                 pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
1232                                 break;
1233                         }
1234                 }
1235                 else
1236                         break;
1237
1238                 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1239
1240                 // reset count
1241                 count = 0;
1242         } while(TRUE);
1243
1244         //
1245         // Set back to initial state
1246         //
1247         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0);
1248
1249         RT30xxReadRFRegister(pAd, RF_R22, &value);
1250         value &= ~(0x01);
1251         RT30xxWriteRFRegister(pAd, RF_R22, value);
1252
1253         // set BBP back to BW20
1254         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue);
1255         BBPValue&= (~0x18);
1256         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue);
1257
1258         DBGPRINT(RT_DEBUG_TRACE, ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
1259 }
1260
1261 VOID NICInitRT30xxRFRegisters(IN PRTMP_ADAPTER pAd)
1262 {
1263         INT i;
1264         // Driver must read EEPROM to get RfIcType before initial RF registers
1265         // Initialize RF register to default value
1266         if (IS_RT3070(pAd)
1267 #ifdef RT30xx
1268             || IS_RT3071(pAd)
1269 #else
1270             && (pAd->RfIcType == RFIC_3020 || pAd->RfIcType == RFIC_2020)
1271 #endif
1272            )
1273         {
1274                 // Init RF calibration
1275                 // Driver should toggle RF R30 bit7 before init RF registers
1276                 UINT32 RfReg = 0;
1277 #ifdef RT30xx
1278                 UINT32 data;
1279 #endif
1280                 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1281                 RfReg |= 0x80;
1282                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1283                 RTMPusecDelay(1000);
1284                 RfReg &= 0x7F;
1285                 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1286
1287                 // Initialize RF register to default value
1288                 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1289                 {
1290                         RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1291                 }
1292
1293 #ifdef RT30xx
1294                 if (IS_RT3070(pAd))
1295                 {
1296                         //  Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate
1297                         RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1298                         data = ((data & 0xF0FFFFFF) | 0x0D000000);
1299                         RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1300                 }
1301                 else if (IS_RT3071(pAd))
1302                 {
1303                         // Driver should set RF R6 bit6 on before init RF registers
1304                         RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg);
1305                         RfReg |= 0x40;
1306                         RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg);
1307
1308                         // init R31
1309                         RT30xxWriteRFRegister(pAd, RF_R31, 0x14);
1310
1311                         // RT3071 version E has fixed this issue
1312                         if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211))
1313                         {
1314                                 // patch tx EVM issue temporarily
1315                                 RTUSBReadMACRegister(pAd, LDO_CFG0, &data);
1316                                 data = ((data & 0xE0FFFFFF) | 0x0D000000);
1317                                 RTUSBWriteMACRegister(pAd, LDO_CFG0, data);
1318                         }
1319                         else
1320                         {
1321                                 RTMP_IO_READ32(pAd, LDO_CFG0, &data);
1322                                 data = ((data & 0xE0FFFFFF) | 0x01000000);
1323                                 RTMP_IO_WRITE32(pAd, LDO_CFG0, data);
1324                         }
1325
1326                         // patch LNA_PE_G1 failed issue
1327                         RTUSBReadMACRegister(pAd, GPIO_SWITCH, &data);
1328                         data &= ~(0x20);
1329                         RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data);
1330                 }
1331 #endif
1332                 //For RF filter Calibration
1333                 RTMPFilterCalibration(pAd);
1334 #ifdef RT30xx
1335                 // Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration()
1336                 if ((pAd->MACVersion & 0xffff) < 0x0211)
1337                         RT30xxWriteRFRegister(pAd, RF_R27, 0x3);
1338
1339                 // set led open drain enable
1340                 RTUSBReadMACRegister(pAd, OPT_14, &data);
1341                 data |= 0x01;
1342                 RTUSBWriteMACRegister(pAd, OPT_14, data);
1343
1344                 if (IS_RT3071(pAd))
1345                 {
1346                         // add by johnli, RF power sequence setup, load RF normal operation-mode setup
1347                         RT30xxLoadRFNormalModeSetup(pAd);
1348                 }
1349 #endif
1350         }
1351 }
1352 #endif // RT2870 //
1353
1354
1355 /*
1356         ========================================================================
1357
1358         Routine Description:
1359                 Read initial parameters from EEPROM
1360
1361         Arguments:
1362                 Adapter                                         Pointer to our adapter
1363
1364         Return Value:
1365                 None
1366
1367         IRQL = PASSIVE_LEVEL
1368
1369         Note:
1370
1371         ========================================================================
1372 */
1373 VOID    NICReadEEPROMParameters(
1374         IN      PRTMP_ADAPTER   pAd,
1375         IN      PUCHAR                  mac_addr)
1376 {
1377         UINT32                  data = 0;
1378         USHORT                  i, value, value2;
1379         UCHAR                   TmpPhy;
1380         EEPROM_TX_PWR_STRUC         Power;
1381         EEPROM_VERSION_STRUC    Version;
1382         EEPROM_ANTENNA_STRUC    Antenna;
1383         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1384
1385         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1386
1387         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1388         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1389         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1390
1391         if((data & 0x30) == 0)
1392                 pAd->EEPROMAddressNum = 6;              // 93C46
1393         else if((data & 0x30) == 0x10)
1394                 pAd->EEPROMAddressNum = 8;     // 93C66
1395         else
1396                 pAd->EEPROMAddressNum = 8;     // 93C86
1397         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1398
1399         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1400         // MAC address registers according to E2PROM setting
1401         if (mac_addr == NULL ||
1402                 strlen(mac_addr) != 17 ||
1403                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
1404                 mac_addr[11] != ':' || mac_addr[14] != ':')
1405         {
1406                 USHORT  Addr01,Addr23,Addr45 ;
1407
1408                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1409                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1410                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1411
1412                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1413                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1414                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1415                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1416                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1417                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1418
1419                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1420         }
1421         else
1422         {
1423                 INT             j;
1424                 PUCHAR  macptr;
1425
1426                 macptr = mac_addr;
1427
1428                 for (j=0; j<MAC_ADDR_LEN; j++)
1429                 {
1430                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
1431                         macptr=macptr+3;
1432                 }
1433
1434                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1435         }
1436
1437
1438         {
1439                 //more conveninet to test mbssid, so ap's bssid &0xf1
1440                 if (pAd->PermanentAddress[0] == 0xff)
1441                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1442
1443                 //if (pAd->PermanentAddress[5] == 0xff)
1444                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1445
1446                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1447                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1448                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1449                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1450                 if (pAd->bLocalAdminMAC == FALSE)
1451                 {
1452                         MAC_DW0_STRUC csr2;
1453                         MAC_DW1_STRUC csr3;
1454                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1455                         csr2.field.Byte0 = pAd->CurrentAddress[0];
1456                         csr2.field.Byte1 = pAd->CurrentAddress[1];
1457                         csr2.field.Byte2 = pAd->CurrentAddress[2];
1458                         csr2.field.Byte3 = pAd->CurrentAddress[3];
1459                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1460                         csr3.word = 0;
1461                         csr3.field.Byte4 = pAd->CurrentAddress[4];
1462                         csr3.field.Byte5 = pAd->CurrentAddress[5];
1463                         csr3.field.U2MeMask = 0xff;
1464                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1465                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1466                                 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1467                                 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1468                                 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1469                 }
1470         }
1471
1472         // if not return early. cause fail at emulation.
1473         // Init the channel number for TX channel power
1474         RTMPReadChannelPwr(pAd);
1475
1476         // if E2PROM version mismatch with driver's expectation, then skip
1477         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1478         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1479         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1480         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1481
1482         if (Version.field.Version > VALID_EEPROM_VERSION)
1483         {
1484                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1485                 /*pAd->SystemErrorBitmap |= 0x00000001;
1486
1487                 // hard-code default value when no proper E2PROM installed
1488                 pAd->bAutoTxAgcA = FALSE;
1489                 pAd->bAutoTxAgcG = FALSE;
1490
1491                 // Default the channel power
1492                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1493                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1494
1495                 // Default the channel power
1496                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1497                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1498
1499                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1500                         pAd->EEPROMDefaultValue[i] = 0xffff;
1501                 return;  */
1502         }
1503
1504         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1505         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1506         pAd->EEPROMDefaultValue[0] = value;
1507
1508         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1509         pAd->EEPROMDefaultValue[1] = value;
1510
1511         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1512         pAd->EEPROMDefaultValue[2] = value;
1513
1514         for(i = 0; i < 8; i++)
1515         {
1516                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1517                 pAd->EEPROMDefaultValue[i+3] = value;
1518         }
1519
1520         // We have to parse NIC configuration 0 at here.
1521         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1522         // Therefore, we have to read TxAutoAgc control beforehand.
1523         // Read Tx AGC control bit
1524         Antenna.word = pAd->EEPROMDefaultValue[0];
1525         if (Antenna.word == 0xFFFF)
1526         {
1527                 if(IS_RT3090(pAd))
1528                 {
1529                         Antenna.word = 0;
1530                         Antenna.field.RfIcType = RFIC_3020;
1531                         Antenna.field.TxPath = 1;
1532                         Antenna.field.RxPath = 1;
1533                 }
1534                 else
1535                 {
1536                 Antenna.word = 0;
1537                 Antenna.field.RfIcType = RFIC_2820;
1538                 Antenna.field.TxPath = 1;
1539                 Antenna.field.RxPath = 2;
1540                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1541                 }
1542         }
1543
1544         // Choose the desired Tx&Rx stream.
1545         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1546                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1547
1548         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1549         {
1550                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1551
1552                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1553                         (pAd->CommonCfg.RxStream > 2))
1554                 {
1555                         // only 2 Rx streams for RT2860 series
1556                         pAd->CommonCfg.RxStream = 2;
1557                 }
1558         }
1559
1560         // 3*3
1561         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1562         // yet implement
1563         for(i=0; i<3; i++)
1564         {
1565         }
1566
1567         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1568
1569         {
1570 #ifndef RT30xx
1571                 NicConfig2.word = 0;
1572 #endif
1573                 if ((NicConfig2.word & 0x00ff) == 0xff)
1574                 {
1575                         NicConfig2.word &= 0xff00;
1576                 }
1577
1578                 if ((NicConfig2.word >> 8) == 0xff)
1579                 {
1580                         NicConfig2.word &= 0x00ff;
1581                 }
1582         }
1583
1584         if (NicConfig2.field.DynamicTxAgcControl == 1)
1585                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1586         else
1587                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1588
1589         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1590
1591         // Save the antenna for future use
1592         pAd->Antenna.word = Antenna.word;
1593
1594         //
1595         // Reset PhyMode if we don't support 802.11a
1596         // Only RFIC_2850 & RFIC_2750 support 802.11a
1597         //
1598         if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1599         {
1600                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1601                         (pAd->CommonCfg.PhyMode == PHY_11A))
1602                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1603                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
1604                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
1605                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
1606                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1607                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1608         }
1609
1610         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1611         // 0. 11b/g
1612         {
1613                 /* these are tempature reference value (0x00 ~ 0xFE)
1614                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1615                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1616                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1617                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1618                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1619                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1620                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1621                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1622                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1623                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1624                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
1625                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1626                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1627                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1628                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1629                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1630                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1631                 pAd->TxAgcStepG = Power.field.Byte1;
1632                 pAd->TxAgcCompensateG = 0;
1633                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1634                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1635
1636                 // Disable TxAgc if the based value is not right
1637                 if (pAd->TssiRefG == 0xff)
1638                         pAd->bAutoTxAgcG = FALSE;
1639
1640                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1641                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1642                         pAd->TssiRefG,
1643                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1644                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1645         }
1646         // 1. 11a
1647         {
1648                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1649                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1650                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1651                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1652                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1653                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1654                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1655                 pAd->TssiRefA   = Power.field.Byte0;
1656                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1657                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1658                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1659                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1660                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1661                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1662                 pAd->TxAgcStepA = Power.field.Byte1;
1663                 pAd->TxAgcCompensateA = 0;
1664                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1665                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1666
1667                 // Disable TxAgc if the based value is not right
1668                 if (pAd->TssiRefA == 0xff)
1669                         pAd->bAutoTxAgcA = FALSE;
1670
1671                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1672                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1673                         pAd->TssiRefA,
1674                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1675                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1676         }
1677         pAd->BbpRssiToDbmDelta = 0x0;
1678
1679         // Read frequency offset setting for RF
1680         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1681         if ((value & 0x00FF) != 0x00FF)
1682                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1683         else
1684                 pAd->RfFreqOffset = 0;
1685         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1686
1687         //CountryRegion byte offset (38h)
1688         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1689         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1690
1691         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1692         {
1693                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1694                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1695                 TmpPhy = pAd->CommonCfg.PhyMode;
1696                 pAd->CommonCfg.PhyMode = 0xff;
1697                 RTMPSetPhyMode(pAd, TmpPhy);
1698                 SetCommonHT(pAd);
1699         }
1700
1701         //
1702         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1703         // The valid value are (-10 ~ 10)
1704         //
1705         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1706         pAd->BGRssiOffset0 = value & 0x00ff;
1707         pAd->BGRssiOffset1 = (value >> 8);
1708         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1709         pAd->BGRssiOffset2 = value & 0x00ff;
1710         pAd->ALNAGain1 = (value >> 8);
1711         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1712         pAd->BLNAGain = value & 0x00ff;
1713         pAd->ALNAGain0 = (value >> 8);
1714
1715         // Validate 11b/g RSSI_0 offset.
1716         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1717                 pAd->BGRssiOffset0 = 0;
1718
1719         // Validate 11b/g RSSI_1 offset.
1720         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1721                 pAd->BGRssiOffset1 = 0;
1722
1723         // Validate 11b/g RSSI_2 offset.
1724         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1725                 pAd->BGRssiOffset2 = 0;
1726
1727         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1728         pAd->ARssiOffset0 = value & 0x00ff;
1729         pAd->ARssiOffset1 = (value >> 8);
1730         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1731         pAd->ARssiOffset2 = value & 0x00ff;
1732         pAd->ALNAGain2 = (value >> 8);
1733
1734         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1735                 pAd->ALNAGain1 = pAd->ALNAGain0;
1736         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1737                 pAd->ALNAGain2 = pAd->ALNAGain0;
1738
1739         // Validate 11a RSSI_0 offset.
1740         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1741                 pAd->ARssiOffset0 = 0;
1742
1743         // Validate 11a RSSI_1 offset.
1744         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1745                 pAd->ARssiOffset1 = 0;
1746
1747         //Validate 11a RSSI_2 offset.
1748         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1749                 pAd->ARssiOffset2 = 0;
1750
1751         //
1752         // Get LED Setting.
1753         //
1754         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1755         pAd->LedCntl.word = (value&0xff00) >> 8;
1756         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1757         pAd->Led1 = value;
1758         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1759         pAd->Led2 = value;
1760         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1761         pAd->Led3 = value;
1762
1763         RTMPReadTxPwrPerRate(pAd);
1764
1765         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1766 }
1767
1768 /*
1769         ========================================================================
1770
1771         Routine Description:
1772                 Set default value from EEPROM
1773
1774         Arguments:
1775                 Adapter                                         Pointer to our adapter
1776
1777         Return Value:
1778                 None
1779
1780         IRQL = PASSIVE_LEVEL
1781
1782         Note:
1783
1784         ========================================================================
1785 */
1786 VOID    NICInitAsicFromEEPROM(
1787         IN      PRTMP_ADAPTER   pAd)
1788 {
1789         UINT32                                  data = 0;
1790         UCHAR   BBPR1 = 0;
1791         USHORT                                  i;
1792         EEPROM_ANTENNA_STRUC    Antenna;
1793         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1794         UCHAR   BBPR3 = 0;
1795
1796         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1797         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1798         {
1799                 UCHAR BbpRegIdx, BbpValue;
1800
1801                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1802                 {
1803                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1804                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1805                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1806                 }
1807         }
1808
1809 #ifndef RT30xx
1810         Antenna.word = pAd->Antenna.word;
1811 #endif
1812 #ifdef RT30xx
1813         Antenna.word = pAd->EEPROMDefaultValue[0];
1814         if (Antenna.word == 0xFFFF)
1815         {
1816                 DBGPRINT(RT_DEBUG_ERROR, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1817                 BUG_ON(Antenna.word == 0xFFFF);
1818         }
1819 #endif
1820         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1821         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1822
1823 #ifdef RT30xx
1824         DBGPRINT(RT_DEBUG_WARN, ("pAd->RfIcType = %d, RealRxPath=%d, TxPath = %d\n", pAd->RfIcType, pAd->Mlme.RealRxPath,Antenna.field.TxPath));
1825
1826         // Save the antenna for future use
1827         pAd->Antenna.word = Antenna.word;
1828 #endif
1829         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1830
1831 #ifdef RT30xx
1832         {
1833                 if ((NicConfig2.word & 0x00ff) == 0xff)
1834                 {
1835                         NicConfig2.word &= 0xff00;
1836                 }
1837
1838                 if ((NicConfig2.word >> 8) == 0xff)
1839                 {
1840                         NicConfig2.word &= 0x00ff;
1841                 }
1842         }
1843 #endif
1844         // Save the antenna for future use
1845         pAd->NicConfig2.word = NicConfig2.word;
1846
1847 #ifdef RT30xx
1848         // set default antenna as main
1849         if (pAd->RfIcType == RFIC_3020)
1850                 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1851 #endif
1852         //
1853         // Send LED Setting to MCU.
1854         //
1855         if (pAd->LedCntl.word == 0xFF)
1856         {
1857                 pAd->LedCntl.word = 0x01;
1858                 pAd->Led1 = 0x5555;
1859                 pAd->Led2 = 0x2221;
1860 #ifdef RT2860
1861                 pAd->Led3 = 0xA9F8;
1862 #endif
1863
1864 #ifdef RT2870
1865                 pAd->Led3 = 0x5627;
1866 #endif // RT2870 //
1867         }
1868
1869         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1870         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1871         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1872     pAd->LedIndicatorStregth = 0xFF;
1873     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1874
1875         {
1876                 // Read Hardware controlled Radio state enable bit
1877                 if (NicConfig2.field.HardwareRadioControl == 1)
1878                 {
1879                         pAd->StaCfg.bHardwareRadio = TRUE;
1880
1881                         // Read GPIO pin2 as Hardware controlled radio state
1882                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1883                         if ((data & 0x04) == 0)
1884                         {
1885                                 pAd->StaCfg.bHwRadio = FALSE;
1886                                 pAd->StaCfg.bRadio = FALSE;
1887                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1888                         }
1889                 }
1890                 else
1891                         pAd->StaCfg.bHardwareRadio = FALSE;
1892
1893                 if (pAd->StaCfg.bRadio == FALSE)
1894                 {
1895                         RTMPSetLED(pAd, LED_RADIO_OFF);
1896                 }
1897                 else
1898                 {
1899                         RTMPSetLED(pAd, LED_RADIO_ON);
1900 #ifdef RT2860
1901                         AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1902                         AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1903                         // 2-1. wait command ok.
1904                         AsicCheckCommanOk(pAd, PowerWakeCID);
1905 #endif
1906                 }
1907         }
1908
1909         // Turn off patching for cardbus controller
1910         if (NicConfig2.field.CardbusAcceleration == 1)
1911         {
1912         }
1913
1914         if (NicConfig2.field.DynamicTxAgcControl == 1)
1915                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1916         else
1917                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1918         //
1919         // Since BBP has been progamed, to make sure BBP setting will be
1920         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1921         //
1922         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1923
1924         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1925         BBPR3 &= (~0x18);
1926         if(pAd->Antenna.field.RxPath == 3)
1927         {
1928                 BBPR3 |= (0x10);
1929         }
1930         else if(pAd->Antenna.field.RxPath == 2)
1931         {
1932                 BBPR3 |= (0x8);
1933         }
1934         else if(pAd->Antenna.field.RxPath == 1)
1935         {
1936                 BBPR3 |= (0x0);
1937         }
1938         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1939
1940         {
1941                 // Handle the difference when 1T
1942                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1943                 if(pAd->Antenna.field.TxPath == 1)
1944                 {
1945                 BBPR1 &= (~0x18);
1946                 }
1947                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1948
1949                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1950         }
1951
1952         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1953         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1954 }
1955
1956 /*
1957         ========================================================================
1958
1959         Routine Description:
1960                 Initialize NIC hardware
1961
1962         Arguments:
1963                 Adapter                                         Pointer to our adapter
1964
1965         Return Value:
1966                 None
1967
1968         IRQL = PASSIVE_LEVEL
1969
1970         Note:
1971
1972         ========================================================================
1973 */
1974 NDIS_STATUS     NICInitializeAdapter(
1975         IN      PRTMP_ADAPTER   pAd,
1976         IN   BOOLEAN    bHardReset)
1977 {
1978         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1979         WPDMA_GLO_CFG_STRUC     GloCfg;
1980 #ifdef RT2860
1981         UINT32                  Value;
1982         DELAY_INT_CFG_STRUC     IntCfg;
1983 #endif
1984         ULONG   i =0, j=0;
1985         AC_TXOP_CSR0_STRUC      csr0;
1986
1987         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1988
1989         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1990 retry:
1991         i = 0;
1992         do
1993         {
1994                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1995                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1996                         break;
1997
1998                 RTMPusecDelay(1000);
1999                 i++;
2000         }while ( i<100);
2001         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
2002         GloCfg.word &= 0xff0;
2003         GloCfg.field.EnTXWriteBackDDONE =1;
2004         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
2005
2006         // Record HW Beacon offset
2007         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
2008         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
2009         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
2010         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
2011         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
2012         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
2013         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
2014         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
2015
2016         //
2017         // write all shared Ring's base address into ASIC
2018         //
2019
2020         // asic simulation sequence put this ahead before loading firmware.
2021         // pbf hardware reset
2022 #ifdef RT2860
2023         RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
2024         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
2025         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
2026 #endif
2027
2028         // Initialze ASIC for TX & Rx operation
2029         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
2030         {
2031                 if (j++ == 0)
2032                 {
2033                         NICLoadFirmware(pAd);
2034                         goto retry;
2035                 }
2036                 return NDIS_STATUS_FAILURE;
2037         }
2038
2039
2040 #ifdef RT2860
2041         // Write AC_BK base address register
2042         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
2043         RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
2044         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
2045
2046         // Write AC_BE base address register
2047         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
2048         RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
2049         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
2050
2051         // Write AC_VI base address register
2052         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
2053         RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
2054         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
2055
2056         // Write AC_VO base address register
2057         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
2058         RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
2059         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
2060
2061         // Write HCCA base address register
2062           Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
2063           RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
2064         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
2065
2066         // Write MGMT_BASE_CSR register
2067         Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
2068         RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
2069         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
2070
2071         // Write RX_BASE_CSR register
2072         Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
2073         RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
2074         DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
2075
2076         // Init RX Ring index pointer
2077         pAd->RxRing.RxSwReadIdx = 0;
2078         pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
2079         RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
2080
2081         // Init TX rings index pointer
2082         {
2083                 for (i=0; i<NUM_OF_TX_RING; i++)
2084                 {
2085                         pAd->TxRing[i].TxSwFreeIdx = 0;
2086                         pAd->TxRing[i].TxCpuIdx = 0;
2087                         RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
2088                 }
2089         }
2090
2091         // init MGMT ring index pointer
2092         pAd->MgmtRing.TxSwFreeIdx = 0;
2093         pAd->MgmtRing.TxCpuIdx = 0;
2094         RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
2095
2096         //
2097         // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
2098         //
2099
2100         // Write TX_RING_CSR0 register
2101         Value = TX_RING_SIZE;
2102         RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
2103         RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
2104         RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
2105         RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
2106         RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
2107         Value = MGMT_RING_SIZE;
2108         RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
2109
2110         // Write RX_RING_CSR register
2111         Value = RX_RING_SIZE;
2112         RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
2113 #endif /* RT2860 */
2114
2115
2116         // WMM parameter
2117         csr0.word = 0;
2118         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
2119         if (pAd->CommonCfg.PhyMode == PHY_11B)
2120         {
2121                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
2122                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
2123         }
2124         else
2125         {
2126                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
2127                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
2128         }
2129         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
2130
2131
2132 #ifdef RT2860
2133         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
2134         i = 0;
2135         do
2136         {
2137                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
2138                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
2139                         break;
2140
2141                 RTMPusecDelay(1000);
2142                 i++;
2143         }while ( i < 100);
2144
2145         GloCfg.word &= 0xff0;
2146         GloCfg.field.EnTXWriteBackDDONE =1;
2147         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
2148
2149         IntCfg.word = 0;
2150         RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
2151 #endif
2152
2153
2154         // reset action
2155         // Load firmware
2156         //  Status = NICLoadFirmware(pAd);
2157
2158         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
2159         return Status;
2160 }
2161
2162 /*
2163         ========================================================================
2164
2165         Routine Description:
2166                 Initialize ASIC
2167
2168         Arguments:
2169                 Adapter                                         Pointer to our adapter
2170
2171         Return Value:
2172                 None
2173
2174         IRQL = PASSIVE_LEVEL
2175
2176         Note:
2177
2178         ========================================================================
2179 */
2180 NDIS_STATUS     NICInitializeAsic(
2181         IN      PRTMP_ADAPTER   pAd,
2182         IN  BOOLEAN             bHardReset)
2183 {
2184         ULONG                   Index = 0;
2185         UCHAR                   R0 = 0xff;
2186         UINT32                  MacCsr12 = 0, Counter = 0;
2187 #ifdef RT2870
2188         UINT32                  MacCsr0 = 0;
2189         NTSTATUS                Status;
2190         UCHAR                   Value = 0xff;
2191 #endif // RT2870 //
2192 #ifdef RT30xx
2193         UINT32                  eFuseCtrl;
2194 #endif // RT30xx //
2195         USHORT                  KeyIdx;
2196         INT                             i,apidx;
2197
2198         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
2199
2200 #ifdef RT2860
2201         if (bHardReset == TRUE)
2202         {
2203                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2204         }
2205         else
2206                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2207 #endif
2208 #ifdef RT2870
2209         //
2210         // Make sure MAC gets ready after NICLoadFirmware().
2211         //
2212         Index = 0;
2213
2214         //To avoid hang-on issue when interface up in kernel 2.4,
2215         //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
2216         do
2217         {
2218                 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
2219
2220                 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
2221                         break;
2222
2223                 RTMPusecDelay(10);
2224         } while (Index++ < 100);
2225
2226         pAd->MACVersion = MacCsr0;
2227         DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
2228         // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
2229         RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
2230         MacCsr12 &= (~0x2000);
2231         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
2232
2233         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2234         RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
2235         Status = RTUSBVenderReset(pAd);
2236 #endif
2237
2238         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2239
2240         // Initialize MAC register to default value
2241 #ifdef RT2860
2242         for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
2243         {
2244                 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
2245         }
2246 #endif
2247 #ifdef RT2870
2248         for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
2249         {
2250 #ifdef RT3070
2251                 if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT3070(pAd) || IS_RT3071(pAd)))
2252                 {
2253                         MACRegTable[Index].Value = 0x00000400;
2254                 }
2255 #endif // RT3070 //
2256                 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
2257         }
2258
2259 #ifndef RT30xx
2260         if(IS_RT3070(pAd))
2261         {
2262                 // According to Frank Hsu (from Gary Tsao)
2263                 RTMP_IO_WRITE32(pAd, (USHORT)TX_SW_CFG0, 0x00000400);
2264
2265                 // Initialize RT3070 serial MAC registers which is different from RT2870 serial
2266                 RTUSBWriteMACRegister(pAd, TX_SW_CFG1, 0);
2267                 RTUSBWriteMACRegister(pAd, TX_SW_CFG2, 0);
2268         }
2269 #endif
2270 #endif // RT2870 //
2271
2272
2273         {
2274                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
2275                 {
2276 #ifdef RT2860
2277                         RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2278 #endif
2279 #ifdef RT2870
2280                         RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2281 #endif
2282                 }
2283         }
2284
2285         // Initialize RT3070 serial MAc registers which is different from RT2870 serial
2286         if (IS_RT3090(pAd))
2287         {
2288                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2289
2290                 // RT3071 version E has fixed this issue
2291                 if ((pAd->MACVersion & 0xffff) < 0x0211)
2292                 {
2293                         if (pAd->NicConfig2.field.DACTestBit == 1)
2294                         {
2295                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2296                         }
2297                         else
2298                         {
2299                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
2300                         }
2301                 }
2302                 else
2303                 {
2304                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
2305                 }
2306         }
2307 #ifdef RT30xx
2308         else if (IS_RT3070(pAd))
2309         {
2310                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
2311                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x1F); // To fix throughput drop drastically
2312         }
2313 #endif // RT30xx //
2314
2315         //
2316         // Before program BBP, we need to wait BBP/RF get wake up.
2317         //
2318         Index = 0;
2319         do
2320         {
2321                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
2322
2323                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
2324                         break;
2325
2326                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
2327                 RTMPusecDelay(1000);
2328         } while (Index++ < 100);
2329
2330     // The commands to firmware should be after these commands, these commands will init firmware
2331         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
2332         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
2333         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2334         RTMPusecDelay(1000);
2335
2336         // Read BBP register, make sure BBP is up and running before write new data
2337         Index = 0;
2338         do
2339         {
2340                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
2341                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
2342         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
2343         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
2344
2345         if ((R0 == 0xff) || (R0 == 0x00))
2346                 return NDIS_STATUS_FAILURE;
2347
2348         // Initialize BBP register to default value
2349         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
2350         {
2351                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
2352         }
2353
2354 #ifndef RT30xx
2355         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2356         if ((pAd->MACVersion&0xffff) != 0x0101)
2357                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2358
2359 #ifdef RT2870
2360         //write RT3070 BBP wchich different with 2870 after write RT2870 BBP
2361         if (IS_RT3070(pAd))
2362         {
2363                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0a);
2364                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x99);
2365                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, 0x05);
2366         }
2367 #endif // RT2870 //
2368 #endif
2369 #ifdef RT30xx
2370         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2371         // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
2372         if (((pAd->MACVersion&0xffff) != 0x0101) && (!IS_RT30xx(pAd)))
2373                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2374
2375 // add by johnli, RF power sequence setup
2376         if (IS_RT30xx(pAd))
2377         {       //update for RT3070/71/72/90/91/92.
2378                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
2379                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
2380                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
2381         }
2382
2383         if (IS_RT3090(pAd))
2384         {
2385                 UCHAR           bbpreg=0;
2386
2387                 // enable DC filter
2388                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2389                 {
2390                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
2391                 }
2392
2393                 // improve power consumption
2394                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
2395                 if (pAd->Antenna.field.TxPath == 1)
2396                 {
2397                         // turn off tx DAC_1
2398                         bbpreg = (bbpreg | 0x20);
2399                 }
2400
2401                 if (pAd->Antenna.field.RxPath == 1)
2402                 {
2403                         // turn off tx ADC_1
2404                         bbpreg &= (~0x2);
2405                 }
2406                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
2407
2408                 // improve power consumption in RT3071 Ver.E
2409                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
2410                 {
2411                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
2412                         bbpreg &= (~0x3);
2413                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
2414                 }
2415         }
2416 #endif
2417         if (pAd->MACVersion == 0x28600100)
2418         {
2419                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2420                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2421     }
2422
2423         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
2424         {
2425                 // enlarge MAX_LEN_CFG
2426                 UINT32 csr;
2427                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
2428                 csr &= 0xFFF;
2429                 csr |= 0x2000;
2430                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
2431         }
2432
2433 #ifdef RT2870
2434 {
2435         UCHAR   MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
2436
2437         //Initialize WCID table
2438         Value = 0xff;
2439         for(Index =0 ;Index < 254;Index++)
2440         {
2441                 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
2442         }
2443 }
2444 #endif // RT2870 //
2445
2446         // Add radio off control
2447         {
2448                 if (pAd->StaCfg.bRadio == FALSE)
2449                 {
2450 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
2451                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2452                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
2453                 }
2454         }
2455
2456         // Clear raw counters
2457         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2458         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2459         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2460         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2461         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2462         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2463
2464         // ASIC will keep garbage value after boot
2465         // Clear all seared key table when initial
2466         // This routine can be ignored in radio-ON/OFF operation.
2467         if (bHardReset)
2468         {
2469                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2470                 {
2471                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2472                 }
2473
2474                 // Clear all pairwise key table when initial
2475                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2476                 {
2477                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2478                 }
2479         }
2480
2481
2482         // It isn't necessary to clear this space when not hard reset.
2483         if (bHardReset == TRUE)
2484         {
2485                 // clear all on-chip BEACON frame space
2486                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2487                 {
2488                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2489                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2490                 }
2491         }
2492 #ifdef RT2870
2493         AsicDisableSync(pAd);
2494         // Clear raw counters
2495         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2496         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2497         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2498         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2499         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2500         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2501         // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
2502         RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
2503         Counter&=0xffffff00;
2504         Counter|=0x000001e;
2505         RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
2506 #endif // RT2870 //
2507 #ifdef RT30xx
2508         pAd->bUseEfuse=FALSE;
2509         RTMP_IO_READ32(pAd, EFUSE_CTRL, &eFuseCtrl);
2510         pAd->bUseEfuse = ( (eFuseCtrl & 0x80000000) == 0x80000000) ? 1 : 0;
2511         if(pAd->bUseEfuse)
2512         {
2513                         DBGPRINT(RT_DEBUG_TRACE, ("NVM is Efuse\n"));
2514         }
2515         else
2516         {
2517                         DBGPRINT(RT_DEBUG_TRACE, ("NVM is EEPROM\n"));
2518
2519         }
2520 #endif // RT30xx //
2521
2522         {
2523                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2524                 if ((pAd->MACVersion&0xffff) != 0x0101)
2525                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2526         }
2527
2528         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2529         return NDIS_STATUS_SUCCESS;
2530 }
2531
2532
2533 #ifdef RT2860
2534 VOID NICRestoreBBPValue(
2535         IN PRTMP_ADAPTER pAd)
2536 {
2537         UCHAR           index;
2538         UCHAR           Value = 0;
2539         ULONG           Data;
2540
2541         DBGPRINT(RT_DEBUG_TRACE, ("--->  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2542         // Initialize BBP register to default value (rtmp_init.c)
2543         for (index = 0; index < NUM_BBP_REG_PARMS; index++)
2544         {
2545                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[index].Register, BBPRegTable[index].Value);
2546         }
2547         // copy from (rtmp_init.c)
2548         if (pAd->MACVersion == 0x28600100)
2549         {
2550                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2551                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2552         }
2553
2554         // copy from (connect.c LinkUp function)
2555         if (INFRA_ON(pAd))
2556         {
2557                 // Change to AP channel
2558                 if ((pAd->CommonCfg.CentralChannel > pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2559                 {
2560                         // Must using 40MHz.
2561                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2562                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2563                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2564
2565                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2566                         Value &= (~0x18);
2567                         Value |= 0x10;
2568                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2569
2570                         //  RX : control channel at lower
2571                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2572                         Value &= (~0x20);
2573                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2574                         // Record BBPR3 setting, But don't keep R Antenna # information.
2575                         pAd->StaCfg.BBPR3 = Value;
2576
2577                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2578                         Data &= 0xfffffffe;
2579                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2580
2581                         if (pAd->MACVersion == 0x28600100)
2582                         {
2583                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2584                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2585                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2586                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2587                         }
2588
2589                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Lower LINK UP !!! Control Channel at Below. Central = %d \n", pAd->CommonCfg.CentralChannel ));
2590                 }
2591                 else if ((pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2592                 {
2593                         // Must using 40MHz.
2594                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2595                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2596                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2597
2598                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2599                         Value &= (~0x18);
2600                         Value |= 0x10;
2601                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2602
2603                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2604                         Data |= 0x1;
2605                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2606
2607                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2608                         Value |= (0x20);
2609                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2610                         // Record BBPR3 setting, But don't keep R Antenna # information.
2611                         pAd->StaCfg.BBPR3 = Value;
2612
2613                         if (pAd->MACVersion == 0x28600100)
2614                         {
2615                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2616                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2617                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2618                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2619                         }
2620
2621                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Upper LINK UP !!! Control Channel at UpperCentral = %d \n", pAd->CommonCfg.CentralChannel ));
2622                 }
2623                 else
2624                 {
2625                         pAd->CommonCfg.BBPCurrentBW = BW_20;
2626                         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
2627                         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
2628
2629                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2630                         Value &= (~0x18);
2631                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2632
2633                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2634                         Data &= 0xfffffffe;
2635                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2636
2637                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2638                         Value &= (~0x20);
2639                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2640                         // Record BBPR3 setting, But don't keep R Antenna # information.
2641                         pAd->StaCfg.BBPR3 = Value;
2642
2643                         if (pAd->MACVersion == 0x28600100)
2644                         {
2645                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2646                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
2647                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
2648                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2649                         }
2650
2651                         DBGPRINT(RT_DEBUG_TRACE, ("!!!20MHz LINK UP !!! \n" ));
2652                 }
2653         }
2654
2655         DBGPRINT(RT_DEBUG_TRACE, ("<---  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2656 }
2657 #endif /* RT2860 */
2658
2659 /*
2660         ========================================================================
2661
2662         Routine Description:
2663                 Reset NIC Asics
2664
2665         Arguments:
2666                 Adapter                                         Pointer to our adapter
2667
2668         Return Value:
2669                 None
2670
2671         IRQL = PASSIVE_LEVEL
2672
2673         Note:
2674                 Reset NIC to initial state AS IS system boot up time.
2675
2676         ========================================================================
2677 */
2678 VOID    NICIssueReset(
2679         IN      PRTMP_ADAPTER   pAd)
2680 {
2681         UINT32  Value = 0;
2682         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2683
2684         // Disable Rx, register value supposed will remain after reset
2685         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2686         Value &= (0xfffffff3);
2687         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2688
2689         // Issue reset and clear from reset state
2690         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2691         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2692
2693         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2694 }
2695
2696 /*
2697         ========================================================================
2698
2699         Routine Description:
2700                 Check ASIC registers and find any reason the system might hang
2701
2702         Arguments:
2703                 Adapter                                         Pointer to our adapter
2704
2705         Return Value:
2706                 None
2707
2708         IRQL = DISPATCH_LEVEL
2709
2710         ========================================================================
2711 */
2712 BOOLEAN NICCheckForHang(
2713         IN      PRTMP_ADAPTER   pAd)
2714 {
2715         return (FALSE);
2716 }
2717
2718 VOID NICUpdateFifoStaCounters(
2719         IN PRTMP_ADAPTER pAd)
2720 {
2721         TX_STA_FIFO_STRUC       StaFifo;
2722         MAC_TABLE_ENTRY         *pEntry;
2723         UCHAR                           i = 0;
2724         UCHAR                   pid = 0, wcid = 0;
2725         CHAR                            reTry;
2726         UCHAR                           succMCS;
2727
2728                 do
2729                 {
2730                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2731
2732                         if (StaFifo.field.bValid == 0)
2733                                 break;
2734
2735                         wcid = (UCHAR)StaFifo.field.wcid;
2736
2737
2738                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2739                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2740                         {
2741                                 i++;
2742                                 continue;
2743                         }
2744
2745                         /* PID store Tx MCS Rate */
2746                         pid = (UCHAR)StaFifo.field.PidType;
2747
2748                         pEntry = &pAd->MacTab.Content[wcid];
2749
2750                         pEntry->DebugFIFOCount++;
2751
2752                         if (StaFifo.field.TxBF) // 3*3
2753                                 pEntry->TxBFCount++;
2754
2755 #ifdef UAPSD_AP_SUPPORT
2756                         UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2757 #endif // UAPSD_AP_SUPPORT //
2758
2759                         if (!StaFifo.field.TxSuccess)
2760                         {
2761                                 pEntry->FIFOCount++;
2762                                 pEntry->OneSecTxFailCount++;
2763
2764                                 if (pEntry->FIFOCount >= 1)
2765                                 {
2766                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2767                                         pEntry->NoBADataCountDown = 64;
2768
2769                                         if(pEntry->PsMode == PWR_ACTIVE)
2770                                         {
2771                                                 int tid;
2772                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2773                                                 {
2774                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2775                                                 }
2776
2777                                                 // Update the continuous transmission counter except PS mode
2778                                                 pEntry->ContinueTxFailCnt++;
2779                                         }
2780                                         else
2781                                         {
2782                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2783                                                 //     this tx error happened due to sta just go to sleep.
2784                                                 pEntry->FIFOCount = 0;
2785                                                 pEntry->ContinueTxFailCnt = 0;
2786                                         }
2787                                 }
2788                         }
2789                         else
2790                         {
2791                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2792                                 {
2793                                         pEntry->NoBADataCountDown--;
2794                                         if (pEntry->NoBADataCountDown==0)
2795                                         {
2796                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2797                                         }
2798                                 }
2799
2800                                 pEntry->FIFOCount = 0;
2801                                 pEntry->OneSecTxNoRetryOkCount++;
2802                                 // update NoDataIdleCount when sucessful send packet to STA.
2803                                 pEntry->NoDataIdleCount = 0;
2804                                 pEntry->ContinueTxFailCnt = 0;
2805                         }
2806
2807                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2808
2809                         reTry = pid - succMCS;
2810
2811                         if (StaFifo.field.TxSuccess)
2812                         {
2813                                 pEntry->TXMCSExpected[pid]++;
2814                                 if (pid == succMCS)
2815                                 {
2816                                         pEntry->TXMCSSuccessful[pid]++;
2817                                 }
2818                                 else
2819                                 {
2820                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2821                                 }
2822                         }
2823                         else
2824                         {
2825                                 pEntry->TXMCSFailed[pid]++;
2826                         }
2827
2828                         if (reTry > 0)
2829                         {
2830                                 if ((pid >= 12) && succMCS <=7)
2831                                 {
2832                                         reTry -= 4;
2833                                 }
2834                                 pEntry->OneSecTxRetryOkCount += reTry;
2835                         }
2836
2837                         i++;
2838                         // ASIC store 16 stack
2839                 } while ( i < (2*TX_RING_SIZE) );
2840
2841 }
2842
2843 /*
2844         ========================================================================
2845
2846         Routine Description:
2847                 Read statistical counters from hardware registers and record them
2848                 in software variables for later on query
2849
2850         Arguments:
2851                 pAd                                     Pointer to our adapter
2852
2853         Return Value:
2854                 None
2855
2856         IRQL = DISPATCH_LEVEL
2857
2858         ========================================================================
2859 */
2860 VOID NICUpdateRawCounters(
2861         IN PRTMP_ADAPTER pAd)
2862 {
2863         UINT32  OldValue;
2864         RX_STA_CNT0_STRUC        RxStaCnt0;
2865         RX_STA_CNT1_STRUC   RxStaCnt1;
2866         RX_STA_CNT2_STRUC   RxStaCnt2;
2867         TX_STA_CNT0_STRUC        TxStaCnt0;
2868         TX_STA_CNT1_STRUC        StaTx1;
2869         TX_STA_CNT2_STRUC        StaTx2;
2870         TX_AGG_CNT_STRUC        TxAggCnt;
2871         TX_AGG_CNT0_STRUC       TxAggCnt0;
2872         TX_AGG_CNT1_STRUC       TxAggCnt1;
2873         TX_AGG_CNT2_STRUC       TxAggCnt2;
2874         TX_AGG_CNT3_STRUC       TxAggCnt3;
2875         TX_AGG_CNT4_STRUC       TxAggCnt4;
2876         TX_AGG_CNT5_STRUC       TxAggCnt5;
2877         TX_AGG_CNT6_STRUC       TxAggCnt6;
2878         TX_AGG_CNT7_STRUC       TxAggCnt7;
2879
2880         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2881         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2882
2883         {
2884                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2885             // Update RX PLCP error counter
2886             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2887                 // Update False CCA counter
2888                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2889         }
2890
2891         // Update FCS counters
2892         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2893         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2894         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2895                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2896
2897         // Add FCS error count to private counters
2898         pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2899         OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2900         pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2901         if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2902                 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2903
2904         // Update Duplicate Rcv check
2905         pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2906         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2907         // Update RX Overflow counter
2908         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2909
2910 #ifdef RT2870
2911         if (pAd->RalinkCounters.RxCount != pAd->watchDogRxCnt)
2912         {
2913                 pAd->watchDogRxCnt = pAd->RalinkCounters.RxCount;
2914                 pAd->watchDogRxOverFlowCnt = 0;
2915         }
2916         else
2917         {
2918                 if (RxStaCnt2.field.RxFifoOverflowCount)
2919                         pAd->watchDogRxOverFlowCnt++;
2920                 else
2921                         pAd->watchDogRxOverFlowCnt = 0;
2922         }
2923 #endif // RT2870 //
2924
2925
2926         if (!pAd->bUpdateBcnCntDone)
2927         {
2928         // Update BEACON sent count
2929         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2930         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2931         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2932         pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2933         pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2934         pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2935         pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2936         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2937         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2938         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2939         }
2940
2941         {
2942                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2943                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2944                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2945                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2946                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2947                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2948                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2949                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2950                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2951                 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2952                 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2953                 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2954                 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2955
2956                 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2957                 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2958                 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2959                 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2960
2961                 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2962                 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2963                 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2964                 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2965
2966                 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2967                 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2968                 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2969                 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2970
2971                 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2972                 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2973
2974                 // Calculate the transmitted A-MPDU count
2975                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2976                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2977
2978                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2979                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2980
2981                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2982                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2983
2984                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2985                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2986
2987                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2988                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2989
2990                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2991                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2992
2993                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2994                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2995
2996                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2997                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2998         }
2999
3000
3001
3002 }
3003
3004
3005 /*
3006         ========================================================================
3007
3008         Routine Description:
3009                 Reset NIC from error
3010
3011         Arguments:
3012                 Adapter                                         Pointer to our adapter
3013
3014         Return Value:
3015                 None
3016
3017         IRQL = PASSIVE_LEVEL
3018
3019         Note:
3020                 Reset NIC from error state
3021
3022         ========================================================================
3023 */
3024 VOID    NICResetFromError(
3025         IN      PRTMP_ADAPTER   pAd)
3026 {
3027         // Reset BBP (according to alex, reset ASIC will force reset BBP
3028         // Therefore, skip the reset BBP
3029         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
3030
3031         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
3032         // Remove ASIC from reset state
3033         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
3034
3035         NICInitializeAdapter(pAd, FALSE);
3036         NICInitAsicFromEEPROM(pAd);
3037
3038         // Switch to current channel, since during reset process, the connection should remains on.
3039         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
3040         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
3041 }
3042
3043 /*
3044         ========================================================================
3045
3046         Routine Description:
3047                 erase 8051 firmware image in MAC ASIC
3048
3049         Arguments:
3050                 Adapter                                         Pointer to our adapter
3051
3052         IRQL = PASSIVE_LEVEL
3053
3054         ========================================================================
3055 */
3056 VOID NICEraseFirmware(
3057         IN PRTMP_ADAPTER pAd)
3058 {
3059         ULONG i;
3060
3061         for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
3062                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
3063
3064 }/* End of NICEraseFirmware */
3065
3066 /*
3067         ========================================================================
3068
3069         Routine Description:
3070                 Load 8051 firmware RT2561.BIN file into MAC ASIC
3071
3072         Arguments:
3073                 Adapter                                         Pointer to our adapter
3074
3075         Return Value:
3076                 NDIS_STATUS_SUCCESS         firmware image load ok
3077                 NDIS_STATUS_FAILURE         image not found
3078
3079         IRQL = PASSIVE_LEVEL
3080
3081         ========================================================================
3082 */
3083 NDIS_STATUS NICLoadFirmware(
3084         IN PRTMP_ADAPTER pAd)
3085 {
3086         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
3087         PUCHAR                  pFirmwareImage;
3088         ULONG                   FileLength, Index;
3089         //ULONG                 firm;
3090         UINT32                  MacReg = 0;
3091 #ifdef RT2870
3092         UINT32                  Version = (pAd->MACVersion >> 16);
3093 #endif // RT2870 //
3094
3095         pFirmwareImage = FirmwareImage;
3096         FileLength = sizeof(FirmwareImage);
3097 #ifdef RT2870
3098         // New 8k byte firmware size for RT3071/RT3072
3099         //printk("Usb Chip\n");
3100         if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_MAX_LENGTH)
3101         //The firmware image consists of two parts. One is the origianl and the other is the new.
3102         //Use Second Part
3103         {
3104                 if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070))
3105                 {       // Use Firmware V2.
3106                         //printk("KH:Use New Version,part2\n");
3107                         pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV1_LENGTH];
3108                         FileLength = FIRMWAREIMAGEV2_LENGTH;
3109                 }
3110                 else
3111                 {
3112                         //printk("KH:Use New Version,part1\n");
3113                         pFirmwareImage = FirmwareImage;
3114                         FileLength = FIRMWAREIMAGEV1_LENGTH;
3115                 }
3116         }
3117         else
3118         {
3119                 DBGPRINT(RT_DEBUG_ERROR, ("KH: bin file should be 8KB.\n"));
3120                 Status = NDIS_STATUS_FAILURE;
3121         }
3122
3123 #endif // RT2870 //
3124
3125         RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
3126
3127         /* check if MCU is ready */
3128         Index = 0;
3129         do
3130         {
3131                 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
3132
3133                 if (MacReg & 0x80)
3134                         break;
3135
3136                 RTMPusecDelay(1000);
3137         } while (Index++ < 1000);
3138
3139     if (Index > 1000)
3140         {
3141                 Status = NDIS_STATUS_FAILURE;
3142                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
3143         } /* End of if */
3144
3145     DBGPRINT(RT_DEBUG_TRACE,
3146                          ("<=== %s (status=%d)\n", __func__, Status));
3147     return Status;
3148 } /* End of NICLoadFirmware */
3149
3150
3151 /*
3152         ========================================================================
3153
3154         Routine Description:
3155                 Load Tx rate switching parameters
3156
3157         Arguments:
3158                 Adapter                                         Pointer to our adapter
3159
3160         Return Value:
3161                 NDIS_STATUS_SUCCESS         firmware image load ok
3162                 NDIS_STATUS_FAILURE         image not found
3163
3164         IRQL = PASSIVE_LEVEL
3165
3166         Rate Table Format:
3167                 1. (B0: Valid Item number) (B1:Initial item from zero)
3168                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
3169
3170         ========================================================================
3171 */
3172 NDIS_STATUS NICLoadRateSwitchingParams(
3173         IN PRTMP_ADAPTER pAd)
3174 {
3175         return NDIS_STATUS_SUCCESS;
3176 }
3177
3178 /*
3179         ========================================================================
3180
3181         Routine Description:
3182                 if  pSrc1 all zero with length Length, return 0.
3183                 If not all zero, return 1
3184
3185         Arguments:
3186                 pSrc1
3187
3188         Return Value:
3189                 1:                      not all zero
3190                 0:                      all zero
3191
3192         IRQL = DISPATCH_LEVEL
3193
3194         Note:
3195
3196         ========================================================================
3197 */
3198 ULONG   RTMPNotAllZero(
3199         IN      PVOID   pSrc1,
3200         IN      ULONG   Length)
3201 {
3202         PUCHAR  pMem1;
3203         ULONG   Index = 0;
3204
3205         pMem1 = (PUCHAR) pSrc1;
3206
3207         for (Index = 0; Index < Length; Index++)
3208         {
3209                 if (pMem1[Index] != 0x0)
3210                 {
3211                         break;
3212                 }
3213         }
3214
3215         if (Index == Length)
3216         {
3217                 return (0);
3218         }
3219         else
3220         {
3221                 return (1);
3222         }
3223 }
3224
3225 /*
3226         ========================================================================
3227
3228         Routine Description:
3229                 Compare two memory block
3230
3231         Arguments:
3232                 pSrc1           Pointer to first memory address
3233                 pSrc2           Pointer to second memory address
3234
3235         Return Value:
3236                 0:                      memory is equal
3237                 1:                      pSrc1 memory is larger
3238                 2:                      pSrc2 memory is larger
3239
3240         IRQL = DISPATCH_LEVEL
3241
3242         Note:
3243
3244         ========================================================================
3245 */
3246 ULONG   RTMPCompareMemory(
3247         IN      PVOID   pSrc1,
3248         IN      PVOID   pSrc2,
3249         IN      ULONG   Length)
3250 {
3251         PUCHAR  pMem1;
3252         PUCHAR  pMem2;
3253         ULONG   Index = 0;
3254
3255         pMem1 = (PUCHAR) pSrc1;
3256         pMem2 = (PUCHAR) pSrc2;
3257
3258         for (Index = 0; Index < Length; Index++)
3259         {
3260                 if (pMem1[Index] > pMem2[Index])
3261                         return (1);
3262                 else if (pMem1[Index] < pMem2[Index])
3263                         return (2);
3264         }
3265
3266         // Equal
3267         return (0);
3268 }
3269
3270 /*
3271         ========================================================================
3272
3273         Routine Description:
3274                 Zero out memory block
3275
3276         Arguments:
3277                 pSrc1           Pointer to memory address
3278                 Length          Size
3279
3280         Return Value:
3281                 None
3282
3283         IRQL = PASSIVE_LEVEL
3284         IRQL = DISPATCH_LEVEL
3285
3286         Note:
3287
3288         ========================================================================
3289 */
3290 VOID    RTMPZeroMemory(
3291         IN      PVOID   pSrc,
3292         IN      ULONG   Length)
3293 {
3294         PUCHAR  pMem;
3295         ULONG   Index = 0;
3296
3297         pMem = (PUCHAR) pSrc;
3298
3299         for (Index = 0; Index < Length; Index++)
3300         {
3301                 pMem[Index] = 0x00;
3302         }
3303 }
3304
3305 VOID    RTMPFillMemory(
3306         IN      PVOID   pSrc,
3307         IN      ULONG   Length,
3308         IN      UCHAR   Fill)
3309 {
3310         PUCHAR  pMem;
3311         ULONG   Index = 0;
3312
3313         pMem = (PUCHAR) pSrc;
3314
3315         for (Index = 0; Index < Length; Index++)
3316         {
3317                 pMem[Index] = Fill;
3318         }
3319 }
3320
3321 /*
3322         ========================================================================
3323
3324         Routine Description:
3325                 Copy data from memory block 1 to memory block 2
3326
3327         Arguments:
3328                 pDest           Pointer to destination memory address
3329                 pSrc            Pointer to source memory address
3330                 Length          Copy size
3331
3332         Return Value:
3333                 None
3334
3335         IRQL = PASSIVE_LEVEL
3336         IRQL = DISPATCH_LEVEL
3337
3338         Note:
3339
3340         ========================================================================
3341 */
3342 VOID    RTMPMoveMemory(
3343         OUT     PVOID   pDest,
3344         IN      PVOID   pSrc,
3345         IN      ULONG   Length)
3346 {
3347         PUCHAR  pMem1;
3348         PUCHAR  pMem2;
3349         UINT    Index;
3350
3351         ASSERT((Length==0) || (pDest && pSrc));
3352
3353         pMem1 = (PUCHAR) pDest;
3354         pMem2 = (PUCHAR) pSrc;
3355
3356         for (Index = 0; Index < Length; Index++)
3357         {
3358                 pMem1[Index] = pMem2[Index];
3359         }
3360 }
3361
3362 /*
3363         ========================================================================
3364
3365         Routine Description:
3366                 Initialize port configuration structure
3367
3368         Arguments:
3369                 Adapter                                         Pointer to our adapter
3370
3371         Return Value:
3372                 None
3373
3374         IRQL = PASSIVE_LEVEL
3375
3376         Note:
3377
3378         ========================================================================
3379 */
3380 VOID    UserCfgInit(
3381         IN      PRTMP_ADAPTER pAd)
3382 {
3383     UINT key_index, bss_index;
3384
3385         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3386
3387         //
3388         //  part I. intialize common configuration
3389         //
3390 #ifdef RT2870
3391         pAd->BulkOutReq = 0;
3392
3393         pAd->BulkOutComplete = 0;
3394         pAd->BulkOutCompleteOther = 0;
3395         pAd->BulkOutCompleteCancel = 0;
3396         pAd->BulkInReq = 0;
3397         pAd->BulkInComplete = 0;
3398         pAd->BulkInCompleteFail = 0;
3399
3400         //pAd->QuickTimerP = 100;
3401         //pAd->TurnAggrBulkInCount = 0;
3402         pAd->bUsbTxBulkAggre = 0;
3403
3404         // init as unsed value to ensure driver will set to MCU once.
3405         pAd->LedIndicatorStregth = 0xFF;
3406
3407         pAd->CommonCfg.MaxPktOneTxBulk = 2;
3408         pAd->CommonCfg.TxBulkFactor = 1;
3409         pAd->CommonCfg.RxBulkFactor =1;
3410
3411         pAd->CommonCfg.TxPower = 100; //mW
3412
3413         NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
3414 #endif // RT2870 //
3415
3416         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3417         {
3418                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3419                 {
3420                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3421                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3422                 }
3423         }
3424
3425 #ifdef RT30xx
3426         pAd->EepromAccess = FALSE;
3427 #endif
3428         pAd->Antenna.word = 0;
3429         pAd->CommonCfg.BBPCurrentBW = BW_20;
3430
3431         pAd->LedCntl.word = 0;
3432 #ifdef RT2860
3433         pAd->LedIndicatorStregth = 0;
3434         pAd->RLnkCtrlOffset = 0;
3435         pAd->HostLnkCtrlOffset = 0;
3436         pAd->CheckDmaBusyCount = 0;
3437 #endif
3438
3439         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
3440         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
3441         pAd->RfIcType = RFIC_2820;
3442
3443         // Init timer for reset complete event
3444         pAd->CommonCfg.CentralChannel = 1;
3445         pAd->bForcePrintTX = FALSE;
3446         pAd->bForcePrintRX = FALSE;
3447         pAd->bStaFifoTest = FALSE;
3448         pAd->bProtectionTest = FALSE;
3449         pAd->bHCCATest = FALSE;
3450         pAd->bGenOneHCCA = FALSE;
3451         pAd->CommonCfg.Dsifs = 10;      // in units of usec
3452         pAd->CommonCfg.TxPower = 100; //mW
3453         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3454         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3455         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3456         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3457         pAd->CommonCfg.RtsThreshold = 2347;
3458         pAd->CommonCfg.FragmentThreshold = 2346;
3459         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
3460         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3461         pAd->CommonCfg.PhyMode = 0xff;     // unknown
3462         pAd->CommonCfg.BandState = UNKNOWN_BAND;
3463         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3464         pAd->CommonCfg.RadarDetect.CSCount = 0;
3465         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3466         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3467         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3468         pAd->CommonCfg.bAPSDCapable = FALSE;
3469         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3470         pAd->CommonCfg.TriggerTimerCount = 0;
3471         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3472         pAd->CommonCfg.bCountryFlag = FALSE;
3473         pAd->CommonCfg.TxStream = 0;
3474         pAd->CommonCfg.RxStream = 0;
3475
3476         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3477
3478         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3479         pAd->HTCEnable = FALSE;
3480         pAd->bBroadComHT = FALSE;
3481         pAd->CommonCfg.bRdg = FALSE;
3482
3483         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3484         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3485         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3486         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3487         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3488         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3489         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3490
3491         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3492         BATableInit(pAd, &pAd->BATable);
3493
3494         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3495         pAd->CommonCfg.bHTProtect = 1;
3496         pAd->CommonCfg.bMIMOPSEnable = TRUE;
3497         pAd->CommonCfg.bBADecline = FALSE;
3498         pAd->CommonCfg.bDisableReordering = FALSE;
3499
3500         pAd->CommonCfg.TxBASize = 7;
3501
3502         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3503
3504         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3505         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3506         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3507         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3508         pAd->CommonCfg.TxRate = RATE_6;
3509
3510         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3511         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3512         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3513
3514         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
3515
3516         //
3517         // part II. intialize STA specific configuration
3518         //
3519         {
3520                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3521                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3522                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3523                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3524
3525                 pAd->StaCfg.Psm = PWR_ACTIVE;
3526
3527                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3528                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3529                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3530                 pAd->StaCfg.bMixCipher = FALSE;
3531                 pAd->StaCfg.DefaultKeyId = 0;
3532
3533                 // 802.1x port control
3534                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3535                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3536                 pAd->StaCfg.LastMicErrorTime = 0;
3537                 pAd->StaCfg.MicErrCnt        = 0;
3538                 pAd->StaCfg.bBlockAssoc      = FALSE;
3539                 pAd->StaCfg.WpaState         = SS_NOTUSE;
3540
3541                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
3542
3543                 pAd->StaCfg.RssiTrigger = 0;
3544                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3545                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3546                 pAd->StaCfg.AtimWin = 0;
3547                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3548                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3549                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3550                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3551                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3552
3553                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3554                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3555         }
3556
3557         // global variables mXXXX used in MAC protocol state machines
3558         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3559         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3560         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3561
3562         // PHY specification
3563         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
3564         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
3565
3566         {
3567                 // user desired power mode
3568                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3569                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3570                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3571
3572                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3573                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3574
3575                 // Patch for Ndtest
3576                 pAd->StaCfg.ScanCnt = 0;
3577
3578                 // CCX 2.0 control flag init
3579                 pAd->StaCfg.CCXEnable = FALSE;
3580                 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3581                 pAd->StaCfg.CCXQosECWMin        = 4;
3582                 pAd->StaCfg.CCXQosECWMax        = 10;
3583
3584                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
3585                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
3586                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
3587                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
3588                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
3589
3590                 // Nitro mode control
3591                 pAd->StaCfg.bAutoReconnect = TRUE;
3592
3593                 // Save the init time as last scan time, the system should do scan after 2 seconds.
3594                 // This patch is for driver wake up from standby mode, system will do scan right away.
3595                 pAd->StaCfg.LastScanTime = 0;
3596                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3597                 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3598                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3599                 pAd->StaCfg.IEEE8021X = FALSE;
3600                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3601                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3602                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3603         }
3604
3605         // Default for extra information is not valid
3606         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3607
3608         // Default Config change flag
3609         pAd->bConfigChanged = FALSE;
3610
3611         //
3612         // part III. AP configurations
3613         //
3614
3615
3616         //
3617         // part IV. others
3618         //
3619         // dynamic BBP R66:sensibity tuning to overcome background noise
3620         pAd->BbpTuning.bEnable                = TRUE;
3621         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3622         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3623         pAd->BbpTuning.R66Delta               = 4;
3624         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3625
3626         //
3627         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3628         // if not initial this value, the default value will be 0.
3629         //
3630         pAd->BbpTuning.R66CurrentValue = 0x38;
3631
3632         pAd->Bbp94 = BBPR94_DEFAULT;
3633         pAd->BbpForCCK = FALSE;
3634
3635         // initialize MAC table and allocate spin lock
3636         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3637         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3638         NdisAllocateSpinLock(&pAd->MacTabLock);
3639
3640         pAd->CommonCfg.bWiFiTest = FALSE;
3641 #ifdef RT2860
3642         pAd->bPCIclkOff = FALSE;
3643
3644         RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
3645 #endif
3646         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3647 }
3648
3649 // IRQL = PASSIVE_LEVEL
3650 UCHAR BtoH(char ch)
3651 {
3652         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3653         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3654         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3655         return(255);
3656 }
3657
3658 //
3659 //  FUNCTION: AtoH(char *, UCHAR *, int)
3660 //
3661 //  PURPOSE:  Converts ascii string to network order hex
3662 //
3663 //  PARAMETERS:
3664 //    src    - pointer to input ascii string
3665 //    dest   - pointer to output hex
3666 //    destlen - size of dest
3667 //
3668 //  COMMENTS:
3669 //
3670 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3671 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
3672 //
3673 // IRQL = PASSIVE_LEVEL
3674
3675 void AtoH(char * src, UCHAR * dest, int destlen)
3676 {
3677         char * srcptr;
3678         PUCHAR destTemp;
3679
3680         srcptr = src;
3681         destTemp = (PUCHAR) dest;
3682
3683         while(destlen--)
3684         {
3685                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3686                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3687                 destTemp++;
3688         }
3689 }
3690
3691 VOID    RTMPPatchMacBbpBug(
3692         IN      PRTMP_ADAPTER   pAd)
3693 {
3694         ULONG   Index;
3695
3696         // Initialize BBP register to default value
3697         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3698         {
3699                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3700         }
3701
3702         // Initialize RF register to default value
3703         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3704         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3705
3706         // Re-init BBP register from EEPROM value
3707         NICInitAsicFromEEPROM(pAd);
3708 }
3709
3710 /*
3711         ========================================================================
3712
3713         Routine Description:
3714                 Init timer objects
3715
3716         Arguments:
3717                 pAd                     Pointer to our adapter
3718                 pTimer                          Timer structure
3719                 pTimerFunc                      Function to execute when timer expired
3720                 Repeat                          Ture for period timer
3721
3722         Return Value:
3723                 None
3724
3725         Note:
3726
3727         ========================================================================
3728 */
3729 VOID    RTMPInitTimer(
3730         IN      PRTMP_ADAPTER                   pAd,
3731         IN      PRALINK_TIMER_STRUCT    pTimer,
3732         IN      PVOID                                   pTimerFunc,
3733         IN      PVOID                                   pData,
3734         IN      BOOLEAN                                 Repeat)
3735 {
3736         //
3737         // Set Valid to TRUE for later used.
3738         // It will crash if we cancel a timer or set a timer
3739         // that we haven't initialize before.
3740         //
3741         pTimer->Valid      = TRUE;
3742
3743         pTimer->PeriodicType = Repeat;
3744         pTimer->State      = FALSE;
3745         pTimer->cookie = (ULONG) pData;
3746
3747 #ifdef RT2870
3748         pTimer->pAd = pAd;
3749 #endif // RT2870 //
3750
3751         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3752 }
3753
3754 /*
3755         ========================================================================
3756
3757         Routine Description:
3758                 Init timer objects
3759
3760         Arguments:
3761                 pTimer                          Timer structure
3762                 Value                           Timer value in milliseconds
3763
3764         Return Value:
3765                 None
3766
3767         Note:
3768                 To use this routine, must call RTMPInitTimer before.
3769
3770         ========================================================================
3771 */
3772 VOID    RTMPSetTimer(
3773         IN      PRALINK_TIMER_STRUCT    pTimer,
3774         IN      ULONG                                   Value)
3775 {
3776         if (pTimer->Valid)
3777         {
3778                 pTimer->TimerValue = Value;
3779                 pTimer->State      = FALSE;
3780                 if (pTimer->PeriodicType == TRUE)
3781                 {
3782                         pTimer->Repeat = TRUE;
3783                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3784                 }
3785                 else
3786                 {
3787                         pTimer->Repeat = FALSE;
3788                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3789                 }
3790         }
3791         else
3792         {
3793                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3794         }
3795 }
3796
3797
3798 /*
3799         ========================================================================
3800
3801         Routine Description:
3802                 Init timer objects
3803
3804         Arguments:
3805                 pTimer                          Timer structure
3806                 Value                           Timer value in milliseconds
3807
3808         Return Value:
3809                 None
3810
3811         Note:
3812                 To use this routine, must call RTMPInitTimer before.
3813
3814         ========================================================================
3815 */
3816 VOID    RTMPModTimer(
3817         IN      PRALINK_TIMER_STRUCT    pTimer,
3818         IN      ULONG                                   Value)
3819 {
3820         BOOLEAN Cancel;
3821
3822         if (pTimer->Valid)
3823         {
3824                 pTimer->TimerValue = Value;
3825                 pTimer->State      = FALSE;
3826                 if (pTimer->PeriodicType == TRUE)
3827                 {
3828                         RTMPCancelTimer(pTimer, &Cancel);
3829                         RTMPSetTimer(pTimer, Value);
3830                 }
3831                 else
3832                 {
3833                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3834                 }
3835         }
3836         else
3837         {
3838                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3839         }
3840 }
3841
3842 /*
3843         ========================================================================
3844
3845         Routine Description:
3846                 Cancel timer objects
3847
3848         Arguments:
3849                 Adapter                                         Pointer to our adapter
3850
3851         Return Value:
3852                 None
3853
3854         IRQL = PASSIVE_LEVEL
3855         IRQL = DISPATCH_LEVEL
3856
3857         Note:
3858                 1.) To use this routine, must call RTMPInitTimer before.
3859                 2.) Reset NIC to initial state AS IS system boot up time.
3860
3861         ========================================================================
3862 */
3863 VOID    RTMPCancelTimer(
3864         IN      PRALINK_TIMER_STRUCT    pTimer,
3865         OUT     BOOLEAN                                 *pCancelled)
3866 {
3867         if (pTimer->Valid)
3868         {
3869                 if (pTimer->State == FALSE)
3870                         pTimer->Repeat = FALSE;
3871                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3872
3873                 if (*pCancelled == TRUE)
3874                         pTimer->State = TRUE;
3875
3876 #ifdef RT2870
3877                 // We need to go-through the TimerQ to findout this timer handler and remove it if
3878                 //              it's still waiting for execution.
3879
3880                 RT2870_TimerQ_Remove(pTimer->pAd, pTimer);
3881 #endif // RT2870 //
3882         }
3883         else
3884         {
3885                 //
3886                 // NdisMCancelTimer just canced the timer and not mean release the timer.
3887                 // And don't set the "Valid" to False. So that we can use this timer again.
3888                 //
3889                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3890         }
3891 }
3892
3893 /*
3894         ========================================================================
3895
3896         Routine Description:
3897                 Set LED Status
3898
3899         Arguments:
3900                 pAd                                             Pointer to our adapter
3901                 Status                                  LED Status
3902
3903         Return Value:
3904                 None
3905
3906         IRQL = PASSIVE_LEVEL
3907         IRQL = DISPATCH_LEVEL
3908
3909         Note:
3910
3911         ========================================================================
3912 */
3913 VOID RTMPSetLED(
3914         IN PRTMP_ADAPTER        pAd,
3915         IN UCHAR                        Status)
3916 {
3917         //ULONG                 data;
3918         UCHAR                   HighByte = 0;
3919         UCHAR                   LowByte;
3920
3921         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3922         switch (Status)
3923         {
3924                 case LED_LINK_DOWN:
3925                         HighByte = 0x20;
3926                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3927                         pAd->LedIndicatorStregth = 0;
3928                         break;
3929                 case LED_LINK_UP:
3930                         if (pAd->CommonCfg.Channel > 14)
3931                                 HighByte = 0xa0;
3932                         else
3933                                 HighByte = 0x60;
3934                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3935                         break;
3936                 case LED_RADIO_ON:
3937                         HighByte = 0x20;
3938                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3939                         break;
3940                 case LED_HALT:
3941                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3942                 case LED_RADIO_OFF:
3943                         HighByte = 0;
3944                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3945                         break;
3946         case LED_WPS:
3947                         HighByte = 0x10;
3948                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3949                         break;
3950                 case LED_ON_SITE_SURVEY:
3951                         HighByte = 0x08;
3952                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3953                         break;
3954                 case LED_POWER_UP:
3955                         HighByte = 0x04;
3956                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3957                         break;
3958                 default:
3959                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3960                         break;
3961         }
3962
3963     //
3964         // Keep LED status for LED SiteSurvey mode.
3965         // After SiteSurvey, we will set the LED mode to previous status.
3966         //
3967         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3968                 pAd->LedStatus = Status;
3969
3970         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3971 }
3972
3973 /*
3974         ========================================================================
3975
3976         Routine Description:
3977                 Set LED Signal Stregth
3978
3979         Arguments:
3980                 pAd                                             Pointer to our adapter
3981                 Dbm                                             Signal Stregth
3982
3983         Return Value:
3984                 None
3985
3986         IRQL = PASSIVE_LEVEL
3987
3988         Note:
3989                 Can be run on any IRQL level.
3990
3991                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3992                 <= -90  No Signal
3993                 <= -81  Very Low
3994                 <= -71  Low
3995                 <= -67  Good
3996                 <= -57  Very Good
3997                  > -57  Excellent
3998         ========================================================================
3999 */
4000 VOID RTMPSetSignalLED(
4001         IN PRTMP_ADAPTER        pAd,
4002         IN NDIS_802_11_RSSI Dbm)
4003 {
4004         UCHAR           nLed = 0;
4005
4006         //
4007         // if not Signal Stregth, then do nothing.
4008         //
4009         if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
4010         {
4011                 return;
4012         }
4013
4014         if (Dbm <= -90)
4015                 nLed = 0;
4016         else if (Dbm <= -81)
4017                 nLed = 1;
4018         else if (Dbm <= -71)
4019                 nLed = 3;
4020         else if (Dbm <= -67)
4021                 nLed = 7;
4022         else if (Dbm <= -57)
4023                 nLed = 15;
4024         else
4025                 nLed = 31;
4026
4027         //
4028         // Update Signal Stregth to firmware if changed.
4029         //
4030         if (pAd->LedIndicatorStregth != nLed)
4031         {
4032                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
4033                 pAd->LedIndicatorStregth = nLed;
4034         }
4035 }
4036
4037 /*
4038         ========================================================================
4039
4040         Routine Description:
4041                 Enable RX
4042
4043         Arguments:
4044                 pAd                                             Pointer to our adapter
4045
4046         Return Value:
4047                 None
4048
4049         IRQL <= DISPATCH_LEVEL
4050
4051         Note:
4052                 Before Enable RX, make sure you have enabled Interrupt.
4053         ========================================================================
4054 */
4055 VOID RTMPEnableRxTx(
4056         IN PRTMP_ADAPTER        pAd)
4057 {
4058         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
4059
4060         // Enable Rx DMA.
4061         RT28XXDMAEnable(pAd);
4062
4063         // enable RX of MAC block
4064         if (pAd->OpMode == OPMODE_AP)
4065         {
4066                 UINT32 rx_filter_flag = APNORMAL;
4067
4068
4069                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
4070         }
4071         else
4072         {
4073                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);     // Staion not drop control frame will fail WiFi Certification.
4074         }
4075
4076         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
4077         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
4078 }
4079
4080