SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/staging/rt2860/common/eeprom.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         eeprom.c
  29
  30         Abstract:
  31
  32         Revision History:
  33         Who                     When                    What
  34         --------        ----------              ----------------------------------------------
  35         Name            Date                    Modification logs
  36 */
  37 #include "../rt_config.h"
  38
  39 // IRQL = PASSIVE_LEVEL
  40 VOID RaiseClock(
  41     IN  PRTMP_ADAPTER   pAd,
  42     IN  UINT32 *x)
  43 {
  44     *x = *x | EESK;
  45     RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
  46     RTMPusecDelay(1);                           // Max frequency = 1MHz in Spec. definition
  47 }
  48
  49 // IRQL = PASSIVE_LEVEL
  50 VOID LowerClock(
  51     IN  PRTMP_ADAPTER   pAd,
  52     IN  UINT32 *x)
  53 {
  54     *x = *x & ~EESK;
  55     RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
  56     RTMPusecDelay(1);
  57 }
  58
  59 // IRQL = PASSIVE_LEVEL
  60 USHORT ShiftInBits(
  61     IN  PRTMP_ADAPTER   pAd)
  62 {
  63     UINT32              x,i;
  64         USHORT      data=0;
  65
  66     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
  67
  68     x &= ~( EEDO | EEDI);
  69
  70     for(i=0; i<16; i++)
  71     {
  72         data = data << 1;
  73         RaiseClock(pAd, &x);
  74
  75         RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
  76 #ifdef RT30xx
  77                 LowerClock(pAd, &x); //prevent read failed
  78 #endif
  79         x &= ~(EEDI);
  80         if(x & EEDO)
  81             data |= 1;
  82
  83 #ifndef RT30xx
  84         LowerClock(pAd, &x);
  85 #endif
  86     }
  87
  88     return data;
  89 }
  90
  91 // IRQL = PASSIVE_LEVEL
  92 VOID ShiftOutBits(
  93     IN  PRTMP_ADAPTER   pAd,
  94     IN  USHORT data,
  95     IN  USHORT count)
  96 {
  97     UINT32       x,mask;
  98
  99     mask = 0x01 << (count - 1);
 100     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 101
 102     x &= ~(EEDO | EEDI);
 103
 104     do
 105     {
 106         x &= ~EEDI;
 107         if(data & mask)         x |= EEDI;
 108
 109         RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 110
 111         RaiseClock(pAd, &x);
 112         LowerClock(pAd, &x);
 113
 114         mask = mask >> 1;
 115     } while(mask);
 116
 117     x &= ~EEDI;
 118     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 119 }
 120
 121 // IRQL = PASSIVE_LEVEL
 122 VOID EEpromCleanup(
 123     IN  PRTMP_ADAPTER   pAd)
 124 {
 125     UINT32 x;
 126
 127     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 128
 129     x &= ~(EECS | EEDI);
 130     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 131
 132     RaiseClock(pAd, &x);
 133     LowerClock(pAd, &x);
 134 }
 135
 136 VOID EWEN(
 137         IN      PRTMP_ADAPTER   pAd)
 138 {
 139     UINT32      x;
 140
 141     // reset bits and set EECS
 142     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 143     x &= ~(EEDI | EEDO | EESK);
 144     x |= EECS;
 145     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 146
 147         // kick a pulse
 148         RaiseClock(pAd, &x);
 149         LowerClock(pAd, &x);
 150
 151     // output the read_opcode and six pulse in that order
 152     ShiftOutBits(pAd, EEPROM_EWEN_OPCODE, 5);
 153     ShiftOutBits(pAd, 0, 6);
 154
 155     EEpromCleanup(pAd);
 156 }
 157
 158 VOID EWDS(
 159         IN      PRTMP_ADAPTER   pAd)
 160 {
 161     UINT32      x;
 162
 163     // reset bits and set EECS
 164     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 165     x &= ~(EEDI | EEDO | EESK);
 166     x |= EECS;
 167     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 168
 169         // kick a pulse
 170         RaiseClock(pAd, &x);
 171         LowerClock(pAd, &x);
 172
 173     // output the read_opcode and six pulse in that order
 174     ShiftOutBits(pAd, EEPROM_EWDS_OPCODE, 5);
 175     ShiftOutBits(pAd, 0, 6);
 176
 177     EEpromCleanup(pAd);
 178 }
 179
 180 // IRQL = PASSIVE_LEVEL
 181 USHORT RTMP_EEPROM_READ16(
 182     IN  PRTMP_ADAPTER   pAd,
 183     IN  USHORT Offset)
 184 {
 185     UINT32              x;
 186     USHORT              data;
 187
 188 #ifdef RT30xx
 189         if (pAd->NicConfig2.field.AntDiversity)
 190     {
 191         pAd->EepromAccess = TRUE;
 192     }
 193 //2008/09/11:KH add to support efuse<--
 194 //2008/09/11:KH add to support efuse-->
 195 {
 196 #endif
 197     Offset /= 2;
 198     // reset bits and set EECS
 199     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 200     x &= ~(EEDI | EEDO | EESK);
 201     x |= EECS;
 202     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 203
 204 #ifdef RT30xx
 205         // patch can not access e-Fuse issue
 206     if (!IS_RT3090(pAd))
 207     {
 208 #endif
 209         // kick a pulse
 210         RaiseClock(pAd, &x);
 211         LowerClock(pAd, &x);
 212 #ifdef RT30xx
 213     }
 214 #endif
 215
 216     // output the read_opcode and register number in that order
 217     ShiftOutBits(pAd, EEPROM_READ_OPCODE, 3);
 218     ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
 219
 220     // Now read the data (16 bits) in from the selected EEPROM word
 221     data = ShiftInBits(pAd);
 222
 223     EEpromCleanup(pAd);
 224
 225 #ifdef RT30xx
 226         // Antenna and EEPROM access are both using EESK pin,
 227     // Therefor we should avoid accessing EESK at the same time
 228     // Then restore antenna after EEPROM access
 229         if ((pAd->NicConfig2.field.AntDiversity) || (pAd->RfIcType == RFIC_3020))
 230     {
 231             pAd->EepromAccess = FALSE;
 232             AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
 233     }
 234 }
 235 #endif
 236     return data;
 237 }       //ReadEEprom
 238
 239 VOID RTMP_EEPROM_WRITE16(
 240     IN  PRTMP_ADAPTER   pAd,
 241     IN  USHORT Offset,
 242     IN  USHORT Data)
 243 {
 244     UINT32 x;
 245
 246 #ifdef RT30xx
 247         if (pAd->NicConfig2.field.AntDiversity)
 248     {
 249         pAd->EepromAccess = TRUE;
 250     }
 251         //2008/09/11:KH add to support efuse<--
 252 //2008/09/11:KH add to support efuse-->
 253         {
 254 #endif
 255         Offset /= 2;
 256
 257         EWEN(pAd);
 258
 259     // reset bits and set EECS
 260     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 261     x &= ~(EEDI | EEDO | EESK);
 262     x |= EECS;
 263     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 264
 265 #ifdef RT30xx
 266         // patch can not access e-Fuse issue
 267     if (!IS_RT3090(pAd))
 268     {
 269 #endif
 270         // kick a pulse
 271         RaiseClock(pAd, &x);
 272         LowerClock(pAd, &x);
 273 #ifdef RT30xx
 274     }
 275 #endif
 276
 277     // output the read_opcode ,register number and data in that order
 278     ShiftOutBits(pAd, EEPROM_WRITE_OPCODE, 3);
 279     ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
 280         ShiftOutBits(pAd, Data, 16);            // 16-bit access
 281
 282     // read DO status
 283     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 284
 285         EEpromCleanup(pAd);
 286
 287         RTMPusecDelay(10000);   //delay for twp(MAX)=10ms
 288
 289         EWDS(pAd);
 290
 291     EEpromCleanup(pAd);
 292
 293 #ifdef RT30xx
 294         // Antenna and EEPROM access are both using EESK pin,
 295     // Therefor we should avoid accessing EESK at the same time
 296     // Then restore antenna after EEPROM access
 297         if ((pAd->NicConfig2.field.AntDiversity) || (pAd->RfIcType == RFIC_3020))
 298     {
 299             pAd->EepromAccess = FALSE;
 300             AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
 301     }
 302 }
 303 #endif
 304 }
 305
 306 //2008/09/11:KH add to support efuse<--
 307 #ifdef RT30xx
 308 /*
 309         ========================================================================
 310
 311         Routine Description:
 312
 313         Arguments:
 314
 315         Return Value:
 316
 317         IRQL =
 318
 319         Note:
 320
 321         ========================================================================
 322 */
 323 UCHAR eFuseReadRegisters(
 324         IN      PRTMP_ADAPTER   pAd,
 325         IN      USHORT Offset,
 326         IN      USHORT Length,
 327         OUT     USHORT* pData)
 328 {
 329         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
 330         int     i;
 331         USHORT  efuseDataOffset;
 332         UINT32  data;
 333
 334         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 335
 336         //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 337         //Use the eeprom logical address and covert to address to block number
 338         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 339
 340         //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 0.
 341         eFuseCtrlStruc.field.EFSROM_MODE = 0;
 342
 343         //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
 344         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 345
 346         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 347         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 348
 349         //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
 350         i = 0;
 351         while(i < 100)
 352         {
 353                 //rtmp.HwMemoryReadDword(EFUSE_CTRL, (DWORD *) &eFuseCtrlStruc, 4);
 354                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 355                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 356                 {
 357                         break;
 358                 }
 359                 RTMPusecDelay(2);
 360                 i++;
 361         }
 362
 363         //if EFSROM_AOUT is not found in physical address, write 0xffff
 364         if (eFuseCtrlStruc.field.EFSROM_AOUT == 0x3f)
 365         {
 366                 for(i=0; i<Length/2; i++)
 367                         *(pData+2*i) = 0xffff;
 368         }
 369         else
 370         {
 371                 //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x590-0x59C)
 372                 efuseDataOffset =  EFUSE_DATA3 - (Offset & 0xC)  ;
 373                 //data hold 4 bytes data.
 374                 //In RTMP_IO_READ32 will automatically execute 32-bytes swapping
 375                 RTMP_IO_READ32(pAd, efuseDataOffset, &data);
 376                 //Decide the upper 2 bytes or the bottom 2 bytes.
 377                 // Little-endian                S       |       S       Big-endian
 378                 // addr 3       2       1       0       |       0       1       2       3
 379                 // Ori-V        D       C       B       A       |       A       B       C       D
 380                 //After swapping
 381                 //              D       C       B       A       |       D       C       B       A
 382                 //Return 2-bytes
 383                 //The return byte statrs from S. Therefore, the little-endian will return BA, the Big-endian will return DC.
 384                 //For returning the bottom 2 bytes, the Big-endian should shift right 2-bytes.
 385                 data = data >> (8*(Offset & 0x3));
 386
 387                 NdisMoveMemory(pData, &data, Length);
 388         }
 389
 390         return (UCHAR) eFuseCtrlStruc.field.EFSROM_AOUT;
 391
 392 }
 393
 394 /*
 395         ========================================================================
 396
 397         Routine Description:
 398
 399         Arguments:
 400
 401         Return Value:
 402
 403         IRQL =
 404
 405         Note:
 406
 407         ========================================================================
 408 */
 409 VOID eFusePhysicalReadRegisters(
 410         IN      PRTMP_ADAPTER   pAd,
 411         IN      USHORT Offset,
 412         IN      USHORT Length,
 413         OUT     USHORT* pData)
 414 {
 415         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
 416         int     i;
 417         USHORT  efuseDataOffset;
 418         UINT32  data;
 419
 420         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 421
 422         //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 423         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 424
 425         //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
 426         //Read in physical view
 427         eFuseCtrlStruc.field.EFSROM_MODE = 1;
 428
 429         //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
 430         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 431
 432         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 433         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 434
 435         //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
 436         i = 0;
 437         while(i < 100)
 438         {
 439                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 440                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 441                         break;
 442                 RTMPusecDelay(2);
 443                 i++;
 444         }
 445
 446         //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
 447         //Because the size of each EFUSE_DATA is 4 Bytes, the size of address of each is 2 bits.
 448         //The previous 2 bits is the EFUSE_DATA number, the last 2 bits is used to decide which bytes
 449         //Decide which EFUSE_DATA to read
 450         //590:F E D C
 451         //594:B A 9 8
 452         //598:7 6 5 4
 453         //59C:3 2 1 0
 454         efuseDataOffset =  EFUSE_DATA3 - (Offset & 0xC)  ;
 455
 456         RTMP_IO_READ32(pAd, efuseDataOffset, &data);
 457
 458         data = data >> (8*(Offset & 0x3));
 459
 460         NdisMoveMemory(pData, &data, Length);
 461
 462 }
 463
 464 /*
 465         ========================================================================
 466
 467         Routine Description:
 468
 469         Arguments:
 470
 471         Return Value:
 472
 473         IRQL =
 474
 475         Note:
 476
 477         ========================================================================
 478 */
 479 VOID eFuseReadPhysical(
 480         IN      PRTMP_ADAPTER   pAd,
 481         IN      PUSHORT lpInBuffer,
 482         IN      ULONG nInBufferSize,
 483         OUT     PUSHORT lpOutBuffer,
 484         IN      ULONG nOutBufferSize
 485 )
 486 {
 487         USHORT* pInBuf = (USHORT*)lpInBuffer;
 488         USHORT* pOutBuf = (USHORT*)lpOutBuffer;
 489
 490         USHORT Offset = pInBuf[0];                                      //addr
 491         USHORT Length = pInBuf[1];                                      //length
 492         int             i;
 493
 494         for(i=0; i<Length; i+=2)
 495         {
 496                 eFusePhysicalReadRegisters(pAd,Offset+i, 2, &pOutBuf[i/2]);
 497         }
 498 }
 499
 500 /*
 501         ========================================================================
 502
 503         Routine Description:
 504
 505         Arguments:
 506
 507         Return Value:
 508
 509         IRQL =
 510
 511         Note:
 512
 513         ========================================================================
 514 */
 515 NTSTATUS eFuseRead(
 516         IN      PRTMP_ADAPTER   pAd,
 517         IN      USHORT                  Offset,
 518         OUT     PUCHAR                  pData,
 519         IN      USHORT                  Length)
 520 {
 521         USHORT* pOutBuf = (USHORT*)pData;
 522         NTSTATUS        Status = STATUS_SUCCESS;
 523         UCHAR   EFSROM_AOUT;
 524         int     i;
 525
 526         for(i=0; i<Length; i+=2)
 527         {
 528                 EFSROM_AOUT = eFuseReadRegisters(pAd, Offset+i, 2, &pOutBuf[i/2]);
 529         }
 530         return Status;
 531 }
 532
 533 /*
 534         ========================================================================
 535
 536         Routine Description:
 537
 538         Arguments:
 539
 540         Return Value:
 541
 542         IRQL =
 543
 544         Note:
 545
 546         ========================================================================
 547 */
 548 VOID eFusePhysicalWriteRegisters(
 549         IN      PRTMP_ADAPTER   pAd,
 550         IN      USHORT Offset,
 551         IN      USHORT Length,
 552         OUT     USHORT* pData)
 553 {
 554         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
 555         int     i;
 556         USHORT  efuseDataOffset;
 557         UINT32  data, eFuseDataBuffer[4];
 558
 559         //Step0. Write 16-byte of data to EFUSE_DATA0-3 (0x590-0x59C), where EFUSE_DATA0 is the LSB DW, EFUSE_DATA3 is the MSB DW.
 560
 561         /////////////////////////////////////////////////////////////////
 562         //read current values of 16-byte block
 563         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 564
 565         //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 566         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 567
 568         //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
 569         eFuseCtrlStruc.field.EFSROM_MODE = 1;
 570
 571         //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
 572         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 573
 574         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 575         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 576
 577         //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
 578         i = 0;
 579         while(i < 100)
 580         {
 581                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 582
 583                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 584                         break;
 585                 RTMPusecDelay(2);
 586                 i++;
 587         }
 588
 589         //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
 590         efuseDataOffset =  EFUSE_DATA3;
 591         for(i=0; i< 4; i++)
 592         {
 593                 RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &eFuseDataBuffer[i]);
 594                 efuseDataOffset -=  4;
 595         }
 596
 597         //Update the value, the offset is multiple of 2, length is 2
 598         efuseDataOffset = (Offset & 0xc) >> 2;
 599         data = pData[0] & 0xffff;
 600         //The offset should be 0x***10 or 0x***00
 601         if((Offset % 4) != 0)
 602         {
 603                 eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff) | (data << 16);
 604         }
 605         else
 606         {
 607                 eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff0000) | data;
 608         }
 609
 610         efuseDataOffset =  EFUSE_DATA3;
 611         for(i=0; i< 4; i++)
 612         {
 613                 RTMP_IO_WRITE32(pAd, efuseDataOffset, eFuseDataBuffer[i]);
 614                 efuseDataOffset -= 4;
 615         }
 616         /////////////////////////////////////////////////////////////////
 617
 618         //Step1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 619         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 620
 621         //Step2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.
 622         eFuseCtrlStruc.field.EFSROM_MODE = 3;
 623
 624         //Step3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.
 625         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 626
 627         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 628         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 629
 630         //Step4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It��s done.
 631         i = 0;
 632         while(i < 100)
 633         {
 634                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 635
 636                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 637                         break;
 638
 639                 RTMPusecDelay(2);
 640                 i++;
 641         }
 642 }
 643
 644 /*
 645         ========================================================================
 646
 647         Routine Description:
 648
 649         Arguments:
 650
 651         Return Value:
 652
 653         IRQL =
 654
 655         Note:
 656
 657         ========================================================================
 658 */
 659 NTSTATUS eFuseWriteRegisters(
 660         IN      PRTMP_ADAPTER   pAd,
 661         IN      USHORT Offset,
 662         IN      USHORT Length,
 663         IN      USHORT* pData)
 664 {
 665         USHORT  i;
 666         USHORT  eFuseData;
 667         USHORT  LogicalAddress, BlkNum = 0xffff;
 668         UCHAR   EFSROM_AOUT;
 669
 670         USHORT addr,tmpaddr, InBuf[3], tmpOffset;
 671         USHORT buffer[8];
 672         BOOLEAN         bWriteSuccess = TRUE;
 673
 674         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters Offset=%x, pData=%x\n", Offset, *pData));
 675
 676         //Step 0. find the entry in the mapping table
 677         //The address of EEPROM is 2-bytes alignment.
 678         //The last bit is used for alignment, so it must be 0.
 679         tmpOffset = Offset & 0xfffe;
 680         EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
 681
 682         if( EFSROM_AOUT == 0x3f)
 683         {       //find available logical address pointer
 684                 //the logical address does not exist, find an empty one
 685                 //from the first address of block 45=16*45=0x2d0 to the last address of block 47
 686                 //==>48*16-3(reserved)=2FC
 687                 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
 688                 {
 689                         //Retrive the logical block nubmer form each logical address pointer
 690                         //It will access two logical address pointer each time.
 691                         eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
 692                         if( (LogicalAddress & 0xff) == 0)
 693                         {//Not used logical address pointer
 694                                 BlkNum = i-EFUSE_USAGE_MAP_START;
 695                                 break;
 696                         }
 697                         else if(( (LogicalAddress >> 8) & 0xff) == 0)
 698                         {//Not used logical address pointer
 699                                 if (i != EFUSE_USAGE_MAP_END)
 700                                 {
 701                                         BlkNum = i-EFUSE_USAGE_MAP_START+1;
 702                                 }
 703                                 break;
 704                         }
 705                 }
 706         }
 707         else
 708         {
 709                 BlkNum = EFSROM_AOUT;
 710         }
 711
 712         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
 713
 714         if(BlkNum == 0xffff)
 715         {
 716                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
 717                 return FALSE;
 718         }
 719
 720         //Step 1. Save data of this block       which is pointed by the avaible logical address pointer
 721         // read and save the original block data
 722         for(i =0; i<8; i++)
 723         {
 724                 addr = BlkNum * 0x10 ;
 725
 726                 InBuf[0] = addr+2*i;
 727                 InBuf[1] = 2;
 728                 InBuf[2] = 0x0;
 729
 730                 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
 731
 732                 buffer[i] = InBuf[2];
 733         }
 734
 735         //Step 2. Update the data in buffer, and write the data to Efuse
 736         buffer[ (Offset >> 1) % 8] = pData[0];
 737
 738         do
 739         {
 740                 //Step 3. Write the data to Efuse
 741                 if(!bWriteSuccess)
 742                 {
 743                         for(i =0; i<8; i++)
 744                         {
 745                                 addr = BlkNum * 0x10 ;
 746
 747                                 InBuf[0] = addr+2*i;
 748                                 InBuf[1] = 2;
 749                                 InBuf[2] = buffer[i];
 750
 751                                 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
 752                         }
 753                 }
 754                 else
 755                 {
 756                                 addr = BlkNum * 0x10 ;
 757
 758                                 InBuf[0] = addr+(Offset % 16);
 759                                 InBuf[1] = 2;
 760                                 InBuf[2] = pData[0];
 761
 762                                 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
 763                 }
 764
 765                 //Step 4. Write mapping table
 766                 addr = EFUSE_USAGE_MAP_START+BlkNum;
 767
 768                 tmpaddr = addr;
 769
 770                 if(addr % 2 != 0)
 771                         addr = addr -1;
 772                 InBuf[0] = addr;
 773                 InBuf[1] = 2;
 774
 775                 //convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry
 776                 tmpOffset = Offset;
 777                 tmpOffset >>= 4;
 778                 tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^  (tmpOffset >> 2 & 0x01) ^  (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
 779                 tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
 780
 781                 // write the logical address
 782                 if(tmpaddr%2 != 0)
 783                         InBuf[2] = tmpOffset<<8;
 784                 else
 785                         InBuf[2] = tmpOffset;
 786
 787                 eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
 788
 789                 //Step 5. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted
 790                 bWriteSuccess = TRUE;
 791                 for(i =0; i<8; i++)
 792                 {
 793                         addr = BlkNum * 0x10 ;
 794
 795                         InBuf[0] = addr+2*i;
 796                         InBuf[1] = 2;
 797                         InBuf[2] = 0x0;
 798
 799                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
 800
 801                         if(buffer[i] != InBuf[2])
 802                         {
 803                                 bWriteSuccess = FALSE;
 804                                 break;
 805                         }
 806                 }
 807
 808                 //Step 6. invlidate mapping entry and find a free mapping entry if not succeed
 809                 if (!bWriteSuccess)
 810                 {
 811                         DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess BlkNum = %d\n", BlkNum));
 812
 813                         // the offset of current mapping entry
 814                         addr = EFUSE_USAGE_MAP_START+BlkNum;
 815
 816                         //find a new mapping entry
 817                         BlkNum = 0xffff;
 818                         for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
 819                         {
 820                                 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
 821                                 if( (LogicalAddress & 0xff) == 0)
 822                                 {
 823                                         BlkNum = i-EFUSE_USAGE_MAP_START;
 824                                         break;
 825                                 }
 826                                 else if(( (LogicalAddress >> 8) & 0xff) == 0)
 827                                 {
 828                                         if (i != EFUSE_USAGE_MAP_END)
 829                                         {
 830                                                 BlkNum = i+1-EFUSE_USAGE_MAP_START;
 831                                         }
 832                                         break;
 833                                 }
 834                         }
 835                         DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess new BlkNum = %d\n", BlkNum));
 836                         if(BlkNum == 0xffff)
 837                         {
 838                                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
 839                                 return FALSE;
 840                         }
 841
 842                         //invalidate the original mapping entry if new entry is not found
 843                         tmpaddr = addr;
 844
 845                         if(addr % 2 != 0)
 846                                 addr = addr -1;
 847                         InBuf[0] = addr;
 848                         InBuf[1] = 2;
 849
 850                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
 851
 852                         // write the logical address
 853                         if(tmpaddr%2 != 0)
 854                         {
 855                                 // Invalidate the high byte
 856                                 for (i=8; i<15; i++)
 857                                 {
 858                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
 859                                         {
 860                                                 InBuf[2] |= (0x1 <<i);
 861                                                 break;
 862                                         }
 863                                 }
 864                         }
 865                         else
 866                         {
 867                                 // invalidate the low byte
 868                                 for (i=0; i<8; i++)
 869                                 {
 870                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
 871                                         {
 872                                                 InBuf[2] |= (0x1 <<i);
 873                                                 break;
 874                                         }
 875                                 }
 876                         }
 877                         eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);
 878                 }
 879         }
 880         while(!bWriteSuccess);
 881
 882         return TRUE;
 883 }
 884
 885 /*
 886         ========================================================================
 887
 888         Routine Description:
 889
 890         Arguments:
 891
 892         Return Value:
 893
 894         IRQL =
 895
 896         Note:
 897
 898         ========================================================================
 899 */
 900 VOID eFuseWritePhysical(
 901         IN      PRTMP_ADAPTER   pAd,
 902         PUSHORT lpInBuffer,
 903         ULONG nInBufferSize,
 904         PUCHAR lpOutBuffer,
 905         ULONG nOutBufferSize
 906 )
 907 {
 908         USHORT* pInBuf = (USHORT*)lpInBuffer;
 909         int             i;
 910         //USHORT* pOutBuf = (USHORT*)ioBuffer;
 911
 912         USHORT Offset = pInBuf[0];                                      //addr
 913         USHORT Length = pInBuf[1];                                      //length
 914         USHORT* pValueX = &pInBuf[2];                           //value ...
 915                 // Little-endian                S       |       S       Big-endian
 916                 // addr 3       2       1       0       |       0       1       2       3
 917                 // Ori-V        D       C       B       A       |       A       B       C       D
 918                 //After swapping
 919                 //              D       C       B       A       |       D       C       B       A
 920                 //Both the little and big-endian use the same sequence to write  data.
 921                 //Therefore, we only need swap data when read the data.
 922         for(i=0; i<Length; i+=2)
 923         {
 924                 eFusePhysicalWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);
 925         }
 926 }
 927
 928
 929 /*
 930         ========================================================================
 931
 932         Routine Description:
 933
 934         Arguments:
 935
 936         Return Value:
 937
 938         IRQL =
 939
 940         Note:
 941
 942         ========================================================================
 943 */
 944 NTSTATUS eFuseWrite(
 945         IN      PRTMP_ADAPTER   pAd,
 946         IN      USHORT                  Offset,
 947         IN      PUCHAR                  pData,
 948         IN      USHORT                  length)
 949 {
 950         int i;
 951
 952         USHORT* pValueX = (PUSHORT) pData;                              //value ...
 953                 //The input value=3070 will be stored as following
 954                 // Little-endian                S       |       S       Big-endian
 955                 // addr                 1       0       |       0       1
 956                 // Ori-V                        30      70      |       30      70
 957                 //After swapping
 958                 //                              30      70      |       70      30
 959                 //Casting
 960                 //                              3070    |       7030 (x)
 961                 //The swapping should be removed for big-endian
 962         for(i=0; i<length; i+=2)
 963         {
 964                 eFuseWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);
 965         }
 966
 967         return TRUE;
 968 }
 969
 970 /*
 971         ========================================================================
 972
 973         Routine Description:
 974
 975         Arguments:
 976
 977         Return Value:
 978
 979         IRQL =
 980
 981         Note:
 982
 983         ========================================================================
 984 */
 985 INT set_eFuseGetFreeBlockCount_Proc(
 986         IN      PRTMP_ADAPTER   pAd,
 987         IN      PUCHAR                  arg)
 988 {
 989         USHORT i;
 990         USHORT  LogicalAddress;
 991         USHORT efusefreenum=0;
 992         if(!pAd->bUseEfuse)
 993                 return FALSE;
 994         for (i = EFUSE_USAGE_MAP_START; i <= EFUSE_USAGE_MAP_END; i+=2)
 995         {
 996                 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
 997                 if( (LogicalAddress & 0xff) == 0)
 998                 {
 999                         efusefreenum= (UCHAR) (EFUSE_USAGE_MAP_END-i+1);
1000                         break;
1001                 }
1002                 else if(( (LogicalAddress >> 8) & 0xff) == 0)
1003                 {
1004                         efusefreenum = (UCHAR) (EFUSE_USAGE_MAP_END-i);
1005                         break;
1006                 }
1007
1008                 if(i == EFUSE_USAGE_MAP_END)
1009                         efusefreenum = 0;
1010         }
1011         printk("efuseFreeNumber is %d\n",efusefreenum);
1012         return TRUE;
1013 }
1014 INT set_eFusedump_Proc(
1015         IN      PRTMP_ADAPTER   pAd,
1016         IN      PUCHAR                  arg)
1017 {
1018 USHORT InBuf[3];
1019         INT i=0;
1020         if(!pAd->bUseEfuse)
1021                 return FALSE;
1022         for(i =0; i<EFUSE_USAGE_MAP_END/2; i++)
1023         {
1024                 InBuf[0] = 2*i;
1025                 InBuf[1] = 2;
1026                 InBuf[2] = 0x0;
1027
1028                 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1029                 if(i%4==0)
1030                 printk("\nBlock %x:",i/8);
1031                 printk("%04x ",InBuf[2]);
1032         }
1033         return TRUE;
1034 }
1035 INT     set_eFuseLoadFromBin_Proc(
1036         IN      PRTMP_ADAPTER   pAd,
1037         IN      PUCHAR                  arg)
1038 {
1039         CHAR                                    *src;
1040         struct file                             *srcf;
1041         INT                                     retval;
1042         mm_segment_t                    orgfs;
1043         UCHAR                                   *buffer;
1044         UCHAR                                   BinFileSize=0;
1045         INT                                             i = 0,j=0,k=1;
1046         USHORT                                  *PDATA;
1047         USHORT                                  DATA;
1048         BinFileSize=strlen("RT30xxEEPROM.bin");
1049         src = kmalloc(128, MEM_ALLOC_FLAG);
1050         NdisZeroMemory(src, 128);
1051
1052         if(strlen(arg)>0)
1053         {
1054
1055                 NdisMoveMemory(src, arg, strlen(arg));
1056         }
1057
1058         else
1059         {
1060
1061                 NdisMoveMemory(src, "RT30xxEEPROM.bin", BinFileSize);
1062         }
1063
1064         DBGPRINT(RT_DEBUG_TRACE, ("FileName=%s\n",src));
1065         buffer = kmalloc(MAX_EEPROM_BIN_FILE_SIZE, MEM_ALLOC_FLAG);
1066
1067         if(buffer == NULL)
1068         {
1069                 kfree(src);
1070                  return FALSE;
1071 }
1072         PDATA=kmalloc(sizeof(USHORT)*8,MEM_ALLOC_FLAG);
1073
1074         if(PDATA==NULL)
1075         {
1076                 kfree(src);
1077
1078                 kfree(buffer);
1079                 return FALSE;
1080         }
1081
1082         orgfs = get_fs();
1083          set_fs(KERNEL_DS);
1084
1085         if (src && *src)
1086         {
1087                 srcf = filp_open(src, O_RDONLY, 0);
1088                 if (IS_ERR(srcf))
1089                 {
1090                         DBGPRINT(RT_DEBUG_ERROR, ("--> Error %ld opening %s\n", -PTR_ERR(srcf),src));
1091                         return FALSE;
1092                 }
1093                 else
1094                 {
1095                         // The object must have a read method
1096                         if (srcf->f_op && srcf->f_op->read)
1097                         {
1098                                 memset(buffer, 0x00, MAX_EEPROM_BIN_FILE_SIZE);
1099                                 while(srcf->f_op->read(srcf, &buffer[i], 1, &srcf->f_pos)==1)
1100                                 {
1101                                         DBGPRINT(RT_DEBUG_TRACE, ("%02X ",buffer[i]));
1102                                         if((i+1)%8==0)
1103                                                 DBGPRINT(RT_DEBUG_TRACE, ("\n"));
1104                                 i++;
1105                                                 if(i>=MAX_EEPROM_BIN_FILE_SIZE)
1106                                                         {
1107                                                                 DBGPRINT(RT_DEBUG_ERROR, ("--> Error %ld reading %s, The file is too large[1024]\n", -PTR_ERR(srcf),src));
1108                                                                 kfree(PDATA);
1109                                                                 kfree(buffer);
1110                                                                 kfree(src);
1111                                                                 return FALSE;
1112                                                         }
1113                                }
1114                         }
1115                         else
1116                         {
1117                                                 DBGPRINT(RT_DEBUG_ERROR, ("--> Error!! System doest not support read function\n"));
1118                                                 kfree(PDATA);
1119                                                 kfree(buffer);
1120                                                 kfree(src);
1121                                                 return FALSE;
1122                         }
1123                 }
1124
1125
1126         }
1127         else
1128                 {
1129                                         DBGPRINT(RT_DEBUG_ERROR, ("--> Error src  or srcf is null\n"));
1130                                         kfree(PDATA);
1131                                         kfree(buffer);
1132                                         return FALSE;
1133
1134                 }
1135
1136
1137         retval=filp_close(srcf,NULL);
1138
1139         if (retval)
1140         {
1141                 DBGPRINT(RT_DEBUG_TRACE, ("--> Error %d closing %s\n", -retval, src));
1142         }
1143         set_fs(orgfs);
1144
1145         for(j=0;j<i;j++)
1146         {
1147                 DBGPRINT(RT_DEBUG_TRACE, ("%02X ",buffer[j]));
1148                 if((j+1)%2==0)
1149                         PDATA[j/2%8]=((buffer[j]<<8)&0xff00)|(buffer[j-1]&0xff);
1150                 if(j%16==0)
1151                 {
1152                         k=buffer[j];
1153                 }
1154                 else
1155                 {
1156                         k&=buffer[j];
1157                         if((j+1)%16==0)
1158                         {
1159
1160                                 DBGPRINT(RT_DEBUG_TRACE, (" result=%02X,blk=%02x\n",k,j/16));
1161
1162                                 if(k!=0xff)
1163                                         eFuseWriteRegistersFromBin(pAd,(USHORT)j-15, 16, PDATA);
1164                                 else
1165                                         {
1166                                                 if(eFuseReadRegisters(pAd,j, 2,(PUSHORT)&DATA)!=0x3f)
1167                                                         eFuseWriteRegistersFromBin(pAd,(USHORT)j-15, 16, PDATA);
1168                                         }
1169                                 /*
1170                                 for(l=0;l<8;l++)
1171                                         printk("%04x ",PDATA[l]);
1172                                 printk("\n");
1173                                 */
1174                                 NdisZeroMemory(PDATA,16);
1175
1176
1177                         }
1178                 }
1179
1180
1181         }
1182
1183
1184         kfree(PDATA);
1185         kfree(buffer);
1186         kfree(src);
1187         return TRUE;
1188 }
1189 NTSTATUS eFuseWriteRegistersFromBin(
1190         IN      PRTMP_ADAPTER   pAd,
1191         IN      USHORT Offset,
1192         IN      USHORT Length,
1193         IN      USHORT* pData)
1194 {
1195         USHORT  i;
1196         USHORT  eFuseData;
1197         USHORT  LogicalAddress, BlkNum = 0xffff;
1198         UCHAR   EFSROM_AOUT,Loop=0;
1199         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
1200         USHORT  efuseDataOffset;
1201         UINT32  data,tempbuffer;
1202         USHORT addr,tmpaddr, InBuf[3], tmpOffset;
1203         UINT32 buffer[4];
1204         BOOLEAN         bWriteSuccess = TRUE;
1205         BOOLEAN         bNotWrite=TRUE;
1206         BOOLEAN         bAllocateNewBlk=TRUE;
1207
1208         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin Offset=%x, pData=%04x:%04x:%04x:%04x\n", Offset, *pData,*(pData+1),*(pData+2),*(pData+3)));
1209
1210         do
1211         {
1212         //Step 0. find the entry in the mapping table
1213         //The address of EEPROM is 2-bytes alignment.
1214         //The last bit is used for alignment, so it must be 0.
1215         Loop++;
1216         tmpOffset = Offset & 0xfffe;
1217         EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
1218
1219         if( EFSROM_AOUT == 0x3f)
1220         {       //find available logical address pointer
1221                 //the logical address does not exist, find an empty one
1222                 //from the first address of block 45=16*45=0x2d0 to the last address of block 47
1223                 //==>48*16-3(reserved)=2FC
1224                 bAllocateNewBlk=TRUE;
1225                 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
1226                 {
1227                         //Retrive the logical block nubmer form each logical address pointer
1228                         //It will access two logical address pointer each time.
1229                         eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
1230                         if( (LogicalAddress & 0xff) == 0)
1231                         {//Not used logical address pointer
1232                                 BlkNum = i-EFUSE_USAGE_MAP_START;
1233                                 break;
1234                         }
1235                         else if(( (LogicalAddress >> 8) & 0xff) == 0)
1236                         {//Not used logical address pointer
1237                                 if (i != EFUSE_USAGE_MAP_END)
1238                                 {
1239                                         BlkNum = i-EFUSE_USAGE_MAP_START+1;
1240                                 }
1241                                 break;
1242                         }
1243                 }
1244         }
1245         else
1246         {
1247                 bAllocateNewBlk=FALSE;
1248                 BlkNum = EFSROM_AOUT;
1249         }
1250
1251         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
1252
1253         if(BlkNum == 0xffff)
1254         {
1255                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
1256                 return FALSE;
1257         }
1258         //Step 1.1.0
1259         //If the block is not existing in mapping table, create one
1260         //and write down the 16-bytes data to the new block
1261         if(bAllocateNewBlk)
1262         {
1263                 DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk\n"));
1264                 efuseDataOffset =  EFUSE_DATA3;
1265                 for(i=0; i< 4; i++)
1266                 {
1267                         DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk, Data%d=%04x%04x\n",3-i,pData[2*i+1],pData[2*i]));
1268                         tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
1269
1270
1271                         RTMP_IO_WRITE32(pAd, efuseDataOffset,tempbuffer);
1272                         efuseDataOffset -= 4;
1273
1274                 }
1275                 /////////////////////////////////////////////////////////////////
1276
1277                 //Step1.1.1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
1278                 eFuseCtrlStruc.field.EFSROM_AIN = BlkNum* 0x10 ;
1279
1280                 //Step1.1.2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.
1281                 eFuseCtrlStruc.field.EFSROM_MODE = 3;
1282
1283                 //Step1.1.3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.
1284                 eFuseCtrlStruc.field.EFSROM_KICK = 1;
1285
1286                 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
1287
1288                 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
1289
1290                 //Step1.1.4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It��s done.
1291                 i = 0;
1292                 while(i < 100)
1293                 {
1294                         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1295
1296                         if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
1297                                 break;
1298
1299                         RTMPusecDelay(2);
1300                         i++;
1301                 }
1302
1303         }
1304         else
1305         {       //Step1.2.
1306                 //If the same logical number is existing, check if the writting data and the data
1307                 //saving in this block are the same.
1308                 /////////////////////////////////////////////////////////////////
1309                 //read current values of 16-byte block
1310                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1311
1312                 //Step1.2.0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
1313                 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
1314
1315                 //Step1.2.1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
1316                 eFuseCtrlStruc.field.EFSROM_MODE = 0;
1317
1318                 //Step1.2.2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
1319                 eFuseCtrlStruc.field.EFSROM_KICK = 1;
1320
1321                 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
1322                 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
1323
1324                 //Step1.2.3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
1325                 i = 0;
1326                 while(i < 100)
1327                 {
1328                         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1329
1330                         if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
1331                                 break;
1332                         RTMPusecDelay(2);
1333                         i++;
1334                 }
1335
1336                 //Step1.2.4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
1337                 efuseDataOffset =  EFUSE_DATA3;
1338                 for(i=0; i< 4; i++)
1339                 {
1340                         RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &buffer[i]);
1341                         efuseDataOffset -=  4;
1342                 }
1343                 //Step1.2.5. Check if the data of efuse and the writing data are the same.
1344                 for(i =0; i<4; i++)
1345                 {
1346                         tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
1347                         DBGPRINT(RT_DEBUG_TRACE, ("buffer[%d]=%x,pData[%d]=%x,pData[%d]=%x,tempbuffer=%x\n",i,buffer[i],2*i,pData[2*i],2*i+1,pData[2*i+1],tempbuffer));
1348
1349                         if(((buffer[i]&0xffff0000)==(pData[2*i+1]<<16))&&((buffer[i]&0xffff)==pData[2*i]))
1350                                 bNotWrite&=TRUE;
1351                         else
1352                         {
1353                                 bNotWrite&=FALSE;
1354                                 break;
1355                         }
1356                 }
1357                 if(!bNotWrite)
1358                 {
1359                 printk("The data is not the same\n");
1360
1361                         for(i =0; i<8; i++)
1362                         {
1363                                 addr = BlkNum * 0x10 ;
1364
1365                                 InBuf[0] = addr+2*i;
1366                                 InBuf[1] = 2;
1367                                 InBuf[2] = pData[i];
1368
1369                                 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
1370                         }
1371
1372                 }
1373                 else
1374                         return TRUE;
1375              }
1376
1377
1378
1379                 //Step 2. Write mapping table
1380                 addr = EFUSE_USAGE_MAP_START+BlkNum;
1381
1382                 tmpaddr = addr;
1383
1384                 if(addr % 2 != 0)
1385                         addr = addr -1;
1386                 InBuf[0] = addr;
1387                 InBuf[1] = 2;
1388
1389                 //convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry
1390                 tmpOffset = Offset;
1391                 tmpOffset >>= 4;
1392                 tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^  (tmpOffset >> 2 & 0x01) ^  (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
1393                 tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
1394
1395                 // write the logical address
1396                 if(tmpaddr%2 != 0)
1397                         InBuf[2] = tmpOffset<<8;
1398                 else
1399                         InBuf[2] = tmpOffset;
1400
1401                 eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
1402
1403                 //Step 3. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted
1404                 bWriteSuccess = TRUE;
1405                 for(i =0; i<8; i++)
1406                 {
1407                         addr = BlkNum * 0x10 ;
1408
1409                         InBuf[0] = addr+2*i;
1410                         InBuf[1] = 2;
1411                         InBuf[2] = 0x0;
1412
1413                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1414                         DBGPRINT(RT_DEBUG_TRACE, ("addr=%x, buffer[i]=%x,InBuf[2]=%x\n",InBuf[0],pData[i],InBuf[2]));
1415                         if(pData[i] != InBuf[2])
1416                         {
1417                                 bWriteSuccess = FALSE;
1418                                 break;
1419                         }
1420                 }
1421
1422                 //Step 4. invlidate mapping entry and find a free mapping entry if not succeed
1423
1424                 if (!bWriteSuccess&&Loop<2)
1425                 {
1426                         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess BlkNum = %d\n", BlkNum));
1427
1428                         // the offset of current mapping entry
1429                         addr = EFUSE_USAGE_MAP_START+BlkNum;
1430
1431                         //find a new mapping entry
1432                         BlkNum = 0xffff;
1433                         for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
1434                         {
1435                                 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
1436                                 if( (LogicalAddress & 0xff) == 0)
1437                                 {
1438                                         BlkNum = i-EFUSE_USAGE_MAP_START;
1439                                         break;
1440                                 }
1441                                 else if(( (LogicalAddress >> 8) & 0xff) == 0)
1442                                 {
1443                                         if (i != EFUSE_USAGE_MAP_END)
1444                                         {
1445                                                 BlkNum = i+1-EFUSE_USAGE_MAP_START;
1446                                         }
1447                                         break;
1448                                 }
1449                         }
1450                         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess new BlkNum = %d\n", BlkNum));
1451                         if(BlkNum == 0xffff)
1452                         {
1453                                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin: out of free E-fuse space!!!\n"));
1454                                 return FALSE;
1455                         }
1456
1457                         //invalidate the original mapping entry if new entry is not found
1458                         tmpaddr = addr;
1459
1460                         if(addr % 2 != 0)
1461                                 addr = addr -1;
1462                         InBuf[0] = addr;
1463                         InBuf[1] = 2;
1464
1465                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1466
1467                         // write the logical address
1468                         if(tmpaddr%2 != 0)
1469                         {
1470                                 // Invalidate the high byte
1471                                 for (i=8; i<15; i++)
1472                                 {
1473                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
1474                                         {
1475                                                 InBuf[2] |= (0x1 <<i);
1476                                                 break;
1477                                         }
1478                                 }
1479                         }
1480                         else
1481                         {
1482                                 // invalidate the low byte
1483                                 for (i=0; i<8; i++)
1484                                 {
1485                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
1486                                         {
1487                                                 InBuf[2] |= (0x1 <<i);
1488                                                 break;
1489                                         }
1490                                 }
1491                         }
1492                         eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);
1493                 }
1494
1495         }
1496         while(!bWriteSuccess&&Loop<2);
1497
1498         return TRUE;
1499 }
1500
1501 #endif // RT30xx //
1502 //2008/09/11:KH add to support efuse-->