SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/staging/me4000/me4000.c

   1 /* Device driver for Meilhaus ME-4000 board family.
   2  * ================================================
   3  *
   4  *  Copyright (C) 2003 Meilhaus Electronic GmbH (support@meilhaus.de)
   5  *
   6  *  This file is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *  GNU General Public License for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License
  17  *  along with this program; if not, write to the Free Software
  18  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  *
  20  *  Author:     Guenter Gebhardt        <g.gebhardt@meilhaus.de>
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/fs.h>
  25 #include <linux/sched.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <linux/errno.h>
  29 #include <linux/delay.h>
  30 #include <linux/mm.h>
  31 #include <linux/unistd.h>
  32 #include <linux/list.h>
  33 #include <linux/proc_fs.h>
  34 #include <linux/types.h>
  35 #include <linux/poll.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/slab.h>
  38 #include <asm/pgtable.h>
  39 #include <asm/uaccess.h>
  40 #include <asm/io.h>
  41 #include <asm/system.h>
  42
  43 /* Include-File for the Meilhaus ME-4000 I/O board */
  44 #include "me4000.h"
  45 #include "me4000_firmware.h"
  46 #include "me4610_firmware.h"
  47
  48 /* Administrative stuff for modinfo */
  49 MODULE_AUTHOR("Guenter Gebhardt <g.gebhardt@meilhaus.de>");
  50 MODULE_DESCRIPTION
  51     ("Device Driver Module for Meilhaus ME-4000 boards version 1.0.5");
  52 MODULE_SUPPORTED_DEVICE("Meilhaus ME-4000 Multi I/O boards");
  53 MODULE_LICENSE("GPL");
  54
  55 /* Board specific data are kept in a global list */
  56 static LIST_HEAD(me4000_board_info_list);
  57
  58 /* Major Device Numbers. 0 means to get it automatically from the System */
  59 static int me4000_ao_major_driver_no;
  60 static int me4000_ai_major_driver_no;
  61 static int me4000_dio_major_driver_no;
  62 static int me4000_cnt_major_driver_no;
  63 static int me4000_ext_int_major_driver_no;
  64
  65 /* Let the user specify a custom major driver number */
  66 module_param(me4000_ao_major_driver_no, int, 0);
  67 MODULE_PARM_DESC(me4000_ao_major_driver_no,
  68                  "Major driver number for analog output (default 0)");
  69
  70 module_param(me4000_ai_major_driver_no, int, 0);
  71 MODULE_PARM_DESC(me4000_ai_major_driver_no,
  72                  "Major driver number for analog input (default 0)");
  73
  74 module_param(me4000_dio_major_driver_no, int, 0);
  75 MODULE_PARM_DESC(me4000_dio_major_driver_no,
  76                  "Major driver number digital I/O (default 0)");
  77
  78 module_param(me4000_cnt_major_driver_no, int, 0);
  79 MODULE_PARM_DESC(me4000_cnt_major_driver_no,
  80                  "Major driver number for counter (default 0)");
  81
  82 module_param(me4000_ext_int_major_driver_no, int, 0);
  83 MODULE_PARM_DESC(me4000_ext_int_major_driver_no,
  84                  "Major driver number for external interrupt (default 0)");
  85
  86 /*-----------------------------------------------------------------------------
  87   Board detection and initialization
  88   ---------------------------------------------------------------------------*/
  89 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id);
  90 static int me4000_xilinx_download(struct me4000_info *);
  91 static int me4000_reset_board(struct me4000_info *);
  92
  93 static void clear_board_info_list(void);
  94 static void release_ao_contexts(struct me4000_info *board_info);
  95 /*-----------------------------------------------------------------------------
  96   Stuff used by all device parts
  97   ---------------------------------------------------------------------------*/
  98 static int me4000_open(struct inode *, struct file *);
  99 static int me4000_release(struct inode *, struct file *);
 100
 101 static int me4000_get_user_info(struct me4000_user_info *,
 102                                 struct me4000_info *board_info);
 103 static int me4000_read_procmem(char *, char **, off_t, int, int *, void *);
 104
 105 /*-----------------------------------------------------------------------------
 106   Analog output stuff
 107   ---------------------------------------------------------------------------*/
 108 static ssize_t me4000_ao_write_sing(struct file *, const char *, size_t,
 109                                     loff_t *);
 110 static ssize_t me4000_ao_write_wrap(struct file *, const char *, size_t,
 111                                     loff_t *);
 112 static ssize_t me4000_ao_write_cont(struct file *, const char *, size_t,
 113                                     loff_t *);
 114
 115 static int me4000_ao_ioctl_sing(struct inode *, struct file *, unsigned int,
 116                                 unsigned long);
 117 static int me4000_ao_ioctl_wrap(struct inode *, struct file *, unsigned int,
 118                                 unsigned long);
 119 static int me4000_ao_ioctl_cont(struct inode *, struct file *, unsigned int,
 120                                 unsigned long);
 121
 122 static unsigned int me4000_ao_poll_cont(struct file *, poll_table *);
 123 static int me4000_ao_fsync_cont(struct file *, struct dentry *, int);
 124
 125 static int me4000_ao_start(unsigned long *, struct me4000_ao_context *);
 126 static int me4000_ao_stop(struct me4000_ao_context *);
 127 static int me4000_ao_immediate_stop(struct me4000_ao_context *);
 128 static int me4000_ao_timer_set_divisor(u32 *, struct me4000_ao_context *);
 129 static int me4000_ao_preload(struct me4000_ao_context *);
 130 static int me4000_ao_preload_update(struct me4000_ao_context *);
 131 static int me4000_ao_ex_trig_set_edge(int *, struct me4000_ao_context *);
 132 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *);
 133 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *);
 134 static int me4000_ao_prepare(struct me4000_ao_context *ao_info);
 135 static int me4000_ao_reset(struct me4000_ao_context *ao_info);
 136 static int me4000_ao_enable_do(struct me4000_ao_context *);
 137 static int me4000_ao_disable_do(struct me4000_ao_context *);
 138 static int me4000_ao_fsm_state(int *, struct me4000_ao_context *);
 139
 140 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context);
 141 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context);
 142 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context);
 143 static int me4000_ao_simultaneous_update(
 144                                         struct me4000_ao_channel_list *channels,
 145                                         struct me4000_ao_context *ao_context);
 146
 147 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context);
 148 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context);
 149 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context);
 150
 151 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
 152                                      struct me4000_ao_context *ao_context);
 153 static int me4000_ao_get_free_buffer(unsigned long *arg,
 154                                      struct me4000_ao_context *ao_context);
 155
 156 /*-----------------------------------------------------------------------------
 157   Analog input stuff
 158   ---------------------------------------------------------------------------*/
 159 static int me4000_ai_single(struct me4000_ai_single *,
 160                                 struct me4000_ai_context *);
 161 static int me4000_ai_ioctl_sing(struct inode *, struct file *, unsigned int,
 162                                 unsigned long);
 163
 164 static ssize_t me4000_ai_read(struct file *, char *, size_t, loff_t *);
 165 static int me4000_ai_ioctl_sw(struct inode *, struct file *, unsigned int,
 166                               unsigned long);
 167 static unsigned int me4000_ai_poll(struct file *, poll_table *);
 168 static int me4000_ai_fasync(int fd, struct file *file_p, int mode);
 169
 170 static int me4000_ai_ioctl_ext(struct inode *, struct file *, unsigned int,
 171                                unsigned long);
 172
 173 static int me4000_ai_prepare(struct me4000_ai_context *ai_context);
 174 static int me4000_ai_reset(struct me4000_ai_context *ai_context);
 175 static int me4000_ai_config(struct me4000_ai_config *,
 176                                 struct me4000_ai_context *);
 177 static int me4000_ai_start(struct me4000_ai_context *);
 178 static int me4000_ai_start_ex(unsigned long *, struct me4000_ai_context *);
 179 static int me4000_ai_stop(struct me4000_ai_context *);
 180 static int me4000_ai_immediate_stop(struct me4000_ai_context *);
 181 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *);
 182 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *);
 183 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *,
 184                                    struct me4000_ai_context *);
 185 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
 186                               struct me4000_ai_context *ai_context);
 187 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context);
 188 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context);
 189 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context);
 190 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context);
 191 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context);
 192 static int me4000_ai_get_count_buffer(unsigned long *arg,
 193                                       struct me4000_ai_context *ai_context);
 194
 195 /*-----------------------------------------------------------------------------
 196   EEPROM stuff
 197   ---------------------------------------------------------------------------*/
 198 static int me4000_eeprom_read(struct me4000_eeprom *arg,
 199                               struct me4000_ai_context *ai_context);
 200 static int me4000_eeprom_write(struct me4000_eeprom *arg,
 201                                struct me4000_ai_context *ai_context);
 202
 203 /*-----------------------------------------------------------------------------
 204   Digital I/O stuff
 205   ---------------------------------------------------------------------------*/
 206 static int me4000_dio_ioctl(struct inode *, struct file *, unsigned int,
 207                             unsigned long);
 208 static int me4000_dio_config(struct me4000_dio_config *,
 209                                 struct me4000_dio_context *);
 210 static int me4000_dio_get_byte(struct me4000_dio_byte *,
 211                                 struct me4000_dio_context *);
 212 static int me4000_dio_set_byte(struct me4000_dio_byte *,
 213                                 struct me4000_dio_context *);
 214 static int me4000_dio_reset(struct me4000_dio_context *);
 215
 216 /*-----------------------------------------------------------------------------
 217   Counter stuff
 218   ---------------------------------------------------------------------------*/
 219 static int me4000_cnt_ioctl(struct inode *, struct file *, unsigned int,
 220                             unsigned long);
 221 static int me4000_cnt_config(struct me4000_cnt_config *,
 222                                 struct me4000_cnt_context *);
 223 static int me4000_cnt_read(struct me4000_cnt *, struct me4000_cnt_context *);
 224 static int me4000_cnt_write(struct me4000_cnt *, struct me4000_cnt_context *);
 225 static int me4000_cnt_reset(struct me4000_cnt_context *);
 226
 227 /*-----------------------------------------------------------------------------
 228   External interrupt routines
 229   ---------------------------------------------------------------------------*/
 230 static int me4000_ext_int_ioctl(struct inode *, struct file *, unsigned int,
 231                                 unsigned long);
 232 static int me4000_ext_int_enable(struct me4000_ext_int_context *);
 233 static int me4000_ext_int_disable(struct me4000_ext_int_context *);
 234 static int me4000_ext_int_count(unsigned long *arg,
 235                                 struct me4000_ext_int_context *ext_int_context);
 236 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode);
 237
 238 /*-----------------------------------------------------------------------------
 239   The interrupt service routines
 240   ---------------------------------------------------------------------------*/
 241 static irqreturn_t me4000_ao_isr(int, void *);
 242 static irqreturn_t me4000_ai_isr(int, void *);
 243 static irqreturn_t me4000_ext_int_isr(int, void *);
 244
 245 /*-----------------------------------------------------------------------------
 246   Inline functions
 247   ---------------------------------------------------------------------------*/
 248
 249 static int inline me4000_buf_count(struct me4000_circ_buf buf, int size)
 250 {
 251         return ((buf.head - buf.tail) & (size - 1));
 252 }
 253
 254 static int inline me4000_buf_space(struct me4000_circ_buf buf, int size)
 255 {
 256         return ((buf.tail - (buf.head + 1)) & (size - 1));
 257 }
 258
 259 static int inline me4000_values_to_end(struct me4000_circ_buf buf, int size)
 260 {
 261         int end;
 262         int n;
 263         end = size - buf.tail;
 264         n = (buf.head + end) & (size - 1);
 265         return (n < end) ? n : end;
 266 }
 267
 268 static int inline me4000_space_to_end(struct me4000_circ_buf buf, int size)
 269 {
 270         int end;
 271         int n;
 272
 273         end = size - 1 - buf.head;
 274         n = (end + buf.tail) & (size - 1);
 275         return (n <= end) ? n : (end + 1);
 276 }
 277
 278 static void inline me4000_outb(unsigned char value, unsigned long port)
 279 {
 280         PORT_PDEBUG("--> 0x%02X port 0x%04lX\n", value, port);
 281         outb(value, port);
 282 }
 283
 284 static void inline me4000_outl(unsigned long value, unsigned long port)
 285 {
 286         PORT_PDEBUG("--> 0x%08lX port 0x%04lX\n", value, port);
 287         outl(value, port);
 288 }
 289
 290 static unsigned long inline me4000_inl(unsigned long port)
 291 {
 292         unsigned long value;
 293         value = inl(port);
 294         PORT_PDEBUG("<-- 0x%08lX port 0x%04lX\n", value, port);
 295         return value;
 296 }
 297
 298 static unsigned char inline me4000_inb(unsigned long port)
 299 {
 300         unsigned char value;
 301         value = inb(port);
 302         PORT_PDEBUG("<-- 0x%08X port 0x%04lX\n", value, port);
 303         return value;
 304 }
 305
 306 static struct pci_driver me4000_driver = {
 307         .name = ME4000_NAME,
 308         .id_table = me4000_pci_table,
 309         .probe = me4000_probe
 310 };
 311
 312 static struct file_operations me4000_ao_fops_sing = {
 313       .owner = THIS_MODULE,
 314       .write = me4000_ao_write_sing,
 315       .ioctl = me4000_ao_ioctl_sing,
 316       .open = me4000_open,
 317       .release = me4000_release,
 318 };
 319
 320 static struct file_operations me4000_ao_fops_wrap = {
 321       .owner = THIS_MODULE,
 322       .write = me4000_ao_write_wrap,
 323       .ioctl = me4000_ao_ioctl_wrap,
 324       .open = me4000_open,
 325       .release = me4000_release,
 326 };
 327
 328 static struct file_operations me4000_ao_fops_cont = {
 329       .owner = THIS_MODULE,
 330       .write = me4000_ao_write_cont,
 331       .poll = me4000_ao_poll_cont,
 332       .ioctl = me4000_ao_ioctl_cont,
 333       .open = me4000_open,
 334       .release = me4000_release,
 335       .fsync = me4000_ao_fsync_cont,
 336 };
 337
 338 static struct file_operations me4000_ai_fops_sing = {
 339       .owner = THIS_MODULE,
 340       .ioctl = me4000_ai_ioctl_sing,
 341       .open = me4000_open,
 342       .release = me4000_release,
 343 };
 344
 345 static struct file_operations me4000_ai_fops_cont_sw = {
 346       .owner = THIS_MODULE,
 347       .read = me4000_ai_read,
 348       .poll = me4000_ai_poll,
 349       .ioctl = me4000_ai_ioctl_sw,
 350       .open = me4000_open,
 351       .release = me4000_release,
 352       .fasync = me4000_ai_fasync,
 353 };
 354
 355 static struct file_operations me4000_ai_fops_cont_et = {
 356       .owner = THIS_MODULE,
 357       .read = me4000_ai_read,
 358       .poll = me4000_ai_poll,
 359       .ioctl = me4000_ai_ioctl_ext,
 360       .open = me4000_open,
 361       .release = me4000_release,
 362 };
 363
 364 static struct file_operations me4000_ai_fops_cont_et_value = {
 365       .owner = THIS_MODULE,
 366       .read = me4000_ai_read,
 367       .poll = me4000_ai_poll,
 368       .ioctl = me4000_ai_ioctl_ext,
 369       .open = me4000_open,
 370       .release = me4000_release,
 371 };
 372
 373 static struct file_operations me4000_ai_fops_cont_et_chanlist = {
 374       .owner = THIS_MODULE,
 375       .read = me4000_ai_read,
 376       .poll = me4000_ai_poll,
 377       .ioctl = me4000_ai_ioctl_ext,
 378       .open = me4000_open,
 379       .release = me4000_release,
 380 };
 381
 382 static struct file_operations me4000_dio_fops = {
 383       .owner = THIS_MODULE,
 384       .ioctl = me4000_dio_ioctl,
 385       .open = me4000_open,
 386       .release = me4000_release,
 387 };
 388
 389 static struct file_operations me4000_cnt_fops = {
 390       .owner = THIS_MODULE,
 391       .ioctl = me4000_cnt_ioctl,
 392       .open = me4000_open,
 393       .release = me4000_release,
 394 };
 395
 396 static struct file_operations me4000_ext_int_fops = {
 397       .owner = THIS_MODULE,
 398       .ioctl = me4000_ext_int_ioctl,
 399       .open = me4000_open,
 400       .release = me4000_release,
 401       .fasync = me4000_ext_int_fasync,
 402 };
 403
 404 static struct file_operations *me4000_ao_fops_array[] = {
 405         &me4000_ao_fops_sing,   // single operations
 406         &me4000_ao_fops_wrap,   // wraparound operations
 407         &me4000_ao_fops_cont,   // continous operations
 408 };
 409
 410 static struct file_operations *me4000_ai_fops_array[] = {
 411         &me4000_ai_fops_sing,   // single operations
 412         &me4000_ai_fops_cont_sw,        // continuous operations with software start
 413         &me4000_ai_fops_cont_et,        // continous operations with external trigger
 414         &me4000_ai_fops_cont_et_value,  // sample values by external trigger
 415         &me4000_ai_fops_cont_et_chanlist,       // work through one channel list by external trigger
 416 };
 417
 418 static int __init me4000_init_module(void)
 419 {
 420         int result;
 421
 422         CALL_PDEBUG("init_module() is executed\n");
 423
 424         /* Register driver capabilities */
 425         result = pci_register_driver(&me4000_driver);
 426         PDEBUG("init_module():%d devices detected\n", result);
 427         if (result < 0) {
 428                 printk(KERN_ERR "ME4000:init_module():Can't register driver\n");
 429                 goto INIT_ERROR_1;
 430         }
 431
 432         /* Allocate major number for analog output */
 433         result =
 434             register_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME,
 435                             &me4000_ao_fops_sing);
 436         if (result < 0) {
 437                 printk(KERN_ERR "ME4000:init_module():Can't get AO major no\n");
 438                 goto INIT_ERROR_2;
 439         } else {
 440                 me4000_ao_major_driver_no = result;
 441         }
 442         PDEBUG("init_module():Major driver number for AO = %ld\n",
 443                me4000_ao_major_driver_no);
 444
 445         /* Allocate major number for analog input  */
 446         result =
 447             register_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME,
 448                             &me4000_ai_fops_sing);
 449         if (result < 0) {
 450                 printk(KERN_ERR "ME4000:init_module():Can't get AI major no\n");
 451                 goto INIT_ERROR_3;
 452         } else {
 453                 me4000_ai_major_driver_no = result;
 454         }
 455         PDEBUG("init_module():Major driver number for AI = %ld\n",
 456                me4000_ai_major_driver_no);
 457
 458         /* Allocate major number for digital I/O */
 459         result =
 460             register_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME,
 461                             &me4000_dio_fops);
 462         if (result < 0) {
 463                 printk(KERN_ERR
 464                        "ME4000:init_module():Can't get DIO major no\n");
 465                 goto INIT_ERROR_4;
 466         } else {
 467                 me4000_dio_major_driver_no = result;
 468         }
 469         PDEBUG("init_module():Major driver number for DIO = %ld\n",
 470                me4000_dio_major_driver_no);
 471
 472         /* Allocate major number for counter */
 473         result =
 474             register_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME,
 475                             &me4000_cnt_fops);
 476         if (result < 0) {
 477                 printk(KERN_ERR
 478                        "ME4000:init_module():Can't get CNT major no\n");
 479                 goto INIT_ERROR_5;
 480         } else {
 481                 me4000_cnt_major_driver_no = result;
 482         }
 483         PDEBUG("init_module():Major driver number for CNT = %ld\n",
 484                me4000_cnt_major_driver_no);
 485
 486         /* Allocate major number for external interrupt */
 487         result =
 488             register_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME,
 489                             &me4000_ext_int_fops);
 490         if (result < 0) {
 491                 printk(KERN_ERR
 492                        "ME4000:init_module():Can't get major no for external interrupt\n");
 493                 goto INIT_ERROR_6;
 494         } else {
 495                 me4000_ext_int_major_driver_no = result;
 496         }
 497         PDEBUG
 498             ("init_module():Major driver number for external interrupt = %ld\n",
 499              me4000_ext_int_major_driver_no);
 500
 501         /* Create the /proc/me4000 entry */
 502         if (!create_proc_read_entry
 503             ("me4000", 0, NULL, me4000_read_procmem, NULL)) {
 504                 result = -ENODEV;
 505                 printk(KERN_ERR
 506                        "ME4000:init_module():Can't create proc entry\n");
 507                 goto INIT_ERROR_7;
 508         }
 509
 510         return 0;
 511
 512 INIT_ERROR_7:
 513         unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
 514
 515 INIT_ERROR_6:
 516         unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
 517
 518 INIT_ERROR_5:
 519         unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
 520
 521 INIT_ERROR_4:
 522         unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
 523
 524 INIT_ERROR_3:
 525         unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
 526
 527 INIT_ERROR_2:
 528         pci_unregister_driver(&me4000_driver);
 529         clear_board_info_list();
 530
 531 INIT_ERROR_1:
 532         return result;
 533 }
 534
 535 module_init(me4000_init_module);
 536
 537 static void clear_board_info_list(void)
 538 {
 539         struct list_head *board_p;
 540         struct list_head *dac_p;
 541         struct me4000_info *board_info;
 542         struct me4000_ao_context *ao_context;
 543
 544         /* Clear context lists */
 545         for (board_p = me4000_board_info_list.next;
 546              board_p != &me4000_board_info_list; board_p = board_p->next) {
 547                 board_info = list_entry(board_p, struct me4000_info, list);
 548                 /* Clear analog output context list */
 549                 while (!list_empty(&board_info->ao_context_list)) {
 550                         dac_p = board_info->ao_context_list.next;
 551                         ao_context =
 552                             list_entry(dac_p, struct me4000_ao_context, list);
 553                         me4000_ao_reset(ao_context);
 554                         free_irq(ao_context->irq, ao_context);
 555                         if (ao_context->circ_buf.buf)
 556                                 kfree(ao_context->circ_buf.buf);
 557                         list_del(dac_p);
 558                         kfree(ao_context);
 559                 }
 560
 561                 /* Clear analog input context */
 562                 if (board_info->ai_context->circ_buf.buf)
 563                         kfree(board_info->ai_context->circ_buf.buf);
 564                 kfree(board_info->ai_context);
 565
 566                 /* Clear digital I/O context */
 567                 kfree(board_info->dio_context);
 568
 569                 /* Clear counter context */
 570                 kfree(board_info->cnt_context);
 571
 572                 /* Clear external interrupt context */
 573                 kfree(board_info->ext_int_context);
 574         }
 575
 576         /* Clear the board info list */
 577         while (!list_empty(&me4000_board_info_list)) {
 578                 board_p = me4000_board_info_list.next;
 579                 board_info = list_entry(board_p, struct me4000_info, list);
 580                 pci_release_regions(board_info->pci_dev_p);
 581                 list_del(board_p);
 582                 kfree(board_info);
 583         }
 584 }
 585
 586 static int get_registers(struct pci_dev *dev, struct me4000_info *board_info)
 587 {
 588
 589         /*--------------------------- plx regbase ---------------------------------*/
 590
 591         board_info->plx_regbase = pci_resource_start(dev, 1);
 592         if (board_info->plx_regbase == 0) {
 593                 printk(KERN_ERR
 594                        "ME4000:get_registers():PCI base address 1 is not available\n");
 595                 return -ENODEV;
 596         }
 597         board_info->plx_regbase_size = pci_resource_len(dev, 1);
 598
 599         PDEBUG
 600             ("get_registers():PLX configuration registers at address 0x%4lX [0x%4lX]\n",
 601              board_info->plx_regbase, board_info->plx_regbase_size);
 602
 603         /*--------------------------- me4000 regbase ------------------------------*/
 604
 605         board_info->me4000_regbase = pci_resource_start(dev, 2);
 606         if (board_info->me4000_regbase == 0) {
 607                 printk(KERN_ERR
 608                        "ME4000:get_registers():PCI base address 2 is not available\n");
 609                 return -ENODEV;
 610         }
 611         board_info->me4000_regbase_size = pci_resource_len(dev, 2);
 612
 613         PDEBUG("get_registers():ME4000 registers at address 0x%4lX [0x%4lX]\n",
 614                board_info->me4000_regbase, board_info->me4000_regbase_size);
 615
 616         /*--------------------------- timer regbase ------------------------------*/
 617
 618         board_info->timer_regbase = pci_resource_start(dev, 3);
 619         if (board_info->timer_regbase == 0) {
 620                 printk(KERN_ERR
 621                        "ME4000:get_registers():PCI base address 3 is not available\n");
 622                 return -ENODEV;
 623         }
 624         board_info->timer_regbase_size = pci_resource_len(dev, 3);
 625
 626         PDEBUG("get_registers():Timer registers at address 0x%4lX [0x%4lX]\n",
 627                board_info->timer_regbase, board_info->timer_regbase_size);
 628
 629         /*--------------------------- program regbase ------------------------------*/
 630
 631         board_info->program_regbase = pci_resource_start(dev, 5);
 632         if (board_info->program_regbase == 0) {
 633                 printk(KERN_ERR
 634                        "get_registers():ME4000:PCI base address 5 is not available\n");
 635                 return -ENODEV;
 636         }
 637         board_info->program_regbase_size = pci_resource_len(dev, 5);
 638
 639         PDEBUG("get_registers():Program registers at address 0x%4lX [0x%4lX]\n",
 640                board_info->program_regbase, board_info->program_regbase_size);
 641
 642         return 0;
 643 }
 644
 645 static int init_board_info(struct pci_dev *pci_dev_p,
 646                            struct me4000_info *board_info)
 647 {
 648         int i;
 649         int result;
 650         struct list_head *board_p;
 651         board_info->pci_dev_p = pci_dev_p;
 652
 653         for (i = 0; i < ARRAY_SIZE(me4000_boards); i++) {
 654                 if (me4000_boards[i].device_id == pci_dev_p->device) {
 655                         board_info->board_p = &me4000_boards[i];
 656                         break;
 657                 }
 658         }
 659         if (i == ARRAY_SIZE(me4000_boards)) {
 660                 printk(KERN_ERR
 661                        "ME4000:init_board_info():Device ID not valid\n");
 662                 return -ENODEV;
 663         }
 664
 665         /* Get the index of the board in the global list */
 666         for (board_p = me4000_board_info_list.next, i = 0;
 667              board_p != &me4000_board_info_list; board_p = board_p->next, i++) {
 668                 if (board_p == &board_info->list) {
 669                         board_info->board_count = i;
 670                         break;
 671                 }
 672         }
 673         if (board_p == &me4000_board_info_list) {
 674                 printk(KERN_ERR
 675                        "ME4000:init_board_info():Cannot get index of baord\n");
 676                 return -ENODEV;
 677         }
 678
 679         /* Init list head for analog output contexts */
 680         INIT_LIST_HEAD(&board_info->ao_context_list);
 681
 682         /* Init spin locks */
 683         spin_lock_init(&board_info->preload_lock);
 684         spin_lock_init(&board_info->ai_ctrl_lock);
 685
 686         /* Get the serial number */
 687         result = pci_read_config_dword(pci_dev_p, 0x2C, &board_info->serial_no);
 688         if (result != PCIBIOS_SUCCESSFUL) {
 689                 printk(KERN_WARNING
 690                        "ME4000:init_board_info: Can't get serial_no\n");
 691                 return result;
 692         }
 693         PDEBUG("init_board_info():serial_no = 0x%x\n", board_info->serial_no);
 694
 695         /* Get the hardware revision */
 696         result =
 697             pci_read_config_byte(pci_dev_p, 0x08, &board_info->hw_revision);
 698         if (result != PCIBIOS_SUCCESSFUL) {
 699                 printk(KERN_WARNING
 700                        "ME4000:init_board_info():Can't get hw_revision\n");
 701                 return result;
 702         }
 703         PDEBUG("init_board_info():hw_revision = 0x%x\n",
 704                board_info->hw_revision);
 705
 706         /* Get the vendor id */
 707         board_info->vendor_id = pci_dev_p->vendor;
 708         PDEBUG("init_board_info():vendor_id = 0x%x\n", board_info->vendor_id);
 709
 710         /* Get the device id */
 711         board_info->device_id = pci_dev_p->device;
 712         PDEBUG("init_board_info():device_id = 0x%x\n", board_info->device_id);
 713
 714         /* Get the pci device number */
 715         board_info->pci_dev_no = PCI_FUNC(pci_dev_p->devfn);
 716         PDEBUG("init_board_info():pci_func_no = 0x%x\n",
 717                board_info->pci_func_no);
 718
 719         /* Get the pci slot number */
 720         board_info->pci_dev_no = PCI_SLOT(pci_dev_p->devfn);
 721         PDEBUG("init_board_info():pci_dev_no = 0x%x\n", board_info->pci_dev_no);
 722
 723         /* Get the pci bus number */
 724         board_info->pci_bus_no = pci_dev_p->bus->number;
 725         PDEBUG("init_board_info():pci_bus_no = 0x%x\n", board_info->pci_bus_no);
 726
 727         /* Get the irq assigned to the board */
 728         board_info->irq = pci_dev_p->irq;
 729         PDEBUG("init_board_info():irq = %d\n", board_info->irq);
 730
 731         return 0;
 732 }
 733
 734 static int alloc_ao_contexts(struct me4000_info *info)
 735 {
 736         int i;
 737         int err;
 738         struct me4000_ao_context *ao_context;
 739
 740         for (i = 0; i < info->board_p->ao.count; i++) {
 741                 ao_context = kzalloc(sizeof(struct me4000_ao_context),
 742                                                                 GFP_KERNEL);
 743                 if (!ao_context) {
 744                         printk(KERN_ERR
 745                                "alloc_ao_contexts():Can't get memory for ao context\n");
 746                         release_ao_contexts(info);
 747                         return -ENOMEM;
 748                 }
 749
 750                 spin_lock_init(&ao_context->use_lock);
 751                 spin_lock_init(&ao_context->int_lock);
 752                 ao_context->irq = info->irq;
 753                 init_waitqueue_head(&ao_context->wait_queue);
 754                 ao_context->board_info = info;
 755
 756                 if (info->board_p->ao.fifo_count) {
 757                         /* Allocate circular buffer */
 758                         ao_context->circ_buf.buf =
 759                             kzalloc(ME4000_AO_BUFFER_SIZE, GFP_KERNEL);
 760                         if (!ao_context->circ_buf.buf) {
 761                                 printk(KERN_ERR
 762                                        "alloc_ao_contexts():Can't get circular buffer\n");
 763                                 release_ao_contexts(info);
 764                                 return -ENOMEM;
 765                         }
 766
 767                         /* Clear the circular buffer */
 768                         ao_context->circ_buf.head = 0;
 769                         ao_context->circ_buf.tail = 0;
 770                 }
 771
 772                 switch (i) {
 773                 case 0:
 774                         ao_context->ctrl_reg =
 775                             info->me4000_regbase + ME4000_AO_00_CTRL_REG;
 776                         ao_context->status_reg =
 777                             info->me4000_regbase + ME4000_AO_00_STATUS_REG;
 778                         ao_context->fifo_reg =
 779                             info->me4000_regbase + ME4000_AO_00_FIFO_REG;
 780                         ao_context->single_reg =
 781                             info->me4000_regbase + ME4000_AO_00_SINGLE_REG;
 782                         ao_context->timer_reg =
 783                             info->me4000_regbase + ME4000_AO_00_TIMER_REG;
 784                         ao_context->irq_status_reg =
 785                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 786                         ao_context->preload_reg =
 787                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 788                         break;
 789                 case 1:
 790                         ao_context->ctrl_reg =
 791                             info->me4000_regbase + ME4000_AO_01_CTRL_REG;
 792                         ao_context->status_reg =
 793                             info->me4000_regbase + ME4000_AO_01_STATUS_REG;
 794                         ao_context->fifo_reg =
 795                             info->me4000_regbase + ME4000_AO_01_FIFO_REG;
 796                         ao_context->single_reg =
 797                             info->me4000_regbase + ME4000_AO_01_SINGLE_REG;
 798                         ao_context->timer_reg =
 799                             info->me4000_regbase + ME4000_AO_01_TIMER_REG;
 800                         ao_context->irq_status_reg =
 801                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 802                         ao_context->preload_reg =
 803                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 804                         break;
 805                 case 2:
 806                         ao_context->ctrl_reg =
 807                             info->me4000_regbase + ME4000_AO_02_CTRL_REG;
 808                         ao_context->status_reg =
 809                             info->me4000_regbase + ME4000_AO_02_STATUS_REG;
 810                         ao_context->fifo_reg =
 811                             info->me4000_regbase + ME4000_AO_02_FIFO_REG;
 812                         ao_context->single_reg =
 813                             info->me4000_regbase + ME4000_AO_02_SINGLE_REG;
 814                         ao_context->timer_reg =
 815                             info->me4000_regbase + ME4000_AO_02_TIMER_REG;
 816                         ao_context->irq_status_reg =
 817                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 818                         ao_context->preload_reg =
 819                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 820                         break;
 821                 case 3:
 822                         ao_context->ctrl_reg =
 823                             info->me4000_regbase + ME4000_AO_03_CTRL_REG;
 824                         ao_context->status_reg =
 825                             info->me4000_regbase + ME4000_AO_03_STATUS_REG;
 826                         ao_context->fifo_reg =
 827                             info->me4000_regbase + ME4000_AO_03_FIFO_REG;
 828                         ao_context->single_reg =
 829                             info->me4000_regbase + ME4000_AO_03_SINGLE_REG;
 830                         ao_context->timer_reg =
 831                             info->me4000_regbase + ME4000_AO_03_TIMER_REG;
 832                         ao_context->irq_status_reg =
 833                             info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 834                         ao_context->preload_reg =
 835                             info->me4000_regbase + ME4000_AO_LOADSETREG_XX;
 836                         break;
 837                 default:
 838                         break;
 839                 }
 840
 841                 if (info->board_p->ao.fifo_count) {
 842                         /* Request the interrupt line */
 843                         err =
 844                             request_irq(ao_context->irq, me4000_ao_isr,
 845                                         IRQF_DISABLED | IRQF_SHARED,
 846                                         ME4000_NAME, ao_context);
 847                         if (err) {
 848                                 printk(KERN_ERR
 849                                        "%s:Can't get interrupt line", __func__);
 850                                 kfree(ao_context->circ_buf.buf);
 851                                 kfree(ao_context);
 852                                 release_ao_contexts(info);
 853                                 return -ENODEV;
 854                         }
 855                 }
 856
 857                 list_add_tail(&ao_context->list, &info->ao_context_list);
 858                 ao_context->index = i;
 859         }
 860
 861         return 0;
 862 }
 863
 864 static void release_ao_contexts(struct me4000_info *board_info)
 865 {
 866         struct list_head *dac_p;
 867         struct me4000_ao_context *ao_context;
 868
 869         /* Clear analog output context list */
 870         while (!list_empty(&board_info->ao_context_list)) {
 871                 dac_p = board_info->ao_context_list.next;
 872                 ao_context = list_entry(dac_p, struct me4000_ao_context, list);
 873                 free_irq(ao_context->irq, ao_context);
 874                 kfree(ao_context->circ_buf.buf);
 875                 list_del(dac_p);
 876                 kfree(ao_context);
 877         }
 878 }
 879
 880 static int alloc_ai_context(struct me4000_info *info)
 881 {
 882         struct me4000_ai_context *ai_context;
 883
 884         if (info->board_p->ai.count) {
 885                 ai_context = kzalloc(sizeof(struct me4000_ai_context),
 886                                                                 GFP_KERNEL);
 887                 if (!ai_context) {
 888                         printk(KERN_ERR
 889                                "ME4000:alloc_ai_context():Can't get memory for ai context\n");
 890                         return -ENOMEM;
 891                 }
 892
 893                 info->ai_context = ai_context;
 894
 895                 spin_lock_init(&ai_context->use_lock);
 896                 spin_lock_init(&ai_context->int_lock);
 897                 ai_context->number = 0;
 898                 ai_context->irq = info->irq;
 899                 init_waitqueue_head(&ai_context->wait_queue);
 900                 ai_context->board_info = info;
 901
 902                 ai_context->ctrl_reg =
 903                     info->me4000_regbase + ME4000_AI_CTRL_REG;
 904                 ai_context->status_reg =
 905                     info->me4000_regbase + ME4000_AI_STATUS_REG;
 906                 ai_context->channel_list_reg =
 907                     info->me4000_regbase + ME4000_AI_CHANNEL_LIST_REG;
 908                 ai_context->data_reg =
 909                     info->me4000_regbase + ME4000_AI_DATA_REG;
 910                 ai_context->chan_timer_reg =
 911                     info->me4000_regbase + ME4000_AI_CHAN_TIMER_REG;
 912                 ai_context->chan_pre_timer_reg =
 913                     info->me4000_regbase + ME4000_AI_CHAN_PRE_TIMER_REG;
 914                 ai_context->scan_timer_low_reg =
 915                     info->me4000_regbase + ME4000_AI_SCAN_TIMER_LOW_REG;
 916                 ai_context->scan_timer_high_reg =
 917                     info->me4000_regbase + ME4000_AI_SCAN_TIMER_HIGH_REG;
 918                 ai_context->scan_pre_timer_low_reg =
 919                     info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_LOW_REG;
 920                 ai_context->scan_pre_timer_high_reg =
 921                     info->me4000_regbase + ME4000_AI_SCAN_PRE_TIMER_HIGH_REG;
 922                 ai_context->start_reg =
 923                     info->me4000_regbase + ME4000_AI_START_REG;
 924                 ai_context->irq_status_reg =
 925                     info->me4000_regbase + ME4000_IRQ_STATUS_REG;
 926                 ai_context->sample_counter_reg =
 927                     info->me4000_regbase + ME4000_AI_SAMPLE_COUNTER_REG;
 928         }
 929
 930         return 0;
 931 }
 932
 933 static int alloc_dio_context(struct me4000_info *info)
 934 {
 935         struct me4000_dio_context *dio_context;
 936
 937         if (info->board_p->dio.count) {
 938                 dio_context = kzalloc(sizeof(struct me4000_dio_context),
 939                                                                 GFP_KERNEL);
 940                 if (!dio_context) {
 941                         printk(KERN_ERR
 942                                "ME4000:alloc_dio_context():Can't get memory for dio context\n");
 943                         return -ENOMEM;
 944                 }
 945
 946                 info->dio_context = dio_context;
 947
 948                 spin_lock_init(&dio_context->use_lock);
 949                 dio_context->board_info = info;
 950
 951                 dio_context->dio_count = info->board_p->dio.count;
 952
 953                 dio_context->dir_reg =
 954                     info->me4000_regbase + ME4000_DIO_DIR_REG;
 955                 dio_context->ctrl_reg =
 956                     info->me4000_regbase + ME4000_DIO_CTRL_REG;
 957                 dio_context->port_0_reg =
 958                     info->me4000_regbase + ME4000_DIO_PORT_0_REG;
 959                 dio_context->port_1_reg =
 960                     info->me4000_regbase + ME4000_DIO_PORT_1_REG;
 961                 dio_context->port_2_reg =
 962                     info->me4000_regbase + ME4000_DIO_PORT_2_REG;
 963                 dio_context->port_3_reg =
 964                     info->me4000_regbase + ME4000_DIO_PORT_3_REG;
 965         }
 966
 967         return 0;
 968 }
 969
 970 static int alloc_cnt_context(struct me4000_info *info)
 971 {
 972         struct me4000_cnt_context *cnt_context;
 973
 974         if (info->board_p->cnt.count) {
 975                 cnt_context = kzalloc(sizeof(struct me4000_cnt_context),
 976                                                                 GFP_KERNEL);
 977                 if (!cnt_context) {
 978                         printk(KERN_ERR
 979                                "ME4000:alloc_cnt_context():Can't get memory for cnt context\n");
 980                         return -ENOMEM;
 981                 }
 982
 983                 info->cnt_context = cnt_context;
 984
 985                 spin_lock_init(&cnt_context->use_lock);
 986                 cnt_context->board_info = info;
 987
 988                 cnt_context->ctrl_reg =
 989                     info->timer_regbase + ME4000_CNT_CTRL_REG;
 990                 cnt_context->counter_0_reg =
 991                     info->timer_regbase + ME4000_CNT_COUNTER_0_REG;
 992                 cnt_context->counter_1_reg =
 993                     info->timer_regbase + ME4000_CNT_COUNTER_1_REG;
 994                 cnt_context->counter_2_reg =
 995                     info->timer_regbase + ME4000_CNT_COUNTER_2_REG;
 996         }
 997
 998         return 0;
 999 }
1000
1001 static int alloc_ext_int_context(struct me4000_info *info)
1002 {
1003         struct me4000_ext_int_context *ext_int_context;
1004
1005         if (info->board_p->cnt.count) {
1006                 ext_int_context =
1007                     kzalloc(sizeof(struct me4000_ext_int_context), GFP_KERNEL);
1008                 if (!ext_int_context) {
1009                         printk(KERN_ERR
1010                                "ME4000:alloc_ext_int_context():Can't get memory for cnt context\n");
1011                         return -ENOMEM;
1012                 }
1013
1014                 info->ext_int_context = ext_int_context;
1015
1016                 spin_lock_init(&ext_int_context->use_lock);
1017                 ext_int_context->board_info = info;
1018
1019                 ext_int_context->fasync_ptr = NULL;
1020                 ext_int_context->irq = info->irq;
1021
1022                 ext_int_context->ctrl_reg =
1023                     info->me4000_regbase + ME4000_AI_CTRL_REG;
1024                 ext_int_context->irq_status_reg =
1025                     info->me4000_regbase + ME4000_IRQ_STATUS_REG;
1026         }
1027
1028         return 0;
1029 }
1030
1031 static int me4000_probe(struct pci_dev *dev, const struct pci_device_id *id)
1032 {
1033         int result = 0;
1034         struct me4000_info *board_info;
1035
1036         CALL_PDEBUG("me4000_probe() is executed\n");
1037
1038         /* Allocate structure for board context */
1039         board_info = kzalloc(sizeof(struct me4000_info), GFP_KERNEL);
1040         if (!board_info) {
1041                 printk(KERN_ERR
1042                        "ME4000:Can't get memory for board info structure\n");
1043                 result = -ENOMEM;
1044                 goto PROBE_ERROR_1;
1045         }
1046
1047         /* Add to global linked list */
1048         list_add_tail(&board_info->list, &me4000_board_info_list);
1049
1050         /* Get the PCI base registers */
1051         result = get_registers(dev, board_info);
1052         if (result) {
1053                 printk(KERN_ERR "%s:Cannot get registers\n", __func__);
1054                 goto PROBE_ERROR_2;
1055         }
1056
1057         /* Enable the device */
1058         result = pci_enable_device(dev);
1059         if (result < 0) {
1060                 printk(KERN_ERR "%s:Cannot enable PCI device\n", __func__);
1061                 goto PROBE_ERROR_2;
1062         }
1063
1064         /* Request the PCI register regions */
1065         result = pci_request_regions(dev, ME4000_NAME);
1066         if (result < 0) {
1067                 printk(KERN_ERR "%s:Cannot request I/O regions\n", __func__);
1068                 goto PROBE_ERROR_2;
1069         }
1070
1071         /* Initialize board info */
1072         result = init_board_info(dev, board_info);
1073         if (result) {
1074                 printk(KERN_ERR "%s:Cannot init baord info\n", __func__);
1075                 goto PROBE_ERROR_3;
1076         }
1077
1078         /* Download the xilinx firmware */
1079         result = me4000_xilinx_download(board_info);
1080         if (result) {
1081                 printk(KERN_ERR "%s:Can't download firmware\n", __func__);
1082                 goto PROBE_ERROR_3;
1083         }
1084
1085         /* Make a hardware reset */
1086         result = me4000_reset_board(board_info);
1087         if (result) {
1088                 printk(KERN_ERR "%s :Can't reset board\n", __func__);
1089                 goto PROBE_ERROR_3;
1090         }
1091
1092         /* Allocate analog output context structures */
1093         result = alloc_ao_contexts(board_info);
1094         if (result) {
1095                 printk(KERN_ERR "%s:Cannot allocate ao contexts\n", __func__);
1096                 goto PROBE_ERROR_3;
1097         }
1098
1099         /* Allocate analog input context */
1100         result = alloc_ai_context(board_info);
1101         if (result) {
1102                 printk(KERN_ERR "%s:Cannot allocate ai context\n", __func__);
1103                 goto PROBE_ERROR_4;
1104         }
1105
1106         /* Allocate digital I/O context */
1107         result = alloc_dio_context(board_info);
1108         if (result) {
1109                 printk(KERN_ERR "%s:Cannot allocate dio context\n", __func__);
1110                 goto PROBE_ERROR_5;
1111         }
1112
1113         /* Allocate counter context */
1114         result = alloc_cnt_context(board_info);
1115         if (result) {
1116                 printk(KERN_ERR "%s:Cannot allocate cnt context\n", __func__);
1117                 goto PROBE_ERROR_6;
1118         }
1119
1120         /* Allocate external interrupt context */
1121         result = alloc_ext_int_context(board_info);
1122         if (result) {
1123                 printk(KERN_ERR
1124                        "%s:Cannot allocate ext_int context\n", __func__);
1125                 goto PROBE_ERROR_7;
1126         }
1127
1128         return 0;
1129
1130 PROBE_ERROR_7:
1131         kfree(board_info->cnt_context);
1132
1133 PROBE_ERROR_6:
1134         kfree(board_info->dio_context);
1135
1136 PROBE_ERROR_5:
1137         kfree(board_info->ai_context);
1138
1139 PROBE_ERROR_4:
1140         release_ao_contexts(board_info);
1141
1142 PROBE_ERROR_3:
1143         pci_release_regions(dev);
1144
1145 PROBE_ERROR_2:
1146         list_del(&board_info->list);
1147         kfree(board_info);
1148
1149 PROBE_ERROR_1:
1150         return result;
1151 }
1152
1153 static int me4000_xilinx_download(struct me4000_info *info)
1154 {
1155         int size = 0;
1156         u32 value = 0;
1157         int idx = 0;
1158         unsigned char *firm;
1159         wait_queue_head_t queue;
1160
1161         CALL_PDEBUG("me4000_xilinx_download() is executed\n");
1162
1163         init_waitqueue_head(&queue);
1164
1165         firm = (info->device_id == 0x4610) ? xilinx_firm_4610 : xilinx_firm;
1166
1167         /*
1168          * Set PLX local interrupt 2 polarity to high.
1169          * Interrupt is thrown by init pin of xilinx.
1170          */
1171         outl(0x10, info->plx_regbase + PLX_INTCSR);
1172
1173         /* Set /CS and /WRITE of the Xilinx */
1174         value = inl(info->plx_regbase + PLX_ICR);
1175         value |= 0x100;
1176         outl(value, info->plx_regbase + PLX_ICR);
1177
1178         /* Init Xilinx with CS1 */
1179         inb(info->program_regbase + 0xC8);
1180
1181         /* Wait until /INIT pin is set */
1182         udelay(20);
1183         if (!(inl(info->plx_regbase + PLX_INTCSR) & 0x20)) {
1184                 printk(KERN_ERR "%s:Can't init Xilinx\n", __func__);
1185                 return -EIO;
1186         }
1187
1188         /* Reset /CS and /WRITE of the Xilinx */
1189         value = inl(info->plx_regbase + PLX_ICR);
1190         value &= ~0x100;
1191         outl(value, info->plx_regbase + PLX_ICR);
1192
1193         /* Download Xilinx firmware */
1194         size = (firm[0] << 24) + (firm[1] << 16) + (firm[2] << 8) + firm[3];
1195         udelay(10);
1196
1197         for (idx = 0; idx < size; idx++) {
1198                 outb(firm[16 + idx], info->program_regbase);
1199
1200                 udelay(10);
1201
1202                 /* Check if BUSY flag is low */
1203                 if (inl(info->plx_regbase + PLX_ICR) & 0x20) {
1204                         printk(KERN_ERR
1205                                "%s:Xilinx is still busy (idx = %d)\n", __func__,
1206                                idx);
1207                         return -EIO;
1208                 }
1209         }
1210
1211         PDEBUG("me4000_xilinx_download():%d bytes written\n", idx);
1212
1213         /* If done flag is high download was successful */
1214         if (inl(info->plx_regbase + PLX_ICR) & 0x4) {
1215                 PDEBUG("me4000_xilinx_download():Done flag is set\n");
1216                 PDEBUG("me4000_xilinx_download():Download was successful\n");
1217         } else {
1218                 printk(KERN_ERR
1219                        "ME4000:%s:DONE flag is not set\n", __func__);
1220                 printk(KERN_ERR
1221                        "ME4000:%s:Download not succesful\n", __func__);
1222                 return -EIO;
1223         }
1224
1225         /* Set /CS and /WRITE */
1226         value = inl(info->plx_regbase + PLX_ICR);
1227         value |= 0x100;
1228         outl(value, info->plx_regbase + PLX_ICR);
1229
1230         return 0;
1231 }
1232
1233 static int me4000_reset_board(struct me4000_info *info)
1234 {
1235         unsigned long icr;
1236
1237         CALL_PDEBUG("me4000_reset_board() is executed\n");
1238
1239         /* Make a hardware reset */
1240         icr = me4000_inl(info->plx_regbase + PLX_ICR);
1241         icr |= 0x40000000;
1242         me4000_outl(icr, info->plx_regbase + PLX_ICR);
1243         icr &= ~0x40000000;
1244         me4000_outl(icr, info->plx_regbase + PLX_ICR);
1245
1246         /* Set both stop bits in the analog input control register */
1247         me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
1248                     info->me4000_regbase + ME4000_AI_CTRL_REG);
1249
1250         /* Set both stop bits in the analog output control register */
1251         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1252                     info->me4000_regbase + ME4000_AO_00_CTRL_REG);
1253         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1254                     info->me4000_regbase + ME4000_AO_01_CTRL_REG);
1255         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1256                     info->me4000_regbase + ME4000_AO_02_CTRL_REG);
1257         me4000_outl(ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP,
1258                     info->me4000_regbase + ME4000_AO_03_CTRL_REG);
1259
1260         /* 0x8000 to the DACs means an output voltage of 0V */
1261         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_00_SINGLE_REG);
1262         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_01_SINGLE_REG);
1263         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_02_SINGLE_REG);
1264         me4000_outl(0x8000, info->me4000_regbase + ME4000_AO_03_SINGLE_REG);
1265
1266         /* Enable interrupts on the PLX */
1267         me4000_outl(0x43, info->plx_regbase + PLX_INTCSR);
1268
1269         /* Set the adustment register for AO demux */
1270         me4000_outl(ME4000_AO_DEMUX_ADJUST_VALUE,
1271                     info->me4000_regbase + ME4000_AO_DEMUX_ADJUST_REG);
1272
1273         /* Set digital I/O direction for port 0 to output on isolated versions */
1274         if (!(me4000_inl(info->me4000_regbase + ME4000_DIO_DIR_REG) & 0x1)) {
1275                 me4000_outl(0x1, info->me4000_regbase + ME4000_DIO_CTRL_REG);
1276         }
1277
1278         return 0;
1279 }
1280
1281 static int me4000_open(struct inode *inode_p, struct file *file_p)
1282 {
1283         int board, dev, mode;
1284         int err = 0;
1285         int i;
1286         struct list_head *ptr;
1287         struct me4000_info *board_info = NULL;
1288         struct me4000_ao_context *ao_context = NULL;
1289         struct me4000_ai_context *ai_context = NULL;
1290         struct me4000_dio_context *dio_context = NULL;
1291         struct me4000_cnt_context *cnt_context = NULL;
1292         struct me4000_ext_int_context *ext_int_context = NULL;
1293
1294         CALL_PDEBUG("me4000_open() is executed\n");
1295
1296         /* Analog output */
1297         if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1298                 board = AO_BOARD(inode_p->i_rdev);
1299                 dev = AO_PORT(inode_p->i_rdev);
1300                 mode = AO_MODE(inode_p->i_rdev);
1301
1302                 PDEBUG("me4000_open():board = %d ao = %d mode = %d\n", board,
1303                        dev, mode);
1304
1305                 /* Search for the board context */
1306                 for (ptr = me4000_board_info_list.next, i = 0;
1307                      ptr != &me4000_board_info_list; ptr = ptr->next, i++) {
1308                         board_info = list_entry(ptr, struct me4000_info, list);
1309                         if (i == board)
1310                                 break;
1311                 }
1312
1313                 if (ptr == &me4000_board_info_list) {
1314                         printk(KERN_ERR
1315                                "ME4000:me4000_open():Board %d not in device list\n",
1316                                board);
1317                         return -ENODEV;
1318                 }
1319
1320                 /* Search for the dac context */
1321                 for (ptr = board_info->ao_context_list.next, i = 0;
1322                      ptr != &board_info->ao_context_list;
1323                      ptr = ptr->next, i++) {
1324                         ao_context = list_entry(ptr, struct me4000_ao_context,
1325                                                                         list);
1326                         if (i == dev)
1327                                 break;
1328                 }
1329
1330                 if (ptr == &board_info->ao_context_list) {
1331                         printk(KERN_ERR
1332                                "ME4000:me4000_open():Device %d not in device list\n",
1333                                dev);
1334                         return -ENODEV;
1335                 }
1336
1337                 /* Check if mode is valid */
1338                 if (mode > 2) {
1339                         printk(KERN_ERR
1340                                "ME4000:me4000_open():Mode is not valid\n");
1341                         return -ENODEV;
1342                 }
1343
1344                 /* Check if mode is valid for this AO */
1345                 if ((mode != ME4000_AO_CONV_MODE_SINGLE)
1346                     && (dev >= board_info->board_p->ao.fifo_count)) {
1347                         printk(KERN_ERR
1348                                "ME4000:me4000_open():AO %d only in single mode available\n",
1349                                dev);
1350                         return -ENODEV;
1351                 }
1352
1353                 /* Check if already opened */
1354                 spin_lock(&ao_context->use_lock);
1355                 if (ao_context->dac_in_use) {
1356                         printk(KERN_ERR
1357                                "ME4000:me4000_open():AO %d already in use\n",
1358                                dev);
1359                         spin_unlock(&ao_context->use_lock);
1360                         return -EBUSY;
1361                 }
1362                 ao_context->dac_in_use = 1;
1363                 spin_unlock(&ao_context->use_lock);
1364
1365                 ao_context->mode = mode;
1366
1367                 /* Hold the context in private data */
1368                 file_p->private_data = ao_context;
1369
1370                 /* Set file operations pointer */
1371                 file_p->f_op = me4000_ao_fops_array[mode];
1372
1373                 err = me4000_ao_prepare(ao_context);
1374                 if (err) {
1375                         ao_context->dac_in_use = 0;
1376                         return 1;
1377                 }
1378         }
1379         /* Analog input */
1380         else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1381                 board = AI_BOARD(inode_p->i_rdev);
1382                 mode = AI_MODE(inode_p->i_rdev);
1383
1384                 PDEBUG("me4000_open():ai board = %d mode = %d\n", board, mode);
1385
1386                 /* Search for the board context */
1387                 for (ptr = me4000_board_info_list.next, i = 0;
1388                      ptr != &me4000_board_info_list; ptr = ptr->next, i++) {
1389                         board_info = list_entry(ptr, struct me4000_info, list);
1390                         if (i == board)
1391                                 break;
1392                 }
1393
1394                 if (ptr == &me4000_board_info_list) {
1395                         printk(KERN_ERR
1396                                "ME4000:me4000_open():Board %d not in device list\n",
1397                                board);
1398                         return -ENODEV;
1399                 }
1400
1401                 ai_context = board_info->ai_context;
1402
1403                 /* Check if mode is valid */
1404                 if (mode > 5) {
1405                         printk(KERN_ERR
1406                                "ME4000:me4000_open():Mode is not valid\n");
1407                         return -EINVAL;
1408                 }
1409
1410                 /* Check if already opened */
1411                 spin_lock(&ai_context->use_lock);
1412                 if (ai_context->in_use) {
1413                         printk(KERN_ERR
1414                                "ME4000:me4000_open():AI already in use\n");
1415                         spin_unlock(&ai_context->use_lock);
1416                         return -EBUSY;
1417                 }
1418                 ai_context->in_use = 1;
1419                 spin_unlock(&ai_context->use_lock);
1420
1421                 ai_context->mode = mode;
1422
1423                 /* Hold the context in private data */
1424                 file_p->private_data = ai_context;
1425
1426                 /* Set file operations pointer */
1427                 file_p->f_op = me4000_ai_fops_array[mode];
1428
1429                 /* Prepare analog input */
1430                 me4000_ai_prepare(ai_context);
1431         }
1432         /* Digital I/O */
1433         else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1434                 board = DIO_BOARD(inode_p->i_rdev);
1435                 dev = 0;
1436                 mode = 0;
1437
1438                 PDEBUG("me4000_open():board = %d\n", board);
1439
1440                 /* Search for the board context */
1441                 for (ptr = me4000_board_info_list.next;
1442                      ptr != &me4000_board_info_list; ptr = ptr->next) {
1443                         board_info = list_entry(ptr, struct me4000_info, list);
1444                         if (board_info->board_count == board)
1445                                 break;
1446                 }
1447
1448                 if (ptr == &me4000_board_info_list) {
1449                         printk(KERN_ERR
1450                                "ME4000:me4000_open():Board %d not in device list\n",
1451                                board);
1452                         return -ENODEV;
1453                 }
1454
1455                 /* Search for the dio context */
1456                 dio_context = board_info->dio_context;
1457
1458                 /* Check if already opened */
1459                 spin_lock(&dio_context->use_lock);
1460                 if (dio_context->in_use) {
1461                         printk(KERN_ERR
1462                                "ME4000:me4000_open():DIO already in use\n");
1463                         spin_unlock(&dio_context->use_lock);
1464                         return -EBUSY;
1465                 }
1466                 dio_context->in_use = 1;
1467                 spin_unlock(&dio_context->use_lock);
1468
1469                 /* Hold the context in private data */
1470                 file_p->private_data = dio_context;
1471
1472                 /* Set file operations pointer to single functions */
1473                 file_p->f_op = &me4000_dio_fops;
1474
1475                 //me4000_dio_reset(dio_context);
1476         }
1477         /* Counters */
1478         else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1479                 board = CNT_BOARD(inode_p->i_rdev);
1480                 dev = 0;
1481                 mode = 0;
1482
1483                 PDEBUG("me4000_open():board = %d\n", board);
1484
1485                 /* Search for the board context */
1486                 for (ptr = me4000_board_info_list.next;
1487                      ptr != &me4000_board_info_list; ptr = ptr->next) {
1488                         board_info = list_entry(ptr, struct me4000_info, list);
1489                         if (board_info->board_count == board)
1490                                 break;
1491                 }
1492
1493                 if (ptr == &me4000_board_info_list) {
1494                         printk(KERN_ERR
1495                                "ME4000:me4000_open():Board %d not in device list\n",
1496                                board);
1497                         return -ENODEV;
1498                 }
1499
1500                 /* Get the cnt context */
1501                 cnt_context = board_info->cnt_context;
1502
1503                 /* Check if already opened */
1504                 spin_lock(&cnt_context->use_lock);
1505                 if (cnt_context->in_use) {
1506                         printk(KERN_ERR
1507                                "ME4000:me4000_open():CNT already in use\n");
1508                         spin_unlock(&cnt_context->use_lock);
1509                         return -EBUSY;
1510                 }
1511                 cnt_context->in_use = 1;
1512                 spin_unlock(&cnt_context->use_lock);
1513
1514                 /* Hold the context in private data */
1515                 file_p->private_data = cnt_context;
1516
1517                 /* Set file operations pointer to single functions */
1518                 file_p->f_op = &me4000_cnt_fops;
1519         }
1520         /* External Interrupt */
1521         else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1522                 board = EXT_INT_BOARD(inode_p->i_rdev);
1523                 dev = 0;
1524                 mode = 0;
1525
1526                 PDEBUG("me4000_open():board = %d\n", board);
1527
1528                 /* Search for the board context */
1529                 for (ptr = me4000_board_info_list.next;
1530                      ptr != &me4000_board_info_list; ptr = ptr->next) {
1531                         board_info = list_entry(ptr, struct me4000_info, list);
1532                         if (board_info->board_count == board)
1533                                 break;
1534                 }
1535
1536                 if (ptr == &me4000_board_info_list) {
1537                         printk(KERN_ERR
1538                                "ME4000:me4000_open():Board %d not in device list\n",
1539                                board);
1540                         return -ENODEV;
1541                 }
1542
1543                 /* Get the external interrupt context */
1544                 ext_int_context = board_info->ext_int_context;
1545
1546                 /* Check if already opened */
1547                 spin_lock(&cnt_context->use_lock);
1548                 if (ext_int_context->in_use) {
1549                         printk(KERN_ERR
1550                                "ME4000:me4000_open():External interrupt already in use\n");
1551                         spin_unlock(&ext_int_context->use_lock);
1552                         return -EBUSY;
1553                 }
1554                 ext_int_context->in_use = 1;
1555                 spin_unlock(&ext_int_context->use_lock);
1556
1557                 /* Hold the context in private data */
1558                 file_p->private_data = ext_int_context;
1559
1560                 /* Set file operations pointer to single functions */
1561                 file_p->f_op = &me4000_ext_int_fops;
1562
1563                 /* Request the interrupt line */
1564                 err =
1565                     request_irq(ext_int_context->irq, me4000_ext_int_isr,
1566                                 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
1567                                 ext_int_context);
1568                 if (err) {
1569                         printk(KERN_ERR
1570                                "ME4000:me4000_open():Can't get interrupt line");
1571                         ext_int_context->in_use = 0;
1572                         return -ENODEV;
1573                 }
1574
1575                 /* Reset the counter */
1576                 me4000_ext_int_disable(ext_int_context);
1577         } else {
1578                 printk(KERN_ERR "ME4000:me4000_open():Major number unknown\n");
1579                 return -EINVAL;
1580         }
1581
1582         return 0;
1583 }
1584
1585 static int me4000_release(struct inode *inode_p, struct file *file_p)
1586 {
1587         struct me4000_ao_context *ao_context;
1588         struct me4000_ai_context *ai_context;
1589         struct me4000_dio_context *dio_context;
1590         struct me4000_cnt_context *cnt_context;
1591         struct me4000_ext_int_context *ext_int_context;
1592
1593         CALL_PDEBUG("me4000_release() is executed\n");
1594
1595         if (MAJOR(inode_p->i_rdev) == me4000_ao_major_driver_no) {
1596                 ao_context = file_p->private_data;
1597
1598                 /* Mark DAC as unused */
1599                 ao_context->dac_in_use = 0;
1600         } else if (MAJOR(inode_p->i_rdev) == me4000_ai_major_driver_no) {
1601                 ai_context = file_p->private_data;
1602
1603                 /* Reset the analog input */
1604                 me4000_ai_reset(ai_context);
1605
1606                 /* Free the interrupt and the circular buffer */
1607                 if (ai_context->mode) {
1608                         free_irq(ai_context->irq, ai_context);
1609                         kfree(ai_context->circ_buf.buf);
1610                         ai_context->circ_buf.buf = NULL;
1611                         ai_context->circ_buf.head = 0;
1612                         ai_context->circ_buf.tail = 0;
1613                 }
1614
1615                 /* Mark AI as unused */
1616                 ai_context->in_use = 0;
1617         } else if (MAJOR(inode_p->i_rdev) == me4000_dio_major_driver_no) {
1618                 dio_context = file_p->private_data;
1619
1620                 /* Mark digital I/O as unused */
1621                 dio_context->in_use = 0;
1622         } else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
1623                 cnt_context = file_p->private_data;
1624
1625                 /* Mark counters as unused */
1626                 cnt_context->in_use = 0;
1627         } else if (MAJOR(inode_p->i_rdev) == me4000_ext_int_major_driver_no) {
1628                 ext_int_context = file_p->private_data;
1629
1630                 /* Disable the externel interrupt */
1631                 me4000_ext_int_disable(ext_int_context);
1632
1633                 free_irq(ext_int_context->irq, ext_int_context);
1634
1635                 /* Mark as unused */
1636                 ext_int_context->in_use = 0;
1637         } else {
1638                 printk(KERN_ERR
1639                        "ME4000:me4000_release():Major number unknown\n");
1640                 return -EINVAL;
1641         }
1642
1643         return 0;
1644 }
1645
1646 /*------------------------------- Analog output stuff --------------------------------------*/
1647
1648 static int me4000_ao_prepare(struct me4000_ao_context *ao_context)
1649 {
1650         unsigned long flags;
1651
1652         CALL_PDEBUG("me4000_ao_prepare() is executed\n");
1653
1654         if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1655                 /* Only do anything if not already in the correct mode */
1656                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1657                 if ((mode & ME4000_AO_CONV_MODE_CONTINUOUS)
1658                     && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1659                         return 0;
1660                 }
1661
1662                 /* Stop any conversion */
1663                 me4000_ao_immediate_stop(ao_context);
1664
1665                 /* Set the control register to default state  */
1666                 spin_lock_irqsave(&ao_context->int_lock, flags);
1667                 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1668                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1669                             ME4000_AO_CTRL_BIT_STOP |
1670                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1671                             ao_context->ctrl_reg);
1672                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1673
1674                 /* Set to fastest sample rate */
1675                 me4000_outl(65, ao_context->timer_reg);
1676         } else if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1677                 /* Only do anything if not already in the correct mode */
1678                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1679                 if ((mode & ME4000_AO_CONV_MODE_WRAPAROUND)
1680                     && (mode & ME4000_AO_CTRL_BIT_ENABLE_FIFO)) {
1681                         return 0;
1682                 }
1683
1684                 /* Stop any conversion */
1685                 me4000_ao_immediate_stop(ao_context);
1686
1687                 /* Set the control register to default state  */
1688                 spin_lock_irqsave(&ao_context->int_lock, flags);
1689                 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1690                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1691                             ME4000_AO_CTRL_BIT_STOP |
1692                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1693                             ao_context->ctrl_reg);
1694                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1695
1696                 /* Set to fastest sample rate */
1697                 me4000_outl(65, ao_context->timer_reg);
1698         } else if (ao_context->mode == ME4000_AO_CONV_MODE_SINGLE) {
1699                 /* Only do anything if not already in the correct mode */
1700                 unsigned long mode = me4000_inl(ao_context->ctrl_reg);
1701                 if (!
1702                     (mode &
1703                      (ME4000_AO_CONV_MODE_WRAPAROUND |
1704                       ME4000_AO_CONV_MODE_CONTINUOUS))) {
1705                         return 0;
1706                 }
1707
1708                 /* Stop any conversion */
1709                 me4000_ao_immediate_stop(ao_context);
1710
1711                 /* Clear the control register */
1712                 spin_lock_irqsave(&ao_context->int_lock, flags);
1713                 me4000_outl(0x0, ao_context->ctrl_reg);
1714                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1715
1716                 /* Set voltage to 0V */
1717                 me4000_outl(0x8000, ao_context->single_reg);
1718         } else {
1719                 printk(KERN_ERR
1720                        "ME4000:me4000_ao_prepare():Invalid mode specified\n");
1721                 return -EINVAL;
1722         }
1723
1724         return 0;
1725 }
1726
1727 static int me4000_ao_reset(struct me4000_ao_context *ao_context)
1728 {
1729         u32 tmp;
1730         wait_queue_head_t queue;
1731         unsigned long flags;
1732
1733         CALL_PDEBUG("me4000_ao_reset() is executed\n");
1734
1735         init_waitqueue_head(&queue);
1736
1737         if (ao_context->mode == ME4000_AO_CONV_MODE_WRAPAROUND) {
1738                 /*
1739                  * First stop conversion of the DAC before reconfigure.
1740                  * This is essantial, cause of the state machine.
1741                  * If not stopped before configuring mode, it could
1742                  * walk in a undefined state.
1743                  */
1744                 tmp = me4000_inl(ao_context->ctrl_reg);
1745                 tmp |= ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
1746                 me4000_outl(tmp, ao_context->ctrl_reg);
1747
1748                 wait_event_timeout(queue,
1749                         (inl(ao_context->status_reg) &
1750                                 ME4000_AO_STATUS_BIT_FSM) == 0,
1751                         1);
1752
1753                 /* Set to transparent mode */
1754                 me4000_ao_simultaneous_disable(ao_context);
1755
1756                 /* Set to single mode in order to set default voltage */
1757                 me4000_outl(0x0, ao_context->ctrl_reg);
1758
1759                 /* Set voltage to 0V */
1760                 me4000_outl(0x8000, ao_context->single_reg);
1761
1762                 /* Set to fastest sample rate */
1763                 me4000_outl(65, ao_context->timer_reg);
1764
1765                 /* Set the original mode and enable FIFO */
1766                 me4000_outl(ME4000_AO_CONV_MODE_WRAPAROUND |
1767                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1768                             ME4000_AO_CTRL_BIT_STOP |
1769                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1770                             ao_context->ctrl_reg);
1771         } else if (ao_context->mode == ME4000_AO_CONV_MODE_CONTINUOUS) {
1772                 /*
1773                  * First stop conversion of the DAC before reconfigure.
1774                  * This is essantial, cause of the state machine.
1775                  * If not stopped before configuring mode, it could
1776                  * walk in a undefined state.
1777                  */
1778                 spin_lock_irqsave(&ao_context->int_lock, flags);
1779                 tmp = me4000_inl(ao_context->ctrl_reg);
1780                 tmp |= ME4000_AO_CTRL_BIT_STOP;
1781                 me4000_outl(tmp, ao_context->ctrl_reg);
1782                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1783
1784                 wait_event_timeout(queue,
1785                         (inl(ao_context->status_reg) &
1786                                 ME4000_AO_STATUS_BIT_FSM) == 0,
1787                         1);
1788
1789                 /* Clear the circular buffer */
1790                 ao_context->circ_buf.head = 0;
1791                 ao_context->circ_buf.tail = 0;
1792
1793                 /* Set to transparent mode */
1794                 me4000_ao_simultaneous_disable(ao_context);
1795
1796                 /* Set to single mode in order to set default voltage */
1797                 spin_lock_irqsave(&ao_context->int_lock, flags);
1798                 tmp = me4000_inl(ao_context->ctrl_reg);
1799                 me4000_outl(0x0, ao_context->ctrl_reg);
1800
1801                 /* Set voltage to 0V */
1802                 me4000_outl(0x8000, ao_context->single_reg);
1803
1804                 /* Set to fastest sample rate */
1805                 me4000_outl(65, ao_context->timer_reg);
1806
1807                 /* Set the original mode and enable FIFO */
1808                 me4000_outl(ME4000_AO_CONV_MODE_CONTINUOUS |
1809                             ME4000_AO_CTRL_BIT_ENABLE_FIFO |
1810                             ME4000_AO_CTRL_BIT_STOP |
1811                             ME4000_AO_CTRL_BIT_IMMEDIATE_STOP,
1812                             ao_context->ctrl_reg);
1813                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
1814         } else {
1815                 /* Set to transparent mode */
1816                 me4000_ao_simultaneous_disable(ao_context);
1817
1818                 /* Set voltage to 0V */
1819                 me4000_outl(0x8000, ao_context->single_reg);
1820         }
1821
1822         return 0;
1823 }
1824
1825 static ssize_t me4000_ao_write_sing(struct file *filep, const char *buff,
1826                                     size_t cnt, loff_t *offp)
1827 {
1828         struct me4000_ao_context *ao_context = filep->private_data;
1829         u32 value;
1830         const u16 *buffer = (const u16 *)buff;
1831
1832         CALL_PDEBUG("me4000_ao_write_sing() is executed\n");
1833
1834         if (cnt != 2) {
1835                 printk(KERN_ERR
1836                        "%s:Write count is not 2\n", __func__);
1837                 return -EINVAL;
1838         }
1839
1840         if (get_user(value, buffer)) {
1841                 printk(KERN_ERR
1842                        "%s:Cannot copy data from user\n", __func__);
1843                 return -EFAULT;
1844         }
1845
1846         me4000_outl(value, ao_context->single_reg);
1847
1848         return 2;
1849 }
1850
1851 static ssize_t me4000_ao_write_wrap(struct file *filep, const char *buff,
1852                                     size_t cnt, loff_t *offp)
1853 {
1854         struct me4000_ao_context *ao_context = filep->private_data;
1855         size_t i;
1856         u32 value;
1857         u32 tmp;
1858         const u16 *buffer = (const u16 *)buff;
1859         size_t count = cnt / 2;
1860
1861         CALL_PDEBUG("me4000_ao_write_wrap() is executed\n");
1862
1863         /* Check if a conversion is already running */
1864         if (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
1865                 printk(KERN_ERR
1866                        "%s:There is already a conversion running\n", __func__);
1867                 return -EBUSY;
1868         }
1869
1870         if (count > ME4000_AO_FIFO_COUNT) {
1871                 printk(KERN_ERR
1872                        "%s:Can't load more than %d values\n", __func__,
1873                        ME4000_AO_FIFO_COUNT);
1874                 return -ENOSPC;
1875         }
1876
1877         /* Reset the FIFO */
1878         tmp = inl(ao_context->ctrl_reg);
1879         tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1880         outl(tmp, ao_context->ctrl_reg);
1881         tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
1882         outl(tmp, ao_context->ctrl_reg);
1883
1884         for (i = 0; i < count; i++) {
1885                 if (get_user(value, buffer + i)) {
1886                         printk(KERN_ERR
1887                                "%s:Cannot copy data from user\n", __func__);
1888                         return -EFAULT;
1889                 }
1890                 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG)
1891                     || ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG))
1892                         value = value << 16;
1893                 outl(value, ao_context->fifo_reg);
1894         }
1895         CALL_PDEBUG("me4000_ao_write_wrap() is leaved with %d\n", i * 2);
1896
1897         return i * 2;
1898 }
1899
1900 static ssize_t me4000_ao_write_cont(struct file *filep, const char *buff,
1901                                     size_t cnt, loff_t *offp)
1902 {
1903         struct me4000_ao_context *ao_context = filep->private_data;
1904         const u16 *buffer = (const u16 *)buff;
1905         size_t count = cnt / 2;
1906         unsigned long flags;
1907         u32 tmp;
1908         int c = 0;
1909         int k = 0;
1910         int ret = 0;
1911         u16 svalue;
1912         u32 lvalue;
1913         int i;
1914         wait_queue_head_t queue;
1915
1916         CALL_PDEBUG("me4000_ao_write_cont() is executed\n");
1917
1918         init_waitqueue_head(&queue);
1919
1920         /* Check count */
1921         if (count <= 0) {
1922                 PDEBUG("me4000_ao_write_cont():Count is 0\n");
1923                 return 0;
1924         }
1925
1926         if (filep->f_flags & O_APPEND) {
1927                 PDEBUG("me4000_ao_write_cont():Append data to data stream\n");
1928                 while (count > 0) {
1929                         if (filep->f_flags & O_NONBLOCK) {
1930                                 if (ao_context->pipe_flag) {
1931                                         printk(KERN_ERR
1932                                                "ME4000:me4000_ao_write_cont():Broken pipe in nonblocking write\n");
1933                                         return -EPIPE;
1934                                 }
1935                                 c = me4000_space_to_end(ao_context->circ_buf,
1936                                                         ME4000_AO_BUFFER_COUNT);
1937                                 if (!c) {
1938                                         PDEBUG
1939                                             ("me4000_ao_write_cont():Returning from nonblocking write\n");
1940                                         break;
1941                                 }
1942                         } else {
1943                                 wait_event_interruptible(ao_context->wait_queue,
1944                                                          (c =
1945                                                           me4000_space_to_end
1946                                                           (ao_context->circ_buf,
1947                                                            ME4000_AO_BUFFER_COUNT)));
1948                                 if (ao_context->pipe_flag) {
1949                                         printk(KERN_ERR
1950                                                "me4000_ao_write_cont():Broken pipe in blocking write\n");
1951                                         return -EPIPE;
1952                                 }
1953                                 if (signal_pending(current)) {
1954                                         printk(KERN_ERR
1955                                                "me4000_ao_write_cont():Wait for free buffer interrupted from signal\n");
1956                                         return -EINTR;
1957                                 }
1958                         }
1959
1960                         PDEBUG("me4000_ao_write_cont():Space to end = %d\n", c);
1961
1962                         /* Only able to write size of free buffer or size of count */
1963                         if (count < c)
1964                                 c = count;
1965
1966                         k = 2 * c;
1967                         k -= copy_from_user(ao_context->circ_buf.buf +
1968                                             ao_context->circ_buf.head, buffer,
1969                                             k);
1970                         c = k / 2;
1971                         PDEBUG
1972                             ("me4000_ao_write_cont():Copy %d values from user space\n",
1973                              c);
1974
1975                         if (!c)
1976                                 return -EFAULT;
1977
1978                         ao_context->circ_buf.head =
1979                             (ao_context->circ_buf.head +
1980                              c) & (ME4000_AO_BUFFER_COUNT - 1);
1981                         buffer += c;
1982                         count -= c;
1983                         ret += c;
1984
1985                         /* Values are now available so enable interrupts */
1986                         spin_lock_irqsave(&ao_context->int_lock, flags);
1987                         if (me4000_buf_count
1988                             (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
1989                                 tmp = me4000_inl(ao_context->ctrl_reg);
1990                                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
1991                                 me4000_outl(tmp, ao_context->ctrl_reg);
1992                         }
1993                         spin_unlock_irqrestore(&ao_context->int_lock, flags);
1994                 }
1995
1996                 /* Wait until the state machine is stopped if O_SYNC is set */
1997                 if (filep->f_flags & O_SYNC) {
1998                         while (inl(ao_context->status_reg) &
1999                                ME4000_AO_STATUS_BIT_FSM) {
2000                                 interruptible_sleep_on_timeout(&queue, 1);
2001                                 if (ao_context->pipe_flag) {
2002                                         PDEBUG
2003                                             ("me4000_ao_write_cont():Broken pipe detected after sync\n");
2004                                         return -EPIPE;
2005                                 }
2006                                 if (signal_pending(current)) {
2007                                         printk(KERN_ERR
2008                                                "me4000_ao_write_cont():Wait on state machine after sync interrupted\n");
2009                                         return -EINTR;
2010                                 }
2011                         }
2012                 }
2013         } else {
2014                 PDEBUG("me4000_ao_write_cont():Preload DAC FIFO\n");
2015                 if ((me4000_inl(ao_context->status_reg) &
2016                      ME4000_AO_STATUS_BIT_FSM)) {
2017                         printk(KERN_ERR
2018                                "me4000_ao_write_cont():Can't Preload DAC FIFO while conversion is running\n");
2019                         return -EBUSY;
2020                 }
2021
2022                 /* Clear the FIFO */
2023                 spin_lock_irqsave(&ao_context->int_lock, flags);
2024                 tmp = me4000_inl(ao_context->ctrl_reg);
2025                 tmp &=
2026                     ~(ME4000_AO_CTRL_BIT_ENABLE_FIFO |
2027                       ME4000_AO_CTRL_BIT_ENABLE_IRQ);
2028                 me4000_outl(tmp, ao_context->ctrl_reg);
2029                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_FIFO;
2030                 me4000_outl(tmp, ao_context->ctrl_reg);
2031                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2032
2033                 /* Clear the circular buffer */
2034                 ao_context->circ_buf.head = 0;
2035                 ao_context->circ_buf.tail = 0;
2036
2037                 /* Reset the broken pipe flag */
2038                 ao_context->pipe_flag = 0;
2039
2040                 /* Only able to write size of fifo or count */
2041                 c = ME4000_AO_FIFO_COUNT;
2042                 if (count < c)
2043                         c = count;
2044
2045                 PDEBUG
2046                     ("me4000_ao_write_cont():Write %d values to DAC on 0x%lX\n",
2047                      c, ao_context->fifo_reg);
2048
2049                 /* Write values to the fifo */
2050                 for (i = 0; i < c; i++) {
2051                         if (get_user(svalue, buffer))
2052                                 return -EFAULT;
2053
2054                         if (((ao_context->fifo_reg & 0xFF) ==
2055                              ME4000_AO_01_FIFO_REG)
2056                             || ((ao_context->fifo_reg & 0xFF) ==
2057                                 ME4000_AO_03_FIFO_REG)) {
2058                                 lvalue = ((u32) svalue) << 16;
2059                         } else
2060                                 lvalue = (u32) svalue;
2061
2062                         outl(lvalue, ao_context->fifo_reg);
2063                         buffer++;
2064                 }
2065                 count -= c;
2066                 ret += c;
2067
2068                 while (1) {
2069                         /* Get free buffer */
2070                         c = me4000_space_to_end(ao_context->circ_buf,
2071                                                 ME4000_AO_BUFFER_COUNT);
2072
2073                         if (c == 0)
2074                                 return (2 * ret);
2075
2076                         /* Only able to write size of free buffer or size of count */
2077                         if (count < c)
2078                                 c = count;
2079
2080                         /* If count = 0 return to user */
2081                         if (c <= 0) {
2082                                 PDEBUG
2083                                     ("me4000_ao_write_cont():Count reached 0\n");
2084                                 break;
2085                         }
2086
2087                         k = 2 * c;
2088                         k -= copy_from_user(ao_context->circ_buf.buf +
2089                                             ao_context->circ_buf.head, buffer,
2090                                             k);
2091                         c = k / 2;
2092                         PDEBUG
2093                             ("me4000_ao_write_cont():Wrote %d values to buffer\n",
2094                              c);
2095
2096                         if (!c)
2097                                 return -EFAULT;
2098
2099                         ao_context->circ_buf.head =
2100                             (ao_context->circ_buf.head +
2101                              c) & (ME4000_AO_BUFFER_COUNT - 1);
2102                         buffer += c;
2103                         count -= c;
2104                         ret += c;
2105
2106                         /* If values in the buffer are available so enable interrupts */
2107                         spin_lock_irqsave(&ao_context->int_lock, flags);
2108                         if (me4000_buf_count
2109                             (ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
2110                                 PDEBUG
2111                                     ("me4000_ao_write_cont():Enable Interrupts\n");
2112                                 tmp = me4000_inl(ao_context->ctrl_reg);
2113                                 tmp |= ME4000_AO_CTRL_BIT_ENABLE_IRQ;
2114                                 me4000_outl(tmp, ao_context->ctrl_reg);
2115                         }
2116                         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2117                 }
2118         }
2119
2120         if (filep->f_flags & O_NONBLOCK) {
2121                 return (ret == 0) ? -EAGAIN : 2 * ret;
2122         }
2123
2124         return 2 * ret;
2125 }
2126
2127 static unsigned int me4000_ao_poll_cont(struct file *file_p, poll_table *wait)
2128 {
2129         struct me4000_ao_context *ao_context;
2130         unsigned long mask = 0;
2131
2132         CALL_PDEBUG("me4000_ao_poll_cont() is executed\n");
2133
2134         ao_context = file_p->private_data;
2135
2136         poll_wait(file_p, &ao_context->wait_queue, wait);
2137
2138         /* Get free buffer */
2139         if (me4000_space_to_end(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT))
2140                 mask |= POLLOUT | POLLWRNORM;
2141
2142         CALL_PDEBUG("me4000_ao_poll_cont():Return mask %lX\n", mask);
2143
2144         return mask;
2145 }
2146
2147 static int me4000_ao_fsync_cont(struct file *file_p, struct dentry *dentry_p,
2148                                 int datasync)
2149 {
2150         struct me4000_ao_context *ao_context;
2151         wait_queue_head_t queue;
2152
2153         CALL_PDEBUG("me4000_ao_fsync_cont() is executed\n");
2154
2155         ao_context = file_p->private_data;
2156         init_waitqueue_head(&queue);
2157
2158         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2159                 interruptible_sleep_on_timeout(&queue, 1);
2160                         wait_event_interruptible_timeout(queue,
2161                         !(inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM),
2162                         1);
2163                 if (ao_context->pipe_flag) {
2164                         printk(KERN_ERR
2165                                "%s:Broken pipe detected\n", __func__);
2166                         return -EPIPE;
2167                 }
2168
2169                 if (signal_pending(current)) {
2170                         printk(KERN_ERR
2171                                "%s:Wait on state machine interrupted\n",
2172                                __func__);
2173                         return -EINTR;
2174                 }
2175         }
2176
2177         return 0;
2178 }
2179
2180 static int me4000_ao_ioctl_sing(struct inode *inode_p, struct file *file_p,
2181                                 unsigned int service, unsigned long arg)
2182 {
2183         struct me4000_ao_context *ao_context;
2184
2185         CALL_PDEBUG("me4000_ao_ioctl_sing() is executed\n");
2186
2187         ao_context = file_p->private_data;
2188
2189         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2190                 return -ENOTTY;
2191                 PDEBUG("me4000_ao_ioctl_sing():Wrong magic number\n");
2192         }
2193
2194         switch (service) {
2195         case ME4000_AO_EX_TRIG_SETUP:
2196                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2197         case ME4000_AO_EX_TRIG_ENABLE:
2198                 return me4000_ao_ex_trig_enable(ao_context);
2199         case ME4000_AO_EX_TRIG_DISABLE:
2200                 return me4000_ao_ex_trig_disable(ao_context);
2201         case ME4000_AO_PRELOAD:
2202                 return me4000_ao_preload(ao_context);
2203         case ME4000_AO_PRELOAD_UPDATE:
2204                 return me4000_ao_preload_update(ao_context);
2205         case ME4000_GET_USER_INFO:
2206                 return me4000_get_user_info((struct me4000_user_info *)arg,
2207                                             ao_context->board_info);
2208         case ME4000_AO_SIMULTANEOUS_EX_TRIG:
2209                 return me4000_ao_simultaneous_ex_trig(ao_context);
2210         case ME4000_AO_SIMULTANEOUS_SW:
2211                 return me4000_ao_simultaneous_sw(ao_context);
2212         case ME4000_AO_SIMULTANEOUS_DISABLE:
2213                 return me4000_ao_simultaneous_disable(ao_context);
2214         case ME4000_AO_SIMULTANEOUS_UPDATE:
2215                 return
2216                     me4000_ao_simultaneous_update(
2217                                 (struct me4000_ao_channel_list *)arg,
2218                                 ao_context);
2219         case ME4000_AO_EX_TRIG_TIMEOUT:
2220                 return me4000_ao_ex_trig_timeout((unsigned long *)arg,
2221                                                  ao_context);
2222         case ME4000_AO_DISABLE_DO:
2223                 return me4000_ao_disable_do(ao_context);
2224         default:
2225                 printk(KERN_ERR
2226                        "me4000_ao_ioctl_sing():Service number invalid\n");
2227                 return -ENOTTY;
2228         }
2229
2230         return 0;
2231 }
2232
2233 static int me4000_ao_ioctl_wrap(struct inode *inode_p, struct file *file_p,
2234                                 unsigned int service, unsigned long arg)
2235 {
2236         struct me4000_ao_context *ao_context;
2237
2238         CALL_PDEBUG("me4000_ao_ioctl_wrap() is executed\n");
2239
2240         ao_context = file_p->private_data;
2241
2242         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2243                 return -ENOTTY;
2244                 PDEBUG("me4000_ao_ioctl_wrap():Wrong magic number\n");
2245         }
2246
2247         switch (service) {
2248         case ME4000_AO_START:
2249                 return me4000_ao_start((unsigned long *)arg, ao_context);
2250         case ME4000_AO_STOP:
2251                 return me4000_ao_stop(ao_context);
2252         case ME4000_AO_IMMEDIATE_STOP:
2253                 return me4000_ao_immediate_stop(ao_context);
2254         case ME4000_AO_RESET:
2255                 return me4000_ao_reset(ao_context);
2256         case ME4000_AO_TIMER_SET_DIVISOR:
2257                 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2258         case ME4000_AO_EX_TRIG_SETUP:
2259                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2260         case ME4000_AO_EX_TRIG_ENABLE:
2261                 return me4000_ao_ex_trig_enable(ao_context);
2262         case ME4000_AO_EX_TRIG_DISABLE:
2263                 return me4000_ao_ex_trig_disable(ao_context);
2264         case ME4000_GET_USER_INFO:
2265                 return me4000_get_user_info((struct me4000_user_info *)arg,
2266                                             ao_context->board_info);
2267         case ME4000_AO_FSM_STATE:
2268                 return me4000_ao_fsm_state((int *)arg, ao_context);
2269         case ME4000_AO_ENABLE_DO:
2270                 return me4000_ao_enable_do(ao_context);
2271         case ME4000_AO_DISABLE_DO:
2272                 return me4000_ao_disable_do(ao_context);
2273         case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2274                 return me4000_ao_synchronous_ex_trig(ao_context);
2275         case ME4000_AO_SYNCHRONOUS_SW:
2276                 return me4000_ao_synchronous_sw(ao_context);
2277         case ME4000_AO_SYNCHRONOUS_DISABLE:
2278                 return me4000_ao_synchronous_disable(ao_context);
2279         default:
2280                 return -ENOTTY;
2281         }
2282         return 0;
2283 }
2284
2285 static int me4000_ao_ioctl_cont(struct inode *inode_p, struct file *file_p,
2286                                 unsigned int service, unsigned long arg)
2287 {
2288         struct me4000_ao_context *ao_context;
2289
2290         CALL_PDEBUG("me4000_ao_ioctl_cont() is executed\n");
2291
2292         ao_context = file_p->private_data;
2293
2294         if (_IOC_TYPE(service) != ME4000_MAGIC) {
2295                 return -ENOTTY;
2296                 PDEBUG("me4000_ao_ioctl_cont():Wrong magic number\n");
2297         }
2298
2299         switch (service) {
2300         case ME4000_AO_START:
2301                 return me4000_ao_start((unsigned long *)arg, ao_context);
2302         case ME4000_AO_STOP:
2303                 return me4000_ao_stop(ao_context);
2304         case ME4000_AO_IMMEDIATE_STOP:
2305                 return me4000_ao_immediate_stop(ao_context);
2306         case ME4000_AO_RESET:
2307                 return me4000_ao_reset(ao_context);
2308         case ME4000_AO_TIMER_SET_DIVISOR:
2309                 return me4000_ao_timer_set_divisor((u32 *) arg, ao_context);
2310         case ME4000_AO_EX_TRIG_SETUP:
2311                 return me4000_ao_ex_trig_set_edge((int *)arg, ao_context);
2312         case ME4000_AO_EX_TRIG_ENABLE:
2313                 return me4000_ao_ex_trig_enable(ao_context);
2314         case ME4000_AO_EX_TRIG_DISABLE:
2315                 return me4000_ao_ex_trig_disable(ao_context);
2316         case ME4000_AO_ENABLE_DO:
2317                 return me4000_ao_enable_do(ao_context);
2318         case ME4000_AO_DISABLE_DO:
2319                 return me4000_ao_disable_do(ao_context);
2320         case ME4000_AO_FSM_STATE:
2321                 return me4000_ao_fsm_state((int *)arg, ao_context);
2322         case ME4000_GET_USER_INFO:
2323                 return me4000_get_user_info((struct me4000_user_info *)arg,
2324                                             ao_context->board_info);
2325         case ME4000_AO_SYNCHRONOUS_EX_TRIG:
2326                 return me4000_ao_synchronous_ex_trig(ao_context);
2327         case ME4000_AO_SYNCHRONOUS_SW:
2328                 return me4000_ao_synchronous_sw(ao_context);
2329         case ME4000_AO_SYNCHRONOUS_DISABLE:
2330                 return me4000_ao_synchronous_disable(ao_context);
2331         case ME4000_AO_GET_FREE_BUFFER:
2332                 return me4000_ao_get_free_buffer((unsigned long *)arg,
2333                                                  ao_context);
2334         default:
2335                 return -ENOTTY;
2336         }
2337         return 0;
2338 }
2339
2340 static int me4000_ao_start(unsigned long *arg,
2341                            struct me4000_ao_context *ao_context)
2342 {
2343         u32 tmp;
2344         wait_queue_head_t queue;
2345         unsigned long ref;
2346         unsigned long timeout;
2347         unsigned long flags;
2348
2349         CALL_PDEBUG("me4000_ao_start() is executed\n");
2350
2351         if (get_user(timeout, arg)) {
2352                 printk(KERN_ERR
2353                        "me4000_ao_start():Cannot copy data from user\n");
2354                 return -EFAULT;
2355         }
2356
2357         init_waitqueue_head(&queue);
2358
2359         spin_lock_irqsave(&ao_context->int_lock, flags);
2360         tmp = inl(ao_context->ctrl_reg);
2361         tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2362         me4000_outl(tmp, ao_context->ctrl_reg);
2363         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2364
2365         if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2366                 if (timeout) {
2367                         ref = jiffies;
2368                         while (!
2369                                (inl(ao_context->status_reg) &
2370                                 ME4000_AO_STATUS_BIT_FSM)) {
2371                                 interruptible_sleep_on_timeout(&queue, 1);
2372                                 if (signal_pending(current)) {
2373                                         printk(KERN_ERR
2374                                                "ME4000:me4000_ao_start():Wait on start of state machine interrupted\n");
2375                                         return -EINTR;
2376                                 }
2377                                 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) {     // 2.6 has diffrent definitions for HZ in user and kernel space
2378                                         printk(KERN_ERR
2379                                                "ME4000:me4000_ao_start():Timeout reached\n");
2380                                         return -EIO;
2381                                 }
2382                         }
2383                 }
2384         } else {
2385                 me4000_outl(0x8000, ao_context->single_reg);
2386         }
2387
2388         return 0;
2389 }
2390
2391 static int me4000_ao_stop(struct me4000_ao_context *ao_context)
2392 {
2393         u32 tmp;
2394         wait_queue_head_t queue;
2395         unsigned long flags;
2396
2397         init_waitqueue_head(&queue);
2398
2399         CALL_PDEBUG("me4000_ao_stop() is executed\n");
2400
2401         /* Set the stop bit */
2402         spin_lock_irqsave(&ao_context->int_lock, flags);
2403         tmp = inl(ao_context->ctrl_reg);
2404         tmp |= ME4000_AO_CTRL_BIT_STOP;
2405         me4000_outl(tmp, ao_context->ctrl_reg);
2406         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2407
2408         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2409                 interruptible_sleep_on_timeout(&queue, 1);
2410                 if (signal_pending(current)) {
2411                         printk(KERN_ERR
2412                                "me4000_ao_stop():Wait on state machine after stop interrupted\n");
2413                         return -EINTR;
2414                 }
2415         }
2416
2417         /* Clear the stop bit */
2418         //tmp &= ~ME4000_AO_CTRL_BIT_STOP;
2419         //me4000_outl(tmp, ao_context->ctrl_reg);
2420
2421         return 0;
2422 }
2423
2424 static int me4000_ao_immediate_stop(struct me4000_ao_context *ao_context)
2425 {
2426         u32 tmp;
2427         wait_queue_head_t queue;
2428         unsigned long flags;
2429
2430         init_waitqueue_head(&queue);
2431
2432         CALL_PDEBUG("me4000_ao_immediate_stop() is executed\n");
2433
2434         spin_lock_irqsave(&ao_context->int_lock, flags);
2435         tmp = inl(ao_context->ctrl_reg);
2436         tmp |= ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP;
2437         me4000_outl(tmp, ao_context->ctrl_reg);
2438         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2439
2440         while (inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) {
2441                 interruptible_sleep_on_timeout(&queue, 1);
2442                 if (signal_pending(current)) {
2443                         printk(KERN_ERR
2444                                "me4000_ao_immediate_stop():Wait on state machine after stop interrupted\n");
2445                         return -EINTR;
2446                 }
2447         }
2448
2449         /* Clear the stop bits */
2450         //tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2451         //me4000_outl(tmp, ao_context->ctrl_reg);
2452
2453         return 0;
2454 }
2455
2456 static int me4000_ao_timer_set_divisor(u32 *arg,
2457                                        struct me4000_ao_context *ao_context)
2458 {
2459         u32 divisor;
2460         u32 tmp;
2461
2462         CALL_PDEBUG("me4000_ao_timer set_divisor() is executed\n");
2463
2464         if (get_user(divisor, arg))
2465                 return -EFAULT;
2466
2467         /* Check if the state machine is stopped */
2468         tmp = me4000_inl(ao_context->status_reg);
2469         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2470                 printk(KERN_ERR
2471                        "me4000_ao_timer_set_divisor():Can't set timer while DAC is running\n");
2472                 return -EBUSY;
2473         }
2474
2475         PDEBUG("me4000_ao_timer set_divisor():Divisor from user = %d\n",
2476                divisor);
2477
2478         /* Check if the divisor is right. ME4000_AO_MIN_TICKS is the lowest */
2479         if (divisor < ME4000_AO_MIN_TICKS) {
2480                 printk(KERN_ERR
2481                        "ME4000:me4000_ao_timer set_divisor():Divisor to low\n");
2482                 return -EINVAL;
2483         }
2484
2485         /* Fix bug in Firmware */
2486         divisor -= 2;
2487
2488         PDEBUG("me4000_ao_timer set_divisor():Divisor to HW = %d\n", divisor);
2489
2490         /* Write the divisor */
2491         me4000_outl(divisor, ao_context->timer_reg);
2492
2493         return 0;
2494 }
2495
2496 static int me4000_ao_ex_trig_set_edge(int *arg,
2497                                       struct me4000_ao_context *ao_context)
2498 {
2499         int mode;
2500         u32 tmp;
2501         unsigned long flags;
2502
2503         CALL_PDEBUG("me4000_ao_ex_trig_set_edge() is executed\n");
2504
2505         if (get_user(mode, arg))
2506                 return -EFAULT;
2507
2508         /* Check if the state machine is stopped */
2509         tmp = me4000_inl(ao_context->status_reg);
2510         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2511                 printk(KERN_ERR
2512                        "me4000_ao_ex_trig_set_edge():Can't set trigger while DAC is running\n");
2513                 return -EBUSY;
2514         }
2515
2516         if (mode == ME4000_AO_TRIGGER_EXT_EDGE_RISING) {
2517                 spin_lock_irqsave(&ao_context->int_lock, flags);
2518                 tmp = me4000_inl(ao_context->ctrl_reg);
2519                 tmp &=
2520                     ~(ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2521                       ME4000_AO_CTRL_BIT_EX_TRIG_BOTH);
2522                 me4000_outl(tmp, ao_context->ctrl_reg);
2523                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2524         } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_FALLING) {
2525                 spin_lock_irqsave(&ao_context->int_lock, flags);
2526                 tmp = me4000_inl(ao_context->ctrl_reg);
2527                 tmp &= ~ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2528                 tmp |= ME4000_AO_CTRL_BIT_EX_TRIG_EDGE;
2529                 me4000_outl(tmp, ao_context->ctrl_reg);
2530                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2531         } else if (mode == ME4000_AO_TRIGGER_EXT_EDGE_BOTH) {
2532                 spin_lock_irqsave(&ao_context->int_lock, flags);
2533                 tmp = me4000_inl(ao_context->ctrl_reg);
2534                 tmp |=
2535                     ME4000_AO_CTRL_BIT_EX_TRIG_EDGE |
2536                     ME4000_AO_CTRL_BIT_EX_TRIG_BOTH;
2537                 me4000_outl(tmp, ao_context->ctrl_reg);
2538                 spin_unlock_irqrestore(&ao_context->int_lock, flags);
2539         } else {
2540                 printk(KERN_ERR
2541                        "me4000_ao_ex_trig_set_edge():Invalid trigger mode\n");
2542                 return -EINVAL;
2543         }
2544
2545         return 0;
2546 }
2547
2548 static int me4000_ao_ex_trig_enable(struct me4000_ao_context *ao_context)
2549 {
2550         u32 tmp;
2551         unsigned long flags;
2552
2553         CALL_PDEBUG("me4000_ao_ex_trig_enable() is executed\n");
2554
2555         /* Check if the state machine is stopped */
2556         tmp = me4000_inl(ao_context->status_reg);
2557         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2558                 printk(KERN_ERR
2559                        "me4000_ao_ex_trig_enable():Can't enable trigger while DAC is running\n");
2560                 return -EBUSY;
2561         }
2562
2563         spin_lock_irqsave(&ao_context->int_lock, flags);
2564         tmp = me4000_inl(ao_context->ctrl_reg);
2565         tmp |= ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2566         me4000_outl(tmp, ao_context->ctrl_reg);
2567         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2568
2569         return 0;
2570 }
2571
2572 static int me4000_ao_ex_trig_disable(struct me4000_ao_context *ao_context)
2573 {
2574         u32 tmp;
2575         unsigned long flags;
2576
2577         CALL_PDEBUG("me4000_ao_ex_trig_disable() is executed\n");
2578
2579         /* Check if the state machine is stopped */
2580         tmp = me4000_inl(ao_context->status_reg);
2581         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2582                 printk(KERN_ERR
2583                        "me4000_ao_ex_trig_disable():Can't disable trigger while DAC is running\n");
2584                 return -EBUSY;
2585         }
2586
2587         spin_lock_irqsave(&ao_context->int_lock, flags);
2588         tmp = me4000_inl(ao_context->ctrl_reg);
2589         tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG;
2590         me4000_outl(tmp, ao_context->ctrl_reg);
2591         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2592
2593         return 0;
2594 }
2595
2596 static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context)
2597 {
2598         u32 tmp;
2599
2600         CALL_PDEBUG("me4000_ao_simultaneous_disable() is executed\n");
2601
2602         /* Check if the state machine is stopped */
2603         /* Be careful here because this function is called from
2604            me4000_ao_synchronous disable */
2605         tmp = me4000_inl(ao_context->status_reg);
2606         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2607                 printk(KERN_ERR
2608                        "me4000_ao_simultaneous_disable():Can't disable while DAC is running\n");
2609                 return -EBUSY;
2610         }
2611
2612         spin_lock(&ao_context->board_info->preload_lock);
2613         tmp = me4000_inl(ao_context->preload_reg);
2614         tmp &= ~(0x1 << ao_context->index);     // Disable preload bit
2615         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable hw simultaneous bit
2616         me4000_outl(tmp, ao_context->preload_reg);
2617         spin_unlock(&ao_context->board_info->preload_lock);
2618
2619         return 0;
2620 }
2621
2622 static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context)
2623 {
2624         u32 tmp;
2625
2626         CALL_PDEBUG("me4000_ao_simultaneous_ex_trig() is executed\n");
2627
2628         spin_lock(&ao_context->board_info->preload_lock);
2629         tmp = me4000_inl(ao_context->preload_reg);
2630         tmp |= (0x1 << ao_context->index);      // Enable preload bit
2631         tmp |= (0x1 << (ao_context->index + 16));       // Enable hw simultaneous bit
2632         me4000_outl(tmp, ao_context->preload_reg);
2633         spin_unlock(&ao_context->board_info->preload_lock);
2634
2635         return 0;
2636 }
2637
2638 static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context)
2639 {
2640         u32 tmp;
2641
2642         CALL_PDEBUG("me4000_ao_simultaneous_sw() is executed\n");
2643
2644         spin_lock(&ao_context->board_info->preload_lock);
2645         tmp = me4000_inl(ao_context->preload_reg);
2646         tmp |= (0x1 << ao_context->index);      // Enable preload bit
2647         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable hw simultaneous bit
2648         me4000_outl(tmp, ao_context->preload_reg);
2649         spin_unlock(&ao_context->board_info->preload_lock);
2650
2651         return 0;
2652 }
2653
2654 static int me4000_ao_preload(struct me4000_ao_context *ao_context)
2655 {
2656         CALL_PDEBUG("me4000_ao_preload() is executed\n");
2657         return me4000_ao_simultaneous_sw(ao_context);
2658 }
2659
2660 static int me4000_ao_preload_update(struct me4000_ao_context *ao_context)
2661 {
2662         u32 tmp;
2663         u32 ctrl;
2664         struct list_head *entry;
2665
2666         CALL_PDEBUG("me4000_ao_preload_update() is executed\n");
2667
2668         spin_lock(&ao_context->board_info->preload_lock);
2669         tmp = me4000_inl(ao_context->preload_reg);
2670         list_for_each(entry, &ao_context->board_info->ao_context_list) {
2671                 /* The channels we update must be in the following state :
2672                    - Mode A
2673                    - Hardware trigger is disabled
2674                    - Corresponding simultaneous bit is reset
2675                  */
2676                 ctrl = me4000_inl(ao_context->ctrl_reg);
2677                 if (!
2678                     (ctrl &
2679                      (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1 |
2680                       ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG))) {
2681                         if (!
2682                             (tmp &
2683                              (0x1 <<
2684                               (((struct me4000_ao_context *)entry)->index
2685                                                                       + 16)))) {
2686                                 tmp &=
2687                                     ~(0x1 <<
2688                                       (((struct me4000_ao_context *)entry)->
2689                                                                         index));
2690                         }
2691                 }
2692         }
2693         me4000_outl(tmp, ao_context->preload_reg);
2694         spin_unlock(&ao_context->board_info->preload_lock);
2695
2696         return 0;
2697 }
2698
2699 static int me4000_ao_simultaneous_update(struct me4000_ao_channel_list *arg,
2700                                          struct me4000_ao_context *ao_context)
2701 {
2702         int err;
2703         int i;
2704         u32 tmp;
2705         struct me4000_ao_channel_list channels;
2706
2707         CALL_PDEBUG("me4000_ao_simultaneous_update() is executed\n");
2708
2709         /* Copy data from user */
2710         err = copy_from_user(&channels, arg,
2711                         sizeof(struct me4000_ao_channel_list));
2712         if (err) {
2713                 printk(KERN_ERR
2714                        "ME4000:me4000_ao_simultaneous_update():Can't copy command\n");
2715                 return -EFAULT;
2716         }
2717
2718         channels.list =
2719             kzalloc(sizeof(unsigned long) * channels.count, GFP_KERNEL);
2720         if (!channels.list) {
2721                 printk(KERN_ERR
2722                        "ME4000:me4000_ao_simultaneous_update():Can't get buffer\n");
2723                 return -ENOMEM;
2724         }
2725
2726         /* Copy channel list from user */
2727         err =
2728             copy_from_user(channels.list, arg->list,
2729                            sizeof(unsigned long) * channels.count);
2730         if (err) {
2731                 printk(KERN_ERR
2732                        "ME4000:me4000_ao_simultaneous_update():Can't copy list\n");
2733                 kfree(channels.list);
2734                 return -EFAULT;
2735         }
2736
2737         spin_lock(&ao_context->board_info->preload_lock);
2738         tmp = me4000_inl(ao_context->preload_reg);
2739         for (i = 0; i < channels.count; i++) {
2740                 if (channels.list[i] >
2741                     ao_context->board_info->board_p->ao.count) {
2742                         spin_unlock(&ao_context->board_info->preload_lock);
2743                         kfree(channels.list);
2744                         printk(KERN_ERR
2745                                "ME4000:me4000_ao_simultaneous_update():Invalid board number specified\n");
2746                         return -EFAULT;
2747                 }
2748                 tmp &= ~(0x1 << channels.list[i]);      // Clear the preload bit
2749                 tmp &= ~(0x1 << (channels.list[i] + 16));       // Clear the hw simultaneous bit
2750         }
2751         me4000_outl(tmp, ao_context->preload_reg);
2752         spin_unlock(&ao_context->board_info->preload_lock);
2753         kfree(channels.list);
2754
2755         return 0;
2756 }
2757
2758 static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context)
2759 {
2760         u32 tmp;
2761         unsigned long flags;
2762
2763         CALL_PDEBUG("me4000_ao_synchronous_ex_trig() is executed\n");
2764
2765         /* Check if the state machine is stopped */
2766         tmp = me4000_inl(ao_context->status_reg);
2767         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2768                 printk(KERN_ERR
2769                        "me4000_ao_synchronous_ex_trig(): DAC is running\n");
2770                 return -EBUSY;
2771         }
2772
2773         spin_lock(&ao_context->board_info->preload_lock);
2774         tmp = me4000_inl(ao_context->preload_reg);
2775         tmp &= ~(0x1 << ao_context->index);     // Disable synchronous sw bit
2776         tmp |= 0x1 << (ao_context->index + 16); // Enable synchronous hw bit
2777         me4000_outl(tmp, ao_context->preload_reg);
2778         spin_unlock(&ao_context->board_info->preload_lock);
2779
2780         /* Make runnable */
2781         spin_lock_irqsave(&ao_context->int_lock, flags);
2782         tmp = me4000_inl(ao_context->ctrl_reg);
2783         if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2784                 tmp &=
2785                     ~(ME4000_AO_CTRL_BIT_STOP |
2786                       ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2787                 me4000_outl(tmp, ao_context->ctrl_reg);
2788         }
2789         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2790
2791         return 0;
2792 }
2793
2794 static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context)
2795 {
2796         u32 tmp;
2797         unsigned long flags;
2798
2799         CALL_PDEBUG("me4000_ao_synchronous_sw() is executed\n");
2800
2801         /* Check if the state machine is stopped */
2802         tmp = me4000_inl(ao_context->status_reg);
2803         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2804                 printk(KERN_ERR "me4000_ao_synchronous_sw(): DAC is running\n");
2805                 return -EBUSY;
2806         }
2807
2808         spin_lock(&ao_context->board_info->preload_lock);
2809         tmp = me4000_inl(ao_context->preload_reg);
2810         tmp |= 0x1 << ao_context->index;        // Enable synchronous sw bit
2811         tmp &= ~(0x1 << (ao_context->index + 16));      // Disable synchronous hw bit
2812         me4000_outl(tmp, ao_context->preload_reg);
2813         spin_unlock(&ao_context->board_info->preload_lock);
2814
2815         /* Make runnable */
2816         spin_lock_irqsave(&ao_context->int_lock, flags);
2817         tmp = me4000_inl(ao_context->ctrl_reg);
2818         if (tmp & (ME4000_AO_CTRL_BIT_MODE_0 | ME4000_AO_CTRL_BIT_MODE_1)) {
2819                 tmp &=
2820                     ~(ME4000_AO_CTRL_BIT_STOP |
2821                       ME4000_AO_CTRL_BIT_IMMEDIATE_STOP);
2822                 me4000_outl(tmp, ao_context->ctrl_reg);
2823         }
2824         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2825
2826         return 0;
2827 }
2828
2829 static int me4000_ao_synchronous_disable(struct me4000_ao_context *ao_context)
2830 {
2831         return me4000_ao_simultaneous_disable(ao_context);
2832 }
2833
2834 static int me4000_ao_get_free_buffer(unsigned long *arg,
2835                                      struct me4000_ao_context *ao_context)
2836 {
2837         unsigned long c;
2838         int err;
2839
2840         c = me4000_buf_space(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT);
2841
2842         err = copy_to_user(arg, &c, sizeof(unsigned long));
2843         if (err) {
2844                 printk(KERN_ERR
2845                        "%s:Can't copy to user space\n", __func__);
2846                 return -EFAULT;
2847         }
2848
2849         return 0;
2850 }
2851
2852 static int me4000_ao_ex_trig_timeout(unsigned long *arg,
2853                                      struct me4000_ao_context *ao_context)
2854 {
2855         u32 tmp;
2856         wait_queue_head_t queue;
2857         unsigned long ref;
2858         unsigned long timeout;
2859
2860         CALL_PDEBUG("me4000_ao_ex_trig_timeout() is executed\n");
2861
2862         if (get_user(timeout, arg)) {
2863                 printk(KERN_ERR
2864                        "me4000_ao_ex_trig_timeout():Cannot copy data from user\n");
2865                 return -EFAULT;
2866         }
2867
2868         init_waitqueue_head(&queue);
2869
2870         tmp = inl(ao_context->ctrl_reg);
2871
2872         if ((tmp & ME4000_AO_CTRL_BIT_ENABLE_EX_TRIG)) {
2873                 if (timeout) {
2874                         ref = jiffies;
2875                         while ((inl(ao_context->status_reg) &
2876                                 ME4000_AO_STATUS_BIT_FSM)) {
2877                                 interruptible_sleep_on_timeout(&queue, 1);
2878                                 if (signal_pending(current)) {
2879                                         printk(KERN_ERR
2880                                                "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2881                                         return -EINTR;
2882                                 }
2883                                 if (((jiffies - ref) > (timeout * HZ / USER_HZ))) {     // 2.6 has diffrent definitions for HZ in user and kernel space
2884                                         printk(KERN_ERR
2885                                                "ME4000:me4000_ao_ex_trig_timeout():Timeout reached\n");
2886                                         return -EIO;
2887                                 }
2888                         }
2889                 } else {
2890                         while ((inl(ao_context->status_reg) &
2891                                 ME4000_AO_STATUS_BIT_FSM)) {
2892                                 interruptible_sleep_on_timeout(&queue, 1);
2893                                 if (signal_pending(current)) {
2894                                         printk(KERN_ERR
2895                                                "ME4000:me4000_ao_ex_trig_timeout():Wait on start of state machine interrupted\n");
2896                                         return -EINTR;
2897                                 }
2898                         }
2899                 }
2900         } else {
2901                 printk(KERN_ERR
2902                        "ME4000:me4000_ao_ex_trig_timeout():External Trigger is not enabled\n");
2903                 return -EINVAL;
2904         }
2905
2906         return 0;
2907 }
2908
2909 static int me4000_ao_enable_do(struct me4000_ao_context *ao_context)
2910 {
2911         u32 tmp;
2912         unsigned long flags;
2913
2914         CALL_PDEBUG("me4000_ao_enable_do() is executed\n");
2915
2916         /* Only available for analog output 3 */
2917         if (ao_context->index != 3) {
2918                 printk(KERN_ERR
2919                        "me4000_ao_enable_do():Only available for analog output 3\n");
2920                 return -ENOTTY;
2921         }
2922
2923         /* Check if the state machine is stopped */
2924         tmp = me4000_inl(ao_context->status_reg);
2925         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2926                 printk(KERN_ERR "me4000_ao_enable_do(): DAC is running\n");
2927                 return -EBUSY;
2928         }
2929
2930         /* Set the stop bit */
2931         spin_lock_irqsave(&ao_context->int_lock, flags);
2932         tmp = inl(ao_context->ctrl_reg);
2933         tmp |= ME4000_AO_CTRL_BIT_ENABLE_DO;
2934         me4000_outl(tmp, ao_context->ctrl_reg);
2935         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2936
2937         return 0;
2938 }
2939
2940 static int me4000_ao_disable_do(struct me4000_ao_context *ao_context)
2941 {
2942         u32 tmp;
2943         unsigned long flags;
2944
2945         CALL_PDEBUG("me4000_ao_disable_do() is executed\n");
2946
2947         /* Only available for analog output 3 */
2948         if (ao_context->index != 3) {
2949                 printk(KERN_ERR
2950                        "me4000_ao_disable():Only available for analog output 3\n");
2951                 return -ENOTTY;
2952         }
2953
2954         /* Check if the state machine is stopped */
2955         tmp = me4000_inl(ao_context->status_reg);
2956         if (tmp & ME4000_AO_STATUS_BIT_FSM) {
2957                 printk(KERN_ERR "me4000_ao_disable_do(): DAC is running\n");
2958                 return -EBUSY;
2959         }
2960
2961         spin_lock_irqsave(&ao_context->int_lock, flags);
2962         tmp = inl(ao_context->ctrl_reg);
2963         tmp &= ~(ME4000_AO_CTRL_BIT_ENABLE_DO);
2964         me4000_outl(tmp, ao_context->ctrl_reg);
2965         spin_unlock_irqrestore(&ao_context->int_lock, flags);
2966
2967         return 0;
2968 }
2969
2970 static int me4000_ao_fsm_state(int *arg, struct me4000_ao_context *ao_context)
2971 {
2972         unsigned long tmp;
2973
2974         CALL_PDEBUG("me4000_ao_fsm_state() is executed\n");
2975
2976         tmp =
2977             (me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM) ? 1
2978             : 0;
2979
2980         if (ao_context->pipe_flag) {
2981                 printk(KERN_ERR "me4000_ao_fsm_state():Broken pipe detected\n");
2982                 return -EPIPE;
2983         }
2984
2985         if (put_user(tmp, arg)) {
2986                 printk(KERN_ERR "me4000_ao_fsm_state():Cannot copy to user\n");
2987                 return -EFAULT;
2988         }
2989
2990         return 0;
2991 }
2992
2993 /*------------------------- Analog input stuff -------------------------------*/
2994
2995 static int me4000_ai_prepare(struct me4000_ai_context *ai_context)
2996 {
2997         wait_queue_head_t queue;
2998         int err;
2999
3000         CALL_PDEBUG("me4000_ai_prepare() is executed\n");
3001
3002         init_waitqueue_head(&queue);
3003
3004         /* Set the new mode and stop bits */
3005         me4000_outl(ai_context->
3006                     mode | ME4000_AI_CTRL_BIT_STOP |
3007                     ME4000_AI_CTRL_BIT_IMMEDIATE_STOP, ai_context->ctrl_reg);
3008
3009         /* Set the timer registers */
3010         ai_context->chan_timer = 66;
3011         ai_context->chan_pre_timer = 66;
3012         ai_context->scan_timer_low = 0;
3013         ai_context->scan_timer_high = 0;
3014
3015         me4000_outl(65, ai_context->chan_timer_reg);
3016         me4000_outl(65, ai_context->chan_pre_timer_reg);
3017         me4000_outl(0, ai_context->scan_timer_low_reg);
3018         me4000_outl(0, ai_context->scan_timer_high_reg);
3019         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3020         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3021
3022         ai_context->channel_list_count = 0;
3023
3024         if (ai_context->mode) {
3025                 /* Request the interrupt line */
3026                 err =
3027                     request_irq(ai_context->irq, me4000_ai_isr,
3028                                 IRQF_DISABLED | IRQF_SHARED, ME4000_NAME,
3029                                 ai_context);
3030                 if (err) {
3031                         printk(KERN_ERR
3032                                "ME4000:me4000_ai_prepare():Can't get interrupt line");
3033                         return -ENODEV;
3034                 }
3035
3036                 /* Allocate circular buffer */
3037                 ai_context->circ_buf.buf =
3038                     kzalloc(ME4000_AI_BUFFER_SIZE, GFP_KERNEL);
3039                 if (!ai_context->circ_buf.buf) {
3040                         printk(KERN_ERR
3041                                "ME4000:me4000_ai_prepare():Can't get circular buffer\n");
3042                         free_irq(ai_context->irq, ai_context);
3043                         return -ENOMEM;
3044                 }
3045
3046                 /* Clear the circular buffer */
3047                 ai_context->circ_buf.head = 0;
3048                 ai_context->circ_buf.tail = 0;
3049         }
3050
3051         return 0;
3052 }
3053
3054 static int me4000_ai_reset(struct me4000_ai_context *ai_context)
3055 {
3056         wait_queue_head_t queue;
3057         u32 tmp;
3058         unsigned long flags;
3059
3060         CALL_PDEBUG("me4000_ai_reset() is executed\n");
3061
3062         init_waitqueue_head(&queue);
3063
3064         /*
3065          * First stop conversion of the state machine before reconfigure.
3066          * If not stopped before configuring mode, it could
3067          * walk in a undefined state.
3068          */
3069         spin_lock_irqsave(&ai_context->int_lock, flags);
3070         tmp = me4000_inl(ai_context->ctrl_reg);
3071         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3072         me4000_outl(tmp, ai_context->ctrl_reg);
3073         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3074
3075         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3076                 interruptible_sleep_on_timeout(&queue, 1);
3077                 if (signal_pending(current)) {
3078                         printk(KERN_ERR
3079                                "me4000_ai_reset():Wait on state machine after stop interrupted\n");
3080                         return -EINTR;
3081                 }
3082         }
3083
3084         /* Clear the control register and set the stop bits */
3085         spin_lock_irqsave(&ai_context->int_lock, flags);
3086         tmp = me4000_inl(ai_context->ctrl_reg);
3087         me4000_outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
3088                     ai_context->ctrl_reg);
3089         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3090
3091         /* Reset timer registers */
3092         ai_context->chan_timer = 66;
3093         ai_context->chan_pre_timer = 66;
3094         ai_context->scan_timer_low = 0;
3095         ai_context->scan_timer_high = 0;
3096         ai_context->sample_counter = 0;
3097         ai_context->sample_counter_reload = 0;
3098
3099         me4000_outl(65, ai_context->chan_timer_reg);
3100         me4000_outl(65, ai_context->chan_pre_timer_reg);
3101         me4000_outl(0, ai_context->scan_timer_low_reg);
3102         me4000_outl(0, ai_context->scan_timer_high_reg);
3103         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3104         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3105         me4000_outl(0, ai_context->sample_counter_reg);
3106
3107         ai_context->channel_list_count = 0;
3108
3109         /* Clear the circular buffer */
3110         ai_context->circ_buf.head = 0;
3111         ai_context->circ_buf.tail = 0;
3112
3113         return 0;
3114 }
3115
3116 static int me4000_ai_ioctl_sing(struct inode *inode_p, struct file *file_p,
3117                                 unsigned int service, unsigned long arg)
3118 {
3119         struct me4000_ai_context *ai_context;
3120
3121         CALL_PDEBUG("me4000_ai_ioctl_sing() is executed\n");
3122
3123         ai_context = file_p->private_data;
3124
3125         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3126                 printk(KERN_ERR "me4000_ai_ioctl_sing():Wrong magic number\n");
3127                 return -ENOTTY;
3128         }
3129         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3130                 printk(KERN_ERR
3131                        "me4000_ai_ioctl_sing():Service number to high\n");
3132                 return -ENOTTY;
3133         }
3134
3135         switch (service) {
3136         case ME4000_AI_SINGLE:
3137                 return me4000_ai_single((struct me4000_ai_single *)arg,
3138                                                                 ai_context);
3139         case ME4000_AI_EX_TRIG_ENABLE:
3140                 return me4000_ai_ex_trig_enable(ai_context);
3141         case ME4000_AI_EX_TRIG_DISABLE:
3142                 return me4000_ai_ex_trig_disable(ai_context);
3143         case ME4000_AI_EX_TRIG_SETUP:
3144                 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3145                                                ai_context);
3146         case ME4000_GET_USER_INFO:
3147                 return me4000_get_user_info((struct me4000_user_info *)arg,
3148                                             ai_context->board_info);
3149         case ME4000_AI_OFFSET_ENABLE:
3150                 return me4000_ai_offset_enable(ai_context);
3151         case ME4000_AI_OFFSET_DISABLE:
3152                 return me4000_ai_offset_disable(ai_context);
3153         case ME4000_AI_FULLSCALE_ENABLE:
3154                 return me4000_ai_fullscale_enable(ai_context);
3155         case ME4000_AI_FULLSCALE_DISABLE:
3156                 return me4000_ai_fullscale_disable(ai_context);
3157         case ME4000_AI_EEPROM_READ:
3158                 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3159                                                                 ai_context);
3160         case ME4000_AI_EEPROM_WRITE:
3161                 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3162                                                                 ai_context);
3163         default:
3164                 printk(KERN_ERR
3165                        "me4000_ai_ioctl_sing():Invalid service number\n");
3166                 return -ENOTTY;
3167         }
3168         return 0;
3169 }
3170
3171 static int me4000_ai_single(struct me4000_ai_single *arg,
3172                             struct me4000_ai_context *ai_context)
3173 {
3174         struct me4000_ai_single cmd;
3175         int err;
3176         u32 tmp;
3177         wait_queue_head_t queue;
3178         unsigned long jiffy;
3179
3180         CALL_PDEBUG("me4000_ai_single() is executed\n");
3181
3182         init_waitqueue_head(&queue);
3183
3184         /* Copy data from user */
3185         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_single));
3186         if (err) {
3187                 printk(KERN_ERR
3188                        "ME4000:me4000_ai_single():Can't copy from user space\n");
3189                 return -EFAULT;
3190         }
3191
3192         /* Check range parameter */
3193         switch (cmd.range) {
3194         case ME4000_AI_LIST_RANGE_BIPOLAR_10:
3195         case ME4000_AI_LIST_RANGE_BIPOLAR_2_5:
3196         case ME4000_AI_LIST_RANGE_UNIPOLAR_10:
3197         case ME4000_AI_LIST_RANGE_UNIPOLAR_2_5:
3198                 break;
3199         default:
3200                 printk(KERN_ERR
3201                        "ME4000:me4000_ai_single():Invalid range specified\n");
3202                 return -EINVAL;
3203         }
3204
3205         /* Check mode and channel number */
3206         switch (cmd.mode) {
3207         case ME4000_AI_LIST_INPUT_SINGLE_ENDED:
3208                 if (cmd.channel >= ai_context->board_info->board_p->ai.count) {
3209                         printk(KERN_ERR
3210                                "ME4000:me4000_ai_single():Analog input is not available\n");
3211                         return -EINVAL;
3212                 }
3213                 break;
3214         case ME4000_AI_LIST_INPUT_DIFFERENTIAL:
3215                 if (cmd.channel >=
3216                     ai_context->board_info->board_p->ai.diff_count) {
3217                         printk(KERN_ERR
3218                                "ME4000:me4000_ai_single():Analog input is not available in differential mode\n");
3219                         return -EINVAL;
3220                 }
3221                 break;
3222         default:
3223                 printk(KERN_ERR
3224                        "ME4000:me4000_ai_single():Invalid mode specified\n");
3225                 return -EINVAL;
3226         }
3227
3228         /* Clear channel list, data fifo and both stop bits */
3229         tmp = me4000_inl(ai_context->ctrl_reg);
3230         tmp &=
3231             ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO |
3232               ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3233         me4000_outl(tmp, ai_context->ctrl_reg);
3234
3235         /* Enable channel list and data fifo */
3236         tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_DATA_FIFO;
3237         me4000_outl(tmp, ai_context->ctrl_reg);
3238
3239         /* Generate channel list entry */
3240         me4000_outl(cmd.channel | cmd.range | cmd.
3241                     mode | ME4000_AI_LIST_LAST_ENTRY,
3242                     ai_context->channel_list_reg);
3243
3244         /* Set the timer to maximum */
3245         me4000_outl(66, ai_context->chan_timer_reg);
3246         me4000_outl(66, ai_context->chan_pre_timer_reg);
3247
3248         if (tmp & ME4000_AI_CTRL_BIT_EX_TRIG) {
3249                 jiffy = jiffies;
3250                 while (!
3251                        (me4000_inl(ai_context->status_reg) &
3252                         ME4000_AI_STATUS_BIT_EF_DATA)) {
3253                         interruptible_sleep_on_timeout(&queue, 1);
3254                         if (signal_pending(current)) {
3255                                 printk(KERN_ERR
3256                                        "ME4000:me4000_ai_single():Wait on start of state machine interrupted\n");
3257                                 return -EINTR;
3258                         }
3259                         if (((jiffies - jiffy) > (cmd.timeout * HZ / USER_HZ)) && cmd.timeout) {        // 2.6 has diffrent definitions for HZ in user and kernel space
3260                                 printk(KERN_ERR
3261                                        "ME4000:me4000_ai_single():Timeout reached\n");
3262                                 return -EIO;
3263                         }
3264                 }
3265         } else {
3266                 /* Start conversion */
3267                 me4000_inl(ai_context->start_reg);
3268
3269                 /* Wait until ready */
3270                 udelay(10);
3271                 if (!
3272                     (me4000_inl(ai_context->status_reg) &
3273                      ME4000_AI_STATUS_BIT_EF_DATA)) {
3274                         printk(KERN_ERR
3275                                "ME4000:me4000_ai_single():Value not available after wait\n");
3276                         return -EIO;
3277                 }
3278         }
3279
3280         /* Read value from data fifo */
3281         cmd.value = me4000_inl(ai_context->data_reg) & 0xFFFF;
3282
3283         /* Copy result back to user */
3284         err = copy_to_user(arg, &cmd, sizeof(struct me4000_ai_single));
3285         if (err) {
3286                 printk(KERN_ERR
3287                        "ME4000:me4000_ai_single():Can't copy to user space\n");
3288                 return -EFAULT;
3289         }
3290
3291         return 0;
3292 }
3293
3294 static int me4000_ai_ioctl_sw(struct inode *inode_p, struct file *file_p,
3295                               unsigned int service, unsigned long arg)
3296 {
3297         struct me4000_ai_context *ai_context;
3298
3299         CALL_PDEBUG("me4000_ai_ioctl_sw() is executed\n");
3300
3301         ai_context = file_p->private_data;
3302
3303         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3304                 printk(KERN_ERR "me4000_ai_ioctl_sw():Wrong magic number\n");
3305                 return -ENOTTY;
3306         }
3307         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3308                 printk(KERN_ERR
3309                        "me4000_ai_ioctl_sw():Service number to high\n");
3310                 return -ENOTTY;
3311         }
3312
3313         switch (service) {
3314         case ME4000_AI_SC_SETUP:
3315                 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3316                                                                 ai_context);
3317         case ME4000_AI_CONFIG:
3318                 return me4000_ai_config((struct me4000_ai_config *)arg,
3319                                                                 ai_context);
3320         case ME4000_AI_START:
3321                 return me4000_ai_start(ai_context);
3322         case ME4000_AI_STOP:
3323                 return me4000_ai_stop(ai_context);
3324         case ME4000_AI_IMMEDIATE_STOP:
3325                 return me4000_ai_immediate_stop(ai_context);
3326         case ME4000_AI_FSM_STATE:
3327                 return me4000_ai_fsm_state((int *)arg, ai_context);
3328         case ME4000_GET_USER_INFO:
3329                 return me4000_get_user_info((struct me4000_user_info *)arg,
3330                                             ai_context->board_info);
3331         case ME4000_AI_EEPROM_READ:
3332                 return me4000_eeprom_read((struct me4000_eeprom *)arg,
3333                                                                 ai_context);
3334         case ME4000_AI_EEPROM_WRITE:
3335                 return me4000_eeprom_write((struct me4000_eeprom *)arg,
3336                                                                 ai_context);
3337         case ME4000_AI_GET_COUNT_BUFFER:
3338                 return me4000_ai_get_count_buffer((unsigned long *)arg,
3339                                                   ai_context);
3340         default:
3341                 printk(KERN_ERR
3342                        "%s:Invalid service number %d\n", __func__, service);
3343                 return -ENOTTY;
3344         }
3345         return 0;
3346 }
3347
3348 static int me4000_ai_ioctl_ext(struct inode *inode_p, struct file *file_p,
3349                                unsigned int service, unsigned long arg)
3350 {
3351         struct me4000_ai_context *ai_context;
3352
3353         CALL_PDEBUG("me4000_ai_ioctl_ext() is executed\n");
3354
3355         ai_context = file_p->private_data;
3356
3357         if (_IOC_TYPE(service) != ME4000_MAGIC) {
3358                 printk(KERN_ERR "me4000_ai_ioctl_ext():Wrong magic number\n");
3359                 return -ENOTTY;
3360         }
3361         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
3362                 printk(KERN_ERR
3363                        "me4000_ai_ioctl_ext():Service number to high\n");
3364                 return -ENOTTY;
3365         }
3366
3367         switch (service) {
3368         case ME4000_AI_SC_SETUP:
3369                 return me4000_ai_sc_setup((struct me4000_ai_sc *)arg,
3370                                                                 ai_context);
3371         case ME4000_AI_CONFIG:
3372                 return me4000_ai_config((struct me4000_ai_config *)arg,
3373                                                                 ai_context);
3374         case ME4000_AI_START:
3375                 return me4000_ai_start_ex((unsigned long *)arg, ai_context);
3376         case ME4000_AI_STOP:
3377                 return me4000_ai_stop(ai_context);
3378         case ME4000_AI_IMMEDIATE_STOP:
3379                 return me4000_ai_immediate_stop(ai_context);
3380         case ME4000_AI_EX_TRIG_ENABLE:
3381                 return me4000_ai_ex_trig_enable(ai_context);
3382         case ME4000_AI_EX_TRIG_DISABLE:
3383                 return me4000_ai_ex_trig_disable(ai_context);
3384         case ME4000_AI_EX_TRIG_SETUP:
3385                 return me4000_ai_ex_trig_setup((struct me4000_ai_trigger *)arg,
3386                                                ai_context);
3387         case ME4000_AI_FSM_STATE:
3388                 return me4000_ai_fsm_state((int *)arg, ai_context);
3389         case ME4000_GET_USER_INFO:
3390                 return me4000_get_user_info((struct me4000_user_info *)arg,
3391                                             ai_context->board_info);
3392         case ME4000_AI_GET_COUNT_BUFFER:
3393                 return me4000_ai_get_count_buffer((unsigned long *)arg,
3394                                                   ai_context);
3395         default:
3396                 printk(KERN_ERR
3397                        "%s:Invalid service number %d\n", __func__ , service);
3398                 return -ENOTTY;
3399         }
3400         return 0;
3401 }
3402
3403 static int me4000_ai_fasync(int fd, struct file *file_p, int mode)
3404 {
3405         struct me4000_ai_context *ai_context;
3406
3407         CALL_PDEBUG("me4000_ao_fasync_cont() is executed\n");
3408
3409         ai_context = file_p->private_data;
3410         return fasync_helper(fd, file_p, mode, &ai_context->fasync_p);
3411 }
3412
3413 static int me4000_ai_config(struct me4000_ai_config *arg,
3414                             struct me4000_ai_context *ai_context)
3415 {
3416         struct me4000_ai_config cmd;
3417         u32 *list = NULL;
3418         u32 mode;
3419         int i;
3420         int err;
3421         wait_queue_head_t queue;
3422         u64 scan;
3423         u32 tmp;
3424
3425         CALL_PDEBUG("me4000_ai_config() is executed\n");
3426
3427         init_waitqueue_head(&queue);
3428
3429         /* Check if conversion is stopped */
3430         if (inl(ai_context->ctrl_reg) & ME4000_AI_STATUS_BIT_FSM) {
3431                 printk(KERN_ERR
3432                        "ME4000:me4000_ai_config():Conversion is not stopped\n");
3433                 err = -EBUSY;
3434                 goto AI_CONFIG_ERR;
3435         }
3436
3437         /* Copy data from user */
3438         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_config));
3439         if (err) {
3440                 printk(KERN_ERR
3441                        "ME4000:me4000_ai_config():Can't copy from user space\n");
3442                 err = -EFAULT;
3443                 goto AI_CONFIG_ERR;
3444         }
3445
3446         PDEBUG
3447             ("me4000_ai_config():chan = %ld, pre_chan = %ld, scan_low = %ld, scan_high = %ld, count = %ld\n",
3448              cmd.timer.chan, cmd.timer.pre_chan, cmd.timer.scan_low,
3449              cmd.timer.scan_high, cmd.channel_list.count);
3450
3451         /* Check whether sample and hold is available for this board */
3452         if (cmd.sh) {
3453                 if (!ai_context->board_info->board_p->ai.sh_count) {
3454                         printk(KERN_ERR
3455                                "ME4000:me4000_ai_config():Sample and Hold is not available for this board\n");
3456                         err = -ENODEV;
3457                         goto AI_CONFIG_ERR;
3458                 }
3459         }
3460
3461         /* Check the channel list size */
3462         if (cmd.channel_list.count > ME4000_AI_CHANNEL_LIST_COUNT) {
3463                 printk(KERN_ERR
3464                        "me4000_ai_config():Channel list is to large\n");
3465                 err = -EINVAL;
3466                 goto AI_CONFIG_ERR;
3467         }
3468
3469         /* Copy channel list from user */
3470         list = kmalloc(sizeof(u32) * cmd.channel_list.count, GFP_KERNEL);
3471         if (!list) {
3472                 printk(KERN_ERR
3473                        "ME4000:me4000_ai_config():Can't get memory for channel list\n");
3474                 err = -ENOMEM;
3475                 goto AI_CONFIG_ERR;
3476         }
3477         err =
3478             copy_from_user(list, cmd.channel_list.list,
3479                            sizeof(u32) * cmd.channel_list.count);
3480         if (err) {
3481                 printk(KERN_ERR
3482                        "ME4000:me4000_ai_config():Can't copy from user space\n");
3483                 err = -EFAULT;
3484                 goto AI_CONFIG_ERR;
3485         }
3486
3487         /* Check if last entry bit is set */
3488         if (!(list[cmd.channel_list.count - 1] & ME4000_AI_LIST_LAST_ENTRY)) {
3489                 printk(KERN_WARNING
3490                        "me4000_ai_config():Last entry bit is not set\n");
3491                 list[cmd.channel_list.count - 1] |= ME4000_AI_LIST_LAST_ENTRY;
3492         }
3493
3494         /* Check whether mode is equal for all entries */
3495         mode = list[0] & 0x20;
3496         for (i = 0; i < cmd.channel_list.count; i++) {
3497                 if ((list[i] & 0x20) != mode) {
3498                         printk(KERN_ERR
3499                                "ME4000:me4000_ai_config():Mode is not equal for all entries\n");
3500                         err = -EINVAL;
3501                         goto AI_CONFIG_ERR;
3502                 }
3503         }
3504
3505         /* Check whether channels are available for this mode */
3506         if (mode == ME4000_AI_LIST_INPUT_SINGLE_ENDED) {
3507                 for (i = 0; i < cmd.channel_list.count; i++) {
3508                         if ((list[i] & 0x1F) >=
3509                             ai_context->board_info->board_p->ai.count) {
3510                                 printk(KERN_ERR
3511                                        "ME4000:me4000_ai_config():Channel is not available for single ended\n");
3512                                 err = -EINVAL;
3513                                 goto AI_CONFIG_ERR;
3514                         }
3515                 }
3516         } else if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3517                 for (i = 0; i < cmd.channel_list.count; i++) {
3518                         if ((list[i] & 0x1F) >=
3519                             ai_context->board_info->board_p->ai.diff_count) {
3520                                 printk(KERN_ERR
3521                                        "ME4000:me4000_ai_config():Channel is not available for differential\n");
3522                                 err = -EINVAL;
3523                                 goto AI_CONFIG_ERR;
3524                         }
3525                 }
3526         }
3527
3528         /* Check if bipolar is set for all entries when in differential mode */
3529         if (mode == ME4000_AI_LIST_INPUT_DIFFERENTIAL) {
3530                 for (i = 0; i < cmd.channel_list.count; i++) {
3531                         if ((list[i] & 0xC0) != ME4000_AI_LIST_RANGE_BIPOLAR_10
3532                             && (list[i] & 0xC0) !=
3533                             ME4000_AI_LIST_RANGE_BIPOLAR_2_5) {
3534                                 printk(KERN_ERR
3535                                        "ME4000:me4000_ai_config():Bipolar is not selected in differential mode\n");
3536                                 err = -EINVAL;
3537                                 goto AI_CONFIG_ERR;
3538                         }
3539                 }
3540         }
3541
3542         if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_VALUE) {
3543                 /* Check for minimum channel divisor */
3544                 if (cmd.timer.chan < ME4000_AI_MIN_TICKS) {
3545                         printk(KERN_ERR
3546                                "ME4000:me4000_ai_config():Channel timer divisor is to low\n");
3547                         err = -EINVAL;
3548                         goto AI_CONFIG_ERR;
3549                 }
3550
3551                 /* Check if minimum channel divisor is adjusted when sample and hold is activated */
3552                 if ((cmd.sh) && (cmd.timer.chan != ME4000_AI_MIN_TICKS)) {
3553                         printk(KERN_ERR
3554                                "ME4000:me4000_ai_config():Channel timer divisor must be at minimum when sample and hold is activated\n");
3555                         err = -EINVAL;
3556                         goto AI_CONFIG_ERR;
3557                 }
3558
3559                 /* Check for minimum channel pre divisor */
3560                 if (cmd.timer.pre_chan < ME4000_AI_MIN_TICKS) {
3561                         printk(KERN_ERR
3562                                "ME4000:me4000_ai_config():Channel pre timer divisor is to low\n");
3563                         err = -EINVAL;
3564                         goto AI_CONFIG_ERR;
3565                 }
3566
3567                 /* Write the channel timers */
3568                 me4000_outl(cmd.timer.chan - 1, ai_context->chan_timer_reg);
3569                 me4000_outl(cmd.timer.pre_chan - 1,
3570                             ai_context->chan_pre_timer_reg);
3571
3572                 /* Save the timer values in the board context */
3573                 ai_context->chan_timer = cmd.timer.chan;
3574                 ai_context->chan_pre_timer = cmd.timer.pre_chan;
3575
3576                 if (ai_context->mode != ME4000_AI_ACQ_MODE_EXT_SINGLE_CHANLIST) {
3577                         /* Check for scan timer divisor */
3578                         scan =
3579                             (u64) cmd.timer.scan_low | ((u64) cmd.timer.
3580                                                         scan_high << 32);
3581                         if (scan != 0) {
3582                                 if (scan <
3583                                     cmd.channel_list.count * cmd.timer.chan +
3584                                     1) {
3585                                         printk(KERN_ERR
3586                                                "ME4000:me4000_ai_config():Scan timer divisor is to low\n");
3587                                         err = -EINVAL;
3588                                         goto AI_CONFIG_ERR;
3589                                 }
3590                         }
3591
3592                         /* Write the scan timers */
3593                         if (scan != 0) {
3594                                 scan--;
3595                                 tmp = (u32) (scan & 0xFFFFFFFF);
3596                                 me4000_outl(tmp,
3597                                             ai_context->scan_timer_low_reg);
3598                                 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3599                                 me4000_outl(tmp,
3600                                             ai_context->scan_timer_high_reg);
3601
3602                                 scan =
3603                                     scan - (cmd.timer.chan - 1) +
3604                                     (cmd.timer.pre_chan - 1);
3605                                 tmp = (u32) (scan & 0xFFFFFFFF);
3606                                 me4000_outl(tmp,
3607                                             ai_context->scan_pre_timer_low_reg);
3608                                 tmp = (u32) ((scan >> 32) & 0xFFFFFFFF);
3609                                 me4000_outl(tmp,
3610                                             ai_context->
3611                                             scan_pre_timer_high_reg);
3612                         } else {
3613                                 me4000_outl(0x0,
3614                                             ai_context->scan_timer_low_reg);
3615                                 me4000_outl(0x0,
3616                                             ai_context->scan_timer_high_reg);
3617
3618                                 me4000_outl(0x0,
3619                                             ai_context->scan_pre_timer_low_reg);
3620                                 me4000_outl(0x0,
3621                                             ai_context->
3622                                             scan_pre_timer_high_reg);
3623                         }
3624
3625                         ai_context->scan_timer_low = cmd.timer.scan_low;
3626                         ai_context->scan_timer_high = cmd.timer.scan_high;
3627                 }
3628         }
3629
3630         /* Clear the channel list */
3631         tmp = me4000_inl(ai_context->ctrl_reg);
3632         tmp &= ~ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3633         me4000_outl(tmp, ai_context->ctrl_reg);
3634         tmp |= ME4000_AI_CTRL_BIT_CHANNEL_FIFO;
3635         me4000_outl(tmp, ai_context->ctrl_reg);
3636
3637         /* Write the channel list */
3638         for (i = 0; i < cmd.channel_list.count; i++) {
3639                 me4000_outl(list[i], ai_context->channel_list_reg);
3640         }
3641
3642         /* Setup sample and hold */
3643         if (cmd.sh) {
3644                 tmp |= ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3645                 me4000_outl(tmp, ai_context->ctrl_reg);
3646         } else {
3647                 tmp &= ~ME4000_AI_CTRL_BIT_SAMPLE_HOLD;
3648                 me4000_outl(tmp, ai_context->ctrl_reg);
3649         }
3650
3651         /* Save the channel list size in the board context */
3652         ai_context->channel_list_count = cmd.channel_list.count;
3653
3654         kfree(list);
3655
3656         return 0;
3657
3658 AI_CONFIG_ERR:
3659
3660         /* Reset the timers */
3661         ai_context->chan_timer = 66;
3662         ai_context->chan_pre_timer = 66;
3663         ai_context->scan_timer_low = 0;
3664         ai_context->scan_timer_high = 0;
3665
3666         me4000_outl(65, ai_context->chan_timer_reg);
3667         me4000_outl(65, ai_context->chan_pre_timer_reg);
3668         me4000_outl(0, ai_context->scan_timer_high_reg);
3669         me4000_outl(0, ai_context->scan_timer_low_reg);
3670         me4000_outl(0, ai_context->scan_pre_timer_high_reg);
3671         me4000_outl(0, ai_context->scan_pre_timer_low_reg);
3672
3673         ai_context->channel_list_count = 0;
3674
3675         tmp = me4000_inl(ai_context->ctrl_reg);
3676         tmp &=
3677             ~(ME4000_AI_CTRL_BIT_CHANNEL_FIFO | ME4000_AI_CTRL_BIT_SAMPLE_HOLD);
3678
3679         if (list)
3680                 kfree(list);
3681
3682         return err;
3683
3684 }
3685
3686 static int ai_common_start(struct me4000_ai_context *ai_context)
3687 {
3688         u32 tmp;
3689         CALL_PDEBUG("ai_common_start() is executed\n");
3690
3691         tmp = me4000_inl(ai_context->ctrl_reg);
3692
3693         /* Check if conversion is stopped */
3694         if (tmp & ME4000_AI_STATUS_BIT_FSM) {
3695                 printk(KERN_ERR
3696                        "ME4000:ai_common_start():Conversion is not stopped\n");
3697                 return -EBUSY;
3698         }
3699
3700         /* Clear data fifo, disable all interrupts, clear sample counter reload */
3701         tmp &= ~(ME4000_AI_CTRL_BIT_DATA_FIFO | ME4000_AI_CTRL_BIT_LE_IRQ |
3702                  ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3703                  ME4000_AI_CTRL_BIT_SC_RELOAD);
3704
3705         me4000_outl(tmp, ai_context->ctrl_reg);
3706
3707         /* Clear circular buffer */
3708         ai_context->circ_buf.head = 0;
3709         ai_context->circ_buf.tail = 0;
3710
3711         /* Enable data fifo */
3712         tmp |= ME4000_AI_CTRL_BIT_DATA_FIFO;
3713
3714         /* Determine interrupt setup */
3715         if (ai_context->sample_counter && !ai_context->sample_counter_reload) {
3716                 /* Enable Half Full Interrupt and Sample Counter Interrupt */
3717                 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ;
3718         } else if (ai_context->sample_counter
3719                    && ai_context->sample_counter_reload) {
3720                 if (ai_context->sample_counter <= ME4000_AI_FIFO_COUNT / 2) {
3721                         /* Enable only Sample Counter Interrupt */
3722                         tmp |=
3723                             ME4000_AI_CTRL_BIT_SC_IRQ |
3724                             ME4000_AI_CTRL_BIT_SC_RELOAD;
3725                 } else {
3726                         /* Enable Half Full Interrupt and Sample Counter Interrupt */
3727                         tmp |=
3728                             ME4000_AI_CTRL_BIT_SC_IRQ |
3729                             ME4000_AI_CTRL_BIT_HF_IRQ |
3730                             ME4000_AI_CTRL_BIT_SC_RELOAD;
3731                 }
3732         } else {
3733                 /* Enable only Half Full Interrupt */
3734                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
3735         }
3736
3737         /* Clear the stop bits */
3738         tmp &= ~(ME4000_AI_CTRL_BIT_STOP | ME4000_AI_CTRL_BIT_IMMEDIATE_STOP);
3739
3740         /* Write setup to hardware */
3741         me4000_outl(tmp, ai_context->ctrl_reg);
3742
3743         /* Write sample counter */
3744         me4000_outl(ai_context->sample_counter, ai_context->sample_counter_reg);
3745
3746         return 0;
3747 }
3748
3749 static int me4000_ai_start(struct me4000_ai_context *ai_context)
3750 {
3751         int err;
3752         CALL_PDEBUG("me4000_ai_start() is executed\n");
3753
3754         /* Prepare Hardware */
3755         err = ai_common_start(ai_context);
3756         if (err)
3757                 return err;
3758
3759         /* Start conversion by dummy read */
3760         me4000_inl(ai_context->start_reg);
3761
3762         return 0;
3763 }
3764
3765 static int me4000_ai_start_ex(unsigned long *arg,
3766                               struct me4000_ai_context *ai_context)
3767 {
3768         int err;
3769         wait_queue_head_t queue;
3770         unsigned long ref;
3771         unsigned long timeout;
3772
3773         CALL_PDEBUG("me4000_ai_start_ex() is executed\n");
3774
3775         if (get_user(timeout, arg)) {
3776                 printk(KERN_ERR
3777                        "me4000_ai_start_ex():Cannot copy data from user\n");
3778                 return -EFAULT;
3779         }
3780
3781         init_waitqueue_head(&queue);
3782
3783         /* Prepare Hardware */
3784         err = ai_common_start(ai_context);
3785         if (err)
3786                 return err;
3787
3788         if (timeout) {
3789                 ref = jiffies;
3790                 while (!
3791                        (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3792                 {
3793                         interruptible_sleep_on_timeout(&queue, 1);
3794                         if (signal_pending(current)) {
3795                                 printk(KERN_ERR
3796                                        "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3797                                 return -EINTR;
3798                         }
3799                         if (((jiffies - ref) > (timeout * HZ / USER_HZ))) {     // 2.6 has diffrent definitions for HZ in user and kernel space
3800                                 printk(KERN_ERR
3801                                        "ME4000:me4000_ai_start_ex():Timeout reached\n");
3802                                 return -EIO;
3803                         }
3804                 }
3805         } else {
3806                 while (!
3807                        (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM))
3808                 {
3809                         interruptible_sleep_on_timeout(&queue, 1);
3810                         if (signal_pending(current)) {
3811                                 printk(KERN_ERR
3812                                        "ME4000:me4000_ai_start_ex():Wait on start of state machine interrupted\n");
3813                                 return -EINTR;
3814                         }
3815                 }
3816         }
3817
3818         return 0;
3819 }
3820
3821 static int me4000_ai_stop(struct me4000_ai_context *ai_context)
3822 {
3823         wait_queue_head_t queue;
3824         u32 tmp;
3825         unsigned long flags;
3826
3827         CALL_PDEBUG("me4000_ai_stop() is executed\n");
3828
3829         init_waitqueue_head(&queue);
3830
3831         /* Disable irqs and clear data fifo */
3832         spin_lock_irqsave(&ai_context->int_lock, flags);
3833         tmp = me4000_inl(ai_context->ctrl_reg);
3834         tmp &=
3835             ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3836               ME4000_AI_CTRL_BIT_DATA_FIFO);
3837         /* Stop conversion of the state machine */
3838         tmp |= ME4000_AI_CTRL_BIT_STOP;
3839         me4000_outl(tmp, ai_context->ctrl_reg);
3840         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3841
3842         /* Clear circular buffer */
3843         ai_context->circ_buf.head = 0;
3844         ai_context->circ_buf.tail = 0;
3845
3846         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3847                 interruptible_sleep_on_timeout(&queue, 1);
3848                 if (signal_pending(current)) {
3849                         printk(KERN_ERR
3850                                "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3851                         return -EINTR;
3852                 }
3853         }
3854
3855         return 0;
3856 }
3857
3858 static int me4000_ai_immediate_stop(struct me4000_ai_context *ai_context)
3859 {
3860         wait_queue_head_t queue;
3861         u32 tmp;
3862         unsigned long flags;
3863
3864         CALL_PDEBUG("me4000_ai_stop() is executed\n");
3865
3866         init_waitqueue_head(&queue);
3867
3868         /* Disable irqs and clear data fifo */
3869         spin_lock_irqsave(&ai_context->int_lock, flags);
3870         tmp = me4000_inl(ai_context->ctrl_reg);
3871         tmp &=
3872             ~(ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ |
3873               ME4000_AI_CTRL_BIT_DATA_FIFO);
3874         /* Stop conversion of the state machine */
3875         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
3876         me4000_outl(tmp, ai_context->ctrl_reg);
3877         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3878
3879         /* Clear circular buffer */
3880         ai_context->circ_buf.head = 0;
3881         ai_context->circ_buf.tail = 0;
3882
3883         while (inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) {
3884                 interruptible_sleep_on_timeout(&queue, 1);
3885                 if (signal_pending(current)) {
3886                         printk(KERN_ERR
3887                                "ME4000:me4000_ai_stop():Wait on state machine after stop interrupted\n");
3888                         return -EINTR;
3889                 }
3890         }
3891
3892         return 0;
3893 }
3894
3895 static int me4000_ai_ex_trig_enable(struct me4000_ai_context *ai_context)
3896 {
3897         u32 tmp;
3898         unsigned long flags;
3899
3900         CALL_PDEBUG("me4000_ai_ex_trig_enable() is executed\n");
3901
3902         spin_lock_irqsave(&ai_context->int_lock, flags);
3903         tmp = me4000_inl(ai_context->ctrl_reg);
3904         tmp |= ME4000_AI_CTRL_BIT_EX_TRIG;
3905         me4000_outl(tmp, ai_context->ctrl_reg);
3906         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3907
3908         return 0;
3909 }
3910
3911 static int me4000_ai_ex_trig_disable(struct me4000_ai_context *ai_context)
3912 {
3913         u32 tmp;
3914         unsigned long flags;
3915
3916         CALL_PDEBUG("me4000_ai_ex_trig_disable() is executed\n");
3917
3918         spin_lock_irqsave(&ai_context->int_lock, flags);
3919         tmp = me4000_inl(ai_context->ctrl_reg);
3920         tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG;
3921         me4000_outl(tmp, ai_context->ctrl_reg);
3922         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3923
3924         return 0;
3925 }
3926
3927 static int me4000_ai_ex_trig_setup(struct me4000_ai_trigger *arg,
3928                                    struct me4000_ai_context *ai_context)
3929 {
3930         struct me4000_ai_trigger cmd;
3931         int err;
3932         u32 tmp;
3933         unsigned long flags;
3934
3935         CALL_PDEBUG("me4000_ai_ex_trig_setup() is executed\n");
3936
3937         /* Copy data from user */
3938         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_trigger));
3939         if (err) {
3940                 printk(KERN_ERR
3941                        "ME4000:me4000_ai_ex_trig_setup():Can't copy from user space\n");
3942                 return -EFAULT;
3943         }
3944
3945         spin_lock_irqsave(&ai_context->int_lock, flags);
3946         tmp = me4000_inl(ai_context->ctrl_reg);
3947
3948         if (cmd.mode == ME4000_AI_TRIGGER_EXT_DIGITAL) {
3949                 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3950         } else if (cmd.mode == ME4000_AI_TRIGGER_EXT_ANALOG) {
3951                 if (!ai_context->board_info->board_p->ai.ex_trig_analog) {
3952                         printk(KERN_ERR
3953                                "ME4000:me4000_ai_ex_trig_setup():No analog trigger available\n");
3954                         return -EINVAL;
3955                 }
3956                 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_ANALOG;
3957         } else {
3958                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3959                 printk(KERN_ERR
3960                        "ME4000:me4000_ai_ex_trig_setup():Invalid trigger mode specified\n");
3961                 return -EINVAL;
3962         }
3963
3964         if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_RISING) {
3965                 tmp &=
3966                     ~(ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3967                       ME4000_AI_CTRL_BIT_EX_TRIG_FALLING);
3968         } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_FALLING) {
3969                 tmp |= ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3970                 tmp &= ~ME4000_AI_CTRL_BIT_EX_TRIG_BOTH;
3971         } else if (cmd.edge == ME4000_AI_TRIGGER_EXT_EDGE_BOTH) {
3972                 tmp |=
3973                     ME4000_AI_CTRL_BIT_EX_TRIG_BOTH |
3974                     ME4000_AI_CTRL_BIT_EX_TRIG_FALLING;
3975         } else {
3976                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
3977                 printk(KERN_ERR
3978                        "ME4000:me4000_ai_ex_trig_setup():Invalid trigger edge specified\n");
3979                 return -EINVAL;
3980         }
3981
3982         me4000_outl(tmp, ai_context->ctrl_reg);
3983         spin_unlock_irqrestore(&ai_context->int_lock, flags);
3984         return 0;
3985 }
3986
3987 static int me4000_ai_sc_setup(struct me4000_ai_sc *arg,
3988                               struct me4000_ai_context *ai_context)
3989 {
3990         struct me4000_ai_sc cmd;
3991         int err;
3992
3993         CALL_PDEBUG("me4000_ai_sc_setup() is executed\n");
3994
3995         /* Copy data from user */
3996         err = copy_from_user(&cmd, arg, sizeof(struct me4000_ai_sc));
3997         if (err) {
3998                 printk(KERN_ERR
3999                        "ME4000:me4000_ai_sc_setup():Can't copy from user space\n");
4000                 return -EFAULT;
4001         }
4002
4003         ai_context->sample_counter = cmd.value;
4004         ai_context->sample_counter_reload = cmd.reload;
4005
4006         return 0;
4007 }
4008
4009 static ssize_t me4000_ai_read(struct file *filep, char *buff, size_t cnt,
4010                               loff_t *offp)
4011 {
4012         struct me4000_ai_context *ai_context = filep->private_data;
4013         s16 *buffer = (s16 *) buff;
4014         size_t count = cnt / 2;
4015         unsigned long flags;
4016         int tmp;
4017         int c = 0;
4018         int k = 0;
4019         int ret = 0;
4020         wait_queue_t wait;
4021
4022         CALL_PDEBUG("me4000_ai_read() is executed\n");
4023
4024         init_waitqueue_entry(&wait, current);
4025
4026         /* Check count */
4027         if (count <= 0) {
4028                 PDEBUG("me4000_ai_read():Count is 0\n");
4029                 return 0;
4030         }
4031
4032         while (count > 0) {
4033                 if (filep->f_flags & O_NONBLOCK) {
4034                         c = me4000_values_to_end(ai_context->circ_buf,
4035                                                  ME4000_AI_BUFFER_COUNT);
4036                         if (!c) {
4037                                 PDEBUG
4038                                     ("me4000_ai_read():Returning from nonblocking read\n");
4039                                 break;
4040                         }
4041                 } else {
4042                         /* Check if conversion is still running */
4043                         if (!
4044                             (me4000_inl(ai_context->status_reg) &
4045                              ME4000_AI_STATUS_BIT_FSM)) {
4046                                 printk(KERN_ERR
4047                                        "ME4000:me4000_ai_read():Conversion interrupted\n");
4048                                 return -EPIPE;
4049                         }
4050
4051                         wait_event_interruptible(ai_context->wait_queue,
4052                                                  (me4000_values_to_end
4053                                                   (ai_context->circ_buf,
4054                                                    ME4000_AI_BUFFER_COUNT)));
4055                         if (signal_pending(current)) {
4056                                 printk(KERN_ERR
4057                                        "ME4000:me4000_ai_read():Wait on values interrupted from signal\n");
4058                                 return -EINTR;
4059                         }
4060                 }
4061
4062                 /* Only read count values or as much as available */
4063                 c = me4000_values_to_end(ai_context->circ_buf,
4064                                          ME4000_AI_BUFFER_COUNT);
4065                 PDEBUG("me4000_ai_read():%d values to end\n", c);
4066                 if (count < c)
4067                         c = count;
4068
4069                 PDEBUG("me4000_ai_read():Copy %d values to user space\n", c);
4070                 k = 2 * c;
4071                 k -= copy_to_user(buffer,
4072                                   ai_context->circ_buf.buf +
4073                                   ai_context->circ_buf.tail, k);
4074                 c = k / 2;
4075                 if (!c) {
4076                         printk(KERN_ERR
4077                                "ME4000:me4000_ai_read():Cannot copy new values to user\n");
4078                         return -EFAULT;
4079                 }
4080
4081                 ai_context->circ_buf.tail =
4082                     (ai_context->circ_buf.tail + c) & (ME4000_AI_BUFFER_COUNT -
4083                                                        1);
4084                 buffer += c;
4085                 count -= c;
4086                 ret += c;
4087
4088                 spin_lock_irqsave(&ai_context->int_lock, flags);
4089                 if (me4000_buf_space
4090                     (ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
4091                         tmp = me4000_inl(ai_context->ctrl_reg);
4092
4093                         /* Determine interrupt setup */
4094                         if (ai_context->sample_counter
4095                             && !ai_context->sample_counter_reload) {
4096                                 /* Enable Half Full Interrupt and Sample Counter Interrupt */
4097                                 tmp |=
4098                                     ME4000_AI_CTRL_BIT_SC_IRQ |
4099                                     ME4000_AI_CTRL_BIT_HF_IRQ;
4100                         } else if (ai_context->sample_counter
4101                                    && ai_context->sample_counter_reload) {
4102                                 if (ai_context->sample_counter <
4103                                     ME4000_AI_FIFO_COUNT / 2) {
4104                                         /* Enable only Sample Counter Interrupt */
4105                                         tmp |= ME4000_AI_CTRL_BIT_SC_IRQ;
4106                                 } else {
4107                                         /* Enable Half Full Interrupt and Sample Counter Interrupt */
4108                                         tmp |=
4109                                             ME4000_AI_CTRL_BIT_SC_IRQ |
4110                                             ME4000_AI_CTRL_BIT_HF_IRQ;
4111                                 }
4112                         } else {
4113                                 /* Enable only Half Full Interrupt */
4114                                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
4115                         }
4116
4117                         me4000_outl(tmp, ai_context->ctrl_reg);
4118                 }
4119                 spin_unlock_irqrestore(&ai_context->int_lock, flags);
4120         }
4121
4122         /* Check if conversion is still running */
4123         if (!(me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM)) {
4124                 printk(KERN_ERR
4125                        "ME4000:me4000_ai_read():Conversion not running after complete read\n");
4126                 return -EPIPE;
4127         }
4128
4129         if (filep->f_flags & O_NONBLOCK) {
4130                 return (k == 0) ? -EAGAIN : 2 * ret;
4131         }
4132
4133         CALL_PDEBUG("me4000_ai_read() is leaved\n");
4134         return ret * 2;
4135 }
4136
4137 static unsigned int me4000_ai_poll(struct file *file_p, poll_table *wait)
4138 {
4139         struct me4000_ai_context *ai_context;
4140         unsigned long mask = 0;
4141
4142         CALL_PDEBUG("me4000_ai_poll() is executed\n");
4143
4144         ai_context = file_p->private_data;
4145
4146         /* Register wait queue */
4147         poll_wait(file_p, &ai_context->wait_queue, wait);
4148
4149         /* Get available values */
4150         if (me4000_values_to_end(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT))
4151                 mask |= POLLIN | POLLRDNORM;
4152
4153         PDEBUG("me4000_ai_poll():Return mask %lX\n", mask);
4154
4155         return mask;
4156 }
4157
4158 static int me4000_ai_offset_enable(struct me4000_ai_context *ai_context)
4159 {
4160         unsigned long tmp;
4161
4162         CALL_PDEBUG("me4000_ai_offset_enable() is executed\n");
4163
4164         tmp = me4000_inl(ai_context->ctrl_reg);
4165         tmp |= ME4000_AI_CTRL_BIT_OFFSET;
4166         me4000_outl(tmp, ai_context->ctrl_reg);
4167
4168         return 0;
4169 }
4170
4171 static int me4000_ai_offset_disable(struct me4000_ai_context *ai_context)
4172 {
4173         unsigned long tmp;
4174
4175         CALL_PDEBUG("me4000_ai_offset_disable() is executed\n");
4176
4177         tmp = me4000_inl(ai_context->ctrl_reg);
4178         tmp &= ~ME4000_AI_CTRL_BIT_OFFSET;
4179         me4000_outl(tmp, ai_context->ctrl_reg);
4180
4181         return 0;
4182 }
4183
4184 static int me4000_ai_fullscale_enable(struct me4000_ai_context *ai_context)
4185 {
4186         unsigned long tmp;
4187
4188         CALL_PDEBUG("me4000_ai_fullscale_enable() is executed\n");
4189
4190         tmp = me4000_inl(ai_context->ctrl_reg);
4191         tmp |= ME4000_AI_CTRL_BIT_FULLSCALE;
4192         me4000_outl(tmp, ai_context->ctrl_reg);
4193
4194         return 0;
4195 }
4196
4197 static int me4000_ai_fullscale_disable(struct me4000_ai_context *ai_context)
4198 {
4199         unsigned long tmp;
4200
4201         CALL_PDEBUG("me4000_ai_fullscale_disable() is executed\n");
4202
4203         tmp = me4000_inl(ai_context->ctrl_reg);
4204         tmp &= ~ME4000_AI_CTRL_BIT_FULLSCALE;
4205         me4000_outl(tmp, ai_context->ctrl_reg);
4206
4207         return 0;
4208 }
4209
4210 static int me4000_ai_fsm_state(int *arg, struct me4000_ai_context *ai_context)
4211 {
4212         unsigned long tmp;
4213
4214         CALL_PDEBUG("me4000_ai_fsm_state() is executed\n");
4215
4216         tmp =
4217             (me4000_inl(ai_context->status_reg) & ME4000_AI_STATUS_BIT_FSM) ? 1
4218             : 0;
4219
4220         if (put_user(tmp, arg)) {
4221                 printk(KERN_ERR "me4000_ai_fsm_state():Cannot copy to user\n");
4222                 return -EFAULT;
4223         }
4224
4225         return 0;
4226 }
4227
4228 static int me4000_ai_get_count_buffer(unsigned long *arg,
4229                                       struct me4000_ai_context *ai_context)
4230 {
4231         unsigned long c;
4232         int err;
4233
4234         c = me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT);
4235
4236         err = copy_to_user(arg, &c, sizeof(unsigned long));
4237         if (err) {
4238                 printk(KERN_ERR
4239                        "%s:Can't copy to user space\n", __func__);
4240                 return -EFAULT;
4241         }
4242
4243         return 0;
4244 }
4245
4246 /*---------------------------------- EEPROM stuff ---------------------------*/
4247
4248 static int eeprom_write_cmd(struct me4000_ai_context *ai_context, unsigned long cmd,
4249                             int length)
4250 {
4251         int i;
4252         unsigned long value;
4253
4254         CALL_PDEBUG("eeprom_write_cmd() is executed\n");
4255
4256         PDEBUG("eeprom_write_cmd():Write command 0x%08lX with length = %d\n",
4257                cmd, length);
4258
4259         /* Get the ICR register and clear the related bits */
4260         value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4261         value &= ~(PLX_ICR_MASK_EEPROM);
4262         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4263
4264         /* Raise the chip select */
4265         value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4266         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4267         udelay(EEPROM_DELAY);
4268
4269         for (i = 0; i < length; i++) {
4270                 if (cmd & ((0x1 << (length - 1)) >> i)) {
4271                         value |= PLX_ICR_BIT_EEPROM_WRITE;
4272                 } else {
4273                         value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4274                 }
4275
4276                 /* Write to EEPROM */
4277                 me4000_outl(value,
4278                             ai_context->board_info->plx_regbase + PLX_ICR);
4279                 udelay(EEPROM_DELAY);
4280
4281                 /* Raising edge of the clock */
4282                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4283                 me4000_outl(value,
4284                             ai_context->board_info->plx_regbase + PLX_ICR);
4285                 udelay(EEPROM_DELAY);
4286
4287                 /* Falling edge of the clock */
4288                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4289                 me4000_outl(value,
4290                             ai_context->board_info->plx_regbase + PLX_ICR);
4291                 udelay(EEPROM_DELAY);
4292         }
4293
4294         /* Clear the chip select */
4295         value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4296         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4297         udelay(EEPROM_DELAY);
4298
4299         /* Wait until hardware is ready for sure */
4300         mdelay(10);
4301
4302         return 0;
4303 }
4304
4305 static unsigned short eeprom_read_cmd(struct me4000_ai_context *ai_context,
4306                                       unsigned long cmd, int length)
4307 {
4308         int i;
4309         unsigned long value;
4310         unsigned short id = 0;
4311
4312         CALL_PDEBUG("eeprom_read_cmd() is executed\n");
4313
4314         PDEBUG("eeprom_read_cmd():Read command 0x%08lX with length = %d\n", cmd,
4315                length);
4316
4317         /* Get the ICR register and clear the related bits */
4318         value = me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR);
4319         value &= ~(PLX_ICR_MASK_EEPROM);
4320
4321         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4322
4323         /* Raise the chip select */
4324         value |= PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4325         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4326         udelay(EEPROM_DELAY);
4327
4328         /* Write the read command to the eeprom */
4329         for (i = 0; i < length; i++) {
4330                 if (cmd & ((0x1 << (length - 1)) >> i)) {
4331                         value |= PLX_ICR_BIT_EEPROM_WRITE;
4332                 } else {
4333                         value &= ~PLX_ICR_BIT_EEPROM_WRITE;
4334                 }
4335                 me4000_outl(value,
4336                             ai_context->board_info->plx_regbase + PLX_ICR);
4337                 udelay(EEPROM_DELAY);
4338
4339                 /* Raising edge of the clock */
4340                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4341                 me4000_outl(value,
4342                             ai_context->board_info->plx_regbase + PLX_ICR);
4343                 udelay(EEPROM_DELAY);
4344
4345                 /* Falling edge of the clock */
4346                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4347                 me4000_outl(value,
4348                             ai_context->board_info->plx_regbase + PLX_ICR);
4349                 udelay(EEPROM_DELAY);
4350         }
4351
4352         /* Read the value from the eeprom */
4353         for (i = 0; i < 16; i++) {
4354                 /* Raising edge of the clock */
4355                 value |= PLX_ICR_BIT_EEPROM_CLOCK_SET;
4356                 me4000_outl(value,
4357                             ai_context->board_info->plx_regbase + PLX_ICR);
4358                 udelay(EEPROM_DELAY);
4359
4360                 if (me4000_inl(ai_context->board_info->plx_regbase + PLX_ICR) &
4361                     PLX_ICR_BIT_EEPROM_READ) {
4362                         id |= (0x8000 >> i);
4363                         PDEBUG("eeprom_read_cmd():OR with 0x%04X\n",
4364                                (0x8000 >> i));
4365                 } else {
4366                         PDEBUG("eeprom_read_cmd():Dont't OR\n");
4367                 }
4368
4369                 /* Falling edge of the clock */
4370                 value &= ~PLX_ICR_BIT_EEPROM_CLOCK_SET;
4371                 me4000_outl(value,
4372                             ai_context->board_info->plx_regbase + PLX_ICR);
4373                 udelay(EEPROM_DELAY);
4374         }
4375
4376         /* Clear the chip select */
4377         value &= ~PLX_ICR_BIT_EEPROM_CHIP_SELECT;
4378         me4000_outl(value, ai_context->board_info->plx_regbase + PLX_ICR);
4379         udelay(EEPROM_DELAY);
4380
4381         return id;
4382 }
4383
4384 static int me4000_eeprom_write(struct me4000_eeprom *arg,
4385                                struct me4000_ai_context *ai_context)
4386 {
4387         int err;
4388         struct me4000_eeprom setup;
4389         unsigned long cmd;
4390         unsigned long date_high;
4391         unsigned long date_low;
4392
4393         CALL_PDEBUG("me4000_eeprom_write() is executed\n");
4394
4395         err = copy_from_user(&setup, arg, sizeof(setup));
4396         if (err) {
4397                 printk(KERN_ERR
4398                        "ME4000:me4000_eeprom_write():Cannot copy from user\n");
4399                 return err;
4400         }
4401
4402         /* Enable writing */
4403         eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_ENABLE,
4404                          ME4000_EEPROM_CMD_LENGTH_WRITE_ENABLE);
4405
4406         /* Command for date */
4407         date_high = (setup.date & 0xFFFF0000) >> 16;
4408         date_low = (setup.date & 0x0000FFFF);
4409
4410         cmd =
4411             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_HIGH <<
4412                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4413                                                                      (unsigned
4414                                                                       long)
4415                                                                      date_high);
4416         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4417         if (err)
4418                 return err;
4419
4420         cmd =
4421             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_DATE_LOW <<
4422                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4423                                                                      (unsigned
4424                                                                       long)
4425                                                                      date_low);
4426         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4427         if (err)
4428                 return err;
4429
4430         /* Command for unipolar 10V offset */
4431         cmd =
4432             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET <<
4433                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4434                                                                      (unsigned
4435                                                                       long)
4436                                                                      setup.
4437                                                                      uni_10_offset);
4438         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4439         if (err)
4440                 return err;
4441
4442         /* Command for unipolar 10V fullscale */
4443         cmd =
4444             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE <<
4445                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4446                                                                      (unsigned
4447                                                                       long)
4448                                                                      setup.
4449                                                                      uni_10_fullscale);
4450         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4451         if (err)
4452                 return err;
4453
4454         /* Command for unipolar 2,5V offset */
4455         cmd =
4456             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET <<
4457                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4458                                                                      (unsigned
4459                                                                       long)
4460                                                                      setup.
4461                                                                      uni_2_5_offset);
4462         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4463         if (err)
4464                 return err;
4465
4466         /* Command for unipolar 2,5V fullscale */
4467         cmd =
4468             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE <<
4469                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4470                                                                      (unsigned
4471                                                                       long)
4472                                                                      setup.
4473                                                                      uni_2_5_fullscale);
4474         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4475         if (err)
4476                 return err;
4477
4478         /* Command for bipolar 10V offset */
4479         cmd =
4480             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET <<
4481                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4482                                                                      (unsigned
4483                                                                       long)
4484                                                                      setup.
4485                                                                      bi_10_offset);
4486         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4487         if (err)
4488                 return err;
4489
4490         /* Command for bipolar 10V fullscale */
4491         cmd =
4492             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE <<
4493                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4494                                                                      (unsigned
4495                                                                       long)
4496                                                                      setup.
4497                                                                      bi_10_fullscale);
4498         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4499         if (err)
4500                 return err;
4501
4502         /* Command for bipolar 2,5V offset */
4503         cmd =
4504             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET <<
4505                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4506                                                                      (unsigned
4507                                                                       long)
4508                                                                      setup.
4509                                                                      bi_2_5_offset);
4510         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4511         if (err)
4512                 return err;
4513
4514         /* Command for bipolar 2,5V fullscale */
4515         cmd =
4516             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE <<
4517                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4518                                                                      (unsigned
4519                                                                       long)
4520                                                                      setup.
4521                                                                      bi_2_5_fullscale);
4522         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4523         if (err)
4524                 return err;
4525
4526         /* Command for differential 10V offset */
4527         cmd =
4528             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET <<
4529                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4530                                                                      (unsigned
4531                                                                       long)
4532                                                                      setup.
4533                                                                      diff_10_offset);
4534         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4535         if (err)
4536                 return err;
4537
4538         /* Command for differential 10V fullscale */
4539         cmd =
4540             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE
4541                                        << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4542                                                                         (unsigned
4543                                                                          long)
4544                                                                         setup.
4545                                                                         diff_10_fullscale);
4546         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4547         if (err)
4548                 return err;
4549
4550         /* Command for differential 2,5V offset */
4551         cmd =
4552             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET <<
4553                                        ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4554                                                                      (unsigned
4555                                                                       long)
4556                                                                      setup.
4557                                                                      diff_2_5_offset);
4558         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4559         if (err)
4560                 return err;
4561
4562         /* Command for differential 2,5V fullscale */
4563         cmd =
4564             ME4000_EEPROM_CMD_WRITE | (ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE
4565                                        << ME4000_EEPROM_DATA_LENGTH) | (0xFFFF &
4566                                                                         (unsigned
4567                                                                          long)
4568                                                                         setup.
4569                                                                         diff_2_5_fullscale);
4570         err = eeprom_write_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_WRITE);
4571         if (err)
4572                 return err;
4573
4574         /* Disable writing */
4575         eeprom_write_cmd(ai_context, ME4000_EEPROM_CMD_WRITE_DISABLE,
4576                          ME4000_EEPROM_CMD_LENGTH_WRITE_DISABLE);
4577
4578         return 0;
4579 }
4580
4581 static int me4000_eeprom_read(struct me4000_eeprom *arg,
4582                               struct me4000_ai_context *ai_context)
4583 {
4584         int err;
4585         unsigned long cmd;
4586         struct me4000_eeprom setup;
4587
4588         CALL_PDEBUG("me4000_eeprom_read() is executed\n");
4589
4590         /* Command for date */
4591         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_HIGH;
4592         setup.date =
4593             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4594         setup.date <<= 16;
4595         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_DATE_LOW;
4596         setup.date |=
4597             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4598
4599         /* Command for unipolar 10V offset */
4600         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_OFFSET;
4601         setup.uni_10_offset =
4602             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4603
4604         /* Command for unipolar 10V fullscale */
4605         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_UNI_FULLSCALE;
4606         setup.uni_10_fullscale =
4607             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4608
4609         /* Command for unipolar 2,5V offset */
4610         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_OFFSET;
4611         setup.uni_2_5_offset =
4612             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4613
4614         /* Command for unipolar 2,5V fullscale */
4615         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_UNI_FULLSCALE;
4616         setup.uni_2_5_fullscale =
4617             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4618
4619         /* Command for bipolar 10V offset */
4620         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_OFFSET;
4621         setup.bi_10_offset =
4622             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4623
4624         /* Command for bipolar 10V fullscale */
4625         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_BI_FULLSCALE;
4626         setup.bi_10_fullscale =
4627             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4628
4629         /* Command for bipolar 2,5V offset */
4630         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_OFFSET;
4631         setup.bi_2_5_offset =
4632             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4633
4634         /* Command for bipolar 2,5V fullscale */
4635         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_BI_FULLSCALE;
4636         setup.bi_2_5_fullscale =
4637             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4638
4639         /* Command for differntial 10V offset */
4640         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_OFFSET;
4641         setup.diff_10_offset =
4642             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4643
4644         /* Command for differential 10V fullscale */
4645         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_1_DIFF_FULLSCALE;
4646         setup.diff_10_fullscale =
4647             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4648
4649         /* Command for differntial 2,5V offset */
4650         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_OFFSET;
4651         setup.diff_2_5_offset =
4652             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4653
4654         /* Command for differential 2,5V fullscale */
4655         cmd = ME4000_EEPROM_CMD_READ | ME4000_EEPROM_ADR_GAIN_4_DIFF_FULLSCALE;
4656         setup.diff_2_5_fullscale =
4657             eeprom_read_cmd(ai_context, cmd, ME4000_EEPROM_CMD_LENGTH_READ);
4658
4659         err = copy_to_user(arg, &setup, sizeof(setup));
4660         if (err) {
4661                 printk(KERN_ERR
4662                        "ME4000:me4000_eeprom_read():Cannot copy to user\n");
4663                 return err;
4664         }
4665
4666         return 0;
4667 }
4668
4669 /*------------------------------------ DIO stuff ----------------------------------------------*/
4670
4671 static int me4000_dio_ioctl(struct inode *inode_p, struct file *file_p,
4672                             unsigned int service, unsigned long arg)
4673 {
4674         struct me4000_dio_context *dio_context;
4675
4676         CALL_PDEBUG("me4000_dio_ioctl() is executed\n");
4677
4678         dio_context = file_p->private_data;
4679
4680         if (_IOC_TYPE(service) != ME4000_MAGIC) {
4681                 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
4682                 return -ENOTTY;
4683         }
4684         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
4685                 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
4686                 return -ENOTTY;
4687         }
4688
4689         switch (service) {
4690         case ME4000_DIO_CONFIG:
4691                 return me4000_dio_config((struct me4000_dio_config *)arg,
4692                                          dio_context);
4693         case ME4000_DIO_SET_BYTE:
4694                 return me4000_dio_set_byte((struct me4000_dio_byte *)arg,
4695                                            dio_context);
4696         case ME4000_DIO_GET_BYTE:
4697                 return me4000_dio_get_byte((struct me4000_dio_byte *)arg,
4698                                            dio_context);
4699         case ME4000_DIO_RESET:
4700                 return me4000_dio_reset(dio_context);
4701         default:
4702                 printk(KERN_ERR
4703                        "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
4704                        service);
4705                 return -ENOTTY;
4706         }
4707         return 0;
4708 }
4709
4710 static int me4000_dio_config(struct me4000_dio_config *arg,
4711                              struct me4000_dio_context *dio_context)
4712 {
4713         struct me4000_dio_config cmd;
4714         u32 tmp;
4715         int err;
4716
4717         CALL_PDEBUG("me4000_dio_config() is executed\n");
4718
4719         /* Copy data from user */
4720         err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_config));
4721         if (err) {
4722                 printk(KERN_ERR
4723                        "ME4000:me4000_dio_config():Can't copy from user space\n");
4724                 return -EFAULT;
4725         }
4726
4727         /* Check port parameter */
4728         if (cmd.port >= dio_context->dio_count) {
4729                 printk(KERN_ERR
4730                        "ME4000:me4000_dio_config():Port %d is not available\n",
4731                        cmd.port);
4732                 return -EINVAL;
4733         }
4734
4735         PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4736                cmd.mode, cmd.function);
4737
4738         if (cmd.port == ME4000_DIO_PORT_A) {
4739                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4740                         /* Check if opto isolated version */
4741                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4742                                 printk(KERN_ERR
4743                                        "ME4000:me4000_dio_config():Cannot set to input on opto isolated versions\n");
4744                                 return -EIO;
4745                         }
4746
4747                         tmp = me4000_inl(dio_context->ctrl_reg);
4748                         tmp &=
4749                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4750                               ME4000_DIO_CTRL_BIT_MODE_1);
4751                         me4000_outl(tmp, dio_context->ctrl_reg);
4752                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4753                         tmp = me4000_inl(dio_context->ctrl_reg);
4754                         tmp &=
4755                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4756                               ME4000_DIO_CTRL_BIT_MODE_1);
4757                         tmp |= ME4000_DIO_CTRL_BIT_MODE_0;
4758                         me4000_outl(tmp, dio_context->ctrl_reg);
4759                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4760                         tmp = me4000_inl(dio_context->ctrl_reg);
4761                         tmp &=
4762                             ~(ME4000_DIO_CTRL_BIT_MODE_0 |
4763                               ME4000_DIO_CTRL_BIT_MODE_1 |
4764                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_0);
4765                         tmp |=
4766                             ME4000_DIO_CTRL_BIT_MODE_0 |
4767                             ME4000_DIO_CTRL_BIT_MODE_1;
4768                         me4000_outl(tmp, dio_context->ctrl_reg);
4769                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4770                         tmp = me4000_inl(dio_context->ctrl_reg);
4771                         tmp |=
4772                             ME4000_DIO_CTRL_BIT_MODE_0 |
4773                             ME4000_DIO_CTRL_BIT_MODE_1 |
4774                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_0;
4775                         me4000_outl(tmp, dio_context->ctrl_reg);
4776                 } else {
4777                         printk(KERN_ERR
4778                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4779                                cmd.mode);
4780                         return -EINVAL;
4781                 }
4782         } else if (cmd.port == ME4000_DIO_PORT_B) {
4783                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4784                         /* Only do anything when TTL version is installed */
4785                         if ((me4000_inl(dio_context->dir_reg) & 0x1)) {
4786                                 tmp = me4000_inl(dio_context->ctrl_reg);
4787                                 tmp &=
4788                                     ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4789                                       ME4000_DIO_CTRL_BIT_MODE_3);
4790                                 me4000_outl(tmp, dio_context->ctrl_reg);
4791                         }
4792                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4793                         /* Check if opto isolated version */
4794                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4795                                 printk(KERN_ERR
4796                                        "ME4000:me4000_dio_config():Cannot set to output on opto isolated versions\n");
4797                                 return -EIO;
4798                         }
4799
4800                         tmp = me4000_inl(dio_context->ctrl_reg);
4801                         tmp &=
4802                             ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4803                               ME4000_DIO_CTRL_BIT_MODE_3);
4804                         tmp |= ME4000_DIO_CTRL_BIT_MODE_2;
4805                         me4000_outl(tmp, dio_context->ctrl_reg);
4806                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4807                         /* Check if opto isolated version */
4808                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4809                                 printk(KERN_ERR
4810                                        "ME4000:me4000_dio_config():Cannot set to FIFO low output on opto isolated versions\n");
4811                                 return -EIO;
4812                         }
4813
4814                         tmp = me4000_inl(dio_context->ctrl_reg);
4815                         tmp &=
4816                             ~(ME4000_DIO_CTRL_BIT_MODE_2 |
4817                               ME4000_DIO_CTRL_BIT_MODE_3 |
4818                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_1);
4819                         tmp |=
4820                             ME4000_DIO_CTRL_BIT_MODE_2 |
4821                             ME4000_DIO_CTRL_BIT_MODE_3;
4822                         me4000_outl(tmp, dio_context->ctrl_reg);
4823                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4824                         /* Check if opto isolated version */
4825                         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
4826                                 printk(KERN_ERR
4827                                        "ME4000:me4000_dio_config():Cannot set to FIFO high output on opto isolated versions\n");
4828                                 return -EIO;
4829                         }
4830
4831                         tmp = me4000_inl(dio_context->ctrl_reg);
4832                         tmp |=
4833                             ME4000_DIO_CTRL_BIT_MODE_2 |
4834                             ME4000_DIO_CTRL_BIT_MODE_3 |
4835                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_1;
4836                         me4000_outl(tmp, dio_context->ctrl_reg);
4837                 } else {
4838                         printk(KERN_ERR
4839                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4840                                cmd.mode);
4841                         return -EINVAL;
4842                 }
4843         } else if (cmd.port == ME4000_DIO_PORT_C) {
4844                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4845                         tmp = me4000_inl(dio_context->ctrl_reg);
4846                         tmp &=
4847                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4848                               ME4000_DIO_CTRL_BIT_MODE_5);
4849                         me4000_outl(tmp, dio_context->ctrl_reg);
4850                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4851                         tmp = me4000_inl(dio_context->ctrl_reg);
4852                         tmp &=
4853                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4854                               ME4000_DIO_CTRL_BIT_MODE_5);
4855                         tmp |= ME4000_DIO_CTRL_BIT_MODE_4;
4856                         me4000_outl(tmp, dio_context->ctrl_reg);
4857                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4858                         tmp = me4000_inl(dio_context->ctrl_reg);
4859                         tmp &=
4860                             ~(ME4000_DIO_CTRL_BIT_MODE_4 |
4861                               ME4000_DIO_CTRL_BIT_MODE_5 |
4862                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_2);
4863                         tmp |=
4864                             ME4000_DIO_CTRL_BIT_MODE_4 |
4865                             ME4000_DIO_CTRL_BIT_MODE_5;
4866                         me4000_outl(tmp, dio_context->ctrl_reg);
4867                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4868                         tmp = me4000_inl(dio_context->ctrl_reg);
4869                         tmp |=
4870                             ME4000_DIO_CTRL_BIT_MODE_4 |
4871                             ME4000_DIO_CTRL_BIT_MODE_5 |
4872                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_2;
4873                         me4000_outl(tmp, dio_context->ctrl_reg);
4874                 } else {
4875                         printk(KERN_ERR
4876                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4877                                cmd.mode);
4878                         return -EINVAL;
4879                 }
4880         } else if (cmd.port == ME4000_DIO_PORT_D) {
4881                 if (cmd.mode == ME4000_DIO_PORT_INPUT) {
4882                         tmp = me4000_inl(dio_context->ctrl_reg);
4883                         tmp &=
4884                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4885                               ME4000_DIO_CTRL_BIT_MODE_7);
4886                         me4000_outl(tmp, dio_context->ctrl_reg);
4887                 } else if (cmd.mode == ME4000_DIO_PORT_OUTPUT) {
4888                         tmp = me4000_inl(dio_context->ctrl_reg);
4889                         tmp &=
4890                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4891                               ME4000_DIO_CTRL_BIT_MODE_7);
4892                         tmp |= ME4000_DIO_CTRL_BIT_MODE_6;
4893                         me4000_outl(tmp, dio_context->ctrl_reg);
4894                 } else if (cmd.mode == ME4000_DIO_FIFO_LOW) {
4895                         tmp = me4000_inl(dio_context->ctrl_reg);
4896                         tmp &=
4897                             ~(ME4000_DIO_CTRL_BIT_MODE_6 |
4898                               ME4000_DIO_CTRL_BIT_MODE_7 |
4899                               ME4000_DIO_CTRL_BIT_FIFO_HIGH_3);
4900                         tmp |=
4901                             ME4000_DIO_CTRL_BIT_MODE_6 |
4902                             ME4000_DIO_CTRL_BIT_MODE_7;
4903                         me4000_outl(tmp, dio_context->ctrl_reg);
4904                 } else if (cmd.mode == ME4000_DIO_FIFO_HIGH) {
4905                         tmp = me4000_inl(dio_context->ctrl_reg);
4906                         tmp |=
4907                             ME4000_DIO_CTRL_BIT_MODE_6 |
4908                             ME4000_DIO_CTRL_BIT_MODE_7 |
4909                             ME4000_DIO_CTRL_BIT_FIFO_HIGH_3;
4910                         me4000_outl(tmp, dio_context->ctrl_reg);
4911                 } else {
4912                         printk(KERN_ERR
4913                                "ME4000:me4000_dio_config():Mode %d is not available\n",
4914                                cmd.mode);
4915                         return -EINVAL;
4916                 }
4917         } else {
4918                 printk(KERN_ERR
4919                        "ME4000:me4000_dio_config():Port %d is not available\n",
4920                        cmd.port);
4921                 return -EINVAL;
4922         }
4923
4924         PDEBUG("me4000_dio_config(): port %d, mode %d, function %d\n", cmd.port,
4925                cmd.mode, cmd.function);
4926
4927         if ((cmd.mode == ME4000_DIO_FIFO_HIGH)
4928             || (cmd.mode == ME4000_DIO_FIFO_LOW)) {
4929                 tmp = me4000_inl(dio_context->ctrl_reg);
4930                 tmp &=
4931                     ~(ME4000_DIO_CTRL_BIT_FUNCTION_0 |
4932                       ME4000_DIO_CTRL_BIT_FUNCTION_1);
4933                 if (cmd.function == ME4000_DIO_FUNCTION_PATTERN) {
4934                         me4000_outl(tmp, dio_context->ctrl_reg);
4935                 } else if (cmd.function == ME4000_DIO_FUNCTION_DEMUX) {
4936                         tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_0;
4937                         me4000_outl(tmp, dio_context->ctrl_reg);
4938                 } else if (cmd.function == ME4000_DIO_FUNCTION_MUX) {
4939                         tmp |= ME4000_DIO_CTRL_BIT_FUNCTION_1;
4940                         me4000_outl(tmp, dio_context->ctrl_reg);
4941                 } else {
4942                         printk(KERN_ERR
4943                                "ME4000:me4000_dio_config():Invalid port function specified\n");
4944                         return -EINVAL;
4945                 }
4946         }
4947
4948         return 0;
4949 }
4950
4951 static int me4000_dio_set_byte(struct me4000_dio_byte *arg,
4952                                struct me4000_dio_context *dio_context)
4953 {
4954         struct me4000_dio_byte cmd;
4955         int err;
4956
4957         CALL_PDEBUG("me4000_dio_set_byte() is executed\n");
4958
4959         /* Copy data from user */
4960         err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
4961         if (err) {
4962                 printk(KERN_ERR
4963                        "ME4000:me4000_dio_set_byte():Can't copy from user space\n");
4964                 return -EFAULT;
4965         }
4966
4967         /* Check port parameter */
4968         if (cmd.port >= dio_context->dio_count) {
4969                 printk(KERN_ERR
4970                        "ME4000:me4000_dio_set_byte():Port %d is not available\n",
4971                        cmd.port);
4972                 return -EINVAL;
4973         }
4974
4975         if (cmd.port == ME4000_DIO_PORT_A) {
4976                 if ((me4000_inl(dio_context->ctrl_reg) & 0x3) != 0x1) {
4977                         printk(KERN_ERR
4978                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4979                                cmd.port);
4980                         return -EIO;
4981                 }
4982                 me4000_outl(cmd.byte, dio_context->port_0_reg);
4983         } else if (cmd.port == ME4000_DIO_PORT_B) {
4984                 if ((me4000_inl(dio_context->ctrl_reg) & 0xC) != 0x4) {
4985                         printk(KERN_ERR
4986                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4987                                cmd.port);
4988                         return -EIO;
4989                 }
4990                 me4000_outl(cmd.byte, dio_context->port_1_reg);
4991         } else if (cmd.port == ME4000_DIO_PORT_C) {
4992                 if ((me4000_inl(dio_context->ctrl_reg) & 0x30) != 0x10) {
4993                         printk(KERN_ERR
4994                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
4995                                cmd.port);
4996                         return -EIO;
4997                 }
4998                 me4000_outl(cmd.byte, dio_context->port_2_reg);
4999         } else if (cmd.port == ME4000_DIO_PORT_D) {
5000                 if ((me4000_inl(dio_context->ctrl_reg) & 0xC0) != 0x40) {
5001                         printk(KERN_ERR
5002                                "ME4000:me4000_dio_set_byte():Port %d is not in output mode\n",
5003                                cmd.port);
5004                         return -EIO;
5005                 }
5006                 me4000_outl(cmd.byte, dio_context->port_3_reg);
5007         } else {
5008                 printk(KERN_ERR
5009                        "ME4000:me4000_dio_set_byte():Port %d is not available\n",
5010                        cmd.port);
5011                 return -EINVAL;
5012         }
5013
5014         return 0;
5015 }
5016
5017 static int me4000_dio_get_byte(struct me4000_dio_byte *arg,
5018                                struct me4000_dio_context *dio_context)
5019 {
5020         struct me4000_dio_byte cmd;
5021         int err;
5022
5023         CALL_PDEBUG("me4000_dio_get_byte() is executed\n");
5024
5025         /* Copy data from user */
5026         err = copy_from_user(&cmd, arg, sizeof(struct me4000_dio_byte));
5027         if (err) {
5028                 printk(KERN_ERR
5029                        "ME4000:me4000_dio_get_byte():Can't copy from user space\n");
5030                 return -EFAULT;
5031         }
5032
5033         /* Check port parameter */
5034         if (cmd.port >= dio_context->dio_count) {
5035                 printk(KERN_ERR
5036                        "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5037                        cmd.port);
5038                 return -EINVAL;
5039         }
5040
5041         if (cmd.port == ME4000_DIO_PORT_A) {
5042                 cmd.byte = me4000_inl(dio_context->port_0_reg) & 0xFF;
5043         } else if (cmd.port == ME4000_DIO_PORT_B) {
5044                 cmd.byte = me4000_inl(dio_context->port_1_reg) & 0xFF;
5045         } else if (cmd.port == ME4000_DIO_PORT_C) {
5046                 cmd.byte = me4000_inl(dio_context->port_2_reg) & 0xFF;
5047         } else if (cmd.port == ME4000_DIO_PORT_D) {
5048                 cmd.byte = me4000_inl(dio_context->port_3_reg) & 0xFF;
5049         } else {
5050                 printk(KERN_ERR
5051                        "ME4000:me4000_dio_get_byte():Port %d is not available\n",
5052                        cmd.port);
5053                 return -EINVAL;
5054         }
5055
5056         /* Copy result back to user */
5057         err = copy_to_user(arg, &cmd, sizeof(struct me4000_dio_byte));
5058         if (err) {
5059                 printk(KERN_ERR
5060                        "ME4000:me4000_dio_get_byte():Can't copy to user space\n");
5061                 return -EFAULT;
5062         }
5063
5064         return 0;
5065 }
5066
5067 static int me4000_dio_reset(struct me4000_dio_context *dio_context)
5068 {
5069         CALL_PDEBUG("me4000_dio_reset() is executed\n");
5070
5071         /* Clear the control register */
5072         me4000_outl(0, dio_context->ctrl_reg);
5073
5074         /* Check for opto isolated version */
5075         if (!(me4000_inl(dio_context->dir_reg) & 0x1)) {
5076                 me4000_outl(0x1, dio_context->ctrl_reg);
5077                 me4000_outl(0x0, dio_context->port_0_reg);
5078         }
5079
5080         return 0;
5081 }
5082
5083 /*------------------------------------ COUNTER STUFF ------------------------------------*/
5084
5085 static int me4000_cnt_ioctl(struct inode *inode_p, struct file *file_p,
5086                             unsigned int service, unsigned long arg)
5087 {
5088         struct me4000_cnt_context *cnt_context;
5089
5090         CALL_PDEBUG("me4000_cnt_ioctl() is executed\n");
5091
5092         cnt_context = file_p->private_data;
5093
5094         if (_IOC_TYPE(service) != ME4000_MAGIC) {
5095                 printk(KERN_ERR "me4000_dio_ioctl():Wrong magic number\n");
5096                 return -ENOTTY;
5097         }
5098         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5099                 printk(KERN_ERR "me4000_dio_ioctl():Service number to high\n");
5100                 return -ENOTTY;
5101         }
5102
5103         switch (service) {
5104         case ME4000_CNT_READ:
5105                 return me4000_cnt_read((struct me4000_cnt *)arg, cnt_context);
5106         case ME4000_CNT_WRITE:
5107                 return me4000_cnt_write((struct me4000_cnt *)arg, cnt_context);
5108         case ME4000_CNT_CONFIG:
5109                 return me4000_cnt_config((struct me4000_cnt_config *)arg,
5110                                          cnt_context);
5111         case ME4000_CNT_RESET:
5112                 return me4000_cnt_reset(cnt_context);
5113         default:
5114                 printk(KERN_ERR
5115                        "ME4000:me4000_dio_ioctl():Invalid service number %d\n",
5116                        service);
5117                 return -ENOTTY;
5118         }
5119         return 0;
5120 }
5121
5122 static int me4000_cnt_config(struct me4000_cnt_config *arg,
5123                              struct me4000_cnt_context *cnt_context)
5124 {
5125         struct me4000_cnt_config cmd;
5126         u8 counter;
5127         u8 mode;
5128         int err;
5129
5130         CALL_PDEBUG("me4000_cnt_config() is executed\n");
5131
5132         /* Copy data from user */
5133         err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt_config));
5134         if (err) {
5135                 printk(KERN_ERR
5136                        "ME4000:me4000_cnt_config():Can't copy from user space\n");
5137                 return -EFAULT;
5138         }
5139
5140         /* Check counter parameter */
5141         switch (cmd.counter) {
5142         case ME4000_CNT_COUNTER_0:
5143                 counter = ME4000_CNT_CTRL_BIT_COUNTER_0;
5144                 break;
5145         case ME4000_CNT_COUNTER_1:
5146                 counter = ME4000_CNT_CTRL_BIT_COUNTER_1;
5147                 break;
5148         case ME4000_CNT_COUNTER_2:
5149                 counter = ME4000_CNT_CTRL_BIT_COUNTER_2;
5150                 break;
5151         default:
5152                 printk(KERN_ERR
5153                        "ME4000:me4000_cnt_config():Counter %d is not available\n",
5154                        cmd.counter);
5155                 return -EINVAL;
5156         }
5157
5158         /* Check mode parameter */
5159         switch (cmd.mode) {
5160         case ME4000_CNT_MODE_0:
5161                 mode = ME4000_CNT_CTRL_BIT_MODE_0;
5162                 break;
5163         case ME4000_CNT_MODE_1:
5164                 mode = ME4000_CNT_CTRL_BIT_MODE_1;
5165                 break;
5166         case ME4000_CNT_MODE_2:
5167                 mode = ME4000_CNT_CTRL_BIT_MODE_2;
5168                 break;
5169         case ME4000_CNT_MODE_3:
5170                 mode = ME4000_CNT_CTRL_BIT_MODE_3;
5171                 break;
5172         case ME4000_CNT_MODE_4:
5173                 mode = ME4000_CNT_CTRL_BIT_MODE_4;
5174                 break;
5175         case ME4000_CNT_MODE_5:
5176                 mode = ME4000_CNT_CTRL_BIT_MODE_5;
5177                 break;
5178         default:
5179                 printk(KERN_ERR
5180                        "ME4000:me4000_cnt_config():Mode %d is not available\n",
5181                        cmd.mode);
5182                 return -EINVAL;
5183         }
5184
5185         /* Write the control word */
5186         me4000_outb((counter | mode | 0x30), cnt_context->ctrl_reg);
5187
5188         return 0;
5189 }
5190
5191 static int me4000_cnt_read(struct me4000_cnt *arg,
5192                            struct me4000_cnt_context *cnt_context)
5193 {
5194         struct me4000_cnt cmd;
5195         u8 tmp;
5196         int err;
5197
5198         CALL_PDEBUG("me4000_cnt_read() is executed\n");
5199
5200         /* Copy data from user */
5201         err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5202         if (err) {
5203                 printk(KERN_ERR
5204                        "ME4000:me4000_cnt_read():Can't copy from user space\n");
5205                 return -EFAULT;
5206         }
5207
5208         /* Read counter */
5209         switch (cmd.counter) {
5210         case ME4000_CNT_COUNTER_0:
5211                 tmp = me4000_inb(cnt_context->counter_0_reg);
5212                 cmd.value = tmp;
5213                 tmp = me4000_inb(cnt_context->counter_0_reg);
5214                 cmd.value |= ((u16) tmp) << 8;
5215                 break;
5216         case ME4000_CNT_COUNTER_1:
5217                 tmp = me4000_inb(cnt_context->counter_1_reg);
5218                 cmd.value = tmp;
5219                 tmp = me4000_inb(cnt_context->counter_1_reg);
5220                 cmd.value |= ((u16) tmp) << 8;
5221                 break;
5222         case ME4000_CNT_COUNTER_2:
5223                 tmp = me4000_inb(cnt_context->counter_2_reg);
5224                 cmd.value = tmp;
5225                 tmp = me4000_inb(cnt_context->counter_2_reg);
5226                 cmd.value |= ((u16) tmp) << 8;
5227                 break;
5228         default:
5229                 printk(KERN_ERR
5230                        "ME4000:me4000_cnt_read():Counter %d is not available\n",
5231                        cmd.counter);
5232                 return -EINVAL;
5233         }
5234
5235         /* Copy result back to user */
5236         err = copy_to_user(arg, &cmd, sizeof(struct me4000_cnt));
5237         if (err) {
5238                 printk(KERN_ERR
5239                        "ME4000:me4000_cnt_read():Can't copy to user space\n");
5240                 return -EFAULT;
5241         }
5242
5243         return 0;
5244 }
5245
5246 static int me4000_cnt_write(struct me4000_cnt *arg,
5247                             struct me4000_cnt_context *cnt_context)
5248 {
5249         struct me4000_cnt cmd;
5250         u8 tmp;
5251         int err;
5252
5253         CALL_PDEBUG("me4000_cnt_write() is executed\n");
5254
5255         /* Copy data from user */
5256         err = copy_from_user(&cmd, arg, sizeof(struct me4000_cnt));
5257         if (err) {
5258                 printk(KERN_ERR
5259                        "ME4000:me4000_cnt_write():Can't copy from user space\n");
5260                 return -EFAULT;
5261         }
5262
5263         /* Write counter */
5264         switch (cmd.counter) {
5265         case ME4000_CNT_COUNTER_0:
5266                 tmp = cmd.value & 0xFF;
5267                 me4000_outb(tmp, cnt_context->counter_0_reg);
5268                 tmp = (cmd.value >> 8) & 0xFF;
5269                 me4000_outb(tmp, cnt_context->counter_0_reg);
5270                 break;
5271         case ME4000_CNT_COUNTER_1:
5272                 tmp = cmd.value & 0xFF;
5273                 me4000_outb(tmp, cnt_context->counter_1_reg);
5274                 tmp = (cmd.value >> 8) & 0xFF;
5275                 me4000_outb(tmp, cnt_context->counter_1_reg);
5276                 break;
5277         case ME4000_CNT_COUNTER_2:
5278                 tmp = cmd.value & 0xFF;
5279                 me4000_outb(tmp, cnt_context->counter_2_reg);
5280                 tmp = (cmd.value >> 8) & 0xFF;
5281                 me4000_outb(tmp, cnt_context->counter_2_reg);
5282                 break;
5283         default:
5284                 printk(KERN_ERR
5285                        "ME4000:me4000_cnt_write():Counter %d is not available\n",
5286                        cmd.counter);
5287                 return -EINVAL;
5288         }
5289
5290         return 0;
5291 }
5292
5293 static int me4000_cnt_reset(struct me4000_cnt_context *cnt_context)
5294 {
5295         CALL_PDEBUG("me4000_cnt_reset() is executed\n");
5296
5297         /* Set the mode and value for counter 0 */
5298         me4000_outb(0x30, cnt_context->ctrl_reg);
5299         me4000_outb(0x00, cnt_context->counter_0_reg);
5300         me4000_outb(0x00, cnt_context->counter_0_reg);
5301
5302         /* Set the mode and value for counter 1 */
5303         me4000_outb(0x70, cnt_context->ctrl_reg);
5304         me4000_outb(0x00, cnt_context->counter_1_reg);
5305         me4000_outb(0x00, cnt_context->counter_1_reg);
5306
5307         /* Set the mode and value for counter 2 */
5308         me4000_outb(0xB0, cnt_context->ctrl_reg);
5309         me4000_outb(0x00, cnt_context->counter_2_reg);
5310         me4000_outb(0x00, cnt_context->counter_2_reg);
5311
5312         return 0;
5313 }
5314
5315 /*------------------------------------ External Interrupt stuff ------------------------------------*/
5316
5317 static int me4000_ext_int_ioctl(struct inode *inode_p, struct file *file_p,
5318                                 unsigned int service, unsigned long arg)
5319 {
5320         struct me4000_ext_int_context *ext_int_context;
5321
5322         CALL_PDEBUG("me4000_ext_int_ioctl() is executed\n");
5323
5324         ext_int_context = file_p->private_data;
5325
5326         if (_IOC_TYPE(service) != ME4000_MAGIC) {
5327                 printk(KERN_ERR "me4000_ext_int_ioctl():Wrong magic number\n");
5328                 return -ENOTTY;
5329         }
5330         if (_IOC_NR(service) > ME4000_IOCTL_MAXNR) {
5331                 printk(KERN_ERR
5332                        "me4000_ext_int_ioctl():Service number to high\n");
5333                 return -ENOTTY;
5334         }
5335
5336         switch (service) {
5337         case ME4000_EXT_INT_ENABLE:
5338                 return me4000_ext_int_enable(ext_int_context);
5339         case ME4000_EXT_INT_DISABLE:
5340                 return me4000_ext_int_disable(ext_int_context);
5341         case ME4000_EXT_INT_COUNT:
5342                 return me4000_ext_int_count((unsigned long *)arg,
5343                                             ext_int_context);
5344         default:
5345                 printk(KERN_ERR
5346                        "ME4000:me4000_ext_int_ioctl():Invalid service number %d\n",
5347                        service);
5348                 return -ENOTTY;
5349         }
5350         return 0;
5351 }
5352
5353 static int me4000_ext_int_enable(struct me4000_ext_int_context *ext_int_context)
5354 {
5355         unsigned long tmp;
5356
5357         CALL_PDEBUG("me4000_ext_int_enable() is executed\n");
5358
5359         tmp = me4000_inl(ext_int_context->ctrl_reg);
5360         tmp |= ME4000_AI_CTRL_BIT_EX_IRQ;
5361         me4000_outl(tmp, ext_int_context->ctrl_reg);
5362
5363         return 0;
5364 }
5365
5366 static int me4000_ext_int_disable(struct me4000_ext_int_context *ext_int_context)
5367 {
5368         unsigned long tmp;
5369
5370         CALL_PDEBUG("me4000_ext_int_disable() is executed\n");
5371
5372         tmp = me4000_inl(ext_int_context->ctrl_reg);
5373         tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ;
5374         me4000_outl(tmp, ext_int_context->ctrl_reg);
5375
5376         return 0;
5377 }
5378
5379 static int me4000_ext_int_count(unsigned long *arg,
5380                                 struct me4000_ext_int_context *ext_int_context)
5381 {
5382
5383         CALL_PDEBUG("me4000_ext_int_count() is executed\n");
5384
5385         put_user(ext_int_context->int_count, arg);
5386         return 0;
5387 }
5388
5389 /*------------------------------------ General stuff ------------------------------------*/
5390
5391 static int me4000_get_user_info(struct me4000_user_info *arg,
5392                                 struct me4000_info *board_info)
5393 {
5394         struct me4000_user_info user_info;
5395
5396         CALL_PDEBUG("me4000_get_user_info() is executed\n");
5397
5398         user_info.board_count = board_info->board_count;
5399         user_info.plx_regbase = board_info->plx_regbase;
5400         user_info.plx_regbase_size = board_info->plx_regbase_size;
5401         user_info.me4000_regbase = board_info->me4000_regbase;
5402         user_info.me4000_regbase_size = board_info->me4000_regbase_size;
5403         user_info.serial_no = board_info->serial_no;
5404         user_info.hw_revision = board_info->hw_revision;
5405         user_info.vendor_id = board_info->vendor_id;
5406         user_info.device_id = board_info->device_id;
5407         user_info.pci_bus_no = board_info->pci_bus_no;
5408         user_info.pci_dev_no = board_info->pci_dev_no;
5409         user_info.pci_func_no = board_info->pci_func_no;
5410         user_info.irq = board_info->irq;
5411         user_info.irq_count = board_info->irq_count;
5412         user_info.driver_version = ME4000_DRIVER_VERSION;
5413         user_info.ao_count = board_info->board_p->ao.count;
5414         user_info.ao_fifo_count = board_info->board_p->ao.fifo_count;
5415
5416         user_info.ai_count = board_info->board_p->ai.count;
5417         user_info.ai_sh_count = board_info->board_p->ai.sh_count;
5418         user_info.ai_ex_trig_analog = board_info->board_p->ai.ex_trig_analog;
5419
5420         user_info.dio_count = board_info->board_p->dio.count;
5421
5422         user_info.cnt_count = board_info->board_p->cnt.count;
5423
5424         if (copy_to_user(arg, &user_info, sizeof(struct me4000_user_info)))
5425                 return -EFAULT;
5426
5427         return 0;
5428 }
5429
5430 /*------------------------------------ ISR STUFF ------------------------------------*/
5431
5432 static int me4000_ext_int_fasync(int fd, struct file *file_ptr, int mode)
5433 {
5434         int result = 0;
5435         struct me4000_ext_int_context *ext_int_context;
5436
5437         CALL_PDEBUG("me4000_ext_int_fasync() is executed\n");
5438
5439         ext_int_context = file_ptr->private_data;
5440
5441         result =
5442             fasync_helper(fd, file_ptr, mode, &ext_int_context->fasync_ptr);
5443
5444         CALL_PDEBUG("me4000_ext_int_fasync() is leaved\n");
5445         return result;
5446 }
5447
5448 static irqreturn_t me4000_ao_isr(int irq, void *dev_id)
5449 {
5450         u32 tmp;
5451         u32 value;
5452         struct me4000_ao_context *ao_context;
5453         int i;
5454         int c = 0;
5455         int c1 = 0;
5456         //unsigned long before;
5457         //unsigned long after;
5458
5459         ISR_PDEBUG("me4000_ao_isr() is executed\n");
5460
5461         ao_context = dev_id;
5462
5463         /* Check if irq number is right */
5464         if (irq != ao_context->irq) {
5465                 ISR_PDEBUG("me4000_ao_isr():incorrect interrupt num: %d\n",
5466                            irq);
5467                 return IRQ_NONE;
5468         }
5469
5470         /* Check if this DAC rised an interrupt */
5471         if (!
5472             ((0x1 << (ao_context->index + 3)) &
5473              me4000_inl(ao_context->irq_status_reg))) {
5474                 ISR_PDEBUG("me4000_ao_isr():Not this DAC\n");
5475                 return IRQ_NONE;
5476         }
5477
5478         /* Read status register to find out what happened */
5479         tmp = me4000_inl(ao_context->status_reg);
5480
5481         if (!(tmp & ME4000_AO_STATUS_BIT_EF) && (tmp & ME4000_AO_STATUS_BIT_HF)
5482             && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5483                 c = ME4000_AO_FIFO_COUNT;
5484                 ISR_PDEBUG("me4000_ao_isr():Fifo empty\n");
5485         } else if ((tmp & ME4000_AO_STATUS_BIT_EF)
5486                    && (tmp & ME4000_AO_STATUS_BIT_HF)
5487                    && (tmp & ME4000_AO_STATUS_BIT_HF)) {
5488                 c = ME4000_AO_FIFO_COUNT / 2;
5489                 ISR_PDEBUG("me4000_ao_isr():Fifo under half full\n");
5490         } else {
5491                 c = 0;
5492                 ISR_PDEBUG("me4000_ao_isr():Fifo full\n");
5493         }
5494
5495         ISR_PDEBUG("me4000_ao_isr():Try to write 0x%04X values\n", c);
5496
5497         while (1) {
5498                 c1 = me4000_values_to_end(ao_context->circ_buf,
5499                                           ME4000_AO_BUFFER_COUNT);
5500                 ISR_PDEBUG("me4000_ao_isr():Values to end = %d\n", c1);
5501                 if (c1 > c)
5502                         c1 = c;
5503
5504                 if (c1 <= 0) {
5505                         ISR_PDEBUG
5506                             ("me4000_ao_isr():Work done or buffer empty\n");
5507                         break;
5508                 }
5509                 //rdtscl(before);
5510                 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG) ||
5511                     ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG)) {
5512                         for (i = 0; i < c1; i++) {
5513                                 value =
5514                                     ((u32)
5515                                      (*
5516                                       (ao_context->circ_buf.buf +
5517                                        ao_context->circ_buf.tail + i))) << 16;
5518                                 outl(value, ao_context->fifo_reg);
5519                         }
5520                 } else
5521                         outsw(ao_context->fifo_reg,
5522                               ao_context->circ_buf.buf +
5523                               ao_context->circ_buf.tail, c1);
5524
5525                 //rdtscl(after);
5526                 //printk(KERN_ERR"ME4000:me4000_ao_isr():Time lapse = %lu\n", after - before);
5527
5528                 ao_context->circ_buf.tail =
5529                     (ao_context->circ_buf.tail + c1) & (ME4000_AO_BUFFER_COUNT -
5530                                                         1);
5531                 ISR_PDEBUG("me4000_ao_isr():%d values wrote to port 0x%04X\n",
5532                            c1, ao_context->fifo_reg);
5533                 c -= c1;
5534         }
5535
5536         /* If there are no values left in the buffer, disable interrupts */
5537         spin_lock(&ao_context->int_lock);
5538         if (!me4000_buf_count(ao_context->circ_buf, ME4000_AO_BUFFER_COUNT)) {
5539                 ISR_PDEBUG
5540                     ("me4000_ao_isr():Disable Interrupt because no values left in buffer\n");
5541                 tmp = me4000_inl(ao_context->ctrl_reg);
5542                 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;
5543                 me4000_outl(tmp, ao_context->ctrl_reg);
5544         }
5545         spin_unlock(&ao_context->int_lock);
5546
5547         /* Reset the interrupt */
5548         spin_lock(&ao_context->int_lock);
5549         tmp = me4000_inl(ao_context->ctrl_reg);
5550         tmp |= ME4000_AO_CTRL_BIT_RESET_IRQ;
5551         me4000_outl(tmp, ao_context->ctrl_reg);
5552         tmp &= ~ME4000_AO_CTRL_BIT_RESET_IRQ;
5553         me4000_outl(tmp, ao_context->ctrl_reg);
5554
5555         /* If state machine is stopped, flow was interrupted */
5556         if (!(me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM)) {
5557                 printk(KERN_ERR "ME4000:me4000_ao_isr():Broken pipe\n");
5558                 ao_context->pipe_flag = 1;      // Set flag in order to inform write routine
5559                 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;  // Disable interrupt
5560         }
5561         me4000_outl(tmp, ao_context->ctrl_reg);
5562         spin_unlock(&ao_context->int_lock);
5563
5564         /* Wake up waiting process */
5565         wake_up_interruptible(&(ao_context->wait_queue));
5566
5567         /* Count the interrupt */
5568         ao_context->board_info->irq_count++;
5569
5570         return IRQ_HANDLED;
5571 }
5572
5573 static irqreturn_t me4000_ai_isr(int irq, void *dev_id)
5574 {
5575         u32 tmp;
5576         struct me4000_ai_context *ai_context;
5577         int i;
5578         int c = 0;
5579         int c1 = 0;
5580 #ifdef ME4000_ISR_DEBUG
5581         unsigned long before;
5582         unsigned long after;
5583 #endif
5584
5585         ISR_PDEBUG("me4000_ai_isr() is executed\n");
5586
5587 #ifdef ME4000_ISR_DEBUG
5588         rdtscl(before);
5589 #endif
5590
5591         ai_context = dev_id;
5592
5593         /* Check if irq number is right */
5594         if (irq != ai_context->irq) {
5595                 ISR_PDEBUG("me4000_ai_isr():incorrect interrupt num: %d\n",
5596                            irq);
5597                 return IRQ_NONE;
5598         }
5599
5600         if (me4000_inl(ai_context->irq_status_reg) &
5601             ME4000_IRQ_STATUS_BIT_AI_HF) {
5602                 ISR_PDEBUG
5603                     ("me4000_ai_isr():Fifo half full interrupt occured\n");
5604
5605                 /* Read status register to find out what happened */
5606                 tmp = me4000_inl(ai_context->ctrl_reg);
5607
5608                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5609                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5610                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5611                         ISR_PDEBUG("me4000_ai_isr():Fifo full\n");
5612                         c = ME4000_AI_FIFO_COUNT;
5613
5614                         /* FIFO overflow, so stop conversion and disable all interrupts */
5615                         spin_lock(&ai_context->int_lock);
5616                         tmp = me4000_inl(ai_context->ctrl_reg);
5617                         tmp |= ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5618                         tmp &=
5619                             ~(ME4000_AI_CTRL_BIT_HF_IRQ |
5620                               ME4000_AI_CTRL_BIT_SC_IRQ);
5621                         outl(tmp, ai_context->ctrl_reg);
5622                         spin_unlock(&ai_context->int_lock);
5623                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5624                            !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5625                            && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5626                         ISR_PDEBUG("me4000_ai_isr():Fifo half full\n");
5627                         c = ME4000_AI_FIFO_COUNT / 2;
5628                 } else {
5629                         c = 0;
5630                         ISR_PDEBUG
5631                             ("me4000_ai_isr():Can't determine state of fifo\n");
5632                 }
5633
5634                 ISR_PDEBUG("me4000_ai_isr():Try to read %d values\n", c);
5635
5636                 while (1) {
5637                         c1 = me4000_space_to_end(ai_context->circ_buf,
5638                                                  ME4000_AI_BUFFER_COUNT);
5639                         ISR_PDEBUG("me4000_ai_isr():Space to end = %d\n", c1);
5640                         if (c1 > c)
5641                                 c1 = c;
5642
5643                         if (c1 <= 0) {
5644                                 ISR_PDEBUG
5645                                     ("me4000_ai_isr():Work done or buffer full\n");
5646                                 break;
5647                         }
5648
5649                         insw(ai_context->data_reg,
5650                              ai_context->circ_buf.buf +
5651                              ai_context->circ_buf.head, c1);
5652                         ai_context->circ_buf.head =
5653                             (ai_context->circ_buf.head +
5654                              c1) & (ME4000_AI_BUFFER_COUNT - 1);
5655                         c -= c1;
5656                 }
5657
5658                 /* Work is done, so reset the interrupt */
5659                 ISR_PDEBUG
5660                     ("me4000_ai_isr():reset interrupt fifo half full interrupt\n");
5661                 spin_lock(&ai_context->int_lock);
5662                 tmp = me4000_inl(ai_context->ctrl_reg);
5663                 tmp |= ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5664                 me4000_outl(tmp, ai_context->ctrl_reg);
5665                 tmp &= ~ME4000_AI_CTRL_BIT_HF_IRQ_RESET;
5666                 me4000_outl(tmp, ai_context->ctrl_reg);
5667                 spin_unlock(&ai_context->int_lock);
5668         }
5669
5670         if (me4000_inl(ai_context->irq_status_reg) & ME4000_IRQ_STATUS_BIT_SC) {
5671                 ISR_PDEBUG
5672                     ("me4000_ai_isr():Sample counter interrupt occured\n");
5673
5674                 if (!ai_context->sample_counter_reload) {
5675                         ISR_PDEBUG
5676                             ("me4000_ai_isr():Single data block available\n");
5677
5678                         /* Poll data until fifo empty */
5679                         for (i = 0;
5680                              (i < ME4000_AI_FIFO_COUNT / 2)
5681                              && (inl(ai_context->ctrl_reg) &
5682                                  ME4000_AI_STATUS_BIT_EF_DATA); i++) {
5683                                 if (me4000_space_to_end
5684                                     (ai_context->circ_buf,
5685                                      ME4000_AI_BUFFER_COUNT)) {
5686                                         *(ai_context->circ_buf.buf +
5687                                           ai_context->circ_buf.head) =
5688                  inw(ai_context->data_reg);
5689                                         ai_context->circ_buf.head =
5690                                             (ai_context->circ_buf.head +
5691                                              1) & (ME4000_AI_BUFFER_COUNT - 1);
5692                                 } else
5693                                         break;
5694                         }
5695                         ISR_PDEBUG("me4000_ai_isr():%d values read\n", i);
5696                 } else {
5697                         if (ai_context->sample_counter <=
5698                             ME4000_AI_FIFO_COUNT / 2) {
5699                                 ISR_PDEBUG
5700                                     ("me4000_ai_isr():Interrupt from adjustable half full threshold\n");
5701
5702                                 /* Read status register to find out what happened */
5703                                 tmp = me4000_inl(ai_context->ctrl_reg);
5704
5705                                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5706                                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5707                                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5708                                         ISR_PDEBUG
5709                                             ("me4000_ai_isr():Fifo full\n");
5710                                         c = ME4000_AI_FIFO_COUNT;
5711
5712                                         /* FIFO overflow, so stop conversion */
5713                                         spin_lock(&ai_context->int_lock);
5714                                         tmp = me4000_inl(ai_context->ctrl_reg);
5715                                         tmp |=
5716                                             ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5717                                         outl(tmp, ai_context->ctrl_reg);
5718                                         spin_unlock(&ai_context->int_lock);
5719                                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5720                                            && !(tmp &
5721                                                 ME4000_AI_STATUS_BIT_HF_DATA)
5722                                            && (tmp &
5723                                                ME4000_AI_STATUS_BIT_EF_DATA)) {
5724                                         ISR_PDEBUG
5725                                             ("me4000_ai_isr():Fifo half full\n");
5726                                         c = ME4000_AI_FIFO_COUNT / 2;
5727                                 } else {
5728                                         c = ai_context->sample_counter;
5729                                         ISR_PDEBUG
5730                                             ("me4000_ai_isr():Sample count values\n");
5731                                 }
5732
5733                                 ISR_PDEBUG
5734                                     ("me4000_ai_isr():Try to read %d values\n",
5735                                      c);
5736
5737                                 while (1) {
5738                                         c1 = me4000_space_to_end(ai_context->
5739                                                                  circ_buf,
5740                                                                  ME4000_AI_BUFFER_COUNT);
5741                                         ISR_PDEBUG
5742                                             ("me4000_ai_isr():Space to end = %d\n",
5743                                              c1);
5744                                         if (c1 > c)
5745                                                 c1 = c;
5746
5747                                         if (c1 <= 0) {
5748                                                 ISR_PDEBUG
5749                                                     ("me4000_ai_isr():Work done or buffer full\n");
5750                                                 break;
5751                                         }
5752
5753                                         insw(ai_context->data_reg,
5754                                              ai_context->circ_buf.buf +
5755                                              ai_context->circ_buf.head, c1);
5756                                         ai_context->circ_buf.head =
5757                                             (ai_context->circ_buf.head +
5758                                              c1) & (ME4000_AI_BUFFER_COUNT - 1);
5759                                         c -= c1;
5760                                 }
5761                         } else {
5762                                 ISR_PDEBUG
5763                                     ("me4000_ai_isr():Multiple data block available\n");
5764
5765                                 /* Read status register to find out what happened */
5766                                 tmp = me4000_inl(ai_context->ctrl_reg);
5767
5768                                 if (!(tmp & ME4000_AI_STATUS_BIT_FF_DATA) &&
5769                                     !(tmp & ME4000_AI_STATUS_BIT_HF_DATA)
5770                                     && (tmp & ME4000_AI_STATUS_BIT_EF_DATA)) {
5771                                         ISR_PDEBUG
5772                                             ("me4000_ai_isr():Fifo full\n");
5773                                         c = ME4000_AI_FIFO_COUNT;
5774
5775                                         /* FIFO overflow, so stop conversion */
5776                                         spin_lock(&ai_context->int_lock);
5777                                         tmp = me4000_inl(ai_context->ctrl_reg);
5778                                         tmp |=
5779                                             ME4000_AI_CTRL_BIT_IMMEDIATE_STOP;
5780                                         outl(tmp, ai_context->ctrl_reg);
5781                                         spin_unlock(&ai_context->int_lock);
5782
5783                                         while (1) {
5784                                                 c1 = me4000_space_to_end
5785                                                     (ai_context->circ_buf,
5786                                                      ME4000_AI_BUFFER_COUNT);
5787                                                 ISR_PDEBUG
5788                                                     ("me4000_ai_isr():Space to end = %d\n",
5789                                                      c1);
5790                                                 if (c1 > c)
5791                                                         c1 = c;
5792
5793                                                 if (c1 <= 0) {
5794                                                         ISR_PDEBUG
5795                                                             ("me4000_ai_isr():Work done or buffer full\n");
5796                                                         break;
5797                                                 }
5798
5799                                                 insw(ai_context->data_reg,
5800                                                      ai_context->circ_buf.buf +
5801                                                      ai_context->circ_buf.head,
5802                                                      c1);
5803                                                 ai_context->circ_buf.head =
5804                                                     (ai_context->circ_buf.head +
5805                                                      c1) &
5806                                                     (ME4000_AI_BUFFER_COUNT -
5807                                                      1);
5808                                                 c -= c1;
5809                                         }
5810                                 } else if ((tmp & ME4000_AI_STATUS_BIT_FF_DATA)
5811                                            && !(tmp &
5812                                                 ME4000_AI_STATUS_BIT_HF_DATA)
5813                                            && (tmp &
5814                                                ME4000_AI_STATUS_BIT_EF_DATA)) {
5815                                         ISR_PDEBUG
5816                                             ("me4000_ai_isr():Fifo half full\n");
5817                                         c = ME4000_AI_FIFO_COUNT / 2;
5818
5819                                         while (1) {
5820                                                 c1 = me4000_space_to_end
5821                                                     (ai_context->circ_buf,
5822                                                      ME4000_AI_BUFFER_COUNT);
5823                                                 ISR_PDEBUG
5824                                                     ("me4000_ai_isr():Space to end = %d\n",
5825                                                      c1);
5826                                                 if (c1 > c)
5827                                                         c1 = c;
5828
5829                                                 if (c1 <= 0) {
5830                                                         ISR_PDEBUG
5831                                                             ("me4000_ai_isr():Work done or buffer full\n");
5832                                                         break;
5833                                                 }
5834
5835                                                 insw(ai_context->data_reg,
5836                                                      ai_context->circ_buf.buf +
5837                                                      ai_context->circ_buf.head,
5838                                                      c1);
5839                                                 ai_context->circ_buf.head =
5840                                                     (ai_context->circ_buf.head +
5841                                                      c1) &
5842                                                     (ME4000_AI_BUFFER_COUNT -
5843                                                      1);
5844                                                 c -= c1;
5845                                         }
5846                                 } else {
5847                                         /* Poll data until fifo empty */
5848                                         for (i = 0;
5849                                              (i < ME4000_AI_FIFO_COUNT / 2)
5850                                              && (inl(ai_context->ctrl_reg) &
5851                                                  ME4000_AI_STATUS_BIT_EF_DATA);
5852                                              i++) {
5853                                                 if (me4000_space_to_end
5854                                                     (ai_context->circ_buf,
5855                                                      ME4000_AI_BUFFER_COUNT)) {
5856                                                         *(ai_context->circ_buf.
5857                                                           buf +
5858                                                           ai_context->circ_buf.
5859                                                           head) =
5860                                        inw(ai_context->data_reg);
5861                                                         ai_context->circ_buf.
5862                                                             head =
5863                                                             (ai_context->
5864                                                              circ_buf.head +
5865                                                              1) &
5866                                                             (ME4000_AI_BUFFER_COUNT
5867                                                              - 1);
5868                                                 } else
5869                                                         break;
5870                                         }
5871                                         ISR_PDEBUG
5872                                             ("me4000_ai_isr():%d values read\n",
5873                                              i);
5874                                 }
5875                         }
5876                 }
5877
5878                 /* Work is done, so reset the interrupt */
5879                 ISR_PDEBUG
5880                     ("me4000_ai_isr():reset interrupt from sample counter\n");
5881                 spin_lock(&ai_context->int_lock);
5882                 tmp = me4000_inl(ai_context->ctrl_reg);
5883                 tmp |= ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5884                 me4000_outl(tmp, ai_context->ctrl_reg);
5885                 tmp &= ~ME4000_AI_CTRL_BIT_SC_IRQ_RESET;
5886                 me4000_outl(tmp, ai_context->ctrl_reg);
5887                 spin_unlock(&ai_context->int_lock);
5888         }
5889
5890         /* Values are now available, so wake up waiting process */
5891         if (me4000_buf_count(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5892                 ISR_PDEBUG("me4000_ai_isr():Wake up waiting process\n");
5893                 wake_up_interruptible(&(ai_context->wait_queue));
5894         }
5895
5896         /* If there is no space left in the buffer, disable interrupts */
5897         spin_lock(&ai_context->int_lock);
5898         if (!me4000_buf_space(ai_context->circ_buf, ME4000_AI_BUFFER_COUNT)) {
5899                 ISR_PDEBUG
5900                     ("me4000_ai_isr():Disable Interrupt because no space left in buffer\n");
5901                 tmp = me4000_inl(ai_context->ctrl_reg);
5902                 tmp &=
5903                     ~(ME4000_AI_CTRL_BIT_SC_IRQ | ME4000_AI_CTRL_BIT_HF_IRQ |
5904                       ME4000_AI_CTRL_BIT_LE_IRQ);
5905                 me4000_outl(tmp, ai_context->ctrl_reg);
5906         }
5907         spin_unlock(&ai_context->int_lock);
5908
5909 #ifdef ME4000_ISR_DEBUG
5910         rdtscl(after);
5911         printk(KERN_ERR "ME4000:me4000_ai_isr():Time lapse = %lu\n",
5912                after - before);
5913 #endif
5914
5915         return IRQ_HANDLED;
5916 }
5917
5918 static irqreturn_t me4000_ext_int_isr(int irq, void *dev_id)
5919 {
5920         struct me4000_ext_int_context *ext_int_context;
5921         unsigned long tmp;
5922
5923         ISR_PDEBUG("me4000_ext_int_isr() is executed\n");
5924
5925         ext_int_context = dev_id;
5926
5927         /* Check if irq number is right */
5928         if (irq != ext_int_context->irq) {
5929                 ISR_PDEBUG("me4000_ext_int_isr():incorrect interrupt num: %d\n",
5930                            irq);
5931                 return IRQ_NONE;
5932         }
5933
5934         if (me4000_inl(ext_int_context->irq_status_reg) &
5935             ME4000_IRQ_STATUS_BIT_EX) {
5936                 ISR_PDEBUG("me4000_ext_int_isr():External interrupt occured\n");
5937                 tmp = me4000_inl(ext_int_context->ctrl_reg);
5938                 tmp |= ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5939                 me4000_outl(tmp, ext_int_context->ctrl_reg);
5940                 tmp &= ~ME4000_AI_CTRL_BIT_EX_IRQ_RESET;
5941                 me4000_outl(tmp, ext_int_context->ctrl_reg);
5942
5943                 ext_int_context->int_count++;
5944
5945                 if (ext_int_context->fasync_ptr) {
5946                         ISR_PDEBUG
5947                             ("me2600_ext_int_isr():Send signal to process\n");
5948                         kill_fasync(&ext_int_context->fasync_ptr, SIGIO,
5949                                     POLL_IN);
5950                 }
5951         }
5952
5953         return IRQ_HANDLED;
5954 }
5955
5956 static void __exit me4000_module_exit(void)
5957 {
5958         struct list_head *board_p;
5959         struct me4000_info *board_info;
5960
5961         CALL_PDEBUG("cleanup_module() is executed\n");
5962
5963         unregister_chrdev(me4000_ext_int_major_driver_no, ME4000_EXT_INT_NAME);
5964
5965         unregister_chrdev(me4000_cnt_major_driver_no, ME4000_CNT_NAME);
5966
5967         unregister_chrdev(me4000_dio_major_driver_no, ME4000_DIO_NAME);
5968
5969         unregister_chrdev(me4000_ai_major_driver_no, ME4000_AI_NAME);
5970
5971         unregister_chrdev(me4000_ao_major_driver_no, ME4000_AO_NAME);
5972
5973         remove_proc_entry("me4000", NULL);
5974
5975         pci_unregister_driver(&me4000_driver);
5976
5977         /* Reset the boards */
5978         for (board_p = me4000_board_info_list.next;
5979              board_p != &me4000_board_info_list; board_p = board_p->next) {
5980                 board_info = list_entry(board_p, struct me4000_info, list);
5981                 me4000_reset_board(board_info);
5982         }
5983
5984         clear_board_info_list();
5985 }
5986
5987 module_exit(me4000_module_exit);
5988
5989 static int me4000_read_procmem(char *buf, char **start, off_t offset, int count,
5990                                int *eof, void *data)
5991 {
5992         int len = 0;
5993         int limit = count - 1000;
5994         struct me4000_info *board_info;
5995         struct list_head *ptr;
5996
5997         len += sprintf(buf + len, "\nME4000 DRIVER VERSION %X.%X.%X\n\n",
5998                        (ME4000_DRIVER_VERSION & 0xFF0000) >> 16,
5999                        (ME4000_DRIVER_VERSION & 0xFF00) >> 8,
6000                        (ME4000_DRIVER_VERSION & 0xFF));
6001
6002         /* Search for the board context */
6003         for (ptr = me4000_board_info_list.next;
6004              (ptr != &me4000_board_info_list) && (len < limit);
6005              ptr = ptr->next) {
6006                 board_info = list_entry(ptr, struct me4000_info, list);
6007
6008                 len +=
6009                     sprintf(buf + len, "Board number %d:\n",
6010                             board_info->board_count);
6011                 len += sprintf(buf + len, "---------------\n");
6012                 len +=
6013                     sprintf(buf + len, "PLX base register = 0x%lX\n",
6014                             board_info->plx_regbase);
6015                 len +=
6016                     sprintf(buf + len, "PLX base register size = 0x%X\n",
6017                             (unsigned int)board_info->plx_regbase_size);
6018                 len +=
6019                     sprintf(buf + len, "ME4000 base register = 0x%X\n",
6020                             (unsigned int)board_info->me4000_regbase);
6021                 len +=
6022                     sprintf(buf + len, "ME4000 base register size = 0x%X\n",
6023                             (unsigned int)board_info->me4000_regbase_size);
6024                 len +=
6025                     sprintf(buf + len, "Serial number = 0x%X\n",
6026                             board_info->serial_no);
6027                 len +=
6028                     sprintf(buf + len, "Hardware revision = 0x%X\n",
6029                             board_info->hw_revision);
6030                 len +=
6031                     sprintf(buf + len, "Vendor id = 0x%X\n",
6032                             board_info->vendor_id);
6033                 len +=
6034                     sprintf(buf + len, "Device id = 0x%X\n",
6035                             board_info->device_id);
6036                 len +=
6037                     sprintf(buf + len, "PCI bus number = %d\n",
6038                             board_info->pci_bus_no);
6039                 len +=
6040                     sprintf(buf + len, "PCI device number = %d\n",
6041                             board_info->pci_dev_no);
6042                 len +=
6043                     sprintf(buf + len, "PCI function number = %d\n",
6044                             board_info->pci_func_no);
6045                 len += sprintf(buf + len, "IRQ = %u\n", board_info->irq);
6046                 len +=
6047                     sprintf(buf + len,
6048                             "Count of interrupts since module was loaded = %d\n",
6049                             board_info->irq_count);
6050
6051                 len +=
6052                     sprintf(buf + len, "Count of analog outputs = %d\n",
6053                             board_info->board_p->ao.count);
6054                 len +=
6055                     sprintf(buf + len, "Count of analog output fifos = %d\n",
6056                             board_info->board_p->ao.fifo_count);
6057
6058                 len +=
6059                     sprintf(buf + len, "Count of analog inputs = %d\n",
6060                             board_info->board_p->ai.count);
6061                 len +=
6062                     sprintf(buf + len,
6063                             "Count of sample and hold devices for analog input = %d\n",
6064                             board_info->board_p->ai.sh_count);
6065                 len +=
6066                     sprintf(buf + len,
6067                             "Analog external trigger available for analog input = %d\n",
6068                             board_info->board_p->ai.ex_trig_analog);
6069
6070                 len +=
6071                     sprintf(buf + len, "Count of digital ports = %d\n",
6072                             board_info->board_p->dio.count);
6073
6074                 len +=
6075                     sprintf(buf + len, "Count of counter devices = %d\n",
6076                             board_info->board_p->cnt.count);
6077                 len +=
6078                     sprintf(buf + len, "AI control register = 0x%08X\n",
6079                             inl(board_info->me4000_regbase +
6080                                 ME4000_AI_CTRL_REG));
6081
6082                 len += sprintf(buf + len, "AO 0 control register = 0x%08X\n",
6083                                inl(board_info->me4000_regbase +
6084                                    ME4000_AO_00_CTRL_REG));
6085                 len +=
6086                     sprintf(buf + len, "AO 0 status register = 0x%08X\n",
6087                             inl(board_info->me4000_regbase +
6088                                 ME4000_AO_00_STATUS_REG));
6089                 len +=
6090                     sprintf(buf + len, "AO 1 control register = 0x%08X\n",
6091                             inl(board_info->me4000_regbase +
6092                                 ME4000_AO_01_CTRL_REG));
6093                 len +=
6094                     sprintf(buf + len, "AO 1 status register = 0x%08X\n",
6095                             inl(board_info->me4000_regbase +
6096                                 ME4000_AO_01_STATUS_REG));
6097                 len +=
6098                     sprintf(buf + len, "AO 2 control register = 0x%08X\n",
6099                             inl(board_info->me4000_regbase +
6100                                 ME4000_AO_02_CTRL_REG));
6101                 len +=
6102                     sprintf(buf + len, "AO 2 status register = 0x%08X\n",
6103                             inl(board_info->me4000_regbase +
6104                                 ME4000_AO_02_STATUS_REG));
6105                 len +=
6106                     sprintf(buf + len, "AO 3 control register = 0x%08X\n",
6107                             inl(board_info->me4000_regbase +
6108                                 ME4000_AO_03_CTRL_REG));
6109                 len +=
6110                     sprintf(buf + len, "AO 3 status register = 0x%08X\n",
6111                             inl(board_info->me4000_regbase +
6112                                 ME4000_AO_03_STATUS_REG));
6113         }
6114
6115         *eof = 1;
6116         return len;
6117 }