2 comedi/drivers/ni_6514.c
3 driver for National Instruments PCI-6514
5 Copyright (C) 2006 Jon Grierson <jd@renko.co.uk>
6 Copyright (C) 2006 Frank Mori Hess <fmhess@users.sourceforge.net>
8 COMEDI - Linux Control and Measurement Device Interface
9 Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 Description: National Instruments 65xx static dio boards
29 Author: Jon Grierson <jd@renko.co.uk>, Frank Mori Hess <fmhess@users.sourceforge.net>
31 Devices: [National Instruments] PCI-6509 (ni_65xx), PXI-6509, PCI-6510, PCI-6511,
32 PXI-6511, PCI-6512, PXI-6512, PCI-6513, PXI-6513, PCI-6514, PXI-6514, PCI-6515,
33 PXI-6515, PCI-6516, PCI-6517, PCI-6518, PCI-6519, PCI-6520, PCI-6521, PXI-6521,
35 Updated: Wed Oct 18 08:59:11 EDT 2006
37 Based on the PCI-6527 driver by ds.
38 The interrupt subdevice (subdevice 3) is probably broken for all boards
39 except maybe the 6514.
44 Manuals (available from ftp://ftp.natinst.com/support/manuals)
46 370106b.pdf 6514 Register Level Programmer Manual
53 #include "../comedidev.h"
57 #define NI6514_DIO_SIZE 4096
58 #define NI6514_MITE_SIZE 4096
60 #define NI_65XX_MAX_NUM_PORTS 12
61 static const unsigned ni_65xx_channels_per_port = 8;
62 static const unsigned ni_65xx_port_offset = 0x10;
64 static inline unsigned Port_Data(unsigned port)
66 return 0x40 + port * ni_65xx_port_offset;
68 static inline unsigned Port_Select(unsigned port)
70 return 0x41 + port * ni_65xx_port_offset;
72 static inline unsigned Rising_Edge_Detection_Enable(unsigned port)
74 return 0x42 + port * ni_65xx_port_offset;
76 static inline unsigned Falling_Edge_Detection_Enable(unsigned port)
78 return 0x43 + port * ni_65xx_port_offset;
80 static inline unsigned Filter_Enable(unsigned port)
82 return 0x44 + port * ni_65xx_port_offset;
85 #define ID_Register 0x00
87 #define Clear_Register 0x01
89 #define ClrOverflow 0x04
91 #define Filter_Interval 0x08
93 #define Change_Status 0x02
94 #define MasterInterruptStatus 0x04
96 #define EdgeStatus 0x01
98 #define Master_Interrupt_Control 0x03
99 #define FallingEdgeIntEnable 0x10
100 #define RisingEdgeIntEnable 0x08
101 #define MasterInterruptEnable 0x04
102 #define OverflowIntEnable 0x02
103 #define EdgeIntEnable 0x01
105 static int ni_65xx_attach(struct comedi_device * dev, struct comedi_devconfig * it);
106 static int ni_65xx_detach(struct comedi_device * dev);
107 static struct comedi_driver driver_ni_65xx = {
108 driver_name:"ni_65xx",
110 attach:ni_65xx_attach,
111 detach:ni_65xx_detach,
114 struct ni_65xx_board {
118 unsigned num_dio_ports;
119 unsigned num_di_ports;
120 unsigned num_do_ports;
121 unsigned invert_outputs:1;
124 static const struct ni_65xx_board ni_65xx_boards[] = {
243 #define n_ni_65xx_boards (sizeof(ni_65xx_boards)/sizeof(ni_65xx_boards[0]))
244 static inline const struct ni_65xx_board *board(struct comedi_device * dev)
246 return dev->board_ptr;
248 static inline unsigned ni_65xx_port_by_channel(unsigned channel)
250 return channel / ni_65xx_channels_per_port;
252 static inline unsigned ni_65xx_total_num_ports(const struct ni_65xx_board * board)
254 return board->num_dio_ports + board->num_di_ports + board->num_do_ports;
257 static DEFINE_PCI_DEVICE_TABLE(ni_65xx_pci_table) = {
258 {PCI_VENDOR_ID_NATINST, 0x1710, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
259 {PCI_VENDOR_ID_NATINST, 0x7085, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
260 {PCI_VENDOR_ID_NATINST, 0x7086, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
261 {PCI_VENDOR_ID_NATINST, 0x7087, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
262 {PCI_VENDOR_ID_NATINST, 0x7088, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
263 {PCI_VENDOR_ID_NATINST, 0x70a9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
264 {PCI_VENDOR_ID_NATINST, 0x70c3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
265 {PCI_VENDOR_ID_NATINST, 0x70c8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
266 {PCI_VENDOR_ID_NATINST, 0x70c9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
267 {PCI_VENDOR_ID_NATINST, 0x70cc, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
268 {PCI_VENDOR_ID_NATINST, 0x70CD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
269 {PCI_VENDOR_ID_NATINST, 0x70d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
270 {PCI_VENDOR_ID_NATINST, 0x70d2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
271 {PCI_VENDOR_ID_NATINST, 0x70d3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
272 {PCI_VENDOR_ID_NATINST, 0x7124, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
273 {PCI_VENDOR_ID_NATINST, 0x7125, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
274 {PCI_VENDOR_ID_NATINST, 0x7126, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
275 {PCI_VENDOR_ID_NATINST, 0x7127, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
276 {PCI_VENDOR_ID_NATINST, 0x7128, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
277 {PCI_VENDOR_ID_NATINST, 0x718b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
278 {PCI_VENDOR_ID_NATINST, 0x718c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
279 {PCI_VENDOR_ID_NATINST, 0x71c5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
283 MODULE_DEVICE_TABLE(pci, ni_65xx_pci_table);
285 struct ni_65xx_private {
286 struct mite_struct *mite;
287 unsigned int filter_interval;
288 unsigned short filter_enable[NI_65XX_MAX_NUM_PORTS];
289 unsigned short output_bits[NI_65XX_MAX_NUM_PORTS];
290 unsigned short dio_direction[NI_65XX_MAX_NUM_PORTS];
293 static inline struct ni_65xx_private *private(struct comedi_device * dev)
298 struct ni_65xx_subdevice_private {
302 static inline struct ni_65xx_subdevice_private *sprivate(struct comedi_subdevice * subdev)
304 return subdev->private;
306 static struct ni_65xx_subdevice_private *ni_65xx_alloc_subdevice_private(void)
308 struct ni_65xx_subdevice_private *subdev_private =
309 kzalloc(sizeof(struct ni_65xx_subdevice_private), GFP_KERNEL);
310 if (subdev_private == NULL)
312 return subdev_private;
315 static int ni_65xx_find_device(struct comedi_device * dev, int bus, int slot);
317 static int ni_65xx_config_filter(struct comedi_device * dev, struct comedi_subdevice * s,
318 struct comedi_insn * insn, unsigned int * data)
320 const unsigned chan = CR_CHAN(insn->chanspec);
321 const unsigned port =
322 sprivate(s)->base_port + ni_65xx_port_by_channel(chan);
324 if (data[0] != INSN_CONFIG_FILTER)
327 static const unsigned filter_resolution_ns = 200;
328 static const unsigned max_filter_interval = 0xfffff;
331 (filter_resolution_ns / 2)) / filter_resolution_ns;
332 if (interval > max_filter_interval)
333 interval = max_filter_interval;
334 data[1] = interval * filter_resolution_ns;
336 if (interval != private(dev)->filter_interval) {
338 private(dev)->mite->daq_io_addr +
340 private(dev)->filter_interval = interval;
343 private(dev)->filter_enable[port] |=
344 1 << (chan % ni_65xx_channels_per_port);
346 private(dev)->filter_enable[port] &=
347 ~(1 << (chan % ni_65xx_channels_per_port));
350 writeb(private(dev)->filter_enable[port],
351 private(dev)->mite->daq_io_addr + Filter_Enable(port));
356 static int ni_65xx_dio_insn_config(struct comedi_device * dev, struct comedi_subdevice * s,
357 struct comedi_insn * insn, unsigned int * data)
363 port = sprivate(s)->base_port +
364 ni_65xx_port_by_channel(CR_CHAN(insn->chanspec));
366 case INSN_CONFIG_FILTER:
367 return ni_65xx_config_filter(dev, s, insn, data);
369 case INSN_CONFIG_DIO_OUTPUT:
370 if (s->type != COMEDI_SUBD_DIO)
372 private(dev)->dio_direction[port] = COMEDI_OUTPUT;
373 writeb(0, private(dev)->mite->daq_io_addr + Port_Select(port));
376 case INSN_CONFIG_DIO_INPUT:
377 if (s->type != COMEDI_SUBD_DIO)
379 private(dev)->dio_direction[port] = COMEDI_INPUT;
380 writeb(1, private(dev)->mite->daq_io_addr + Port_Select(port));
383 case INSN_CONFIG_DIO_QUERY:
384 if (s->type != COMEDI_SUBD_DIO)
386 data[1] = private(dev)->dio_direction[port];
395 static int ni_65xx_dio_insn_bits(struct comedi_device * dev, struct comedi_subdevice * s,
396 struct comedi_insn * insn, unsigned int * data)
398 unsigned base_bitfield_channel;
399 const unsigned max_ports_per_bitfield = 5;
400 unsigned read_bits = 0;
404 base_bitfield_channel = CR_CHAN(insn->chanspec);
405 for (j = 0; j < max_ports_per_bitfield; ++j) {
406 const unsigned port =
407 sprivate(s)->base_port +
408 ni_65xx_port_by_channel(base_bitfield_channel) + j;
409 unsigned base_port_channel;
410 unsigned port_mask, port_data, port_read_bits;
412 if (port >= ni_65xx_total_num_ports(board(dev)))
414 base_port_channel = port * ni_65xx_channels_per_port;
417 bitshift = base_port_channel - base_bitfield_channel;
418 if (bitshift >= 32 || bitshift <= -32)
421 port_mask >>= bitshift;
422 port_data >>= bitshift;
424 port_mask <<= -bitshift;
425 port_data <<= -bitshift;
431 private(dev)->output_bits[port] &= ~port_mask;
432 private(dev)->output_bits[port] |=
433 port_data & port_mask;
434 bits = private(dev)->output_bits[port];
435 if (board(dev)->invert_outputs)
438 private(dev)->mite->daq_io_addr +
440 /* rt_printk("wrote 0x%x to port %i\n", bits, port); */
443 readb(private(dev)->mite->daq_io_addr +
445 /* rt_printk("read 0x%x from port %i\n", port_read_bits, port); */
447 port_read_bits <<= bitshift;
449 port_read_bits >>= -bitshift;
451 read_bits |= port_read_bits;
457 static irqreturn_t ni_65xx_interrupt(int irq, void *d)
459 struct comedi_device *dev = d;
460 struct comedi_subdevice *s = dev->subdevices + 2;
463 status = readb(private(dev)->mite->daq_io_addr + Change_Status);
464 if ((status & MasterInterruptStatus) == 0)
466 if ((status & EdgeStatus) == 0)
469 writeb(ClrEdge | ClrOverflow,
470 private(dev)->mite->daq_io_addr + Clear_Register);
472 comedi_buf_put(s->async, 0);
473 s->async->events |= COMEDI_CB_EOS;
474 comedi_event(dev, s);
478 static int ni_65xx_intr_cmdtest(struct comedi_device * dev, struct comedi_subdevice * s,
479 struct comedi_cmd * cmd)
484 /* step 1: make sure trigger sources are trivially valid */
486 tmp = cmd->start_src;
487 cmd->start_src &= TRIG_NOW;
488 if (!cmd->start_src || tmp != cmd->start_src)
491 tmp = cmd->scan_begin_src;
492 cmd->scan_begin_src &= TRIG_OTHER;
493 if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
496 tmp = cmd->convert_src;
497 cmd->convert_src &= TRIG_FOLLOW;
498 if (!cmd->convert_src || tmp != cmd->convert_src)
501 tmp = cmd->scan_end_src;
502 cmd->scan_end_src &= TRIG_COUNT;
503 if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
507 cmd->stop_src &= TRIG_COUNT;
508 if (!cmd->stop_src || tmp != cmd->stop_src)
514 /* step 2: make sure trigger sources are unique and mutually compatible */
519 /* step 3: make sure arguments are trivially compatible */
521 if (cmd->start_arg != 0) {
525 if (cmd->scan_begin_arg != 0) {
526 cmd->scan_begin_arg = 0;
529 if (cmd->convert_arg != 0) {
530 cmd->convert_arg = 0;
534 if (cmd->scan_end_arg != 1) {
535 cmd->scan_end_arg = 1;
538 if (cmd->stop_arg != 0) {
546 /* step 4: fix up any arguments */
554 static int ni_65xx_intr_cmd(struct comedi_device * dev, struct comedi_subdevice * s)
556 /* struct comedi_cmd *cmd = &s->async->cmd; */
558 writeb(ClrEdge | ClrOverflow,
559 private(dev)->mite->daq_io_addr + Clear_Register);
560 writeb(FallingEdgeIntEnable | RisingEdgeIntEnable |
561 MasterInterruptEnable | EdgeIntEnable,
562 private(dev)->mite->daq_io_addr + Master_Interrupt_Control);
567 static int ni_65xx_intr_cancel(struct comedi_device * dev, struct comedi_subdevice * s)
570 private(dev)->mite->daq_io_addr + Master_Interrupt_Control);
575 static int ni_65xx_intr_insn_bits(struct comedi_device * dev, struct comedi_subdevice * s,
576 struct comedi_insn * insn, unsigned int * data)
585 static int ni_65xx_intr_insn_config(struct comedi_device * dev, struct comedi_subdevice * s,
586 struct comedi_insn * insn, unsigned int * data)
590 if (data[0] != INSN_CONFIG_CHANGE_NOTIFY)
594 private(dev)->mite->daq_io_addr +
595 Rising_Edge_Detection_Enable(0));
597 private(dev)->mite->daq_io_addr +
598 Rising_Edge_Detection_Enable(0x10));
599 writeb(data[1] >> 16,
600 private(dev)->mite->daq_io_addr +
601 Rising_Edge_Detection_Enable(0x20));
602 writeb(data[1] >> 24,
603 private(dev)->mite->daq_io_addr +
604 Rising_Edge_Detection_Enable(0x30));
607 private(dev)->mite->daq_io_addr +
608 Falling_Edge_Detection_Enable(0));
610 private(dev)->mite->daq_io_addr +
611 Falling_Edge_Detection_Enable(0x10));
612 writeb(data[2] >> 16,
613 private(dev)->mite->daq_io_addr +
614 Falling_Edge_Detection_Enable(0x20));
615 writeb(data[2] >> 24,
616 private(dev)->mite->daq_io_addr +
617 Falling_Edge_Detection_Enable(0x30));
622 static int ni_65xx_attach(struct comedi_device * dev, struct comedi_devconfig * it)
624 struct comedi_subdevice *s;
628 printk("comedi%d: ni_65xx:", dev->minor);
630 if ((ret = alloc_private(dev, sizeof(struct ni_65xx_private))) < 0)
633 ret = ni_65xx_find_device(dev, it->options[0], it->options[1]);
637 ret = mite_setup(private(dev)->mite);
639 printk("error setting up mite\n");
643 dev->board_name = board(dev)->name;
644 dev->irq = mite_irq(private(dev)->mite);
645 printk(" %s", dev->board_name);
648 readb(private(dev)->mite->daq_io_addr + ID_Register));
650 if ((ret = alloc_subdevices(dev, 4)) < 0)
653 s = dev->subdevices + 0;
654 if (board(dev)->num_di_ports) {
655 s->type = COMEDI_SUBD_DI;
656 s->subdev_flags = SDF_READABLE;
658 board(dev)->num_di_ports * ni_65xx_channels_per_port;
659 s->range_table = &range_digital;
661 s->insn_config = ni_65xx_dio_insn_config;
662 s->insn_bits = ni_65xx_dio_insn_bits;
663 s->private = ni_65xx_alloc_subdevice_private();
664 if (s->private == NULL)
666 sprivate(s)->base_port = 0;
668 s->type = COMEDI_SUBD_UNUSED;
671 s = dev->subdevices + 1;
672 if (board(dev)->num_do_ports) {
673 s->type = COMEDI_SUBD_DO;
674 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
676 board(dev)->num_do_ports * ni_65xx_channels_per_port;
677 s->range_table = &range_digital;
679 s->insn_bits = ni_65xx_dio_insn_bits;
680 s->private = ni_65xx_alloc_subdevice_private();
681 if (s->private == NULL)
683 sprivate(s)->base_port = board(dev)->num_di_ports;
685 s->type = COMEDI_SUBD_UNUSED;
688 s = dev->subdevices + 2;
689 if (board(dev)->num_dio_ports) {
690 s->type = COMEDI_SUBD_DIO;
691 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
693 board(dev)->num_dio_ports * ni_65xx_channels_per_port;
694 s->range_table = &range_digital;
696 s->insn_config = ni_65xx_dio_insn_config;
697 s->insn_bits = ni_65xx_dio_insn_bits;
698 s->private = ni_65xx_alloc_subdevice_private();
699 if (s->private == NULL)
701 sprivate(s)->base_port = 0;
702 for (i = 0; i < board(dev)->num_dio_ports; ++i) {
703 /* configure all ports for input */
705 private(dev)->mite->daq_io_addr +
709 s->type = COMEDI_SUBD_UNUSED;
712 s = dev->subdevices + 3;
713 dev->read_subdev = s;
714 s->type = COMEDI_SUBD_DI;
715 s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
717 s->range_table = &range_unknown;
719 s->do_cmdtest = ni_65xx_intr_cmdtest;
720 s->do_cmd = ni_65xx_intr_cmd;
721 s->cancel = ni_65xx_intr_cancel;
722 s->insn_bits = ni_65xx_intr_insn_bits;
723 s->insn_config = ni_65xx_intr_insn_config;
725 for (i = 0; i < ni_65xx_total_num_ports(board(dev)); ++i) {
727 private(dev)->mite->daq_io_addr + Filter_Enable(i));
728 if (board(dev)->invert_outputs)
730 private(dev)->mite->daq_io_addr + Port_Data(i));
733 private(dev)->mite->daq_io_addr + Port_Data(i));
735 writeb(ClrEdge | ClrOverflow,
736 private(dev)->mite->daq_io_addr + Clear_Register);
738 private(dev)->mite->daq_io_addr + Master_Interrupt_Control);
740 /* Set filter interval to 0 (32bit reg) */
741 writeb(0x00000000, private(dev)->mite->daq_io_addr + Filter_Interval);
743 ret = comedi_request_irq(dev->irq, ni_65xx_interrupt, IRQF_SHARED,
747 printk(" irq not available");
755 static int ni_65xx_detach(struct comedi_device * dev)
757 if (private(dev) && private(dev)->mite
758 && private(dev)->mite->daq_io_addr) {
760 private(dev)->mite->daq_io_addr +
761 Master_Interrupt_Control);
765 comedi_free_irq(dev->irq, dev);
770 for (i = 0; i < dev->n_subdevices; ++i) {
771 if (dev->subdevices[i].private) {
772 kfree(dev->subdevices[i].private);
773 dev->subdevices[i].private = NULL;
776 if (private(dev)->mite) {
777 mite_unsetup(private(dev)->mite);
783 static int ni_65xx_find_device(struct comedi_device * dev, int bus, int slot)
785 struct mite_struct *mite;
788 for (mite = mite_devices; mite; mite = mite->next) {
792 if (bus != mite->pcidev->bus->number ||
793 slot != PCI_SLOT(mite->pcidev->devfn))
796 for (i = 0; i < n_ni_65xx_boards; i++) {
797 if (mite_device_id(mite) == ni_65xx_boards[i].dev_id) {
798 dev->board_ptr = ni_65xx_boards + i;
799 private(dev)->mite = mite;
804 printk("no device found\n");
809 COMEDI_PCI_INITCLEANUP(driver_ni_65xx, ni_65xx_pci_table);