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   1 /*
   2  *  linux/drivers/serial/cpm_uart.c
   3  *
   4  *  Driver for CPM (SCC/SMC) serial ports; core driver
   5  *
   6  *  Based on arch/ppc/cpm2_io/uart.c by Dan Malek
   7  *  Based on ppc8xx.c by Thomas Gleixner
   8  *  Based on drivers/serial/amba.c by Russell King
   9  *
  10  *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
  11  *              Pantelis Antoniou (panto@intracom.gr) (CPM1)
  12  *
  13  *  Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
  14  *            (C) 2004 Intracom, S.A.
  15  *            (C) 2005-2006 MontaVista Software, Inc.
  16  *              Vitaly Bordug <vbordug@ru.mvista.com>
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License as published by
  20  * the Free Software Foundation; either version 2 of the License, or
  21  * (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  31  *
  32  */
  33
  34 #include <linux/module.h>
  35 #include <linux/tty.h>
  36 #include <linux/ioport.h>
  37 #include <linux/init.h>
  38 #include <linux/serial.h>
  39 #include <linux/console.h>
  40 #include <linux/sysrq.h>
  41 #include <linux/device.h>
  42 #include <linux/bootmem.h>
  43 #include <linux/dma-mapping.h>
  44 #include <linux/fs_uart_pd.h>
  45 #include <linux/of_platform.h>
  46
  47 #include <asm/io.h>
  48 #include <asm/irq.h>
  49 #include <asm/delay.h>
  50 #include <asm/fs_pd.h>
  51 #include <asm/udbg.h>
  52
  53 #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  54 #define SUPPORT_SYSRQ
  55 #endif
  56
  57 #include <linux/serial_core.h>
  58 #include <linux/kernel.h>
  59
  60 #include "cpm_uart.h"
  61
  62
  63 /**************************************************************/
  64
  65 static int  cpm_uart_tx_pump(struct uart_port *port);
  66 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
  67 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
  68 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
  69
  70 /**************************************************************/
  71
  72 /*
  73  * Check, if transmit buffers are processed
  74 */
  75 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
  76 {
  77         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
  78         cbd_t __iomem *bdp = pinfo->tx_bd_base;
  79         int ret = 0;
  80
  81         while (1) {
  82                 if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
  83                         break;
  84
  85                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
  86                         ret = TIOCSER_TEMT;
  87                         break;
  88                 }
  89                 bdp++;
  90         }
  91
  92         pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
  93
  94         return ret;
  95 }
  96
  97 static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  98 {
  99         /* Whee. Do nothing. */
 100 }
 101
 102 static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
 103 {
 104         /* Whee. Do nothing. */
 105         return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
 106 }
 107
 108 /*
 109  * Stop transmitter
 110  */
 111 static void cpm_uart_stop_tx(struct uart_port *port)
 112 {
 113         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 114         smc_t __iomem *smcp = pinfo->smcp;
 115         scc_t __iomem *sccp = pinfo->sccp;
 116
 117         pr_debug("CPM uart[%d]:stop tx\n", port->line);
 118
 119         if (IS_SMC(pinfo))
 120                 clrbits8(&smcp->smc_smcm, SMCM_TX);
 121         else
 122                 clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
 123 }
 124
 125 /*
 126  * Start transmitter
 127  */
 128 static void cpm_uart_start_tx(struct uart_port *port)
 129 {
 130         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 131         smc_t __iomem *smcp = pinfo->smcp;
 132         scc_t __iomem *sccp = pinfo->sccp;
 133
 134         pr_debug("CPM uart[%d]:start tx\n", port->line);
 135
 136         if (IS_SMC(pinfo)) {
 137                 if (in_8(&smcp->smc_smcm) & SMCM_TX)
 138                         return;
 139         } else {
 140                 if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
 141                         return;
 142         }
 143
 144         if (cpm_uart_tx_pump(port) != 0) {
 145                 if (IS_SMC(pinfo)) {
 146                         setbits8(&smcp->smc_smcm, SMCM_TX);
 147                 } else {
 148                         setbits16(&sccp->scc_sccm, UART_SCCM_TX);
 149                 }
 150         }
 151 }
 152
 153 /*
 154  * Stop receiver
 155  */
 156 static void cpm_uart_stop_rx(struct uart_port *port)
 157 {
 158         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 159         smc_t __iomem *smcp = pinfo->smcp;
 160         scc_t __iomem *sccp = pinfo->sccp;
 161
 162         pr_debug("CPM uart[%d]:stop rx\n", port->line);
 163
 164         if (IS_SMC(pinfo))
 165                 clrbits8(&smcp->smc_smcm, SMCM_RX);
 166         else
 167                 clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
 168 }
 169
 170 /*
 171  * Enable Modem status interrupts
 172  */
 173 static void cpm_uart_enable_ms(struct uart_port *port)
 174 {
 175         pr_debug("CPM uart[%d]:enable ms\n", port->line);
 176 }
 177
 178 /*
 179  * Generate a break.
 180  */
 181 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
 182 {
 183         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 184
 185         pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
 186                 break_state);
 187
 188         if (break_state)
 189                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 190         else
 191                 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
 192 }
 193
 194 /*
 195  * Transmit characters, refill buffer descriptor, if possible
 196  */
 197 static void cpm_uart_int_tx(struct uart_port *port)
 198 {
 199         pr_debug("CPM uart[%d]:TX INT\n", port->line);
 200
 201         cpm_uart_tx_pump(port);
 202 }
 203
 204 #ifdef CONFIG_CONSOLE_POLL
 205 static int serial_polled;
 206 #endif
 207
 208 /*
 209  * Receive characters
 210  */
 211 static void cpm_uart_int_rx(struct uart_port *port)
 212 {
 213         int i;
 214         unsigned char ch;
 215         u8 *cp;
 216         struct tty_struct *tty = port->info->port.tty;
 217         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 218         cbd_t __iomem *bdp;
 219         u16 status;
 220         unsigned int flg;
 221
 222         pr_debug("CPM uart[%d]:RX INT\n", port->line);
 223
 224         /* Just loop through the closed BDs and copy the characters into
 225          * the buffer.
 226          */
 227         bdp = pinfo->rx_cur;
 228         for (;;) {
 229 #ifdef CONFIG_CONSOLE_POLL
 230                 if (unlikely(serial_polled)) {
 231                         serial_polled = 0;
 232                         return;
 233                 }
 234 #endif
 235                 /* get status */
 236                 status = in_be16(&bdp->cbd_sc);
 237                 /* If this one is empty, return happy */
 238                 if (status & BD_SC_EMPTY)
 239                         break;
 240
 241                 /* get number of characters, and check spce in flip-buffer */
 242                 i = in_be16(&bdp->cbd_datlen);
 243
 244                 /* If we have not enough room in tty flip buffer, then we try
 245                  * later, which will be the next rx-interrupt or a timeout
 246                  */
 247                 if(tty_buffer_request_room(tty, i) < i) {
 248                         printk(KERN_WARNING "No room in flip buffer\n");
 249                         return;
 250                 }
 251
 252                 /* get pointer */
 253                 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 254
 255                 /* loop through the buffer */
 256                 while (i-- > 0) {
 257                         ch = *cp++;
 258                         port->icount.rx++;
 259                         flg = TTY_NORMAL;
 260
 261                         if (status &
 262                             (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
 263                                 goto handle_error;
 264                         if (uart_handle_sysrq_char(port, ch))
 265                                 continue;
 266 #ifdef CONFIG_CONSOLE_POLL
 267                         if (unlikely(serial_polled)) {
 268                                 serial_polled = 0;
 269                                 return;
 270                         }
 271 #endif
 272                       error_return:
 273                         tty_insert_flip_char(tty, ch, flg);
 274
 275                 }               /* End while (i--) */
 276
 277                 /* This BD is ready to be used again. Clear status. get next */
 278                 clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
 279                                         BD_SC_OV | BD_SC_ID);
 280                 setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
 281
 282                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 283                         bdp = pinfo->rx_bd_base;
 284                 else
 285                         bdp++;
 286
 287         } /* End for (;;) */
 288
 289         /* Write back buffer pointer */
 290         pinfo->rx_cur = bdp;
 291
 292         /* activate BH processing */
 293         tty_flip_buffer_push(tty);
 294
 295         return;
 296
 297         /* Error processing */
 298
 299       handle_error:
 300         /* Statistics */
 301         if (status & BD_SC_BR)
 302                 port->icount.brk++;
 303         if (status & BD_SC_PR)
 304                 port->icount.parity++;
 305         if (status & BD_SC_FR)
 306                 port->icount.frame++;
 307         if (status & BD_SC_OV)
 308                 port->icount.overrun++;
 309
 310         /* Mask out ignored conditions */
 311         status &= port->read_status_mask;
 312
 313         /* Handle the remaining ones */
 314         if (status & BD_SC_BR)
 315                 flg = TTY_BREAK;
 316         else if (status & BD_SC_PR)
 317                 flg = TTY_PARITY;
 318         else if (status & BD_SC_FR)
 319                 flg = TTY_FRAME;
 320
 321         /* overrun does not affect the current character ! */
 322         if (status & BD_SC_OV) {
 323                 ch = 0;
 324                 flg = TTY_OVERRUN;
 325                 /* We skip this buffer */
 326                 /* CHECK: Is really nothing senseful there */
 327                 /* ASSUMPTION: it contains nothing valid */
 328                 i = 0;
 329         }
 330 #ifdef SUPPORT_SYSRQ
 331         port->sysrq = 0;
 332 #endif
 333         goto error_return;
 334 }
 335
 336 /*
 337  * Asynchron mode interrupt handler
 338  */
 339 static irqreturn_t cpm_uart_int(int irq, void *data)
 340 {
 341         u8 events;
 342         struct uart_port *port = data;
 343         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 344         smc_t __iomem *smcp = pinfo->smcp;
 345         scc_t __iomem *sccp = pinfo->sccp;
 346
 347         pr_debug("CPM uart[%d]:IRQ\n", port->line);
 348
 349         if (IS_SMC(pinfo)) {
 350                 events = in_8(&smcp->smc_smce);
 351                 out_8(&smcp->smc_smce, events);
 352                 if (events & SMCM_BRKE)
 353                         uart_handle_break(port);
 354                 if (events & SMCM_RX)
 355                         cpm_uart_int_rx(port);
 356                 if (events & SMCM_TX)
 357                         cpm_uart_int_tx(port);
 358         } else {
 359                 events = in_be16(&sccp->scc_scce);
 360                 out_be16(&sccp->scc_scce, events);
 361                 if (events & UART_SCCM_BRKE)
 362                         uart_handle_break(port);
 363                 if (events & UART_SCCM_RX)
 364                         cpm_uart_int_rx(port);
 365                 if (events & UART_SCCM_TX)
 366                         cpm_uart_int_tx(port);
 367         }
 368         return (events) ? IRQ_HANDLED : IRQ_NONE;
 369 }
 370
 371 static int cpm_uart_startup(struct uart_port *port)
 372 {
 373         int retval;
 374         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 375
 376         pr_debug("CPM uart[%d]:startup\n", port->line);
 377
 378         /* Install interrupt handler. */
 379         retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
 380         if (retval)
 381                 return retval;
 382
 383         /* Startup rx-int */
 384         if (IS_SMC(pinfo)) {
 385                 setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
 386                 setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
 387         } else {
 388                 setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
 389                 setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
 390         }
 391
 392         if (!(pinfo->flags & FLAG_CONSOLE))
 393                 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 394         return 0;
 395 }
 396
 397 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
 398 {
 399         set_current_state(TASK_UNINTERRUPTIBLE);
 400         schedule_timeout(pinfo->wait_closing);
 401 }
 402
 403 /*
 404  * Shutdown the uart
 405  */
 406 static void cpm_uart_shutdown(struct uart_port *port)
 407 {
 408         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 409
 410         pr_debug("CPM uart[%d]:shutdown\n", port->line);
 411
 412         /* free interrupt handler */
 413         free_irq(port->irq, port);
 414
 415         /* If the port is not the console, disable Rx and Tx. */
 416         if (!(pinfo->flags & FLAG_CONSOLE)) {
 417                 /* Wait for all the BDs marked sent */
 418                 while(!cpm_uart_tx_empty(port)) {
 419                         set_current_state(TASK_UNINTERRUPTIBLE);
 420                         schedule_timeout(2);
 421                 }
 422
 423                 if (pinfo->wait_closing)
 424                         cpm_uart_wait_until_send(pinfo);
 425
 426                 /* Stop uarts */
 427                 if (IS_SMC(pinfo)) {
 428                         smc_t __iomem *smcp = pinfo->smcp;
 429                         clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 430                         clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
 431                 } else {
 432                         scc_t __iomem *sccp = pinfo->sccp;
 433                         clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 434                         clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 435                 }
 436
 437                 /* Shut them really down and reinit buffer descriptors */
 438                 if (IS_SMC(pinfo))
 439                         cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
 440                 else
 441                         cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
 442
 443                 cpm_uart_initbd(pinfo);
 444         }
 445 }
 446
 447 static void cpm_uart_set_termios(struct uart_port *port,
 448                                  struct ktermios *termios,
 449                                  struct ktermios *old)
 450 {
 451         int baud;
 452         unsigned long flags;
 453         u16 cval, scval, prev_mode;
 454         int bits, sbits;
 455         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 456         smc_t __iomem *smcp = pinfo->smcp;
 457         scc_t __iomem *sccp = pinfo->sccp;
 458
 459         pr_debug("CPM uart[%d]:set_termios\n", port->line);
 460
 461         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
 462
 463         /* Character length programmed into the mode register is the
 464          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
 465          * 1 or 2 stop bits, minus 1.
 466          * The value 'bits' counts this for us.
 467          */
 468         cval = 0;
 469         scval = 0;
 470
 471         /* byte size */
 472         switch (termios->c_cflag & CSIZE) {
 473         case CS5:
 474                 bits = 5;
 475                 break;
 476         case CS6:
 477                 bits = 6;
 478                 break;
 479         case CS7:
 480                 bits = 7;
 481                 break;
 482         case CS8:
 483                 bits = 8;
 484                 break;
 485                 /* Never happens, but GCC is too dumb to figure it out */
 486         default:
 487                 bits = 8;
 488                 break;
 489         }
 490         sbits = bits - 5;
 491
 492         if (termios->c_cflag & CSTOPB) {
 493                 cval |= SMCMR_SL;       /* Two stops */
 494                 scval |= SCU_PSMR_SL;
 495                 bits++;
 496         }
 497
 498         if (termios->c_cflag & PARENB) {
 499                 cval |= SMCMR_PEN;
 500                 scval |= SCU_PSMR_PEN;
 501                 bits++;
 502                 if (!(termios->c_cflag & PARODD)) {
 503                         cval |= SMCMR_PM_EVEN;
 504                         scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
 505                 }
 506         }
 507
 508         /*
 509          * Update the timeout
 510          */
 511         uart_update_timeout(port, termios->c_cflag, baud);
 512
 513         /*
 514          * Set up parity check flag
 515          */
 516 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 517
 518         port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
 519         if (termios->c_iflag & INPCK)
 520                 port->read_status_mask |= BD_SC_FR | BD_SC_PR;
 521         if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
 522                 port->read_status_mask |= BD_SC_BR;
 523
 524         /*
 525          * Characters to ignore
 526          */
 527         port->ignore_status_mask = 0;
 528         if (termios->c_iflag & IGNPAR)
 529                 port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
 530         if (termios->c_iflag & IGNBRK) {
 531                 port->ignore_status_mask |= BD_SC_BR;
 532                 /*
 533                  * If we're ignore parity and break indicators, ignore
 534                  * overruns too.  (For real raw support).
 535                  */
 536                 if (termios->c_iflag & IGNPAR)
 537                         port->ignore_status_mask |= BD_SC_OV;
 538         }
 539         /*
 540          * !!! ignore all characters if CREAD is not set
 541          */
 542         if ((termios->c_cflag & CREAD) == 0)
 543                 port->read_status_mask &= ~BD_SC_EMPTY;
 544
 545         spin_lock_irqsave(&port->lock, flags);
 546
 547         /* Start bit has not been added (so don't, because we would just
 548          * subtract it later), and we need to add one for the number of
 549          * stops bits (there is always at least one).
 550          */
 551         bits++;
 552         if (IS_SMC(pinfo)) {
 553                 /* Set the mode register.  We want to keep a copy of the
 554                  * enables, because we want to put them back if they were
 555                  * present.
 556                  */
 557                 prev_mode = in_be16(&smcp->smc_smcmr);
 558                 out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval | SMCMR_SM_UART);
 559                 setbits16(&smcp->smc_smcmr, (prev_mode & (SMCMR_REN | SMCMR_TEN)));
 560         } else {
 561                 out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
 562         }
 563
 564         cpm_set_brg(pinfo->brg - 1, baud);
 565         spin_unlock_irqrestore(&port->lock, flags);
 566 }
 567
 568 static const char *cpm_uart_type(struct uart_port *port)
 569 {
 570         pr_debug("CPM uart[%d]:uart_type\n", port->line);
 571
 572         return port->type == PORT_CPM ? "CPM UART" : NULL;
 573 }
 574
 575 /*
 576  * verify the new serial_struct (for TIOCSSERIAL).
 577  */
 578 static int cpm_uart_verify_port(struct uart_port *port,
 579                                 struct serial_struct *ser)
 580 {
 581         int ret = 0;
 582
 583         pr_debug("CPM uart[%d]:verify_port\n", port->line);
 584
 585         if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
 586                 ret = -EINVAL;
 587         if (ser->irq < 0 || ser->irq >= NR_IRQS)
 588                 ret = -EINVAL;
 589         if (ser->baud_base < 9600)
 590                 ret = -EINVAL;
 591         return ret;
 592 }
 593
 594 /*
 595  * Transmit characters, refill buffer descriptor, if possible
 596  */
 597 static int cpm_uart_tx_pump(struct uart_port *port)
 598 {
 599         cbd_t __iomem *bdp;
 600         u8 *p;
 601         int count;
 602         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 603         struct circ_buf *xmit = &port->info->xmit;
 604
 605         /* Handle xon/xoff */
 606         if (port->x_char) {
 607                 /* Pick next descriptor and fill from buffer */
 608                 bdp = pinfo->tx_cur;
 609
 610                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 611
 612                 *p++ = port->x_char;
 613
 614                 out_be16(&bdp->cbd_datlen, 1);
 615                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 616                 /* Get next BD. */
 617                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 618                         bdp = pinfo->tx_bd_base;
 619                 else
 620                         bdp++;
 621                 pinfo->tx_cur = bdp;
 622
 623                 port->icount.tx++;
 624                 port->x_char = 0;
 625                 return 1;
 626         }
 627
 628         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
 629                 cpm_uart_stop_tx(port);
 630                 return 0;
 631         }
 632
 633         /* Pick next descriptor and fill from buffer */
 634         bdp = pinfo->tx_cur;
 635
 636         while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) &&
 637                xmit->tail != xmit->head) {
 638                 count = 0;
 639                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
 640                 while (count < pinfo->tx_fifosize) {
 641                         *p++ = xmit->buf[xmit->tail];
 642                         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 643                         port->icount.tx++;
 644                         count++;
 645                         if (xmit->head == xmit->tail)
 646                                 break;
 647                 }
 648                 out_be16(&bdp->cbd_datlen, count);
 649                 setbits16(&bdp->cbd_sc, BD_SC_READY);
 650                 /* Get next BD. */
 651                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
 652                         bdp = pinfo->tx_bd_base;
 653                 else
 654                         bdp++;
 655         }
 656         pinfo->tx_cur = bdp;
 657
 658         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 659                 uart_write_wakeup(port);
 660
 661         if (uart_circ_empty(xmit)) {
 662                 cpm_uart_stop_tx(port);
 663                 return 0;
 664         }
 665
 666         return 1;
 667 }
 668
 669 /*
 670  * init buffer descriptors
 671  */
 672 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
 673 {
 674         int i;
 675         u8 *mem_addr;
 676         cbd_t __iomem *bdp;
 677
 678         pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
 679
 680         /* Set the physical address of the host memory
 681          * buffers in the buffer descriptors, and the
 682          * virtual address for us to work with.
 683          */
 684         mem_addr = pinfo->mem_addr;
 685         bdp = pinfo->rx_cur = pinfo->rx_bd_base;
 686         for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
 687                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 688                 out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
 689                 mem_addr += pinfo->rx_fifosize;
 690         }
 691
 692         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 693         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
 694
 695         /* Set the physical address of the host memory
 696          * buffers in the buffer descriptors, and the
 697          * virtual address for us to work with.
 698          */
 699         mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
 700         bdp = pinfo->tx_cur = pinfo->tx_bd_base;
 701         for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
 702                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 703                 out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
 704                 mem_addr += pinfo->tx_fifosize;
 705         }
 706
 707         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
 708         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
 709 }
 710
 711 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
 712 {
 713         scc_t __iomem *scp;
 714         scc_uart_t __iomem *sup;
 715
 716         pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
 717
 718         scp = pinfo->sccp;
 719         sup = pinfo->sccup;
 720
 721         /* Store address */
 722         out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
 723                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 724         out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
 725                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 726
 727         /* Set up the uart parameters in the
 728          * parameter ram.
 729          */
 730
 731         cpm_set_scc_fcr(sup);
 732
 733         out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
 734         out_be16(&sup->scc_maxidl, pinfo->rx_fifosize);
 735         out_be16(&sup->scc_brkcr, 1);
 736         out_be16(&sup->scc_parec, 0);
 737         out_be16(&sup->scc_frmec, 0);
 738         out_be16(&sup->scc_nosec, 0);
 739         out_be16(&sup->scc_brkec, 0);
 740         out_be16(&sup->scc_uaddr1, 0);
 741         out_be16(&sup->scc_uaddr2, 0);
 742         out_be16(&sup->scc_toseq, 0);
 743         out_be16(&sup->scc_char1, 0x8000);
 744         out_be16(&sup->scc_char2, 0x8000);
 745         out_be16(&sup->scc_char3, 0x8000);
 746         out_be16(&sup->scc_char4, 0x8000);
 747         out_be16(&sup->scc_char5, 0x8000);
 748         out_be16(&sup->scc_char6, 0x8000);
 749         out_be16(&sup->scc_char7, 0x8000);
 750         out_be16(&sup->scc_char8, 0x8000);
 751         out_be16(&sup->scc_rccm, 0xc0ff);
 752
 753         /* Send the CPM an initialize command.
 754          */
 755         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 756
 757         /* Set UART mode, 8 bit, no parity, one stop.
 758          * Enable receive and transmit.
 759          */
 760         out_be32(&scp->scc_gsmrh, 0);
 761         out_be32(&scp->scc_gsmrl,
 762                  SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
 763
 764         /* Enable rx interrupts  and clear all pending events.  */
 765         out_be16(&scp->scc_sccm, 0);
 766         out_be16(&scp->scc_scce, 0xffff);
 767         out_be16(&scp->scc_dsr, 0x7e7e);
 768         out_be16(&scp->scc_psmr, 0x3000);
 769
 770         setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 771 }
 772
 773 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
 774 {
 775         smc_t __iomem *sp;
 776         smc_uart_t __iomem *up;
 777
 778         pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
 779
 780         sp = pinfo->smcp;
 781         up = pinfo->smcup;
 782
 783         /* Store address */
 784         out_be16(&pinfo->smcup->smc_rbase,
 785                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
 786         out_be16(&pinfo->smcup->smc_tbase,
 787                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
 788
 789 /*
 790  *  In case SMC1 is being relocated...
 791  */
 792 #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
 793         out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
 794         out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
 795         out_be32(&up->smc_rstate, 0);
 796         out_be32(&up->smc_tstate, 0);
 797         out_be16(&up->smc_brkcr, 1);              /* number of break chars */
 798         out_be16(&up->smc_brkec, 0);
 799 #endif
 800
 801         /* Set up the uart parameters in the
 802          * parameter ram.
 803          */
 804         cpm_set_smc_fcr(up);
 805
 806         /* Using idle charater time requires some additional tuning.  */
 807         out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
 808         out_be16(&up->smc_maxidl, pinfo->rx_fifosize);
 809         out_be16(&up->smc_brklen, 0);
 810         out_be16(&up->smc_brkec, 0);
 811         out_be16(&up->smc_brkcr, 1);
 812
 813         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
 814
 815         /* Set UART mode, 8 bit, no parity, one stop.
 816          * Enable receive and transmit.
 817          */
 818         out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
 819
 820         /* Enable only rx interrupts clear all pending events. */
 821         out_8(&sp->smc_smcm, 0);
 822         out_8(&sp->smc_smce, 0xff);
 823
 824         setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 825 }
 826
 827 /*
 828  * Initialize port. This is called from early_console stuff
 829  * so we have to be careful here !
 830  */
 831 static int cpm_uart_request_port(struct uart_port *port)
 832 {
 833         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 834         int ret;
 835
 836         pr_debug("CPM uart[%d]:request port\n", port->line);
 837
 838         if (pinfo->flags & FLAG_CONSOLE)
 839                 return 0;
 840
 841         if (IS_SMC(pinfo)) {
 842                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
 843                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
 844         } else {
 845                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
 846                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
 847         }
 848
 849         ret = cpm_uart_allocbuf(pinfo, 0);
 850
 851         if (ret)
 852                 return ret;
 853
 854         cpm_uart_initbd(pinfo);
 855         if (IS_SMC(pinfo))
 856                 cpm_uart_init_smc(pinfo);
 857         else
 858                 cpm_uart_init_scc(pinfo);
 859
 860         return 0;
 861 }
 862
 863 static void cpm_uart_release_port(struct uart_port *port)
 864 {
 865         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 866
 867         if (!(pinfo->flags & FLAG_CONSOLE))
 868                 cpm_uart_freebuf(pinfo);
 869 }
 870
 871 /*
 872  * Configure/autoconfigure the port.
 873  */
 874 static void cpm_uart_config_port(struct uart_port *port, int flags)
 875 {
 876         pr_debug("CPM uart[%d]:config_port\n", port->line);
 877
 878         if (flags & UART_CONFIG_TYPE) {
 879                 port->type = PORT_CPM;
 880                 cpm_uart_request_port(port);
 881         }
 882 }
 883
 884 #ifdef CONFIG_CONSOLE_POLL
 885 /* Serial polling routines for writing and reading from the uart while
 886  * in an interrupt or debug context.
 887  */
 888
 889 #define GDB_BUF_SIZE    512     /* power of 2, please */
 890
 891 static char poll_buf[GDB_BUF_SIZE];
 892 static char *pollp;
 893 static int poll_chars;
 894
 895 static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo)
 896 {
 897         u_char          c, *cp;
 898         volatile cbd_t  *bdp;
 899         int             i;
 900
 901         /* Get the address of the host memory buffer.
 902          */
 903         bdp = pinfo->rx_cur;
 904         while (bdp->cbd_sc & BD_SC_EMPTY)
 905                 ;
 906
 907         /* If the buffer address is in the CPM DPRAM, don't
 908          * convert it.
 909          */
 910         cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
 911
 912         if (obuf) {
 913                 i = c = bdp->cbd_datlen;
 914                 while (i-- > 0)
 915                         *obuf++ = *cp++;
 916         } else
 917                 c = *cp;
 918         bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
 919         bdp->cbd_sc |= BD_SC_EMPTY;
 920
 921         if (bdp->cbd_sc & BD_SC_WRAP)
 922                 bdp = pinfo->rx_bd_base;
 923         else
 924                 bdp++;
 925         pinfo->rx_cur = (cbd_t *)bdp;
 926
 927         return (int)c;
 928 }
 929
 930 static int cpm_get_poll_char(struct uart_port *port)
 931 {
 932         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 933
 934         if (!serial_polled) {
 935                 serial_polled = 1;
 936                 poll_chars = 0;
 937         }
 938         if (poll_chars <= 0) {
 939                 poll_chars = poll_wait_key(poll_buf, pinfo);
 940                 pollp = poll_buf;
 941         }
 942         poll_chars--;
 943         return *pollp++;
 944 }
 945
 946 static void cpm_put_poll_char(struct uart_port *port,
 947                          unsigned char c)
 948 {
 949         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 950         static char ch[2];
 951
 952         ch[0] = (char)c;
 953         cpm_uart_early_write(pinfo->port.line, ch, 1);
 954 }
 955 #endif /* CONFIG_CONSOLE_POLL */
 956
 957 static struct uart_ops cpm_uart_pops = {
 958         .tx_empty       = cpm_uart_tx_empty,
 959         .set_mctrl      = cpm_uart_set_mctrl,
 960         .get_mctrl      = cpm_uart_get_mctrl,
 961         .stop_tx        = cpm_uart_stop_tx,
 962         .start_tx       = cpm_uart_start_tx,
 963         .stop_rx        = cpm_uart_stop_rx,
 964         .enable_ms      = cpm_uart_enable_ms,
 965         .break_ctl      = cpm_uart_break_ctl,
 966         .startup        = cpm_uart_startup,
 967         .shutdown       = cpm_uart_shutdown,
 968         .set_termios    = cpm_uart_set_termios,
 969         .type           = cpm_uart_type,
 970         .release_port   = cpm_uart_release_port,
 971         .request_port   = cpm_uart_request_port,
 972         .config_port    = cpm_uart_config_port,
 973         .verify_port    = cpm_uart_verify_port,
 974 #ifdef CONFIG_CONSOLE_POLL
 975         .poll_get_char = cpm_get_poll_char,
 976         .poll_put_char = cpm_put_poll_char,
 977 #endif
 978 };
 979
 980 struct uart_cpm_port cpm_uart_ports[UART_NR];
 981
 982 static int cpm_uart_init_port(struct device_node *np,
 983                               struct uart_cpm_port *pinfo)
 984 {
 985         const u32 *data;
 986         void __iomem *mem, *pram;
 987         int len;
 988         int ret;
 989
 990         data = of_get_property(np, "fsl,cpm-brg", &len);
 991         if (!data || len != 4) {
 992                 printk(KERN_ERR "CPM UART %s has no/invalid "
 993                                 "fsl,cpm-brg property.\n", np->name);
 994                 return -EINVAL;
 995         }
 996         pinfo->brg = *data;
 997
 998         data = of_get_property(np, "fsl,cpm-command", &len);
 999         if (!data || len != 4) {
1000                 printk(KERN_ERR "CPM UART %s has no/invalid "
1001                                 "fsl,cpm-command property.\n", np->name);
1002                 return -EINVAL;
1003         }
1004         pinfo->command = *data;
1005
1006         mem = of_iomap(np, 0);
1007         if (!mem)
1008                 return -ENOMEM;
1009
1010         if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") ||
1011             of_device_is_compatible(np, "fsl,cpm2-scc-uart")) {
1012                 pinfo->sccp = mem;
1013                 pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np);
1014         } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") ||
1015                    of_device_is_compatible(np, "fsl,cpm2-smc-uart")) {
1016                 pinfo->flags |= FLAG_SMC;
1017                 pinfo->smcp = mem;
1018                 pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np);
1019         } else {
1020                 ret = -ENODEV;
1021                 goto out_mem;
1022         }
1023
1024         if (!pram) {
1025                 ret = -ENOMEM;
1026                 goto out_mem;
1027         }
1028
1029         pinfo->tx_nrfifos = TX_NUM_FIFO;
1030         pinfo->tx_fifosize = TX_BUF_SIZE;
1031         pinfo->rx_nrfifos = RX_NUM_FIFO;
1032         pinfo->rx_fifosize = RX_BUF_SIZE;
1033
1034         pinfo->port.uartclk = ppc_proc_freq;
1035         pinfo->port.mapbase = (unsigned long)mem;
1036         pinfo->port.type = PORT_CPM;
1037         pinfo->port.ops = &cpm_uart_pops,
1038         pinfo->port.iotype = UPIO_MEM;
1039         pinfo->port.fifosize = pinfo->tx_nrfifos * pinfo->tx_fifosize;
1040         spin_lock_init(&pinfo->port.lock);
1041
1042         pinfo->port.irq = of_irq_to_resource(np, 0, NULL);
1043         if (pinfo->port.irq == NO_IRQ) {
1044                 ret = -EINVAL;
1045                 goto out_pram;
1046         }
1047
1048         return cpm_uart_request_port(&pinfo->port);
1049
1050 out_pram:
1051         cpm_uart_unmap_pram(pinfo, pram);
1052 out_mem:
1053         iounmap(mem);
1054         return ret;
1055 }
1056
1057 #ifdef CONFIG_SERIAL_CPM_CONSOLE
1058 /*
1059  *      Print a string to the serial port trying not to disturb
1060  *      any possible real use of the port...
1061  *
1062  *      Note that this is called with interrupts already disabled
1063  */
1064 static void cpm_uart_console_write(struct console *co, const char *s,
1065                                    u_int count)
1066 {
1067         struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1068         unsigned int i;
1069         cbd_t __iomem *bdp, *bdbase;
1070         unsigned char *cp;
1071         unsigned long flags;
1072         int nolock = oops_in_progress;
1073
1074         if (unlikely(nolock)) {
1075                 local_irq_save(flags);
1076         } else {
1077                 spin_lock_irqsave(&pinfo->port.lock, flags);
1078         }
1079
1080         /* Get the address of the host memory buffer.
1081          */
1082         bdp = pinfo->tx_cur;
1083         bdbase = pinfo->tx_bd_base;
1084
1085         /*
1086          * Now, do each character.  This is not as bad as it looks
1087          * since this is a holding FIFO and not a transmitting FIFO.
1088          * We could add the complexity of filling the entire transmit
1089          * buffer, but we would just wait longer between accesses......
1090          */
1091         for (i = 0; i < count; i++, s++) {
1092                 /* Wait for transmitter fifo to empty.
1093                  * Ready indicates output is ready, and xmt is doing
1094                  * that, not that it is ready for us to send.
1095                  */
1096                 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1097                         ;
1098
1099                 /* Send the character out.
1100                  * If the buffer address is in the CPM DPRAM, don't
1101                  * convert it.
1102                  */
1103                 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
1104                 *cp = *s;
1105
1106                 out_be16(&bdp->cbd_datlen, 1);
1107                 setbits16(&bdp->cbd_sc, BD_SC_READY);
1108
1109                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1110                         bdp = bdbase;
1111                 else
1112                         bdp++;
1113
1114                 /* if a LF, also do CR... */
1115                 if (*s == 10) {
1116                         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1117                                 ;
1118
1119                         cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
1120                         *cp = 13;
1121
1122                         out_be16(&bdp->cbd_datlen, 1);
1123                         setbits16(&bdp->cbd_sc, BD_SC_READY);
1124
1125                         if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1126                                 bdp = bdbase;
1127                         else
1128                                 bdp++;
1129                 }
1130         }
1131
1132         /*
1133          * Finally, Wait for transmitter & holding register to empty
1134          *  and restore the IER
1135          */
1136         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1137                 ;
1138
1139         pinfo->tx_cur = bdp;
1140
1141         if (unlikely(nolock)) {
1142                 local_irq_restore(flags);
1143         } else {
1144                 spin_unlock_irqrestore(&pinfo->port.lock, flags);
1145         }
1146 }
1147
1148
1149 static int __init cpm_uart_console_setup(struct console *co, char *options)
1150 {
1151         int baud = 38400;
1152         int bits = 8;
1153         int parity = 'n';
1154         int flow = 'n';
1155         int ret;
1156         struct uart_cpm_port *pinfo;
1157         struct uart_port *port;
1158
1159         struct device_node *np = NULL;
1160         int i = 0;
1161
1162         if (co->index >= UART_NR) {
1163                 printk(KERN_ERR "cpm_uart: console index %d too high\n",
1164                        co->index);
1165                 return -ENODEV;
1166         }
1167
1168         do {
1169                 np = of_find_node_by_type(np, "serial");
1170                 if (!np)
1171                         return -ENODEV;
1172
1173                 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1174                     !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1175                     !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1176                     !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1177                         i--;
1178         } while (i++ != co->index);
1179
1180         pinfo = &cpm_uart_ports[co->index];
1181
1182         pinfo->flags |= FLAG_CONSOLE;
1183         port = &pinfo->port;
1184
1185         ret = cpm_uart_init_port(np, pinfo);
1186         of_node_put(np);
1187         if (ret)
1188                 return ret;
1189
1190         if (options) {
1191                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1192         } else {
1193                 if ((baud = uart_baudrate()) == -1)
1194                         baud = 9600;
1195         }
1196
1197 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
1198         udbg_putc = NULL;
1199 #endif
1200
1201         cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
1202
1203         if (IS_SMC(pinfo)) {
1204                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
1205                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1206         } else {
1207                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
1208                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1209         }
1210
1211         ret = cpm_uart_allocbuf(pinfo, 1);
1212
1213         if (ret)
1214                 return ret;
1215
1216         cpm_uart_initbd(pinfo);
1217
1218         if (IS_SMC(pinfo))
1219                 cpm_uart_init_smc(pinfo);
1220         else
1221                 cpm_uart_init_scc(pinfo);
1222
1223         uart_set_options(port, co, baud, parity, bits, flow);
1224         cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
1225
1226         return 0;
1227 }
1228
1229 static struct uart_driver cpm_reg;
1230 static struct console cpm_scc_uart_console = {
1231         .name           = "ttyCPM",
1232         .write          = cpm_uart_console_write,
1233         .device         = uart_console_device,
1234         .setup          = cpm_uart_console_setup,
1235         .flags          = CON_PRINTBUFFER,
1236         .index          = -1,
1237         .data           = &cpm_reg,
1238 };
1239
1240 static int __init cpm_uart_console_init(void)
1241 {
1242         register_console(&cpm_scc_uart_console);
1243         return 0;
1244 }
1245
1246 console_initcall(cpm_uart_console_init);
1247
1248 #define CPM_UART_CONSOLE        &cpm_scc_uart_console
1249 #else
1250 #define CPM_UART_CONSOLE        NULL
1251 #endif
1252
1253 static struct uart_driver cpm_reg = {
1254         .owner          = THIS_MODULE,
1255         .driver_name    = "ttyCPM",
1256         .dev_name       = "ttyCPM",
1257         .major          = SERIAL_CPM_MAJOR,
1258         .minor          = SERIAL_CPM_MINOR,
1259         .cons           = CPM_UART_CONSOLE,
1260         .nr             = UART_NR,
1261 };
1262
1263 static int probe_index;
1264
1265 static int __devinit cpm_uart_probe(struct of_device *ofdev,
1266                                     const struct of_device_id *match)
1267 {
1268         int index = probe_index++;
1269         struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1270         int ret;
1271
1272         pinfo->port.line = index;
1273
1274         if (index >= UART_NR)
1275                 return -ENODEV;
1276
1277         dev_set_drvdata(&ofdev->dev, pinfo);
1278
1279         ret = cpm_uart_init_port(ofdev->node, pinfo);
1280         if (ret)
1281                 return ret;
1282
1283         return uart_add_one_port(&cpm_reg, &pinfo->port);
1284 }
1285
1286 static int __devexit cpm_uart_remove(struct of_device *ofdev)
1287 {
1288         struct uart_cpm_port *pinfo = dev_get_drvdata(&ofdev->dev);
1289         return uart_remove_one_port(&cpm_reg, &pinfo->port);
1290 }
1291
1292 static struct of_device_id cpm_uart_match[] = {
1293         {
1294                 .compatible = "fsl,cpm1-smc-uart",
1295         },
1296         {
1297                 .compatible = "fsl,cpm1-scc-uart",
1298         },
1299         {
1300                 .compatible = "fsl,cpm2-smc-uart",
1301         },
1302         {
1303                 .compatible = "fsl,cpm2-scc-uart",
1304         },
1305         {}
1306 };
1307
1308 static struct of_platform_driver cpm_uart_driver = {
1309         .name = "cpm_uart",
1310         .match_table = cpm_uart_match,
1311         .probe = cpm_uart_probe,
1312         .remove = cpm_uart_remove,
1313  };
1314
1315 static int __init cpm_uart_init(void)
1316 {
1317         int ret = uart_register_driver(&cpm_reg);
1318         if (ret)
1319                 return ret;
1320
1321         ret = of_register_platform_driver(&cpm_uart_driver);
1322         if (ret)
1323                 uart_unregister_driver(&cpm_reg);
1324
1325         return ret;
1326 }
1327
1328 static void __exit cpm_uart_exit(void)
1329 {
1330         of_unregister_platform_driver(&cpm_uart_driver);
1331         uart_unregister_driver(&cpm_reg);
1332 }
1333
1334 module_init(cpm_uart_init);
1335 module_exit(cpm_uart_exit);
1336
1337 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1338 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1339 MODULE_LICENSE("GPL");
1340 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);