2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
6 * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx>
8 * This driver is derived from the Linux sym53c8xx driver.
9 * Copyright (C) 1998-2000 Gerard Roudier
11 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
12 * a port of the FreeBSD ncr driver to Linux-1.2.13.
14 * The original ncr driver has been written for 386bsd and FreeBSD by
15 * Wolfgang Stanglmeier <wolf@cologne.de>
16 * Stefan Esser <se@mi.Uni-Koeln.de>
17 * Copyright (C) 1994 Wolfgang Stanglmeier
19 * Other major contributions:
21 * NVRAM detection and reading.
22 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
24 *-----------------------------------------------------------------------------
26 * This program is free software; you can redistribute it and/or modify
27 * it under the terms of the GNU General Public License as published by
28 * the Free Software Foundation; either version 2 of the License, or
29 * (at your option) any later version.
31 * This program is distributed in the hope that it will be useful,
32 * but WITHOUT ANY WARRANTY; without even the implied warranty of
33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
34 * GNU General Public License for more details.
36 * You should have received a copy of the GNU General Public License
37 * along with this program; if not, write to the Free Software
38 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
41 #include <linux/slab.h>
42 #include <asm/param.h> /* for timeouts in units of HZ */
43 #include <scsi/scsi_dbg.h>
46 #include "sym_nvram.h"
49 #define SYM_DEBUG_GENERIC_SUPPORT
53 * Needed function prototypes.
55 static void sym_int_ma (struct sym_hcb *np);
56 static void sym_int_sir (struct sym_hcb *np);
57 static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np);
58 static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa);
59 static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln);
60 static void sym_complete_error (struct sym_hcb *np, struct sym_ccb *cp);
61 static void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp);
62 static int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp);
65 * Print a buffer in hexadecimal format with a ".\n" at end.
67 static void sym_printl_hex(u_char *p, int n)
74 static void sym_print_msg(struct sym_ccb *cp, char *label, u_char *msg)
76 sym_print_addr(cp->cmd, "%s: ", label);
82 static void sym_print_nego_msg(struct sym_hcb *np, int target, char *label, u_char *msg)
84 struct sym_tcb *tp = &np->target[target];
85 dev_info(&tp->starget->dev, "%s: ", label);
92 * Print something that tells about extended errors.
94 void sym_print_xerr(struct scsi_cmnd *cmd, int x_status)
96 if (x_status & XE_PARITY_ERR) {
97 sym_print_addr(cmd, "unrecovered SCSI parity error.\n");
99 if (x_status & XE_EXTRA_DATA) {
100 sym_print_addr(cmd, "extraneous data discarded.\n");
102 if (x_status & XE_BAD_PHASE) {
103 sym_print_addr(cmd, "illegal scsi phase (4/5).\n");
105 if (x_status & XE_SODL_UNRUN) {
106 sym_print_addr(cmd, "ODD transfer in DATA OUT phase.\n");
108 if (x_status & XE_SWIDE_OVRUN) {
109 sym_print_addr(cmd, "ODD transfer in DATA IN phase.\n");
114 * Return a string for SCSI BUS mode.
116 static char *sym_scsi_bus_mode(int mode)
119 case SMODE_HVD: return "HVD";
120 case SMODE_SE: return "SE";
121 case SMODE_LVD: return "LVD";
127 * Soft reset the chip.
129 * Raising SRST when the chip is running may cause
130 * problems on dual function chips (see below).
131 * On the other hand, LVD devices need some delay
132 * to settle and report actual BUS mode in STEST4.
134 static void sym_chip_reset (struct sym_hcb *np)
136 OUTB(np, nc_istat, SRST);
139 OUTB(np, nc_istat, 0);
141 udelay(2000); /* For BUS MODE to settle */
145 * Really soft reset the chip.:)
147 * Some 896 and 876 chip revisions may hang-up if we set
148 * the SRST (soft reset) bit at the wrong time when SCRIPTS
150 * So, we need to abort the current operation prior to
151 * soft resetting the chip.
153 static void sym_soft_reset (struct sym_hcb *np)
158 if (!(np->features & FE_ISTAT1) || !(INB(np, nc_istat1) & SCRUN))
161 OUTB(np, nc_istat, CABRT);
162 for (i = 100000 ; i ; --i) {
163 istat = INB(np, nc_istat);
167 else if (istat & DIP) {
168 if (INB(np, nc_dstat) & ABRT)
173 OUTB(np, nc_istat, 0);
175 printf("%s: unable to abort current chip operation, "
176 "ISTAT=0x%02x.\n", sym_name(np), istat);
182 * Start reset process.
184 * The interrupt handler will reinitialize the chip.
186 static void sym_start_reset(struct sym_hcb *np)
188 sym_reset_scsi_bus(np, 1);
191 int sym_reset_scsi_bus(struct sym_hcb *np, int enab_int)
196 sym_soft_reset(np); /* Soft reset the chip */
198 OUTW(np, nc_sien, RST);
200 * Enable Tolerant, reset IRQD if present and
201 * properly set IRQ mode, prior to resetting the bus.
203 OUTB(np, nc_stest3, TE);
204 OUTB(np, nc_dcntl, (np->rv_dcntl & IRQM));
205 OUTB(np, nc_scntl1, CRST);
209 if (!SYM_SETUP_SCSI_BUS_CHECK)
212 * Check for no terminators or SCSI bus shorts to ground.
213 * Read SCSI data bus, data parity bits and control signals.
214 * We are expecting RESET to be TRUE and other signals to be
217 term = INB(np, nc_sstat0);
218 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
219 term |= ((INB(np, nc_sstat2) & 0x01) << 26) | /* sdp1 */
220 ((INW(np, nc_sbdl) & 0xff) << 9) | /* d7-0 */
221 ((INW(np, nc_sbdl) & 0xff00) << 10) | /* d15-8 */
222 INB(np, nc_sbcl); /* req ack bsy sel atn msg cd io */
227 if (term != (2<<7)) {
228 printf("%s: suspicious SCSI data while resetting the BUS.\n",
230 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
231 "0x%lx, expecting 0x%lx\n",
233 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
234 (u_long)term, (u_long)(2<<7));
235 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
239 OUTB(np, nc_scntl1, 0);
244 * Select SCSI clock frequency
246 static void sym_selectclock(struct sym_hcb *np, u_char scntl3)
249 * If multiplier not present or not selected, leave here.
251 if (np->multiplier <= 1) {
252 OUTB(np, nc_scntl3, scntl3);
256 if (sym_verbose >= 2)
257 printf ("%s: enabling clock multiplier\n", sym_name(np));
259 OUTB(np, nc_stest1, DBLEN); /* Enable clock multiplier */
261 * Wait for the LCKFRQ bit to be set if supported by the chip.
262 * Otherwise wait 50 micro-seconds (at least).
264 if (np->features & FE_LCKFRQ) {
266 while (!(INB(np, nc_stest4) & LCKFRQ) && --i > 0)
269 printf("%s: the chip cannot lock the frequency\n",
275 OUTB(np, nc_stest3, HSC); /* Halt the scsi clock */
276 OUTB(np, nc_scntl3, scntl3);
277 OUTB(np, nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
278 OUTB(np, nc_stest3, 0x00); /* Restart scsi clock */
283 * Determine the chip's clock frequency.
285 * This is essential for the negotiation of the synchronous
288 * Note: we have to return the correct value.
289 * THERE IS NO SAFE DEFAULT VALUE.
291 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
292 * 53C860 and 53C875 rev. 1 support fast20 transfers but
293 * do not have a clock doubler and so are provided with a
294 * 80 MHz clock. All other fast20 boards incorporate a doubler
295 * and so should be delivered with a 40 MHz clock.
296 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
297 * clock and provide a clock quadrupler (160 Mhz).
301 * calculate SCSI clock frequency (in KHz)
303 static unsigned getfreq (struct sym_hcb *np, int gen)
309 * Measure GEN timer delay in order
310 * to calculate SCSI clock frequency
312 * This code will never execute too
313 * many loop iterations (if DELAY is
314 * reasonably correct). It could get
315 * too low a delay (too high a freq.)
316 * if the CPU is slow executing the
317 * loop for some reason (an NMI, for
318 * example). For this reason we will
319 * if multiple measurements are to be
320 * performed trust the higher delay
321 * (lower frequency returned).
323 OUTW(np, nc_sien, 0); /* mask all scsi interrupts */
324 INW(np, nc_sist); /* clear pending scsi interrupt */
325 OUTB(np, nc_dien, 0); /* mask all dma interrupts */
326 INW(np, nc_sist); /* another one, just to be sure :) */
328 * The C1010-33 core does not report GEN in SIST,
329 * if this interrupt is masked in SIEN.
330 * I don't know yet if the C1010-66 behaves the same way.
332 if (np->features & FE_C10) {
333 OUTW(np, nc_sien, GEN);
334 OUTB(np, nc_istat1, SIRQD);
336 OUTB(np, nc_scntl3, 4); /* set pre-scaler to divide by 3 */
337 OUTB(np, nc_stime1, 0); /* disable general purpose timer */
338 OUTB(np, nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
339 while (!(INW(np, nc_sist) & GEN) && ms++ < 100000)
340 udelay(1000/4); /* count in 1/4 of ms */
341 OUTB(np, nc_stime1, 0); /* disable general purpose timer */
343 * Undo C1010-33 specific settings.
345 if (np->features & FE_C10) {
346 OUTW(np, nc_sien, 0);
347 OUTB(np, nc_istat1, 0);
350 * set prescaler to divide by whatever 0 means
351 * 0 ought to choose divide by 2, but appears
352 * to set divide by 3.5 mode in my 53c810 ...
354 OUTB(np, nc_scntl3, 0);
357 * adjust for prescaler, and convert into KHz
359 f = ms ? ((1 << gen) * (4340*4)) / ms : 0;
362 * The C1010-33 result is biased by a factor
363 * of 2/3 compared to earlier chips.
365 if (np->features & FE_C10)
368 if (sym_verbose >= 2)
369 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
370 sym_name(np), gen, ms/4, f);
375 static unsigned sym_getfreq (struct sym_hcb *np)
380 getfreq (np, gen); /* throw away first result */
381 f1 = getfreq (np, gen);
382 f2 = getfreq (np, gen);
383 if (f1 > f2) f1 = f2; /* trust lower result */
388 * Get/probe chip SCSI clock frequency
390 static void sym_getclock (struct sym_hcb *np, int mult)
392 unsigned char scntl3 = np->sv_scntl3;
393 unsigned char stest1 = np->sv_stest1;
399 * True with 875/895/896/895A with clock multiplier selected
401 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
402 if (sym_verbose >= 2)
403 printf ("%s: clock multiplier found\n", sym_name(np));
404 np->multiplier = mult;
408 * If multiplier not found or scntl3 not 7,5,3,
409 * reset chip and get frequency from general purpose timer.
410 * Otherwise trust scntl3 BIOS setting.
412 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
413 OUTB(np, nc_stest1, 0); /* make sure doubler is OFF */
414 f1 = sym_getfreq (np);
417 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
419 if (f1 < 45000) f1 = 40000;
420 else if (f1 < 55000) f1 = 50000;
423 if (f1 < 80000 && mult > 1) {
424 if (sym_verbose >= 2)
425 printf ("%s: clock multiplier assumed\n",
427 np->multiplier = mult;
430 if ((scntl3 & 7) == 3) f1 = 40000;
431 else if ((scntl3 & 7) == 5) f1 = 80000;
434 f1 /= np->multiplier;
438 * Compute controller synchronous parameters.
440 f1 *= np->multiplier;
445 * Get/probe PCI clock frequency
447 static int sym_getpciclock (struct sym_hcb *np)
452 * For now, we only need to know about the actual
453 * PCI BUS clock frequency for C1010-66 chips.
456 if (np->features & FE_66MHZ) {
460 OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
462 OUTB(np, nc_stest1, 0);
470 * SYMBIOS chip clock divisor table.
472 * Divisors are multiplied by 10,000,000 in order to make
473 * calculations more simple.
476 static u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
479 * Get clock factor and sync divisor for a given
480 * synchronous factor period.
483 sym_getsync(struct sym_hcb *np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
485 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
486 int div = np->clock_divn; /* Number of divisors supported */
487 u32 fak; /* Sync factor in sxfer */
488 u32 per; /* Period in tenths of ns */
489 u32 kpc; /* (per * clk) */
493 * Compute the synchronous period in tenths of nano-seconds
495 if (dt && sfac <= 9) per = 125;
496 else if (sfac <= 10) per = 250;
497 else if (sfac == 11) per = 303;
498 else if (sfac == 12) per = 500;
499 else per = 40 * sfac;
507 * For earliest C10 revision 0, we cannot use extra
508 * clocks for the setting of the SCSI clocking.
509 * Note that this limits the lowest sync data transfer
510 * to 5 Mega-transfers per second and may result in
511 * using higher clock divisors.
514 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
516 * Look for the lowest clock divisor that allows an
517 * output speed not faster than the period.
521 if (kpc > (div_10M[div] << 2)) {
526 fak = 0; /* No extra clocks */
527 if (div == np->clock_divn) { /* Are we too fast ? */
537 * Look for the greatest clock divisor that allows an
538 * input speed faster than the period.
541 if (kpc >= (div_10M[div] << 2)) break;
544 * Calculate the lowest clock factor that allows an output
545 * speed not faster than the period, and the max output speed.
546 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
547 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
550 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
551 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
553 fak = (kpc - 1) / div_10M[div] + 1 - 4;
554 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
558 * Check against our hardware limits, or bugs :).
566 * Compute and return sync parameters.
575 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
576 * 128 transfers. All chips support at least 16 transfers
577 * bursts. The 825A, 875 and 895 chips support bursts of up
578 * to 128 transfers and the 895A and 896 support bursts of up
579 * to 64 transfers. All other chips support up to 16
582 * For PCI 32 bit data transfers each transfer is a DWORD.
583 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
585 * We use log base 2 (burst length) as internal code, with
586 * value 0 meaning "burst disabled".
590 * Burst length from burst code.
592 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
595 * Burst code from io register bits.
597 #define burst_code(dmode, ctest4, ctest5) \
598 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
601 * Set initial io register bits from burst code.
603 static __inline void sym_init_burst(struct sym_hcb *np, u_char bc)
605 np->rv_ctest4 &= ~0x80;
606 np->rv_dmode &= ~(0x3 << 6);
607 np->rv_ctest5 &= ~0x4;
610 np->rv_ctest4 |= 0x80;
614 np->rv_dmode |= ((bc & 0x3) << 6);
615 np->rv_ctest5 |= (bc & 0x4);
621 * Print out the list of targets that have some flag disabled by user.
623 static void sym_print_targets_flag(struct sym_hcb *np, int mask, char *msg)
628 for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
631 if (np->target[i].usrflags & mask) {
633 printf("%s: %s disabled for targets",
643 * Save initial settings of some IO registers.
644 * Assumed to have been set by BIOS.
645 * We cannot reset the chip prior to reading the
646 * IO registers, since informations will be lost.
647 * Since the SCRIPTS processor may be running, this
648 * is not safe on paper, but it seems to work quite
651 static void sym_save_initial_setting (struct sym_hcb *np)
653 np->sv_scntl0 = INB(np, nc_scntl0) & 0x0a;
654 np->sv_scntl3 = INB(np, nc_scntl3) & 0x07;
655 np->sv_dmode = INB(np, nc_dmode) & 0xce;
656 np->sv_dcntl = INB(np, nc_dcntl) & 0xa8;
657 np->sv_ctest3 = INB(np, nc_ctest3) & 0x01;
658 np->sv_ctest4 = INB(np, nc_ctest4) & 0x80;
659 np->sv_gpcntl = INB(np, nc_gpcntl);
660 np->sv_stest1 = INB(np, nc_stest1);
661 np->sv_stest2 = INB(np, nc_stest2) & 0x20;
662 np->sv_stest4 = INB(np, nc_stest4);
663 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
664 np->sv_scntl4 = INB(np, nc_scntl4);
665 np->sv_ctest5 = INB(np, nc_ctest5) & 0x04;
668 np->sv_ctest5 = INB(np, nc_ctest5) & 0x24;
672 * Prepare io register values used by sym_start_up()
673 * according to selected and supported features.
675 static int sym_prepare_setting(struct Scsi_Host *shost, struct sym_hcb *np, struct sym_nvram *nvram)
684 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
687 * Guess the frequency of the chip's clock.
689 if (np->features & (FE_ULTRA3 | FE_ULTRA2))
690 np->clock_khz = 160000;
691 else if (np->features & FE_ULTRA)
692 np->clock_khz = 80000;
694 np->clock_khz = 40000;
697 * Get the clock multiplier factor.
699 if (np->features & FE_QUAD)
701 else if (np->features & FE_DBLR)
707 * Measure SCSI clock frequency for chips
708 * it may vary from assumed one.
710 if (np->features & FE_VARCLK)
711 sym_getclock(np, np->multiplier);
714 * Divisor to be used for async (timer pre-scaler).
716 i = np->clock_divn - 1;
718 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
726 * The C1010 uses hardwired divisors for async.
727 * So, we just throw away, the async. divisor.:-)
729 if (np->features & FE_C10)
733 * Minimum synchronous period factor supported by the chip.
734 * Btw, 'period' is in tenths of nanoseconds.
736 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
738 if (period <= 250) np->minsync = 10;
739 else if (period <= 303) np->minsync = 11;
740 else if (period <= 500) np->minsync = 12;
741 else np->minsync = (period + 40 - 1) / 40;
744 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
746 if (np->minsync < 25 &&
747 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
749 else if (np->minsync < 12 &&
750 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
754 * Maximum synchronous period factor supported by the chip.
756 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
757 np->maxsync = period > 2540 ? 254 : period / 10;
760 * If chip is a C1010, guess the sync limits in DT mode.
762 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
763 if (np->clock_khz == 160000) {
766 np->maxoffs_dt = nvram->type ? 62 : 31;
771 * 64 bit addressing (895A/896/1010) ?
773 if (np->features & FE_DAC) {
774 #if SYM_CONF_DMA_ADDRESSING_MODE == 0
775 np->rv_ccntl1 |= (DDAC);
776 #elif SYM_CONF_DMA_ADDRESSING_MODE == 1
778 np->rv_ccntl1 |= (DDAC);
780 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
781 #elif SYM_CONF_DMA_ADDRESSING_MODE == 2
783 np->rv_ccntl1 |= (DDAC);
785 np->rv_ccntl1 |= (0 | EXTIBMV);
790 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
792 if (np->features & FE_NOPM)
793 np->rv_ccntl0 |= (ENPMJ);
796 * C1010-33 Errata: Part Number:609-039638 (rev. 1) is fixed.
797 * In dual channel mode, contention occurs if internal cycles
798 * are used. Disable internal cycles.
800 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_33 &&
801 np->revision_id < 0x1)
802 np->rv_ccntl0 |= DILS;
805 * Select burst length (dwords)
807 burst_max = SYM_SETUP_BURST_ORDER;
808 if (burst_max == 255)
809 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
813 if (burst_max > np->maxburst)
814 burst_max = np->maxburst;
817 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
818 * This chip and the 860 Rev 1 may wrongly use PCI cache line
819 * based transactions on LOAD/STORE instructions. So we have
820 * to prevent these chips from using such PCI transactions in
821 * this driver. The generic ncr driver that does not use
822 * LOAD/STORE instructions does not need this work-around.
824 if ((np->device_id == PCI_DEVICE_ID_NCR_53C810 &&
825 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
826 (np->device_id == PCI_DEVICE_ID_NCR_53C860 &&
827 np->revision_id <= 0x1))
828 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
831 * Select all supported special features.
832 * If we are using on-board RAM for scripts, prefetch (PFEN)
833 * does not help, but burst op fetch (BOF) does.
834 * Disabling PFEN makes sure BOF will be used.
836 if (np->features & FE_ERL)
837 np->rv_dmode |= ERL; /* Enable Read Line */
838 if (np->features & FE_BOF)
839 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
840 if (np->features & FE_ERMP)
841 np->rv_dmode |= ERMP; /* Enable Read Multiple */
843 if ((np->features & FE_PFEN) && !np->ram_ba)
845 if (np->features & FE_PFEN)
847 np->rv_dcntl |= PFEN; /* Prefetch Enable */
848 if (np->features & FE_CLSE)
849 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
850 if (np->features & FE_WRIE)
851 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
852 if (np->features & FE_DFS)
853 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
858 np->rv_ctest4 |= MPEE; /* Master parity checking */
859 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
862 * Get parity checking, host ID and verbose mode from NVRAM
865 sym_nvram_setup_host(shost, np, nvram);
868 * Get SCSI addr of host adapter (set by bios?).
870 if (np->myaddr == 255) {
871 np->myaddr = INB(np, nc_scid) & 0x07;
873 np->myaddr = SYM_SETUP_HOST_ID;
877 * Prepare initial io register bits for burst length
879 sym_init_burst(np, burst_max);
883 * - LVD capable chips (895/895A/896/1010) report the
884 * current BUS mode through the STEST4 IO register.
885 * - For previous generation chips (825/825A/875),
886 * user has to tell us how to check against HVD,
887 * since a 100% safe algorithm is not possible.
889 np->scsi_mode = SMODE_SE;
890 if (np->features & (FE_ULTRA2|FE_ULTRA3))
891 np->scsi_mode = (np->sv_stest4 & SMODE);
892 else if (np->features & FE_DIFF) {
893 if (SYM_SETUP_SCSI_DIFF == 1) {
895 if (np->sv_stest2 & 0x20)
896 np->scsi_mode = SMODE_HVD;
898 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
899 if (!(INB(np, nc_gpreg) & 0x08))
900 np->scsi_mode = SMODE_HVD;
903 else if (SYM_SETUP_SCSI_DIFF == 2)
904 np->scsi_mode = SMODE_HVD;
906 if (np->scsi_mode == SMODE_HVD)
907 np->rv_stest2 |= 0x20;
910 * Set LED support from SCRIPTS.
911 * Ignore this feature for boards known to use a
912 * specific GPIO wiring and for the 895A, 896
913 * and 1010 that drive the LED directly.
915 if ((SYM_SETUP_SCSI_LED ||
916 (nvram->type == SYM_SYMBIOS_NVRAM ||
917 (nvram->type == SYM_TEKRAM_NVRAM &&
918 np->device_id == PCI_DEVICE_ID_NCR_53C895))) &&
919 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
920 np->features |= FE_LED0;
925 switch(SYM_SETUP_IRQ_MODE & 3) {
927 np->rv_dcntl |= IRQM;
930 np->rv_dcntl |= (np->sv_dcntl & IRQM);
937 * Configure targets according to driver setup.
938 * If NVRAM present get targets setup from NVRAM.
940 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
941 struct sym_tcb *tp = &np->target[i];
943 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
944 tp->usrtags = SYM_SETUP_MAX_TAG;
946 sym_nvram_setup_target(tp, i, nvram);
949 tp->usrflags &= ~SYM_TAGS_ENABLED;
953 * Let user know about the settings.
955 printf("%s: %s, ID %d, Fast-%d, %s, %s\n", sym_name(np),
956 sym_nvram_type(nvram), np->myaddr,
957 (np->features & FE_ULTRA3) ? 80 :
958 (np->features & FE_ULTRA2) ? 40 :
959 (np->features & FE_ULTRA) ? 20 : 10,
960 sym_scsi_bus_mode(np->scsi_mode),
961 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
963 * Tell him more on demand.
966 printf("%s: %s IRQ line driver%s\n",
968 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
969 np->ram_ba ? ", using on-chip SRAM" : "");
970 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
971 if (np->features & FE_NOPM)
972 printf("%s: handling phase mismatch from SCRIPTS.\n",
978 if (sym_verbose >= 2) {
979 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
980 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
981 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
982 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
984 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
985 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
986 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
987 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
990 * Let user be aware of targets that have some disable flags set.
992 sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
994 sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
1001 * Test the pci bus snoop logic :-(
1003 * Has to be called with interrupts disabled.
1005 #ifndef CONFIG_SCSI_SYM53C8XX_IOMAPPED
1006 static int sym_regtest (struct sym_hcb *np)
1008 register volatile u32 data;
1010 * chip registers may NOT be cached.
1011 * write 0xffffffff to a read only register area,
1012 * and try to read it back.
1015 OUTL(np, nc_dstat, data);
1016 data = INL(np, nc_dstat);
1018 if (data == 0xffffffff) {
1020 if ((data & 0xe2f0fffd) != 0x02000080) {
1022 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
1030 static int sym_snooptest (struct sym_hcb *np)
1032 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
1034 #ifndef CONFIG_SCSI_SYM53C8XX_IOMAPPED
1035 err |= sym_regtest (np);
1036 if (err) return (err);
1040 * Enable Master Parity Checking as we intend
1041 * to enable it for normal operations.
1043 OUTB(np, nc_ctest4, (np->rv_ctest4 & MPEE));
1047 pc = SCRIPTZ_BA(np, snooptest);
1051 * Set memory and register.
1053 np->scratch = cpu_to_scr(host_wr);
1054 OUTL(np, nc_temp, sym_wr);
1056 * Start script (exchange values)
1058 OUTL(np, nc_dsa, np->hcb_ba);
1061 * Wait 'til done (with timeout)
1063 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
1064 if (INB(np, nc_istat) & (INTF|SIP|DIP))
1066 if (i>=SYM_SNOOP_TIMEOUT) {
1067 printf ("CACHE TEST FAILED: timeout.\n");
1071 * Check for fatal DMA errors.
1073 dstat = INB(np, nc_dstat);
1074 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
1075 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
1076 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
1077 "DISABLING MASTER DATA PARITY CHECKING.\n",
1079 np->rv_ctest4 &= ~MPEE;
1083 if (dstat & (MDPE|BF|IID)) {
1084 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
1088 * Save termination position.
1090 pc = INL(np, nc_dsp);
1092 * Read memory and register.
1094 host_rd = scr_to_cpu(np->scratch);
1095 sym_rd = INL(np, nc_scratcha);
1096 sym_bk = INL(np, nc_temp);
1098 * Check termination position.
1100 if (pc != SCRIPTZ_BA(np, snoopend)+8) {
1101 printf ("CACHE TEST FAILED: script execution failed.\n");
1102 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
1103 (u_long) SCRIPTZ_BA(np, snooptest), (u_long) pc,
1104 (u_long) SCRIPTZ_BA(np, snoopend) +8);
1110 if (host_wr != sym_rd) {
1111 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
1112 (int) host_wr, (int) sym_rd);
1115 if (host_rd != sym_wr) {
1116 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
1117 (int) sym_wr, (int) host_rd);
1120 if (sym_bk != sym_wr) {
1121 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
1122 (int) sym_wr, (int) sym_bk);
1130 * log message for real hard errors
1132 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sx/s3/s4) @ name (dsp:dbc).
1133 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
1135 * exception register:
1140 * so: control lines as driven by chip.
1141 * si: control lines as seen by chip.
1142 * sd: scsi data lines as seen by chip.
1145 * sx: sxfer (see the manual)
1146 * s3: scntl3 (see the manual)
1147 * s4: scntl4 (see the manual)
1149 * current script command:
1150 * dsp: script address (relative to start of script).
1151 * dbc: first word of script command.
1153 * First 24 register of the chip:
1156 static void sym_log_hard_error(struct sym_hcb *np, u_short sist, u_char dstat)
1162 u_char *script_base;
1165 dsp = INL(np, nc_dsp);
1167 if (dsp > np->scripta_ba &&
1168 dsp <= np->scripta_ba + np->scripta_sz) {
1169 script_ofs = dsp - np->scripta_ba;
1170 script_size = np->scripta_sz;
1171 script_base = (u_char *) np->scripta0;
1172 script_name = "scripta";
1174 else if (np->scriptb_ba < dsp &&
1175 dsp <= np->scriptb_ba + np->scriptb_sz) {
1176 script_ofs = dsp - np->scriptb_ba;
1177 script_size = np->scriptb_sz;
1178 script_base = (u_char *) np->scriptb0;
1179 script_name = "scriptb";
1184 script_name = "mem";
1187 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x/%x) @ (%s %x:%08x).\n",
1188 sym_name(np), (unsigned)INB(np, nc_sdid)&0x0f, dstat, sist,
1189 (unsigned)INB(np, nc_socl), (unsigned)INB(np, nc_sbcl),
1190 (unsigned)INB(np, nc_sbdl), (unsigned)INB(np, nc_sxfer),
1191 (unsigned)INB(np, nc_scntl3),
1192 (np->features & FE_C10) ? (unsigned)INB(np, nc_scntl4) : 0,
1193 script_name, script_ofs, (unsigned)INL(np, nc_dbc));
1195 if (((script_ofs & 3) == 0) &&
1196 (unsigned)script_ofs < script_size) {
1197 printf ("%s: script cmd = %08x\n", sym_name(np),
1198 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
1201 printf ("%s: regdump:", sym_name(np));
1203 printf (" %02x", (unsigned)INB_OFF(np, i));
1209 if (dstat & (MDPE|BF))
1210 sym_log_bus_error(np);
1213 static struct sym_chip sym_dev_table[] = {
1214 {PCI_DEVICE_ID_NCR_53C810, 0x0f, "810", 4, 8, 4, 64,
1217 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1218 {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
1222 {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
1223 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
1226 {PCI_DEVICE_ID_NCR_53C815, 0xff, "815", 4, 8, 4, 64,
1229 {PCI_DEVICE_ID_NCR_53C825, 0x0f, "825", 6, 8, 4, 64,
1230 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
1232 {PCI_DEVICE_ID_NCR_53C825, 0xff, "825a", 6, 8, 4, 2,
1233 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
1235 {PCI_DEVICE_ID_NCR_53C860, 0xff, "860", 4, 8, 5, 1,
1236 FE_ULTRA|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
1238 {PCI_DEVICE_ID_NCR_53C875, 0x01, "875", 6, 16, 5, 2,
1239 FE_WIDE|FE_ULTRA|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1240 FE_RAM|FE_DIFF|FE_VARCLK}
1242 {PCI_DEVICE_ID_NCR_53C875, 0xff, "875", 6, 16, 5, 2,
1243 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1244 FE_RAM|FE_DIFF|FE_VARCLK}
1246 {PCI_DEVICE_ID_NCR_53C875J, 0xff, "875J", 6, 16, 5, 2,
1247 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1248 FE_RAM|FE_DIFF|FE_VARCLK}
1250 {PCI_DEVICE_ID_NCR_53C885, 0xff, "885", 6, 16, 5, 2,
1251 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1252 FE_RAM|FE_DIFF|FE_VARCLK}
1254 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1255 {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
1256 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
1260 {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
1261 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1265 {PCI_DEVICE_ID_NCR_53C896, 0xff, "896", 6, 31, 7, 4,
1266 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1267 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1269 {PCI_DEVICE_ID_LSI_53C895A, 0xff, "895a", 6, 31, 7, 4,
1270 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1271 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1273 {PCI_DEVICE_ID_LSI_53C875A, 0xff, "875a", 6, 31, 7, 4,
1274 FE_WIDE|FE_ULTRA|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1275 FE_RAM|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1277 {PCI_DEVICE_ID_LSI_53C1010_33, 0x00, "1010-33", 6, 31, 7, 8,
1278 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1279 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
1282 {PCI_DEVICE_ID_LSI_53C1010_33, 0xff, "1010-33", 6, 31, 7, 8,
1283 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1284 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
1287 {PCI_DEVICE_ID_LSI_53C1010_66, 0xff, "1010-66", 6, 31, 7, 8,
1288 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1289 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
1292 {PCI_DEVICE_ID_LSI_53C1510, 0xff, "1510d", 6, 31, 7, 4,
1293 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1294 FE_RAM|FE_IO256|FE_LEDC}
1297 #define sym_num_devs \
1298 (sizeof(sym_dev_table) / sizeof(sym_dev_table[0]))
1301 * Look up the chip table.
1303 * Return a pointer to the chip entry if found,
1307 sym_lookup_chip_table (u_short device_id, u_char revision)
1309 struct sym_chip *chip;
1312 for (i = 0; i < sym_num_devs; i++) {
1313 chip = &sym_dev_table[i];
1314 if (device_id != chip->device_id)
1316 if (revision > chip->revision_id)
1324 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1326 * Lookup the 64 bit DMA segments map.
1327 * This is only used if the direct mapping
1328 * has been unsuccessful.
1330 int sym_lookup_dmap(struct sym_hcb *np, u32 h, int s)
1337 /* Look up existing mappings */
1338 for (i = SYM_DMAP_SIZE-1; i > 0; i--) {
1339 if (h == np->dmap_bah[i])
1342 /* If direct mapping is free, get it */
1343 if (!np->dmap_bah[s])
1345 /* Collision -> lookup free mappings */
1346 for (s = SYM_DMAP_SIZE-1; s > 0; s--) {
1347 if (!np->dmap_bah[s])
1351 panic("sym: ran out of 64 bit DMA segment registers");
1354 np->dmap_bah[s] = h;
1360 * Update IO registers scratch C..R so they will be
1361 * in sync. with queued CCB expectations.
1363 static void sym_update_dmap_regs(struct sym_hcb *np)
1367 if (!np->dmap_dirty)
1369 o = offsetof(struct sym_reg, nc_scrx[0]);
1370 for (i = 0; i < SYM_DMAP_SIZE; i++) {
1371 OUTL_OFF(np, o, np->dmap_bah[i]);
1378 /* Enforce all the fiddly SPI rules and the chip limitations */
1379 static void sym_check_goals(struct sym_hcb *np, struct scsi_target *starget,
1380 struct sym_trans *goal)
1382 if (!spi_support_wide(starget))
1385 if (!spi_support_sync(starget)) {
1394 if (spi_support_dt(starget)) {
1395 if (spi_support_dt_only(starget))
1398 if (goal->offset == 0)
1404 /* Some targets fail to properly negotiate DT in SE mode */
1405 if ((np->scsi_mode != SMODE_LVD) || !(np->features & FE_U3EN))
1409 /* all DT transfers must be wide */
1411 if (goal->offset > np->maxoffs_dt)
1412 goal->offset = np->maxoffs_dt;
1413 if (goal->period < np->minsync_dt)
1414 goal->period = np->minsync_dt;
1415 if (goal->period > np->maxsync_dt)
1416 goal->period = np->maxsync_dt;
1418 goal->iu = goal->qas = 0;
1419 if (goal->offset > np->maxoffs)
1420 goal->offset = np->maxoffs;
1421 if (goal->period < np->minsync)
1422 goal->period = np->minsync;
1423 if (goal->period > np->maxsync)
1424 goal->period = np->maxsync;
1429 * Prepare the next negotiation message if needed.
1431 * Fill in the part of message buffer that contains the
1432 * negotiation and the nego_status field of the CCB.
1433 * Returns the size of the message in bytes.
1435 static int sym_prepare_nego(struct sym_hcb *np, struct sym_ccb *cp, u_char *msgptr)
1437 struct sym_tcb *tp = &np->target[cp->target];
1438 struct scsi_target *starget = tp->starget;
1439 struct sym_trans *goal = &tp->tgoal;
1443 sym_check_goals(np, starget, goal);
1446 * Many devices implement PPR in a buggy way, so only use it if we
1449 if (goal->iu || goal->dt || goal->qas || (goal->period < 0xa)) {
1451 } else if (spi_width(starget) != goal->width) {
1453 } else if (spi_period(starget) != goal->period ||
1454 spi_offset(starget) != goal->offset) {
1457 goal->check_nego = 0;
1463 msgptr[msglen++] = M_EXTENDED;
1464 msgptr[msglen++] = 3;
1465 msgptr[msglen++] = M_X_SYNC_REQ;
1466 msgptr[msglen++] = goal->period;
1467 msgptr[msglen++] = goal->offset;
1470 msgptr[msglen++] = M_EXTENDED;
1471 msgptr[msglen++] = 2;
1472 msgptr[msglen++] = M_X_WIDE_REQ;
1473 msgptr[msglen++] = goal->width;
1476 msgptr[msglen++] = M_EXTENDED;
1477 msgptr[msglen++] = 6;
1478 msgptr[msglen++] = M_X_PPR_REQ;
1479 msgptr[msglen++] = goal->period;
1480 msgptr[msglen++] = 0;
1481 msgptr[msglen++] = goal->offset;
1482 msgptr[msglen++] = goal->width;
1483 msgptr[msglen++] = (goal->iu ? PPR_OPT_IU : 0) |
1484 (goal->dt ? PPR_OPT_DT : 0) |
1485 (goal->qas ? PPR_OPT_QAS : 0);
1489 cp->nego_status = nego;
1492 tp->nego_cp = cp; /* Keep track a nego will be performed */
1493 if (DEBUG_FLAGS & DEBUG_NEGO) {
1494 sym_print_nego_msg(np, cp->target,
1495 nego == NS_SYNC ? "sync msgout" :
1496 nego == NS_WIDE ? "wide msgout" :
1497 "ppr msgout", msgptr);
1505 * Insert a job into the start queue.
1507 static void sym_put_start_queue(struct sym_hcb *np, struct sym_ccb *cp)
1511 #ifdef SYM_CONF_IARB_SUPPORT
1513 * If the previously queued CCB is not yet done,
1514 * set the IARB hint. The SCRIPTS will go with IARB
1515 * for this job when starting the previous one.
1516 * We leave devices a chance to win arbitration by
1517 * not using more than 'iarb_max' consecutive
1518 * immediate arbitrations.
1520 if (np->last_cp && np->iarb_count < np->iarb_max) {
1521 np->last_cp->host_flags |= HF_HINT_IARB;
1529 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1531 * Make SCRIPTS aware of the 64 bit DMA
1532 * segment registers not being up-to-date.
1535 cp->host_xflags |= HX_DMAP_DIRTY;
1539 * Insert first the idle task and then our job.
1540 * The MBs should ensure proper ordering.
1542 qidx = np->squeueput + 2;
1543 if (qidx >= MAX_QUEUE*2) qidx = 0;
1545 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
1546 MEMORY_WRITE_BARRIER();
1547 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
1549 np->squeueput = qidx;
1551 if (DEBUG_FLAGS & DEBUG_QUEUE)
1552 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
1555 * Script processor may be waiting for reselect.
1558 MEMORY_WRITE_BARRIER();
1559 OUTB(np, nc_istat, SIGP|np->istat_sem);
1562 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1564 * Start next ready-to-start CCBs.
1566 void sym_start_next_ccbs(struct sym_hcb *np, struct sym_lcb *lp, int maxn)
1572 * Paranoia, as usual. :-)
1574 assert(!lp->started_tags || !lp->started_no_tag);
1577 * Try to start as many commands as asked by caller.
1578 * Prevent from having both tagged and untagged
1579 * commands queued to the device at the same time.
1582 qp = sym_remque_head(&lp->waiting_ccbq);
1585 cp = sym_que_entry(qp, struct sym_ccb, link2_ccbq);
1586 if (cp->tag != NO_TAG) {
1587 if (lp->started_no_tag ||
1588 lp->started_tags >= lp->started_max) {
1589 sym_insque_head(qp, &lp->waiting_ccbq);
1592 lp->itlq_tbl[cp->tag] = cpu_to_scr(cp->ccb_ba);
1594 cpu_to_scr(SCRIPTA_BA(np, resel_tag));
1597 if (lp->started_no_tag || lp->started_tags) {
1598 sym_insque_head(qp, &lp->waiting_ccbq);
1601 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
1603 cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
1604 ++lp->started_no_tag;
1607 sym_insque_tail(qp, &lp->started_ccbq);
1608 sym_put_start_queue(np, cp);
1611 #endif /* SYM_OPT_HANDLE_DEVICE_QUEUEING */
1614 * The chip may have completed jobs. Look at the DONE QUEUE.
1616 * On paper, memory read barriers may be needed here to
1617 * prevent out of order LOADs by the CPU from having
1618 * prefetched stale data prior to DMA having occurred.
1620 static int sym_wakeup_done (struct sym_hcb *np)
1629 /* MEMORY_READ_BARRIER(); */
1631 dsa = scr_to_cpu(np->dqueue[i]);
1635 if ((i = i+2) >= MAX_QUEUE*2)
1638 cp = sym_ccb_from_dsa(np, dsa);
1640 MEMORY_READ_BARRIER();
1641 sym_complete_ok (np, cp);
1645 printf ("%s: bad DSA (%x) in done queue.\n",
1646 sym_name(np), (u_int) dsa);
1654 * Complete all CCBs queued to the COMP queue.
1656 * These CCBs are assumed:
1657 * - Not to be referenced either by devices or
1658 * SCRIPTS-related queues and datas.
1659 * - To have to be completed with an error condition
1662 * The device queue freeze count is incremented
1663 * for each CCB that does not prevent this.
1664 * This function is called when all CCBs involved
1665 * in error handling/recovery have been reaped.
1667 static void sym_flush_comp_queue(struct sym_hcb *np, int cam_status)
1672 while ((qp = sym_remque_head(&np->comp_ccbq)) != 0) {
1673 struct scsi_cmnd *cmd;
1674 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
1675 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
1676 /* Leave quiet CCBs waiting for resources */
1677 if (cp->host_status == HS_WAIT)
1681 sym_set_cam_status(cmd, cam_status);
1682 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1683 if (sym_get_cam_status(cmd) == DID_SOFT_ERROR) {
1684 struct sym_tcb *tp = &np->target[cp->target];
1685 struct sym_lcb *lp = sym_lp(tp, cp->lun);
1687 sym_remque(&cp->link2_ccbq);
1688 sym_insque_tail(&cp->link2_ccbq,
1691 if (cp->tag != NO_TAG)
1694 --lp->started_no_tag;
1701 sym_free_ccb(np, cp);
1702 sym_xpt_done(np, cmd);
1707 * Complete all active CCBs with error.
1708 * Used on CHIP/SCSI RESET.
1710 static void sym_flush_busy_queue (struct sym_hcb *np, int cam_status)
1713 * Move all active CCBs to the COMP queue
1714 * and flush this queue.
1716 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
1717 sym_que_init(&np->busy_ccbq);
1718 sym_flush_comp_queue(np, cam_status);
1725 * 0: initialisation.
1726 * 1: SCSI BUS RESET delivered or received.
1727 * 2: SCSI BUS MODE changed.
1729 void sym_start_up (struct sym_hcb *np, int reason)
1735 * Reset chip if asked, otherwise just clear fifos.
1740 OUTB(np, nc_stest3, TE|CSF);
1741 OUTONB(np, nc_ctest3, CLF);
1747 phys = np->squeue_ba;
1748 for (i = 0; i < MAX_QUEUE*2; i += 2) {
1749 np->squeue[i] = cpu_to_scr(np->idletask_ba);
1750 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
1752 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
1755 * Start at first entry.
1762 phys = np->dqueue_ba;
1763 for (i = 0; i < MAX_QUEUE*2; i += 2) {
1765 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
1767 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
1770 * Start at first entry.
1775 * Install patches in scripts.
1776 * This also let point to first position the start
1777 * and done queue pointers used from SCRIPTS.
1782 * Wakeup all pending jobs.
1784 sym_flush_busy_queue(np, DID_RESET);
1789 OUTB(np, nc_istat, 0x00); /* Remove Reset, abort */
1791 udelay(2000); /* The 895 needs time for the bus mode to settle */
1793 OUTB(np, nc_scntl0, np->rv_scntl0 | 0xc0);
1794 /* full arb., ena parity, par->ATN */
1795 OUTB(np, nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
1797 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
1799 OUTB(np, nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
1800 OUTW(np, nc_respid, 1ul<<np->myaddr); /* Id to respond to */
1801 OUTB(np, nc_istat , SIGP ); /* Signal Process */
1802 OUTB(np, nc_dmode , np->rv_dmode); /* Burst length, dma mode */
1803 OUTB(np, nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
1805 OUTB(np, nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
1806 OUTB(np, nc_ctest3, np->rv_ctest3); /* Write and invalidate */
1807 OUTB(np, nc_ctest4, np->rv_ctest4); /* Master parity checking */
1809 /* Extended Sreq/Sack filtering not supported on the C10 */
1810 if (np->features & FE_C10)
1811 OUTB(np, nc_stest2, np->rv_stest2);
1813 OUTB(np, nc_stest2, EXT|np->rv_stest2);
1815 OUTB(np, nc_stest3, TE); /* TolerANT enable */
1816 OUTB(np, nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
1819 * For now, disable AIP generation on C1010-66.
1821 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)
1822 OUTB(np, nc_aipcntl1, DISAIP);
1825 * C10101 rev. 0 errata.
1826 * Errant SGE's when in narrow. Write bits 4 & 5 of
1827 * STEST1 register to disable SGE. We probably should do
1828 * that from SCRIPTS for each selection/reselection, but
1829 * I just don't want. :)
1831 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_33 &&
1832 np->revision_id < 1)
1833 OUTB(np, nc_stest1, INB(np, nc_stest1) | 0x30);
1836 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
1837 * Disable overlapped arbitration for some dual function devices,
1838 * regardless revision id (kind of post-chip-design feature. ;-))
1840 if (np->device_id == PCI_DEVICE_ID_NCR_53C875)
1841 OUTB(np, nc_ctest0, (1<<5));
1842 else if (np->device_id == PCI_DEVICE_ID_NCR_53C896)
1843 np->rv_ccntl0 |= DPR;
1846 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
1847 * and/or hardware phase mismatch, since only such chips
1848 * seem to support those IO registers.
1850 if (np->features & (FE_DAC|FE_NOPM)) {
1851 OUTB(np, nc_ccntl0, np->rv_ccntl0);
1852 OUTB(np, nc_ccntl1, np->rv_ccntl1);
1855 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1857 * Set up scratch C and DRS IO registers to map the 32 bit
1858 * DMA address range our data structures are located in.
1861 np->dmap_bah[0] = 0; /* ??? */
1862 OUTL(np, nc_scrx[0], np->dmap_bah[0]);
1863 OUTL(np, nc_drs, np->dmap_bah[0]);
1868 * If phase mismatch handled by scripts (895A/896/1010),
1869 * set PM jump addresses.
1871 if (np->features & FE_NOPM) {
1872 OUTL(np, nc_pmjad1, SCRIPTB_BA(np, pm_handle));
1873 OUTL(np, nc_pmjad2, SCRIPTB_BA(np, pm_handle));
1877 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
1878 * Also set GPIO5 and clear GPIO6 if hardware LED control.
1880 if (np->features & FE_LED0)
1881 OUTB(np, nc_gpcntl, INB(np, nc_gpcntl) & ~0x01);
1882 else if (np->features & FE_LEDC)
1883 OUTB(np, nc_gpcntl, (INB(np, nc_gpcntl) & ~0x41) | 0x20);
1888 OUTW(np, nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
1889 OUTB(np, nc_dien , MDPE|BF|SSI|SIR|IID);
1892 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
1893 * Try to eat the spurious SBMC interrupt that may occur when
1894 * we reset the chip but not the SCSI BUS (at initialization).
1896 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
1897 OUTONW(np, nc_sien, SBMC);
1903 np->scsi_mode = INB(np, nc_stest4) & SMODE;
1907 * Fill in target structure.
1908 * Reinitialize usrsync.
1909 * Reinitialize usrwide.
1910 * Prepare sync negotiation according to actual SCSI bus mode.
1912 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
1913 struct sym_tcb *tp = &np->target[i];
1917 tp->head.wval = np->rv_scntl3;
1922 * Download SCSI SCRIPTS to on-chip RAM if present,
1923 * and start script processor.
1924 * We do the download preferently from the CPU.
1925 * For platforms that may not support PCI memory mapping,
1926 * we use simple SCRIPTS that performs MEMORY MOVEs.
1928 phys = SCRIPTA_BA(np, init);
1930 if (sym_verbose >= 2)
1931 printf("%s: Downloading SCSI SCRIPTS.\n", sym_name(np));
1932 memcpy_toio(np->s.ramaddr, np->scripta0, np->scripta_sz);
1933 if (np->ram_ws == 8192) {
1934 memcpy_toio(np->s.ramaddr + 4096, np->scriptb0, np->scriptb_sz);
1935 phys = scr_to_cpu(np->scr_ram_seg);
1936 OUTL(np, nc_mmws, phys);
1937 OUTL(np, nc_mmrs, phys);
1938 OUTL(np, nc_sfs, phys);
1939 phys = SCRIPTB_BA(np, start64);
1945 OUTL(np, nc_dsa, np->hcb_ba);
1949 * Notify the XPT about the RESET condition.
1952 sym_xpt_async_bus_reset(np);
1956 * Switch trans mode for current job and its target.
1958 static void sym_settrans(struct sym_hcb *np, int target, u_char opts, u_char ofs,
1959 u_char per, u_char wide, u_char div, u_char fak)
1962 u_char sval, wval, uval;
1963 struct sym_tcb *tp = &np->target[target];
1965 assert(target == (INB(np, nc_sdid) & 0x0f));
1967 sval = tp->head.sval;
1968 wval = tp->head.wval;
1969 uval = tp->head.uval;
1972 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
1973 sval, wval, uval, np->rv_scntl3);
1978 if (!(np->features & FE_C10))
1979 sval = (sval & ~0x1f) | ofs;
1981 sval = (sval & ~0x3f) | ofs;
1984 * Set the sync divisor and extra clock factor.
1987 wval = (wval & ~0x70) | ((div+1) << 4);
1988 if (!(np->features & FE_C10))
1989 sval = (sval & ~0xe0) | (fak << 5);
1991 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
1992 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
1993 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
1998 * Set the bus width.
2005 * Set misc. ultra enable bits.
2007 if (np->features & FE_C10) {
2008 uval = uval & ~(U3EN|AIPCKEN);
2010 assert(np->features & FE_U3EN);
2014 wval = wval & ~ULTRA;
2015 if (per <= 12) wval |= ULTRA;
2019 * Stop there if sync parameters are unchanged.
2021 if (tp->head.sval == sval &&
2022 tp->head.wval == wval &&
2023 tp->head.uval == uval)
2025 tp->head.sval = sval;
2026 tp->head.wval = wval;
2027 tp->head.uval = uval;
2030 * Disable extended Sreq/Sack filtering if per < 50.
2031 * Not supported on the C1010.
2033 if (per < 50 && !(np->features & FE_C10))
2034 OUTOFFB(np, nc_stest2, EXT);
2037 * set actual value and sync_status
2039 OUTB(np, nc_sxfer, tp->head.sval);
2040 OUTB(np, nc_scntl3, tp->head.wval);
2042 if (np->features & FE_C10) {
2043 OUTB(np, nc_scntl4, tp->head.uval);
2047 * patch ALL busy ccbs of this target.
2049 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
2051 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
2052 if (cp->target != target)
2054 cp->phys.select.sel_scntl3 = tp->head.wval;
2055 cp->phys.select.sel_sxfer = tp->head.sval;
2056 if (np->features & FE_C10) {
2057 cp->phys.select.sel_scntl4 = tp->head.uval;
2063 * We received a WDTR.
2064 * Let everything be aware of the changes.
2066 static void sym_setwide(struct sym_hcb *np, int target, u_char wide)
2068 struct sym_tcb *tp = &np->target[target];
2069 struct scsi_target *starget = tp->starget;
2071 if (spi_width(starget) == wide)
2074 sym_settrans(np, target, 0, 0, 0, wide, 0, 0);
2076 tp->tgoal.width = wide;
2077 spi_offset(starget) = 0;
2078 spi_period(starget) = 0;
2079 spi_width(starget) = wide;
2080 spi_iu(starget) = 0;
2081 spi_dt(starget) = 0;
2082 spi_qas(starget) = 0;
2084 if (sym_verbose >= 3)
2085 spi_display_xfer_agreement(starget);
2089 * We received a SDTR.
2090 * Let everything be aware of the changes.
2093 sym_setsync(struct sym_hcb *np, int target,
2094 u_char ofs, u_char per, u_char div, u_char fak)
2096 struct sym_tcb *tp = &np->target[target];
2097 struct scsi_target *starget = tp->starget;
2098 u_char wide = (tp->head.wval & EWS) ? BUS_16_BIT : BUS_8_BIT;
2100 sym_settrans(np, target, 0, ofs, per, wide, div, fak);
2102 spi_period(starget) = per;
2103 spi_offset(starget) = ofs;
2104 spi_iu(starget) = spi_dt(starget) = spi_qas(starget) = 0;
2106 if (!tp->tgoal.dt && !tp->tgoal.iu && !tp->tgoal.qas) {
2107 tp->tgoal.period = per;
2108 tp->tgoal.offset = ofs;
2109 tp->tgoal.check_nego = 0;
2112 spi_display_xfer_agreement(starget);
2116 * We received a PPR.
2117 * Let everything be aware of the changes.
2120 sym_setpprot(struct sym_hcb *np, int target, u_char opts, u_char ofs,
2121 u_char per, u_char wide, u_char div, u_char fak)
2123 struct sym_tcb *tp = &np->target[target];
2124 struct scsi_target *starget = tp->starget;
2126 sym_settrans(np, target, opts, ofs, per, wide, div, fak);
2128 spi_width(starget) = tp->tgoal.width = wide;
2129 spi_period(starget) = tp->tgoal.period = per;
2130 spi_offset(starget) = tp->tgoal.offset = ofs;
2131 spi_iu(starget) = tp->tgoal.iu = !!(opts & PPR_OPT_IU);
2132 spi_dt(starget) = tp->tgoal.dt = !!(opts & PPR_OPT_DT);
2133 spi_qas(starget) = tp->tgoal.qas = !!(opts & PPR_OPT_QAS);
2134 tp->tgoal.check_nego = 0;
2136 spi_display_xfer_agreement(starget);
2140 * generic recovery from scsi interrupt
2142 * The doc says that when the chip gets an SCSI interrupt,
2143 * it tries to stop in an orderly fashion, by completing
2144 * an instruction fetch that had started or by flushing
2145 * the DMA fifo for a write to memory that was executing.
2146 * Such a fashion is not enough to know if the instruction
2147 * that was just before the current DSP value has been
2150 * There are some small SCRIPTS sections that deal with
2151 * the start queue and the done queue that may break any
2152 * assomption from the C code if we are interrupted
2153 * inside, so we reset if this happens. Btw, since these
2154 * SCRIPTS sections are executed while the SCRIPTS hasn't
2155 * started SCSI operations, it is very unlikely to happen.
2157 * All the driver data structures are supposed to be
2158 * allocated from the same 4 GB memory window, so there
2159 * is a 1 to 1 relationship between DSA and driver data
2160 * structures. Since we are careful :) to invalidate the
2161 * DSA when we complete a command or when the SCRIPTS
2162 * pushes a DSA into a queue, we can trust it when it
2165 static void sym_recover_scsi_int (struct sym_hcb *np, u_char hsts)
2167 u32 dsp = INL(np, nc_dsp);
2168 u32 dsa = INL(np, nc_dsa);
2169 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
2172 * If we haven't been interrupted inside the SCRIPTS
2173 * critical pathes, we can safely restart the SCRIPTS
2174 * and trust the DSA value if it matches a CCB.
2176 if ((!(dsp > SCRIPTA_BA(np, getjob_begin) &&
2177 dsp < SCRIPTA_BA(np, getjob_end) + 1)) &&
2178 (!(dsp > SCRIPTA_BA(np, ungetjob) &&
2179 dsp < SCRIPTA_BA(np, reselect) + 1)) &&
2180 (!(dsp > SCRIPTB_BA(np, sel_for_abort) &&
2181 dsp < SCRIPTB_BA(np, sel_for_abort_1) + 1)) &&
2182 (!(dsp > SCRIPTA_BA(np, done) &&
2183 dsp < SCRIPTA_BA(np, done_end) + 1))) {
2184 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
2185 OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
2187 * If we have a CCB, let the SCRIPTS call us back for
2188 * the handling of the error with SCRATCHA filled with
2189 * STARTPOS. This way, we will be able to freeze the
2190 * device queue and requeue awaiting IOs.
2193 cp->host_status = hsts;
2194 OUTL_DSP(np, SCRIPTA_BA(np, complete_error));
2197 * Otherwise just restart the SCRIPTS.
2200 OUTL(np, nc_dsa, 0xffffff);
2201 OUTL_DSP(np, SCRIPTA_BA(np, start));
2210 sym_start_reset(np);
2214 * chip exception handler for selection timeout
2216 static void sym_int_sto (struct sym_hcb *np)
2218 u32 dsp = INL(np, nc_dsp);
2220 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
2222 if (dsp == SCRIPTA_BA(np, wf_sel_done) + 8)
2223 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
2225 sym_start_reset(np);
2229 * chip exception handler for unexpected disconnect
2231 static void sym_int_udc (struct sym_hcb *np)
2233 printf ("%s: unexpected disconnect\n", sym_name(np));
2234 sym_recover_scsi_int(np, HS_UNEXPECTED);
2238 * chip exception handler for SCSI bus mode change
2240 * spi2-r12 11.2.3 says a transceiver mode change must
2241 * generate a reset event and a device that detects a reset
2242 * event shall initiate a hard reset. It says also that a
2243 * device that detects a mode change shall set data transfer
2244 * mode to eight bit asynchronous, etc...
2245 * So, just reinitializing all except chip should be enough.
2247 static void sym_int_sbmc (struct sym_hcb *np)
2249 u_char scsi_mode = INB(np, nc_stest4) & SMODE;
2254 printf("%s: SCSI BUS mode change from %s to %s.\n", sym_name(np),
2255 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
2258 * Should suspend command processing for a few seconds and
2259 * reinitialize all except the chip.
2261 sym_start_up (np, 2);
2265 * chip exception handler for SCSI parity error.
2267 * When the chip detects a SCSI parity error and is
2268 * currently executing a (CH)MOV instruction, it does
2269 * not interrupt immediately, but tries to finish the
2270 * transfer of the current scatter entry before
2271 * interrupting. The following situations may occur:
2273 * - The complete scatter entry has been transferred
2274 * without the device having changed phase.
2275 * The chip will then interrupt with the DSP pointing
2276 * to the instruction that follows the MOV.
2278 * - A phase mismatch occurs before the MOV finished
2279 * and phase errors are to be handled by the C code.
2280 * The chip will then interrupt with both PAR and MA
2283 * - A phase mismatch occurs before the MOV finished and
2284 * phase errors are to be handled by SCRIPTS.
2285 * The chip will load the DSP with the phase mismatch
2286 * JUMP address and interrupt the host processor.
2288 static void sym_int_par (struct sym_hcb *np, u_short sist)
2290 u_char hsts = INB(np, HS_PRT);
2291 u32 dsp = INL(np, nc_dsp);
2292 u32 dbc = INL(np, nc_dbc);
2293 u32 dsa = INL(np, nc_dsa);
2294 u_char sbcl = INB(np, nc_sbcl);
2295 u_char cmd = dbc >> 24;
2296 int phase = cmd & 7;
2297 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
2299 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
2300 sym_name(np), hsts, dbc, sbcl);
2303 * Check that the chip is connected to the SCSI BUS.
2305 if (!(INB(np, nc_scntl1) & ISCON)) {
2306 sym_recover_scsi_int(np, HS_UNEXPECTED);
2311 * If the nexus is not clearly identified, reset the bus.
2312 * We will try to do better later.
2318 * Check instruction was a MOV, direction was INPUT and
2321 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
2325 * Keep track of the parity error.
2327 OUTONB(np, HF_PRT, HF_EXT_ERR);
2328 cp->xerr_status |= XE_PARITY_ERR;
2331 * Prepare the message to send to the device.
2333 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
2336 * If the old phase was DATA IN phase, we have to deal with
2337 * the 3 situations described above.
2338 * For other input phases (MSG IN and STATUS), the device
2339 * must resend the whole thing that failed parity checking
2340 * or signal error. So, jumping to dispatcher should be OK.
2342 if (phase == 1 || phase == 5) {
2343 /* Phase mismatch handled by SCRIPTS */
2344 if (dsp == SCRIPTB_BA(np, pm_handle))
2346 /* Phase mismatch handled by the C code */
2349 /* No phase mismatch occurred */
2351 sym_set_script_dp (np, cp, dsp);
2352 OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
2355 else if (phase == 7) /* We definitely cannot handle parity errors */
2356 #if 1 /* in message-in phase due to the relection */
2357 goto reset_all; /* path and various message anticipations. */
2359 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
2362 OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
2366 sym_start_reset(np);
2371 * chip exception handler for phase errors.
2373 * We have to construct a new transfer descriptor,
2374 * to transfer the rest of the current block.
2376 static void sym_int_ma (struct sym_hcb *np)
2389 u_char hflags, hflags0;
2393 dsp = INL(np, nc_dsp);
2394 dbc = INL(np, nc_dbc);
2395 dsa = INL(np, nc_dsa);
2398 rest = dbc & 0xffffff;
2402 * locate matching cp if any.
2404 cp = sym_ccb_from_dsa(np, dsa);
2407 * Donnot take into account dma fifo and various buffers in
2408 * INPUT phase since the chip flushes everything before
2409 * raising the MA interrupt for interrupted INPUT phases.
2410 * For DATA IN phase, we will check for the SWIDE later.
2412 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
2415 if (np->features & FE_DFBC)
2416 delta = INW(np, nc_dfbc);
2421 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
2423 dfifo = INL(np, nc_dfifo);
2426 * Calculate remaining bytes in DMA fifo.
2427 * (CTEST5 = dfifo >> 16)
2429 if (dfifo & (DFS << 16))
2430 delta = ((((dfifo >> 8) & 0x300) |
2431 (dfifo & 0xff)) - rest) & 0x3ff;
2433 delta = ((dfifo & 0xff) - rest) & 0x7f;
2437 * The data in the dma fifo has not been transfered to
2438 * the target -> add the amount to the rest
2439 * and clear the data.
2440 * Check the sstat2 register in case of wide transfer.
2443 ss0 = INB(np, nc_sstat0);
2444 if (ss0 & OLF) rest++;
2445 if (!(np->features & FE_C10))
2446 if (ss0 & ORF) rest++;
2447 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
2448 ss2 = INB(np, nc_sstat2);
2449 if (ss2 & OLF1) rest++;
2450 if (!(np->features & FE_C10))
2451 if (ss2 & ORF1) rest++;
2457 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
2458 OUTB(np, nc_stest3, TE|CSF); /* scsi fifo */
2462 * log the information
2464 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
2465 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(np, nc_sbcl)&7,
2466 (unsigned) rest, (unsigned) delta);
2469 * try to find the interrupted script command,
2470 * and the address at which to continue.
2474 if (dsp > np->scripta_ba &&
2475 dsp <= np->scripta_ba + np->scripta_sz) {
2476 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
2479 else if (dsp > np->scriptb_ba &&
2480 dsp <= np->scriptb_ba + np->scriptb_sz) {
2481 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
2486 * log the information
2488 if (DEBUG_FLAGS & DEBUG_PHASE) {
2489 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
2490 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
2494 printf ("%s: interrupted SCRIPT address not found.\n",
2500 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
2506 * get old startaddress and old length.
2508 oadr = scr_to_cpu(vdsp[1]);
2510 if (cmd & 0x10) { /* Table indirect */
2511 tblp = (u32 *) ((char*) &cp->phys + oadr);
2512 olen = scr_to_cpu(tblp[0]);
2513 oadr = scr_to_cpu(tblp[1]);
2516 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
2519 if (DEBUG_FLAGS & DEBUG_PHASE) {
2520 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
2521 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
2528 * check cmd against assumed interrupted script command.
2529 * If dt data phase, the MOVE instruction hasn't bit 4 of
2532 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
2533 sym_print_addr(cp->cmd,
2534 "internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
2535 cmd, scr_to_cpu(vdsp[0]) >> 24);
2541 * if old phase not dataphase, leave here.
2544 sym_print_addr(cp->cmd,
2545 "phase change %x-%x %d@%08x resid=%d.\n",
2546 cmd&7, INB(np, nc_sbcl)&7, (unsigned)olen,
2547 (unsigned)oadr, (unsigned)rest);
2548 goto unexpected_phase;
2552 * Choose the correct PM save area.
2554 * Look at the PM_SAVE SCRIPT if you want to understand
2555 * this stuff. The equivalent code is implemented in
2556 * SCRIPTS for the 895A, 896 and 1010 that are able to
2557 * handle PM from the SCRIPTS processor.
2559 hflags0 = INB(np, HF_PRT);
2562 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
2563 if (hflags & HF_IN_PM0)
2564 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
2565 else if (hflags & HF_IN_PM1)
2566 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
2568 if (hflags & HF_DP_SAVED)
2569 hflags ^= HF_ACT_PM;
2572 if (!(hflags & HF_ACT_PM)) {
2574 newcmd = SCRIPTA_BA(np, pm0_data);
2578 newcmd = SCRIPTA_BA(np, pm1_data);
2581 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
2582 if (hflags != hflags0)
2583 OUTB(np, HF_PRT, hflags);
2586 * fillin the phase mismatch context
2588 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
2589 pm->sg.size = cpu_to_scr(rest);
2590 pm->ret = cpu_to_scr(nxtdsp);
2593 * If we have a SWIDE,
2594 * - prepare the address to write the SWIDE from SCRIPTS,
2595 * - compute the SCRIPTS address to restart from,
2596 * - move current data pointer context by one byte.
2598 nxtdsp = SCRIPTA_BA(np, dispatch);
2599 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
2600 (INB(np, nc_scntl2) & WSR)) {
2604 * Set up the table indirect for the MOVE
2605 * of the residual byte and adjust the data
2608 tmp = scr_to_cpu(pm->sg.addr);
2609 cp->phys.wresid.addr = cpu_to_scr(tmp);
2610 pm->sg.addr = cpu_to_scr(tmp + 1);
2611 tmp = scr_to_cpu(pm->sg.size);
2612 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
2613 pm->sg.size = cpu_to_scr(tmp - 1);
2616 * If only the residual byte is to be moved,
2617 * no PM context is needed.
2619 if ((tmp&0xffffff) == 1)
2623 * Prepare the address of SCRIPTS that will
2624 * move the residual byte to memory.
2626 nxtdsp = SCRIPTB_BA(np, wsr_ma_helper);
2629 if (DEBUG_FLAGS & DEBUG_PHASE) {
2630 sym_print_addr(cp->cmd, "PM %x %x %x / %x %x %x.\n",
2631 hflags0, hflags, newcmd,
2632 (unsigned)scr_to_cpu(pm->sg.addr),
2633 (unsigned)scr_to_cpu(pm->sg.size),
2634 (unsigned)scr_to_cpu(pm->ret));
2638 * Restart the SCRIPTS processor.
2640 sym_set_script_dp (np, cp, newcmd);
2641 OUTL_DSP(np, nxtdsp);
2645 * Unexpected phase changes that occurs when the current phase
2646 * is not a DATA IN or DATA OUT phase are due to error conditions.
2647 * Such event may only happen when the SCRIPTS is using a
2648 * multibyte SCSI MOVE.
2650 * Phase change Some possible cause
2652 * COMMAND --> MSG IN SCSI parity error detected by target.
2653 * COMMAND --> STATUS Bad command or refused by target.
2654 * MSG OUT --> MSG IN Message rejected by target.
2655 * MSG OUT --> COMMAND Bogus target that discards extended
2656 * negotiation messages.
2658 * The code below does not care of the new phase and so
2659 * trusts the target. Why to annoy it ?
2660 * If the interrupted phase is COMMAND phase, we restart at
2662 * If a target does not get all the messages after selection,
2663 * the code assumes blindly that the target discards extended
2664 * messages and clears the negotiation status.
2665 * If the target does not want all our response to negotiation,
2666 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
2667 * bloat for such a should_not_happen situation).
2668 * In all other situation, we reset the BUS.
2669 * Are these assumptions reasonnable ? (Wait and see ...)
2676 case 2: /* COMMAND phase */
2677 nxtdsp = SCRIPTA_BA(np, dispatch);
2680 case 3: /* STATUS phase */
2681 nxtdsp = SCRIPTA_BA(np, dispatch);
2684 case 6: /* MSG OUT phase */
2686 * If the device may want to use untagged when we want
2687 * tagged, we prepare an IDENTIFY without disc. granted,
2688 * since we will not be able to handle reselect.
2689 * Otherwise, we just don't care.
2691 if (dsp == SCRIPTA_BA(np, send_ident)) {
2692 if (cp->tag != NO_TAG && olen - rest <= 3) {
2693 cp->host_status = HS_BUSY;
2694 np->msgout[0] = IDENTIFY(0, cp->lun);
2695 nxtdsp = SCRIPTB_BA(np, ident_break_atn);
2698 nxtdsp = SCRIPTB_BA(np, ident_break);
2700 else if (dsp == SCRIPTB_BA(np, send_wdtr) ||
2701 dsp == SCRIPTB_BA(np, send_sdtr) ||
2702 dsp == SCRIPTB_BA(np, send_ppr)) {
2703 nxtdsp = SCRIPTB_BA(np, nego_bad_phase);
2704 if (dsp == SCRIPTB_BA(np, send_ppr)) {
2705 struct scsi_device *dev = cp->cmd->device;
2711 case 7: /* MSG IN phase */
2712 nxtdsp = SCRIPTA_BA(np, clrack);
2718 OUTL_DSP(np, nxtdsp);
2723 sym_start_reset(np);
2727 * chip interrupt handler
2729 * In normal situations, interrupt conditions occur one at
2730 * a time. But when something bad happens on the SCSI BUS,
2731 * the chip may raise several interrupt flags before
2732 * stopping and interrupting the CPU. The additionnal
2733 * interrupt flags are stacked in some extra registers
2734 * after the SIP and/or DIP flag has been raised in the
2735 * ISTAT. After the CPU has read the interrupt condition
2736 * flag from SIST or DSTAT, the chip unstacks the other
2737 * interrupt flags and sets the corresponding bits in
2738 * SIST or DSTAT. Since the chip starts stacking once the
2739 * SIP or DIP flag is set, there is a small window of time
2740 * where the stacking does not occur.
2742 * Typically, multiple interrupt conditions may happen in
2743 * the following situations:
2745 * - SCSI parity error + Phase mismatch (PAR|MA)
2746 * When an parity error is detected in input phase
2747 * and the device switches to msg-in phase inside a
2749 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
2750 * When a stupid device does not want to handle the
2751 * recovery of an SCSI parity error.
2752 * - Some combinations of STO, PAR, UDC, ...
2753 * When using non compliant SCSI stuff, when user is
2754 * doing non compliant hot tampering on the BUS, when
2755 * something really bad happens to a device, etc ...
2757 * The heuristic suggested by SYMBIOS to handle
2758 * multiple interrupts is to try unstacking all
2759 * interrupts conditions and to handle them on some
2760 * priority based on error severity.
2761 * This will work when the unstacking has been
2762 * successful, but we cannot be 100 % sure of that,
2763 * since the CPU may have been faster to unstack than
2764 * the chip is able to stack. Hmmm ... But it seems that
2765 * such a situation is very unlikely to happen.
2767 * If this happen, for example STO caught by the CPU
2768 * then UDC happenning before the CPU have restarted
2769 * the SCRIPTS, the driver may wrongly complete the
2770 * same command on UDC, since the SCRIPTS didn't restart
2771 * and the DSA still points to the same command.
2772 * We avoid this situation by setting the DSA to an
2773 * invalid value when the CCB is completed and before
2774 * restarting the SCRIPTS.
2776 * Another issue is that we need some section of our
2777 * recovery procedures to be somehow uninterruptible but
2778 * the SCRIPTS processor does not provides such a
2779 * feature. For this reason, we handle recovery preferently
2780 * from the C code and check against some SCRIPTS critical
2781 * sections from the C code.
2783 * Hopefully, the interrupt handling of the driver is now
2784 * able to resist to weird BUS error conditions, but donnot
2785 * ask me for any guarantee that it will never fail. :-)
2786 * Use at your own decision and risk.
2789 void sym_interrupt (struct sym_hcb *np)
2791 u_char istat, istatc;
2796 * interrupt on the fly ?
2797 * (SCRIPTS may still be running)
2799 * A `dummy read' is needed to ensure that the
2800 * clear of the INTF flag reaches the device
2801 * and that posted writes are flushed to memory
2802 * before the scanning of the DONE queue.
2803 * Note that SCRIPTS also (dummy) read to memory
2804 * prior to deliver the INTF interrupt condition.
2806 istat = INB(np, nc_istat);
2808 OUTB(np, nc_istat, (istat & SIGP) | INTF | np->istat_sem);
2809 istat = INB(np, nc_istat); /* DUMMY READ */
2810 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
2811 sym_wakeup_done(np);
2814 if (!(istat & (SIP|DIP)))
2817 #if 0 /* We should never get this one */
2819 OUTB(np, nc_istat, CABRT);
2823 * PAR and MA interrupts may occur at the same time,
2824 * and we need to know of both in order to handle
2825 * this situation properly. We try to unstack SCSI
2826 * interrupts for that reason. BTW, I dislike a LOT
2827 * such a loop inside the interrupt routine.
2828 * Even if DMA interrupt stacking is very unlikely to
2829 * happen, we also try unstacking these ones, since
2830 * this has no performance impact.
2837 sist |= INW(np, nc_sist);
2839 dstat |= INB(np, nc_dstat);
2840 istatc = INB(np, nc_istat);
2842 } while (istatc & (SIP|DIP));
2844 if (DEBUG_FLAGS & DEBUG_TINY)
2845 printf ("<%d|%x:%x|%x:%x>",
2846 (int)INB(np, nc_scr0),
2848 (unsigned)INL(np, nc_dsp),
2849 (unsigned)INL(np, nc_dbc));
2851 * On paper, a memory read barrier may be needed here to
2852 * prevent out of order LOADs by the CPU from having
2853 * prefetched stale data prior to DMA having occurred.
2854 * And since we are paranoid ... :)
2856 MEMORY_READ_BARRIER();
2859 * First, interrupts we want to service cleanly.
2861 * Phase mismatch (MA) is the most frequent interrupt
2862 * for chip earlier than the 896 and so we have to service
2863 * it as quickly as possible.
2864 * A SCSI parity error (PAR) may be combined with a phase
2865 * mismatch condition (MA).
2866 * Programmed interrupts (SIR) are used to call the C code
2868 * The single step interrupt (SSI) is not used in this
2871 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
2872 !(dstat & (MDPE|BF|ABRT|IID))) {
2873 if (sist & PAR) sym_int_par (np, sist);
2874 else if (sist & MA) sym_int_ma (np);
2875 else if (dstat & SIR) sym_int_sir (np);
2876 else if (dstat & SSI) OUTONB_STD();
2877 else goto unknown_int;
2882 * Now, interrupts that donnot happen in normal
2883 * situations and that we may need to recover from.
2885 * On SCSI RESET (RST), we reset everything.
2886 * On SCSI BUS MODE CHANGE (SBMC), we complete all
2887 * active CCBs with RESET status, prepare all devices
2888 * for negotiating again and restart the SCRIPTS.
2889 * On STO and UDC, we complete the CCB with the corres-
2890 * ponding status and restart the SCRIPTS.
2893 printf("%s: SCSI BUS reset detected.\n", sym_name(np));
2894 sym_start_up (np, 1);
2898 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
2899 OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
2901 if (!(sist & (GEN|HTH|SGE)) &&
2902 !(dstat & (MDPE|BF|ABRT|IID))) {
2903 if (sist & SBMC) sym_int_sbmc (np);
2904 else if (sist & STO) sym_int_sto (np);
2905 else if (sist & UDC) sym_int_udc (np);
2906 else goto unknown_int;
2911 * Now, interrupts we are not able to recover cleanly.
2913 * Log message for hard errors.
2917 sym_log_hard_error(np, sist, dstat);
2919 if ((sist & (GEN|HTH|SGE)) ||
2920 (dstat & (MDPE|BF|ABRT|IID))) {
2921 sym_start_reset(np);
2927 * We just miss the cause of the interrupt. :(
2928 * Print a message. The timeout will do the real work.
2930 printf( "%s: unknown interrupt(s) ignored, "
2931 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
2932 sym_name(np), istat, dstat, sist);
2936 * Dequeue from the START queue all CCBs that match
2937 * a given target/lun/task condition (-1 means all),
2938 * and move them from the BUSY queue to the COMP queue
2939 * with DID_SOFT_ERROR status condition.
2940 * This function is used during error handling/recovery.
2941 * It is called with SCRIPTS not running.
2944 sym_dequeue_from_squeue(struct sym_hcb *np, int i, int target, int lun, int task)
2950 * Make sure the starting index is within range.
2952 assert((i >= 0) && (i < 2*MAX_QUEUE));
2955 * Walk until end of START queue and dequeue every job
2956 * that matches the target/lun/task condition.
2959 while (i != np->squeueput) {
2960 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
2962 #ifdef SYM_CONF_IARB_SUPPORT
2963 /* Forget hints for IARB, they may be no longer relevant */
2964 cp->host_flags &= ~HF_HINT_IARB;
2966 if ((target == -1 || cp->target == target) &&
2967 (lun == -1 || cp->lun == lun) &&
2968 (task == -1 || cp->tag == task)) {
2969 sym_set_cam_status(cp->cmd, DID_SOFT_ERROR);
2970 sym_remque(&cp->link_ccbq);
2971 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
2975 np->squeue[j] = np->squeue[i];
2976 if ((j += 2) >= MAX_QUEUE*2) j = 0;
2978 if ((i += 2) >= MAX_QUEUE*2) i = 0;
2980 if (i != j) /* Copy back the idle task if needed */
2981 np->squeue[j] = np->squeue[i];
2982 np->squeueput = j; /* Update our current start queue pointer */
2988 * chip handler for bad SCSI status condition
2990 * In case of bad SCSI status, we unqueue all the tasks
2991 * currently queued to the controller but not yet started
2992 * and then restart the SCRIPTS processor immediately.
2994 * QUEUE FULL and BUSY conditions are handled the same way.
2995 * Basically all the not yet started tasks are requeued in
2996 * device queue and the queue is frozen until a completion.
2998 * For CHECK CONDITION and COMMAND TERMINATED status, we use
2999 * the CCB of the failed command to prepare a REQUEST SENSE
3000 * SCSI command and queue it to the controller queue.
3002 * SCRATCHA is assumed to have been loaded with STARTPOS
3003 * before the SCRIPTS called the C code.
3005 static void sym_sir_bad_scsi_status(struct sym_hcb *np, int num, struct sym_ccb *cp)
3008 u_char s_status = cp->ssss_status;
3009 u_char h_flags = cp->host_flags;
3014 * Compute the index of the next job to start from SCRIPTS.
3016 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
3019 * The last CCB queued used for IARB hint may be
3020 * no longer relevant. Forget it.
3022 #ifdef SYM_CONF_IARB_SUPPORT
3028 * Now deal with the SCSI status.
3033 if (sym_verbose >= 2) {
3034 sym_print_addr(cp->cmd, "%s\n",
3035 s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
3037 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
3038 sym_complete_error (np, cp);
3043 * If we get an SCSI error when requesting sense, give up.
3045 if (h_flags & HF_SENSE) {
3046 sym_complete_error (np, cp);
3051 * Dequeue all queued CCBs for that device not yet started,
3052 * and restart the SCRIPTS processor immediately.
3054 sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
3055 OUTL_DSP(np, SCRIPTA_BA(np, start));
3058 * Save some info of the actual IO.
3059 * Compute the data residual.
3061 cp->sv_scsi_status = cp->ssss_status;
3062 cp->sv_xerr_status = cp->xerr_status;
3063 cp->sv_resid = sym_compute_residual(np, cp);
3066 * Prepare all needed data structures for
3067 * requesting sense data.
3070 cp->scsi_smsg2[0] = IDENTIFY(0, cp->lun);
3074 * If we are currently using anything different from
3075 * async. 8 bit data transfers with that target,
3076 * start a negotiation, since the device may want
3077 * to report us a UNIT ATTENTION condition due to
3078 * a cause we currently ignore, and we donnot want
3079 * to be stuck with WIDE and/or SYNC data transfer.
3081 * cp->nego_status is filled by sym_prepare_nego().
3083 cp->nego_status = 0;
3084 msglen += sym_prepare_nego(np, cp, &cp->scsi_smsg2[msglen]);
3086 * Message table indirect structure.
3088 cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg2);
3089 cp->phys.smsg.size = cpu_to_scr(msglen);
3094 cp->phys.cmd.addr = CCB_BA(cp, sensecmd);
3095 cp->phys.cmd.size = cpu_to_scr(6);
3098 * patch requested size into sense command
3100 cp->sensecmd[0] = REQUEST_SENSE;
3101 cp->sensecmd[1] = 0;
3102 if (cp->cmd->device->scsi_level <= SCSI_2 && cp->lun <= 7)
3103 cp->sensecmd[1] = cp->lun << 5;
3104 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
3105 cp->data_len = SYM_SNS_BBUF_LEN;
3110 memset(cp->sns_bbuf, 0, SYM_SNS_BBUF_LEN);
3111 cp->phys.sense.addr = CCB_BA(cp, sns_bbuf);
3112 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
3115 * requeue the command.
3117 startp = SCRIPTB_BA(np, sdata_in);
3119 cp->phys.head.savep = cpu_to_scr(startp);
3120 cp->phys.head.lastp = cpu_to_scr(startp);
3121 cp->startp = cpu_to_scr(startp);
3122 cp->goalp = cpu_to_scr(startp + 16);
3124 cp->host_xflags = 0;
3125 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
3126 cp->ssss_status = S_ILLEGAL;
3127 cp->host_flags = (HF_SENSE|HF_DATA_IN);
3128 cp->xerr_status = 0;
3129 cp->extra_bytes = 0;
3131 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
3134 * Requeue the command.
3136 sym_put_start_queue(np, cp);
3139 * Give back to upper layer everything we have dequeued.
3141 sym_flush_comp_queue(np, 0);
3147 * After a device has accepted some management message
3148 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
3149 * a device signals a UNIT ATTENTION condition, some
3150 * tasks are thrown away by the device. We are required
3151 * to reflect that on our tasks list since the device
3152 * will never complete these tasks.
3154 * This function move from the BUSY queue to the COMP
3155 * queue all disconnected CCBs for a given target that
3156 * match the following criteria:
3157 * - lun=-1 means any logical UNIT otherwise a given one.
3158 * - task=-1 means any task, otherwise a given one.
3160 int sym_clear_tasks(struct sym_hcb *np, int cam_status, int target, int lun, int task)
3162 SYM_QUEHEAD qtmp, *qp;
3167 * Move the entire BUSY queue to our temporary queue.
3169 sym_que_init(&qtmp);
3170 sym_que_splice(&np->busy_ccbq, &qtmp);
3171 sym_que_init(&np->busy_ccbq);
3174 * Put all CCBs that matches our criteria into
3175 * the COMP queue and put back other ones into
3178 while ((qp = sym_remque_head(&qtmp)) != 0) {
3179 struct scsi_cmnd *cmd;
3180 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3182 if (cp->host_status != HS_DISCONNECT ||
3183 cp->target != target ||
3184 (lun != -1 && cp->lun != lun) ||
3186 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
3187 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
3190 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3192 /* Preserve the software timeout condition */
3193 if (sym_get_cam_status(cmd) != DID_TIME_OUT)
3194 sym_set_cam_status(cmd, cam_status);
3197 printf("XXXX TASK @%p CLEARED\n", cp);
3204 * chip handler for TASKS recovery
3206 * We cannot safely abort a command, while the SCRIPTS
3207 * processor is running, since we just would be in race
3210 * As long as we have tasks to abort, we keep the SEM
3211 * bit set in the ISTAT. When this bit is set, the
3212 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
3213 * each time it enters the scheduler.
3215 * If we have to reset a target, clear tasks of a unit,
3216 * or to perform the abort of a disconnected job, we
3217 * restart the SCRIPTS for selecting the target. Once
3218 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
3219 * If it loses arbitration, the SCRIPTS will interrupt again
3220 * the next time it will enter its scheduler, and so on ...
3222 * On SIR_TARGET_SELECTED, we scan for the more
3223 * appropriate thing to do:
3225 * - If nothing, we just sent a M_ABORT message to the
3226 * target to get rid of the useless SCSI bus ownership.
3227 * According to the specs, no tasks shall be affected.
3228 * - If the target is to be reset, we send it a M_RESET
3230 * - If a logical UNIT is to be cleared , we send the
3231 * IDENTIFY(lun) + M_ABORT.
3232 * - If an untagged task is to be aborted, we send the
3233 * IDENTIFY(lun) + M_ABORT.
3234 * - If a tagged task is to be aborted, we send the
3235 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
3237 * Once our 'kiss of death' :) message has been accepted
3238 * by the target, the SCRIPTS interrupts again
3239 * (SIR_ABORT_SENT). On this interrupt, we complete
3240 * all the CCBs that should have been aborted by the
3241 * target according to our message.
3243 static void sym_sir_task_recovery(struct sym_hcb *np, int num)
3247 struct sym_tcb *tp = NULL; /* gcc isn't quite smart enough yet */
3248 struct scsi_target *starget;
3249 int target=-1, lun=-1, task;
3254 * The SCRIPTS processor stopped before starting
3255 * the next command in order to allow us to perform
3256 * some task recovery.
3258 case SIR_SCRIPT_STOPPED:
3260 * Do we have any target to reset or unit to clear ?
3262 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
3263 tp = &np->target[i];
3265 (tp->lun0p && tp->lun0p->to_clear)) {
3271 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
3272 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
3282 * If not, walk the busy queue for any
3283 * disconnected CCB to be aborted.
3286 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3287 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
3288 if (cp->host_status != HS_DISCONNECT)
3291 target = cp->target;
3298 * If some target is to be selected,
3299 * prepare and start the selection.
3302 tp = &np->target[target];
3303 np->abrt_sel.sel_id = target;
3304 np->abrt_sel.sel_scntl3 = tp->head.wval;
3305 np->abrt_sel.sel_sxfer = tp->head.sval;
3306 OUTL(np, nc_dsa, np->hcb_ba);
3307 OUTL_DSP(np, SCRIPTB_BA(np, sel_for_abort));
3312 * Now look for a CCB to abort that haven't started yet.
3313 * Btw, the SCRIPTS processor is still stopped, so
3314 * we are not in race.
3318 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3319 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3320 if (cp->host_status != HS_BUSY &&
3321 cp->host_status != HS_NEGOTIATE)
3325 #ifdef SYM_CONF_IARB_SUPPORT
3327 * If we are using IMMEDIATE ARBITRATION, we donnot
3328 * want to cancel the last queued CCB, since the
3329 * SCRIPTS may have anticipated the selection.
3331 if (cp == np->last_cp) {
3336 i = 1; /* Means we have found some */
3341 * We are done, so we donnot need
3342 * to synchronize with the SCRIPTS anylonger.
3343 * Remove the SEM flag from the ISTAT.
3346 OUTB(np, nc_istat, SIGP);
3350 * Compute index of next position in the start
3351 * queue the SCRIPTS intends to start and dequeue
3352 * all CCBs for that device that haven't been started.
3354 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
3355 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
3358 * Make sure at least our IO to abort has been dequeued.
3360 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
3361 assert(i && sym_get_cam_status(cp->cmd) == DID_SOFT_ERROR);
3363 sym_remque(&cp->link_ccbq);
3364 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3367 * Keep track in cam status of the reason of the abort.
3369 if (cp->to_abort == 2)
3370 sym_set_cam_status(cp->cmd, DID_TIME_OUT);
3372 sym_set_cam_status(cp->cmd, DID_ABORT);
3375 * Complete with error everything that we have dequeued.
3377 sym_flush_comp_queue(np, 0);
3380 * The SCRIPTS processor has selected a target
3381 * we may have some manual recovery to perform for.
3383 case SIR_TARGET_SELECTED:
3384 target = INB(np, nc_sdid) & 0xf;
3385 tp = &np->target[target];
3387 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
3390 * If the target is to be reset, prepare a
3391 * M_RESET message and clear the to_reset flag
3392 * since we donnot expect this operation to fail.
3395 np->abrt_msg[0] = M_RESET;
3396 np->abrt_tbl.size = 1;
3402 * Otherwise, look for some logical unit to be cleared.
3404 if (tp->lun0p && tp->lun0p->to_clear)
3406 else if (tp->lunmp) {
3407 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
3408 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
3416 * If a logical unit is to be cleared, prepare
3417 * an IDENTIFY(lun) + ABORT MESSAGE.
3420 struct sym_lcb *lp = sym_lp(tp, lun);
3421 lp->to_clear = 0; /* We don't expect to fail here */
3422 np->abrt_msg[0] = IDENTIFY(0, lun);
3423 np->abrt_msg[1] = M_ABORT;
3424 np->abrt_tbl.size = 2;
3429 * Otherwise, look for some disconnected job to
3430 * abort for this target.
3434 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3435 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3436 if (cp->host_status != HS_DISCONNECT)
3438 if (cp->target != target)
3442 i = 1; /* Means we have some */
3447 * If we have none, probably since the device has
3448 * completed the command before we won abitration,
3449 * send a M_ABORT message without IDENTIFY.
3450 * According to the specs, the device must just
3451 * disconnect the BUS and not abort any task.
3454 np->abrt_msg[0] = M_ABORT;
3455 np->abrt_tbl.size = 1;
3460 * We have some task to abort.
3461 * Set the IDENTIFY(lun)
3463 np->abrt_msg[0] = IDENTIFY(0, cp->lun);
3466 * If we want to abort an untagged command, we
3467 * will send a IDENTIFY + M_ABORT.
3468 * Otherwise (tagged command), we will send
3469 * a IDENTITFY + task attributes + ABORT TAG.
3471 if (cp->tag == NO_TAG) {
3472 np->abrt_msg[1] = M_ABORT;
3473 np->abrt_tbl.size = 2;
3475 np->abrt_msg[1] = cp->scsi_smsg[1];
3476 np->abrt_msg[2] = cp->scsi_smsg[2];
3477 np->abrt_msg[3] = M_ABORT_TAG;
3478 np->abrt_tbl.size = 4;
3481 * Keep track of software timeout condition, since the
3482 * peripheral driver may not count retries on abort
3483 * conditions not due to timeout.
3485 if (cp->to_abort == 2)
3486 sym_set_cam_status(cp->cmd, DID_TIME_OUT);
3487 cp->to_abort = 0; /* We donnot expect to fail here */
3491 * The target has accepted our message and switched
3492 * to BUS FREE phase as we expected.
3494 case SIR_ABORT_SENT:
3495 target = INB(np, nc_sdid) & 0xf;
3496 tp = &np->target[target];
3497 starget = tp->starget;
3500 ** If we didn't abort anything, leave here.
3502 if (np->abrt_msg[0] == M_ABORT)
3506 * If we sent a M_RESET, then a hardware reset has
3507 * been performed by the target.
3508 * - Reset everything to async 8 bit
3509 * - Tell ourself to negotiate next time :-)
3510 * - Prepare to clear all disconnected CCBs for
3511 * this target from our task list (lun=task=-1)
3515 if (np->abrt_msg[0] == M_RESET) {
3517 tp->head.wval = np->rv_scntl3;
3519 spi_period(starget) = 0;
3520 spi_offset(starget) = 0;
3521 spi_width(starget) = 0;
3522 spi_iu(starget) = 0;
3523 spi_dt(starget) = 0;
3524 spi_qas(starget) = 0;
3525 tp->tgoal.check_nego = 1;
3529 * Otherwise, check for the LUN and TASK(s)
3530 * concerned by the cancelation.
3531 * If it is not ABORT_TAG then it is CLEAR_QUEUE
3532 * or an ABORT message :-)
3535 lun = np->abrt_msg[0] & 0x3f;
3536 if (np->abrt_msg[1] == M_ABORT_TAG)
3537 task = np->abrt_msg[2];
3541 * Complete all the CCBs the device should have
3542 * aborted due to our 'kiss of death' message.
3544 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
3545 sym_dequeue_from_squeue(np, i, target, lun, -1);
3546 sym_clear_tasks(np, DID_ABORT, target, lun, task);
3547 sym_flush_comp_queue(np, 0);
3550 * If we sent a BDR, make upper layer aware of that.
3552 if (np->abrt_msg[0] == M_RESET)
3553 sym_xpt_async_sent_bdr(np, target);
3558 * Print to the log the message we intend to send.
3560 if (num == SIR_TARGET_SELECTED) {
3561 dev_info(&tp->starget->dev, "control msgout:");
3562 sym_printl_hex(np->abrt_msg, np->abrt_tbl.size);
3563 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
3567 * Let the SCRIPTS processor continue.
3573 * Gerard's alchemy:) that deals with with the data
3574 * pointer for both MDP and the residual calculation.
3576 * I didn't want to bloat the code by more than 200
3577 * lines for the handling of both MDP and the residual.
3578 * This has been achieved by using a data pointer
3579 * representation consisting in an index in the data
3580 * array (dp_sg) and a negative offset (dp_ofs) that
3581 * have the following meaning:
3583 * - dp_sg = SYM_CONF_MAX_SG
3584 * we are at the end of the data script.
3585 * - dp_sg < SYM_CONF_MAX_SG
3586 * dp_sg points to the next entry of the scatter array
3587 * we want to transfer.
3589 * dp_ofs represents the residual of bytes of the
3590 * previous entry scatter entry we will send first.
3592 * no residual to send first.
3594 * The function sym_evaluate_dp() accepts an arbitray
3595 * offset (basically from the MDP message) and returns
3596 * the corresponding values of dp_sg and dp_ofs.
3599 static int sym_evaluate_dp(struct sym_hcb *np, struct sym_ccb *cp, u32 scr, int *ofs)
3602 int dp_ofs, dp_sg, dp_sgmin;
3607 * Compute the resulted data pointer in term of a script
3608 * address within some DATA script and a signed byte offset.
3612 if (dp_scr == SCRIPTA_BA(np, pm0_data))
3614 else if (dp_scr == SCRIPTA_BA(np, pm1_data))
3620 dp_scr = scr_to_cpu(pm->ret);
3621 dp_ofs -= scr_to_cpu(pm->sg.size);
3625 * If we are auto-sensing, then we are done.
3627 if (cp->host_flags & HF_SENSE) {
3633 * Deduce the index of the sg entry.
3634 * Keep track of the index of the first valid entry.
3635 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
3638 tmp = scr_to_cpu(cp->goalp);
3639 dp_sg = SYM_CONF_MAX_SG;
3641 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
3642 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
3645 * Move to the sg entry the data pointer belongs to.
3647 * If we are inside the data area, we expect result to be:
3650 * dp_ofs = 0 and dp_sg is the index of the sg entry
3651 * the data pointer belongs to (or the end of the data)
3653 * dp_ofs < 0 and dp_sg is the index of the sg entry
3654 * the data pointer belongs to + 1.
3658 while (dp_sg > dp_sgmin) {
3660 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3661 n = dp_ofs + (tmp & 0xffffff);
3669 else if (dp_ofs > 0) {
3670 while (dp_sg < SYM_CONF_MAX_SG) {
3671 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3672 dp_ofs -= (tmp & 0xffffff);
3680 * Make sure the data pointer is inside the data area.
3681 * If not, return some error.
3683 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
3685 else if (dp_sg > SYM_CONF_MAX_SG ||
3686 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
3690 * Save the extreme pointer if needed.
3692 if (dp_sg > cp->ext_sg ||
3693 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
3695 cp->ext_ofs = dp_ofs;
3709 * chip handler for MODIFY DATA POINTER MESSAGE
3711 * We also call this function on IGNORE WIDE RESIDUE
3712 * messages that do not match a SWIDE full condition.
3713 * Btw, we assume in that situation that such a message
3714 * is equivalent to a MODIFY DATA POINTER (offset=-1).
3717 static void sym_modify_dp(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp, int ofs)
3720 u32 dp_scr = sym_get_script_dp (np, cp);
3728 * Not supported for auto-sense.
3730 if (cp->host_flags & HF_SENSE)
3734 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
3735 * to the resulted data pointer.
3737 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
3742 * And our alchemy:) allows to easily calculate the data
3743 * script address we want to return for the next data phase.
3745 dp_ret = cpu_to_scr(cp->goalp);
3746 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
3749 * If offset / scatter entry is zero we donnot need
3750 * a context for the new current data pointer.
3758 * Get a context for the new current data pointer.
3760 hflags = INB(np, HF_PRT);
3762 if (hflags & HF_DP_SAVED)
3763 hflags ^= HF_ACT_PM;
3765 if (!(hflags & HF_ACT_PM)) {
3767 dp_scr = SCRIPTA_BA(np, pm0_data);
3771 dp_scr = SCRIPTA_BA(np, pm1_data);
3774 hflags &= ~(HF_DP_SAVED);
3776 OUTB(np, HF_PRT, hflags);
3779 * Set up the new current data pointer.
3780 * ofs < 0 there, and for the next data phase, we
3781 * want to transfer part of the data of the sg entry
3782 * corresponding to index dp_sg-1 prior to returning
3783 * to the main data script.
3785 pm->ret = cpu_to_scr(dp_ret);
3786 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
3787 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
3788 pm->sg.addr = cpu_to_scr(tmp);
3789 pm->sg.size = cpu_to_scr(-dp_ofs);
3792 sym_set_script_dp (np, cp, dp_scr);
3793 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
3797 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
3802 * chip calculation of the data residual.
3804 * As I used to say, the requirement of data residual
3805 * in SCSI is broken, useless and cannot be achieved
3806 * without huge complexity.
3807 * But most OSes and even the official CAM require it.
3808 * When stupidity happens to be so widely spread inside
3809 * a community, it gets hard to convince.
3811 * Anyway, I don't care, since I am not going to use
3812 * any software that considers this data residual as
3813 * a relevant information. :)
3816 int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp)
3818 int dp_sg, dp_sgmin, resid = 0;
3822 * Check for some data lost or just thrown away.
3823 * We are not required to be quite accurate in this
3824 * situation. Btw, if we are odd for output and the
3825 * device claims some more data, it may well happen
3826 * than our residual be zero. :-)
3828 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
3829 if (cp->xerr_status & XE_EXTRA_DATA)
3830 resid -= cp->extra_bytes;
3831 if (cp->xerr_status & XE_SODL_UNRUN)
3833 if (cp->xerr_status & XE_SWIDE_OVRUN)
3838 * If all data has been transferred,
3839 * there is no residual.
3841 if (cp->phys.head.lastp == cp->goalp)
3845 * If no data transfer occurs, or if the data
3846 * pointer is weird, return full residual.
3848 if (cp->startp == cp->phys.head.lastp ||
3849 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
3851 return cp->data_len;
3855 * If we were auto-sensing, then we are done.
3857 if (cp->host_flags & HF_SENSE) {
3862 * We are now full comfortable in the computation
3863 * of the data residual (2's complement).
3865 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
3866 resid = -cp->ext_ofs;
3867 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
3868 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3869 resid += (tmp & 0xffffff);
3872 resid -= cp->odd_byte_adjustment;
3875 * Hopefully, the result is not too wrong.
3881 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
3883 * When we try to negotiate, we append the negotiation message
3884 * to the identify and (maybe) simple tag message.
3885 * The host status field is set to HS_NEGOTIATE to mark this
3888 * If the target doesn't answer this message immediately
3889 * (as required by the standard), the SIR_NEGO_FAILED interrupt
3890 * will be raised eventually.
3891 * The handler removes the HS_NEGOTIATE status, and sets the
3892 * negotiated value to the default (async / nowide).
3894 * If we receive a matching answer immediately, we check it
3895 * for validity, and set the values.
3897 * If we receive a Reject message immediately, we assume the
3898 * negotiation has failed, and fall back to standard values.
3900 * If we receive a negotiation message while not in HS_NEGOTIATE
3901 * state, it's a target initiated negotiation. We prepare a
3902 * (hopefully) valid answer, set our parameters, and send back
3903 * this answer to the target.
3905 * If the target doesn't fetch the answer (no message out phase),
3906 * we assume the negotiation has failed, and fall back to default
3907 * settings (SIR_NEGO_PROTO interrupt).
3909 * When we set the values, we adjust them in all ccbs belonging
3910 * to this target, in the controller's register, and in the "phys"
3911 * field of the controller's struct sym_hcb.
3915 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
3918 sym_sync_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
3920 int target = cp->target;
3921 u_char chg, ofs, per, fak, div;
3923 if (DEBUG_FLAGS & DEBUG_NEGO) {
3924 sym_print_nego_msg(np, target, "sync msgin", np->msgin);
3928 * Get requested values.
3935 * Check values against our limits.
3938 if (ofs > np->maxoffs)
3939 {chg = 1; ofs = np->maxoffs;}
3943 if (per < np->minsync)
3944 {chg = 1; per = np->minsync;}
3948 * Get new chip synchronous parameters value.
3951 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
3954 if (DEBUG_FLAGS & DEBUG_NEGO) {
3955 sym_print_addr(cp->cmd,
3956 "sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
3957 ofs, per, div, fak, chg);
3961 * If it was an answer we want to change,
3962 * then it isn't acceptable. Reject it.
3970 sym_setsync (np, target, ofs, per, div, fak);
3973 * It was an answer. We are done.
3979 * It was a request. Prepare an answer message.
3981 np->msgout[0] = M_EXTENDED;
3983 np->msgout[2] = M_X_SYNC_REQ;
3984 np->msgout[3] = per;
3985 np->msgout[4] = ofs;
3987 if (DEBUG_FLAGS & DEBUG_NEGO) {
3988 sym_print_nego_msg(np, target, "sync msgout", np->msgout);
3991 np->msgin [0] = M_NOOP;
3996 sym_setsync (np, target, 0, 0, 0, 0);
4000 static void sym_sync_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4006 * Request or answer ?
4008 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
4009 OUTB(np, HS_PRT, HS_BUSY);
4010 if (cp->nego_status && cp->nego_status != NS_SYNC)
4016 * Check and apply new values.
4018 result = sym_sync_nego_check(np, req, cp);
4019 if (result) /* Not acceptable, reject it */
4021 if (req) { /* Was a request, send response. */
4022 cp->nego_status = NS_SYNC;
4023 OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
4025 else /* Was a response, we are done. */
4026 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4030 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4034 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
4037 sym_ppr_nego_check(struct sym_hcb *np, int req, int target)
4039 struct sym_tcb *tp = &np->target[target];
4040 unsigned char fak, div;
4043 unsigned char per = np->msgin[3];
4044 unsigned char ofs = np->msgin[5];
4045 unsigned char wide = np->msgin[6];
4046 unsigned char opts = np->msgin[7] & PPR_OPT_MASK;
4048 if (DEBUG_FLAGS & DEBUG_NEGO) {
4049 sym_print_nego_msg(np, target, "ppr msgin", np->msgin);
4053 * Check values against our limits.
4055 if (wide > np->maxwide) {
4059 if (!wide || !(np->features & FE_U3EN))
4062 if (opts != (np->msgin[7] & PPR_OPT_MASK))
4065 dt = opts & PPR_OPT_DT;
4068 unsigned char maxoffs = dt ? np->maxoffs_dt : np->maxoffs;
4069 if (ofs > maxoffs) {
4076 unsigned char minsync = dt ? np->minsync_dt : np->minsync;
4077 if (per < minsync) {
4084 * Get new chip synchronous parameters value.
4087 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
4091 * If it was an answer we want to change,
4092 * then it isn't acceptable. Reject it.
4100 sym_setpprot(np, target, opts, ofs, per, wide, div, fak);
4103 * It was an answer. We are done.
4109 * It was a request. Prepare an answer message.
4111 np->msgout[0] = M_EXTENDED;
4113 np->msgout[2] = M_X_PPR_REQ;
4114 np->msgout[3] = per;
4116 np->msgout[5] = ofs;
4117 np->msgout[6] = wide;
4118 np->msgout[7] = opts;
4120 if (DEBUG_FLAGS & DEBUG_NEGO) {
4121 sym_print_nego_msg(np, target, "ppr msgout", np->msgout);
4124 np->msgin [0] = M_NOOP;
4129 sym_setpprot (np, target, 0, 0, 0, 0, 0, 0);
4131 * If it is a device response that should result in
4132 * ST, we may want to try a legacy negotiation later.
4134 if (!req && !opts) {
4135 tp->tgoal.period = per;
4136 tp->tgoal.offset = ofs;
4137 tp->tgoal.width = wide;
4138 tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
4139 tp->tgoal.check_nego = 1;
4144 static void sym_ppr_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4150 * Request or answer ?
4152 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
4153 OUTB(np, HS_PRT, HS_BUSY);
4154 if (cp->nego_status && cp->nego_status != NS_PPR)
4160 * Check and apply new values.
4162 result = sym_ppr_nego_check(np, req, cp->target);
4163 if (result) /* Not acceptable, reject it */
4165 if (req) { /* Was a request, send response. */
4166 cp->nego_status = NS_PPR;
4167 OUTL_DSP(np, SCRIPTB_BA(np, ppr_resp));
4169 else /* Was a response, we are done. */
4170 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4174 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4178 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
4181 sym_wide_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
4183 int target = cp->target;
4186 if (DEBUG_FLAGS & DEBUG_NEGO) {
4187 sym_print_nego_msg(np, target, "wide msgin", np->msgin);
4191 * Get requested values.
4194 wide = np->msgin[3];
4197 * Check values against our limits.
4199 if (wide > np->maxwide) {
4204 if (DEBUG_FLAGS & DEBUG_NEGO) {
4205 sym_print_addr(cp->cmd, "wdtr: wide=%d chg=%d.\n",
4210 * If it was an answer we want to change,
4211 * then it isn't acceptable. Reject it.
4219 sym_setwide (np, target, wide);
4222 * It was an answer. We are done.
4228 * It was a request. Prepare an answer message.
4230 np->msgout[0] = M_EXTENDED;
4232 np->msgout[2] = M_X_WIDE_REQ;
4233 np->msgout[3] = wide;
4235 np->msgin [0] = M_NOOP;
4237 if (DEBUG_FLAGS & DEBUG_NEGO) {
4238 sym_print_nego_msg(np, target, "wide msgout", np->msgout);
4247 static void sym_wide_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4253 * Request or answer ?
4255 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
4256 OUTB(np, HS_PRT, HS_BUSY);
4257 if (cp->nego_status && cp->nego_status != NS_WIDE)
4263 * Check and apply new values.
4265 result = sym_wide_nego_check(np, req, cp);
4266 if (result) /* Not acceptable, reject it */
4268 if (req) { /* Was a request, send response. */
4269 cp->nego_status = NS_WIDE;
4270 OUTL_DSP(np, SCRIPTB_BA(np, wdtr_resp));
4271 } else { /* Was a response. */
4273 * Negotiate for SYNC immediately after WIDE response.
4274 * This allows to negotiate for both WIDE and SYNC on
4275 * a single SCSI command (Suggested by Justin Gibbs).
4277 if (tp->tgoal.offset) {
4278 np->msgout[0] = M_EXTENDED;
4280 np->msgout[2] = M_X_SYNC_REQ;
4281 np->msgout[3] = tp->tgoal.period;
4282 np->msgout[4] = tp->tgoal.offset;
4284 if (DEBUG_FLAGS & DEBUG_NEGO) {
4285 sym_print_nego_msg(np, cp->target,
4286 "sync msgout", np->msgout);
4289 cp->nego_status = NS_SYNC;
4290 OUTB(np, HS_PRT, HS_NEGOTIATE);
4291 OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
4294 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4300 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4304 * Reset DT, SYNC or WIDE to default settings.
4306 * Called when a negotiation does not succeed either
4307 * on rejection or on protocol error.
4309 * A target that understands a PPR message should never
4310 * reject it, and messing with it is very unlikely.
4311 * So, if a PPR makes problems, we may just want to
4312 * try a legacy negotiation later.
4314 static void sym_nego_default(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4316 switch (cp->nego_status) {
4319 sym_setpprot (np, cp->target, 0, 0, 0, 0, 0, 0);
4321 if (tp->tgoal.period < np->minsync)
4322 tp->tgoal.period = np->minsync;
4323 if (tp->tgoal.offset > np->maxoffs)
4324 tp->tgoal.offset = np->maxoffs;
4325 tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
4326 tp->tgoal.check_nego = 1;
4330 sym_setsync (np, cp->target, 0, 0, 0, 0);
4333 sym_setwide (np, cp->target, 0);
4336 np->msgin [0] = M_NOOP;
4337 np->msgout[0] = M_NOOP;
4338 cp->nego_status = 0;
4342 * chip handler for MESSAGE REJECT received in response to
4343 * PPR, WIDE or SYNCHRONOUS negotiation.
4345 static void sym_nego_rejected(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4347 sym_nego_default(np, tp, cp);
4348 OUTB(np, HS_PRT, HS_BUSY);
4352 * chip exception handler for programmed interrupts.
4354 static void sym_int_sir (struct sym_hcb *np)
4356 u_char num = INB(np, nc_dsps);
4357 u32 dsa = INL(np, nc_dsa);
4358 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
4359 u_char target = INB(np, nc_sdid) & 0x0f;
4360 struct sym_tcb *tp = &np->target[target];
4363 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
4366 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
4368 * SCRIPTS tell us that we may have to update
4369 * 64 bit DMA segment registers.
4371 case SIR_DMAP_DIRTY:
4372 sym_update_dmap_regs(np);
4376 * Command has been completed with error condition
4377 * or has been auto-sensed.
4379 case SIR_COMPLETE_ERROR:
4380 sym_complete_error(np, cp);
4383 * The C code is currently trying to recover from something.
4384 * Typically, user want to abort some command.
4386 case SIR_SCRIPT_STOPPED:
4387 case SIR_TARGET_SELECTED:
4388 case SIR_ABORT_SENT:
4389 sym_sir_task_recovery(np, num);
4392 * The device didn't go to MSG OUT phase after having
4393 * been selected with ATN. We donnot want to handle
4396 case SIR_SEL_ATN_NO_MSG_OUT:
4397 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
4398 sym_name (np), target);
4401 * The device didn't switch to MSG IN phase after
4402 * having reseleted the initiator.
4404 case SIR_RESEL_NO_MSG_IN:
4405 printf ("%s:%d: No MSG IN phase after reselection.\n",
4406 sym_name (np), target);
4409 * After reselection, the device sent a message that wasn't
4412 case SIR_RESEL_NO_IDENTIFY:
4413 printf ("%s:%d: No IDENTIFY after reselection.\n",
4414 sym_name (np), target);
4417 * The device reselected a LUN we donnot know about.
4419 case SIR_RESEL_BAD_LUN:
4420 np->msgout[0] = M_RESET;
4423 * The device reselected for an untagged nexus and we
4426 case SIR_RESEL_BAD_I_T_L:
4427 np->msgout[0] = M_ABORT;
4430 * The device reselected for a tagged nexus that we donnot
4433 case SIR_RESEL_BAD_I_T_L_Q:
4434 np->msgout[0] = M_ABORT_TAG;
4437 * The SCRIPTS let us know that the device has grabbed
4438 * our message and will abort the job.
4440 case SIR_RESEL_ABORTED:
4441 np->lastmsg = np->msgout[0];
4442 np->msgout[0] = M_NOOP;
4443 printf ("%s:%d: message %x sent on bad reselection.\n",
4444 sym_name (np), target, np->lastmsg);
4447 * The SCRIPTS let us know that a message has been
4448 * successfully sent to the device.
4450 case SIR_MSG_OUT_DONE:
4451 np->lastmsg = np->msgout[0];
4452 np->msgout[0] = M_NOOP;
4453 /* Should we really care of that */
4454 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
4456 cp->xerr_status &= ~XE_PARITY_ERR;
4457 if (!cp->xerr_status)
4458 OUTOFFB(np, HF_PRT, HF_EXT_ERR);
4463 * The device didn't send a GOOD SCSI status.
4464 * We may have some work to do prior to allow
4465 * the SCRIPTS processor to continue.
4467 case SIR_BAD_SCSI_STATUS:
4470 sym_sir_bad_scsi_status(np, num, cp);
4473 * We are asked by the SCRIPTS to prepare a
4476 case SIR_REJECT_TO_SEND:
4477 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
4478 np->msgout[0] = M_REJECT;
4481 * We have been ODD at the end of a DATA IN
4482 * transfer and the device didn't send a
4483 * IGNORE WIDE RESIDUE message.
4484 * It is a data overrun condition.
4486 case SIR_SWIDE_OVERRUN:
4488 OUTONB(np, HF_PRT, HF_EXT_ERR);
4489 cp->xerr_status |= XE_SWIDE_OVRUN;
4493 * We have been ODD at the end of a DATA OUT
4495 * It is a data underrun condition.
4497 case SIR_SODL_UNDERRUN:
4499 OUTONB(np, HF_PRT, HF_EXT_ERR);
4500 cp->xerr_status |= XE_SODL_UNRUN;
4504 * The device wants us to tranfer more data than
4505 * expected or in the wrong direction.
4506 * The number of extra bytes is in scratcha.
4507 * It is a data overrun condition.
4509 case SIR_DATA_OVERRUN:
4511 OUTONB(np, HF_PRT, HF_EXT_ERR);
4512 cp->xerr_status |= XE_EXTRA_DATA;
4513 cp->extra_bytes += INL(np, nc_scratcha);
4517 * The device switched to an illegal phase (4/5).
4521 OUTONB(np, HF_PRT, HF_EXT_ERR);
4522 cp->xerr_status |= XE_BAD_PHASE;
4526 * We received a message.
4528 case SIR_MSG_RECEIVED:
4531 switch (np->msgin [0]) {
4533 * We received an extended message.
4534 * We handle MODIFY DATA POINTER, SDTR, WDTR
4535 * and reject all other extended messages.
4538 switch (np->msgin [2]) {
4540 if (DEBUG_FLAGS & DEBUG_POINTER)
4541 sym_print_msg(cp,"modify DP",np->msgin);
4542 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
4543 (np->msgin[5]<<8) + (np->msgin[6]);
4544 sym_modify_dp(np, tp, cp, tmp);
4547 sym_sync_nego(np, tp, cp);
4550 sym_ppr_nego(np, tp, cp);
4553 sym_wide_nego(np, tp, cp);
4560 * We received a 1/2 byte message not handled from SCRIPTS.
4561 * We are only expecting MESSAGE REJECT and IGNORE WIDE
4562 * RESIDUE messages that haven't been anticipated by
4563 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
4564 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
4567 if (DEBUG_FLAGS & DEBUG_POINTER)
4568 sym_print_msg(cp,"ign wide residue", np->msgin);
4569 if (cp->host_flags & HF_SENSE)
4570 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4572 sym_modify_dp(np, tp, cp, -1);
4575 if (INB(np, HS_PRT) == HS_NEGOTIATE)
4576 sym_nego_rejected(np, tp, cp);
4578 sym_print_addr(cp->cmd,
4579 "M_REJECT received (%x:%x).\n",
4580 scr_to_cpu(np->lastmsg), np->msgout[0]);
4589 * We received an unknown message.
4590 * Ignore all MSG IN phases and reject it.
4593 sym_print_msg(cp, "WEIRD message received", np->msgin);
4594 OUTL_DSP(np, SCRIPTB_BA(np, msg_weird));
4597 * Negotiation failed.
4598 * Target does not send us the reply.
4599 * Remove the HS_NEGOTIATE status.
4601 case SIR_NEGO_FAILED:
4602 OUTB(np, HS_PRT, HS_BUSY);
4604 * Negotiation failed.
4605 * Target does not want answer message.
4607 case SIR_NEGO_PROTO:
4608 sym_nego_default(np, tp, cp);
4616 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4619 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4626 * Acquire a control block
4628 struct sym_ccb *sym_get_ccb (struct sym_hcb *np, struct scsi_cmnd *cmd, u_char tag_order)
4630 u_char tn = cmd->device->id;
4631 u_char ln = cmd->device->lun;
4632 struct sym_tcb *tp = &np->target[tn];
4633 struct sym_lcb *lp = sym_lp(tp, ln);
4634 u_short tag = NO_TAG;
4636 struct sym_ccb *cp = NULL;
4639 * Look for a free CCB
4641 if (sym_que_empty(&np->free_ccbq))
4643 qp = sym_remque_head(&np->free_ccbq);
4646 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4650 * If we have been asked for a tagged command.
4654 * Debugging purpose.
4656 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4657 assert(lp->busy_itl == 0);
4660 * Allocate resources for tags if not yet.
4663 sym_alloc_lcb_tags(np, tn, ln);
4668 * Get a tag for this SCSI IO and set up
4669 * the CCB bus address for reselection,
4670 * and count it for this LUN.
4671 * Toggle reselect path to tagged.
4673 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
4674 tag = lp->cb_tags[lp->ia_tag];
4675 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
4678 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4679 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
4681 cpu_to_scr(SCRIPTA_BA(np, resel_tag));
4683 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4684 cp->tags_si = lp->tags_si;
4685 ++lp->tags_sum[cp->tags_si];
4693 * This command will not be tagged.
4694 * If we already have either a tagged or untagged
4695 * one, refuse to overlap this untagged one.
4699 * Debugging purpose.
4701 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4702 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
4705 * Count this nexus for this LUN.
4706 * Set up the CCB bus address for reselection.
4707 * Toggle reselect path to untagged.
4710 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4711 if (lp->busy_itl == 1) {
4712 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
4714 cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
4722 * Put the CCB into the busy queue.
4724 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4725 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4727 sym_remque(&cp->link2_ccbq);
4728 sym_insque_tail(&cp->link2_ccbq, &lp->waiting_ccbq);
4733 cp->odd_byte_adjustment = 0;
4735 cp->order = tag_order;
4739 if (DEBUG_FLAGS & DEBUG_TAGS) {
4740 sym_print_addr(cmd, "ccb @%p using tag %d.\n", cp, tag);
4746 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4751 * Release one control block
4753 void sym_free_ccb (struct sym_hcb *np, struct sym_ccb *cp)
4755 struct sym_tcb *tp = &np->target[cp->target];
4756 struct sym_lcb *lp = sym_lp(tp, cp->lun);
4758 if (DEBUG_FLAGS & DEBUG_TAGS) {
4759 sym_print_addr(cp->cmd, "ccb @%p freeing tag %d.\n",
4768 * If tagged, release the tag, set the relect path
4770 if (cp->tag != NO_TAG) {
4771 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4772 --lp->tags_sum[cp->tags_si];
4775 * Free the tag value.
4777 lp->cb_tags[lp->if_tag] = cp->tag;
4778 if (++lp->if_tag == SYM_CONF_MAX_TASK)
4781 * Make the reselect path invalid,
4782 * and uncount this CCB.
4784 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
4786 } else { /* Untagged */
4788 * Make the reselect path invalid,
4789 * and uncount this CCB.
4791 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
4795 * If no JOB active, make the LUN reselect path invalid.
4797 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
4799 cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
4803 * We donnot queue more than 1 ccb per target
4804 * with negotiation at any time. If this ccb was
4805 * used for negotiation, clear this info in the tcb.
4807 if (cp == tp->nego_cp)
4810 #ifdef SYM_CONF_IARB_SUPPORT
4812 * If we just complete the last queued CCB,
4813 * clear this info that is no longer relevant.
4815 if (cp == np->last_cp)
4820 * Make this CCB available.
4823 cp->host_status = HS_IDLE;
4824 sym_remque(&cp->link_ccbq);
4825 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4827 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4829 sym_remque(&cp->link2_ccbq);
4830 sym_insque_tail(&cp->link2_ccbq, &np->dummy_ccbq);
4832 if (cp->tag != NO_TAG)
4835 --lp->started_no_tag;
4843 * Allocate a CCB from memory and initialize its fixed part.
4845 static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np)
4847 struct sym_ccb *cp = NULL;
4851 * Prevent from allocating more CCBs than we can
4852 * queue to the controller.
4854 if (np->actccbs >= SYM_CONF_MAX_START)
4858 * Allocate memory for this CCB.
4860 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
4870 * Compute the bus address of this ccb.
4872 cp->ccb_ba = vtobus(cp);
4875 * Insert this ccb into the hashed list.
4877 hcode = CCB_HASH_CODE(cp->ccb_ba);
4878 cp->link_ccbh = np->ccbh[hcode];
4879 np->ccbh[hcode] = cp;
4882 * Initialyze the start and restart actions.
4884 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, idle));
4885 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
4888 * Initilialyze some other fields.
4890 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
4893 * Chain into free ccb queue.
4895 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4898 * Chain into optionnal lists.
4900 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4901 sym_insque_head(&cp->link2_ccbq, &np->dummy_ccbq);
4906 sym_mfree_dma(cp, sizeof(*cp), "CCB");
4911 * Look up a CCB from a DSA value.
4913 static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa)
4918 hcode = CCB_HASH_CODE(dsa);
4919 cp = np->ccbh[hcode];
4921 if (cp->ccb_ba == dsa)
4930 * Target control block initialisation.
4931 * Nothing important to do at the moment.
4933 static void sym_init_tcb (struct sym_hcb *np, u_char tn)
4935 #if 0 /* Hmmm... this checking looks paranoid. */
4937 * Check some alignments required by the chip.
4939 assert (((offsetof(struct sym_reg, nc_sxfer) ^
4940 offsetof(struct sym_tcb, head.sval)) &3) == 0);
4941 assert (((offsetof(struct sym_reg, nc_scntl3) ^
4942 offsetof(struct sym_tcb, head.wval)) &3) == 0);
4947 * Lun control block allocation and initialization.
4949 struct sym_lcb *sym_alloc_lcb (struct sym_hcb *np, u_char tn, u_char ln)
4951 struct sym_tcb *tp = &np->target[tn];
4952 struct sym_lcb *lp = NULL;
4955 * Initialize the target control block if not yet.
4957 sym_init_tcb (np, tn);
4960 * Allocate the LCB bus address array.
4961 * Compute the bus address of this table.
4963 if (ln && !tp->luntbl) {
4966 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
4969 for (i = 0 ; i < 64 ; i++)
4970 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
4971 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
4975 * Allocate the table of pointers for LUN(s) > 0, if needed.
4977 if (ln && !tp->lunmp) {
4978 tp->lunmp = kcalloc(SYM_CONF_MAX_LUN, sizeof(struct sym_lcb *),
4986 * Make it available to the chip.
4988 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
4993 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
4997 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
5001 * Let the itl task point to error handling.
5003 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
5006 * Set the reselect pattern to our default. :)
5008 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
5011 * Set user capabilities.
5013 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
5015 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5017 * Initialize device queueing.
5019 sym_que_init(&lp->waiting_ccbq);
5020 sym_que_init(&lp->started_ccbq);
5021 lp->started_max = SYM_CONF_MAX_TASK;
5022 lp->started_limit = SYM_CONF_MAX_TASK;
5030 * Allocate LCB resources for tagged command queuing.
5032 static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln)
5034 struct sym_tcb *tp = &np->target[tn];
5035 struct sym_lcb *lp = sym_lp(tp, ln);
5039 * Allocate the task table and and the tag allocation
5040 * circular buffer. We want both or none.
5042 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
5045 lp->cb_tags = kcalloc(SYM_CONF_MAX_TASK, 1, GFP_ATOMIC);
5047 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
5048 lp->itlq_tbl = NULL;
5053 * Initialize the task table with invalid entries.
5055 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
5056 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
5059 * Fill up the tag buffer with tag numbers.
5061 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
5065 * Make the task table available to SCRIPTS,
5066 * And accept tagged commands now.
5068 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
5076 * Queue a SCSI IO to the controller.
5078 int sym_queue_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, struct sym_ccb *cp)
5080 struct scsi_device *sdev = cmd->device;
5088 * Keep track of the IO in our CCB.
5093 * Retrieve the target descriptor.
5095 tp = &np->target[cp->target];
5098 * Retrieve the lun descriptor.
5100 lp = sym_lp(tp, sdev->lun);
5102 can_disconnect = (cp->tag != NO_TAG) ||
5103 (lp && (lp->curr_flags & SYM_DISC_ENABLED));
5105 msgptr = cp->scsi_smsg;
5107 msgptr[msglen++] = IDENTIFY(can_disconnect, sdev->lun);
5110 * Build the tag message if present.
5112 if (cp->tag != NO_TAG) {
5113 u_char order = cp->order;
5121 order = M_SIMPLE_TAG;
5123 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
5125 * Avoid too much reordering of SCSI commands.
5126 * The algorithm tries to prevent completion of any
5127 * tagged command from being delayed against more
5128 * than 3 times the max number of queued commands.
5130 if (lp && lp->tags_since > 3*SYM_CONF_MAX_TAG) {
5131 lp->tags_si = !(lp->tags_si);
5132 if (lp->tags_sum[lp->tags_si]) {
5133 order = M_ORDERED_TAG;
5134 if ((DEBUG_FLAGS & DEBUG_TAGS)||sym_verbose>1) {
5136 "ordered tag forced.\n");
5142 msgptr[msglen++] = order;
5145 * For less than 128 tags, actual tags are numbered
5146 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
5147 * with devices that have problems with #TAG 0 or too
5148 * great #TAG numbers. For more tags (up to 256),
5149 * we use directly our tag number.
5151 #if SYM_CONF_MAX_TASK > (512/4)
5152 msgptr[msglen++] = cp->tag;
5154 msgptr[msglen++] = (cp->tag << 1) + 1;
5159 * Build a negotiation message if needed.
5160 * (nego_status is filled by sym_prepare_nego())
5162 cp->nego_status = 0;
5163 if (tp->tgoal.check_nego && !tp->nego_cp && lp) {
5164 msglen += sym_prepare_nego(np, cp, msgptr + msglen);
5170 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
5171 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA(np, resel_dsa));
5176 cp->phys.select.sel_id = cp->target;
5177 cp->phys.select.sel_scntl3 = tp->head.wval;
5178 cp->phys.select.sel_sxfer = tp->head.sval;
5179 cp->phys.select.sel_scntl4 = tp->head.uval;
5184 cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg);
5185 cp->phys.smsg.size = cpu_to_scr(msglen);
5190 cp->host_xflags = 0;
5191 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
5192 cp->ssss_status = S_ILLEGAL;
5193 cp->xerr_status = 0;
5195 cp->extra_bytes = 0;
5198 * extreme data pointer.
5199 * shall be positive, so -1 is lower than lowest.:)
5205 * Build the CDB and DATA descriptor block
5208 return sym_setup_data_and_start(np, cmd, cp);
5212 * Reset a SCSI target (all LUNs of this target).
5214 int sym_reset_scsi_target(struct sym_hcb *np, int target)
5218 if (target == np->myaddr || (u_int)target >= SYM_CONF_MAX_TARGET)
5221 tp = &np->target[target];
5224 np->istat_sem = SEM;
5225 OUTB(np, nc_istat, SIGP|SEM);
5233 static int sym_abort_ccb(struct sym_hcb *np, struct sym_ccb *cp, int timed_out)
5236 * Check that the IO is active.
5238 if (!cp || !cp->host_status || cp->host_status == HS_WAIT)
5242 * If a previous abort didn't succeed in time,
5243 * perform a BUS reset.
5246 sym_reset_scsi_bus(np, 1);
5251 * Mark the CCB for abort and allow time for.
5253 cp->to_abort = timed_out ? 2 : 1;
5256 * Tell the SCRIPTS processor to stop and synchronize with us.
5258 np->istat_sem = SEM;
5259 OUTB(np, nc_istat, SIGP|SEM);
5263 int sym_abort_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, int timed_out)
5269 * Look up our CCB control block.
5272 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5273 struct sym_ccb *cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5274 if (cp2->cmd == cmd) {
5280 return sym_abort_ccb(np, cp, timed_out);
5284 * Complete execution of a SCSI command with extended
5285 * error, SCSI status error, or having been auto-sensed.
5287 * The SCRIPTS processor is not running there, so we
5288 * can safely access IO registers and remove JOBs from
5290 * SCRATCHA is assumed to have been loaded with STARTPOS
5291 * before the SCRIPTS called the C code.
5293 void sym_complete_error(struct sym_hcb *np, struct sym_ccb *cp)
5295 struct scsi_device *sdev;
5296 struct scsi_cmnd *cmd;
5303 * Paranoid check. :)
5305 if (!cp || !cp->cmd)
5310 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
5311 dev_info(&sdev->sdev_gendev, "CCB=%p STAT=%x/%x/%x\n", cp,
5312 cp->host_status, cp->ssss_status, cp->host_flags);
5316 * Get target and lun pointers.
5318 tp = &np->target[cp->target];
5319 lp = sym_lp(tp, sdev->lun);
5322 * Check for extended errors.
5324 if (cp->xerr_status) {
5326 sym_print_xerr(cmd, cp->xerr_status);
5327 if (cp->host_status == HS_COMPLETE)
5328 cp->host_status = HS_COMP_ERR;
5332 * Calculate the residual.
5334 resid = sym_compute_residual(np, cp);
5336 if (!SYM_SETUP_RESIDUAL_SUPPORT) {/* If user does not want residuals */
5337 resid = 0; /* throw them away. :) */
5342 printf("XXXX RESID= %d - 0x%x\n", resid, resid);
5346 * Dequeue all queued CCBs for that device
5347 * not yet started by SCRIPTS.
5349 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
5350 i = sym_dequeue_from_squeue(np, i, cp->target, sdev->lun, -1);
5353 * Restart the SCRIPTS processor.
5355 OUTL_DSP(np, SCRIPTA_BA(np, start));
5357 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5358 if (cp->host_status == HS_COMPLETE &&
5359 cp->ssss_status == S_QUEUE_FULL) {
5360 if (!lp || lp->started_tags - i < 2)
5363 * Decrease queue depth as needed.
5365 lp->started_max = lp->started_tags - i - 1;
5368 if (sym_verbose >= 2) {
5369 sym_print_addr(cmd, " queue depth is now %d\n",
5376 cp->host_status = HS_BUSY;
5377 cp->ssss_status = S_ILLEGAL;
5380 * Let's requeue it to device.
5382 sym_set_cam_status(cmd, DID_SOFT_ERROR);
5388 * Build result in CAM ccb.
5390 sym_set_cam_result_error(np, cp, resid);
5392 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5396 * Add this one to the COMP queue.
5398 sym_remque(&cp->link_ccbq);
5399 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
5402 * Complete all those commands with either error
5403 * or requeue condition.
5405 sym_flush_comp_queue(np, 0);
5407 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5409 * Donnot start more than 1 command after an error.
5411 sym_start_next_ccbs(np, lp, 1);
5416 * Complete execution of a successful SCSI command.
5418 * Only successful commands go to the DONE queue,
5419 * since we need to have the SCRIPTS processor
5420 * stopped on any error condition.
5421 * The SCRIPTS processor is running while we are
5422 * completing successful commands.
5424 void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp)
5428 struct scsi_cmnd *cmd;
5432 * Paranoid check. :)
5434 if (!cp || !cp->cmd)
5436 assert (cp->host_status == HS_COMPLETE);
5444 * Get target and lun pointers.
5446 tp = &np->target[cp->target];
5447 lp = sym_lp(tp, cp->lun);
5450 * If all data have been transferred, given than no
5451 * extended error did occur, there is no residual.
5454 if (cp->phys.head.lastp != cp->goalp)
5455 resid = sym_compute_residual(np, cp);
5458 * Wrong transfer residuals may be worse than just always
5459 * returning zero. User can disable this feature in
5460 * sym53c8xx.h. Residual support is enabled by default.
5462 if (!SYM_SETUP_RESIDUAL_SUPPORT)
5466 printf("XXXX RESID= %d - 0x%x\n", resid, resid);
5470 * Build result in CAM ccb.
5472 sym_set_cam_result_ok(cp, cmd, resid);
5474 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5476 * If max number of started ccbs had been reduced,
5477 * increase it if 200 good status received.
5479 if (lp && lp->started_max < lp->started_limit) {
5481 if (lp->num_sgood >= 200) {
5484 if (sym_verbose >= 2) {
5485 sym_print_addr(cmd, " queue depth is now %d\n",
5495 sym_free_ccb (np, cp);
5497 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5499 * Requeue a couple of awaiting scsi commands.
5501 if (!sym_que_empty(&lp->waiting_ccbq))
5502 sym_start_next_ccbs(np, lp, 2);
5505 * Complete the command.
5507 sym_xpt_done(np, cmd);
5511 * Soft-attach the controller.
5513 int sym_hcb_attach(struct Scsi_Host *shost, struct sym_fw *fw, struct sym_nvram *nvram)
5515 struct sym_hcb *np = sym_get_hcb(shost);
5519 * Get some info about the firmware.
5521 np->scripta_sz = fw->a_size;
5522 np->scriptb_sz = fw->b_size;
5523 np->scriptz_sz = fw->z_size;
5524 np->fw_setup = fw->setup;
5525 np->fw_patch = fw->patch;
5526 np->fw_name = fw->name;
5529 * Save setting of some IO registers, so we will
5530 * be able to probe specific implementations.
5532 sym_save_initial_setting (np);
5535 * Reset the chip now, since it has been reported
5536 * that SCSI clock calibration may not work properly
5537 * if the chip is currently active.
5542 * Prepare controller and devices settings, according
5543 * to chip features, user set-up and driver set-up.
5545 sym_prepare_setting(shost, np, nvram);
5548 * Check the PCI clock frequency.
5549 * Must be performed after prepare_setting since it destroys
5550 * STEST1 that is used to probe for the clock doubler.
5552 i = sym_getpciclock(np);
5553 if (i > 37000 && !(np->features & FE_66MHZ))
5554 printf("%s: PCI BUS clock seems too high: %u KHz.\n",
5558 * Allocate the start queue.
5560 np->squeue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
5563 np->squeue_ba = vtobus(np->squeue);
5566 * Allocate the done queue.
5568 np->dqueue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
5571 np->dqueue_ba = vtobus(np->dqueue);
5574 * Allocate the target bus address array.
5576 np->targtbl = sym_calloc_dma(256, "TARGTBL");
5579 np->targtbl_ba = vtobus(np->targtbl);
5582 * Allocate SCRIPTS areas.
5584 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
5585 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
5586 np->scriptz0 = sym_calloc_dma(np->scriptz_sz, "SCRIPTZ0");
5587 if (!np->scripta0 || !np->scriptb0 || !np->scriptz0)
5591 * Allocate the array of lists of CCBs hashed by DSA.
5593 np->ccbh = kcalloc(sizeof(struct sym_ccb **), CCB_HASH_SIZE, GFP_KERNEL);
5598 * Initialyze the CCB free and busy queues.
5600 sym_que_init(&np->free_ccbq);
5601 sym_que_init(&np->busy_ccbq);
5602 sym_que_init(&np->comp_ccbq);
5605 * Initialization for optional handling
5606 * of device queueing.
5608 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5609 sym_que_init(&np->dummy_ccbq);
5612 * Allocate some CCB. We need at least ONE.
5614 if (!sym_alloc_ccb(np))
5618 * Calculate BUS addresses where we are going
5619 * to load the SCRIPTS.
5621 np->scripta_ba = vtobus(np->scripta0);
5622 np->scriptb_ba = vtobus(np->scriptb0);
5623 np->scriptz_ba = vtobus(np->scriptz0);
5626 np->scripta_ba = np->ram_ba;
5627 if (np->features & FE_RAM8K) {
5629 np->scriptb_ba = np->scripta_ba + 4096;
5630 #if 0 /* May get useful for 64 BIT PCI addressing */
5631 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
5639 * Copy scripts to controller instance.
5641 memcpy(np->scripta0, fw->a_base, np->scripta_sz);
5642 memcpy(np->scriptb0, fw->b_base, np->scriptb_sz);
5643 memcpy(np->scriptz0, fw->z_base, np->scriptz_sz);
5646 * Setup variable parts in scripts and compute
5647 * scripts bus addresses used from the C code.
5649 np->fw_setup(np, fw);
5652 * Bind SCRIPTS with physical addresses usable by the
5653 * SCRIPTS processor (as seen from the BUS = BUS addresses).
5655 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
5656 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
5657 sym_fw_bind_script(np, (u32 *) np->scriptz0, np->scriptz_sz);
5659 #ifdef SYM_CONF_IARB_SUPPORT
5661 * If user wants IARB to be set when we win arbitration
5662 * and have other jobs, compute the max number of consecutive
5663 * settings of IARB hints before we leave devices a chance to
5664 * arbitrate for reselection.
5666 #ifdef SYM_SETUP_IARB_MAX
5667 np->iarb_max = SYM_SETUP_IARB_MAX;
5674 * Prepare the idle and invalid task actions.
5676 np->idletask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5677 np->idletask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5678 np->idletask_ba = vtobus(&np->idletask);
5680 np->notask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5681 np->notask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5682 np->notask_ba = vtobus(&np->notask);
5684 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5685 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5686 np->bad_itl_ba = vtobus(&np->bad_itl);
5688 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5689 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA(np,bad_i_t_l_q));
5690 np->bad_itlq_ba = vtobus(&np->bad_itlq);
5693 * Allocate and prepare the lun JUMP table that is used
5694 * for a target prior the probing of devices (bad lun table).
5695 * A private table will be allocated for the target on the
5696 * first INQUIRY response received.
5698 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
5702 np->badlun_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
5703 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
5704 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
5707 * Prepare the bus address array that contains the bus
5708 * address of each target control block.
5709 * For now, assume all logical units are wrong. :)
5711 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
5712 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
5713 np->target[i].head.luntbl_sa =
5714 cpu_to_scr(vtobus(np->badluntbl));
5715 np->target[i].head.lun0_sa =
5716 cpu_to_scr(vtobus(&np->badlun_sa));
5720 * Now check the cache handling of the pci chipset.
5722 if (sym_snooptest (np)) {
5723 printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np));
5728 * Sigh! we are done.
5737 * Free everything that has been allocated for this device.
5739 void sym_hcb_free(struct sym_hcb *np)
5747 sym_mfree_dma(np->scriptz0, np->scriptz_sz, "SCRIPTZ0");
5749 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
5751 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
5753 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
5755 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
5758 while ((qp = sym_remque_head(&np->free_ccbq)) != 0) {
5759 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5760 sym_mfree_dma(cp, sizeof(*cp), "CCB");
5766 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
5768 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
5769 tp = &np->target[target];
5770 #if SYM_CONF_MAX_LUN > 1
5775 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
git://ftp.safe.ca / safe / jmp / linux-2.6 / blob