2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
6 * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx>
8 * This driver is derived from the Linux sym53c8xx driver.
9 * Copyright (C) 1998-2000 Gerard Roudier
11 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
12 * a port of the FreeBSD ncr driver to Linux-1.2.13.
14 * The original ncr driver has been written for 386bsd and FreeBSD by
15 * Wolfgang Stanglmeier <wolf@cologne.de>
16 * Stefan Esser <se@mi.Uni-Koeln.de>
17 * Copyright (C) 1994 Wolfgang Stanglmeier
19 * Other major contributions:
21 * NVRAM detection and reading.
22 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
24 *-----------------------------------------------------------------------------
26 * This program is free software; you can redistribute it and/or modify
27 * it under the terms of the GNU General Public License as published by
28 * the Free Software Foundation; either version 2 of the License, or
29 * (at your option) any later version.
31 * This program is distributed in the hope that it will be useful,
32 * but WITHOUT ANY WARRANTY; without even the implied warranty of
33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
34 * GNU General Public License for more details.
36 * You should have received a copy of the GNU General Public License
37 * along with this program; if not, write to the Free Software
38 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
41 #include <linux/slab.h>
42 #include <asm/param.h> /* for timeouts in units of HZ */
45 #include "sym_nvram.h"
48 #define SYM_DEBUG_GENERIC_SUPPORT
52 * Needed function prototypes.
54 static void sym_int_ma (struct sym_hcb *np);
55 static void sym_int_sir (struct sym_hcb *np);
56 static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np);
57 static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa);
58 static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln);
59 static void sym_complete_error (struct sym_hcb *np, struct sym_ccb *cp);
60 static void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp);
61 static int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp);
64 * Print a buffer in hexadecimal format with a ".\n" at end.
66 static void sym_printl_hex(u_char *p, int n)
73 static void sym_print_msg(struct sym_ccb *cp, char *label, u_char *msg)
76 sym_print_addr(cp->cmd, "%s: ", label);
78 sym_print_addr(cp->cmd, "");
84 static void sym_print_nego_msg(struct sym_hcb *np, int target, char *label, u_char *msg)
86 struct sym_tcb *tp = &np->target[target];
87 dev_info(&tp->starget->dev, "%s: ", label);
94 * Print something that tells about extended errors.
96 void sym_print_xerr(struct scsi_cmnd *cmd, int x_status)
98 if (x_status & XE_PARITY_ERR) {
99 sym_print_addr(cmd, "unrecovered SCSI parity error.\n");
101 if (x_status & XE_EXTRA_DATA) {
102 sym_print_addr(cmd, "extraneous data discarded.\n");
104 if (x_status & XE_BAD_PHASE) {
105 sym_print_addr(cmd, "illegal scsi phase (4/5).\n");
107 if (x_status & XE_SODL_UNRUN) {
108 sym_print_addr(cmd, "ODD transfer in DATA OUT phase.\n");
110 if (x_status & XE_SWIDE_OVRUN) {
111 sym_print_addr(cmd, "ODD transfer in DATA IN phase.\n");
116 * Return a string for SCSI BUS mode.
118 static char *sym_scsi_bus_mode(int mode)
121 case SMODE_HVD: return "HVD";
122 case SMODE_SE: return "SE";
123 case SMODE_LVD: return "LVD";
129 * Soft reset the chip.
131 * Raising SRST when the chip is running may cause
132 * problems on dual function chips (see below).
133 * On the other hand, LVD devices need some delay
134 * to settle and report actual BUS mode in STEST4.
136 static void sym_chip_reset (struct sym_hcb *np)
138 OUTB(np, nc_istat, SRST);
141 OUTB(np, nc_istat, 0);
143 udelay(2000); /* For BUS MODE to settle */
147 * Really soft reset the chip.:)
149 * Some 896 and 876 chip revisions may hang-up if we set
150 * the SRST (soft reset) bit at the wrong time when SCRIPTS
152 * So, we need to abort the current operation prior to
153 * soft resetting the chip.
155 static void sym_soft_reset (struct sym_hcb *np)
160 if (!(np->features & FE_ISTAT1) || !(INB(np, nc_istat1) & SCRUN))
163 OUTB(np, nc_istat, CABRT);
164 for (i = 100000 ; i ; --i) {
165 istat = INB(np, nc_istat);
169 else if (istat & DIP) {
170 if (INB(np, nc_dstat) & ABRT)
175 OUTB(np, nc_istat, 0);
177 printf("%s: unable to abort current chip operation, "
178 "ISTAT=0x%02x.\n", sym_name(np), istat);
184 * Start reset process.
186 * The interrupt handler will reinitialize the chip.
188 static void sym_start_reset(struct sym_hcb *np)
190 sym_reset_scsi_bus(np, 1);
193 int sym_reset_scsi_bus(struct sym_hcb *np, int enab_int)
198 sym_soft_reset(np); /* Soft reset the chip */
200 OUTW(np, nc_sien, RST);
202 * Enable Tolerant, reset IRQD if present and
203 * properly set IRQ mode, prior to resetting the bus.
205 OUTB(np, nc_stest3, TE);
206 OUTB(np, nc_dcntl, (np->rv_dcntl & IRQM));
207 OUTB(np, nc_scntl1, CRST);
211 if (!SYM_SETUP_SCSI_BUS_CHECK)
214 * Check for no terminators or SCSI bus shorts to ground.
215 * Read SCSI data bus, data parity bits and control signals.
216 * We are expecting RESET to be TRUE and other signals to be
219 term = INB(np, nc_sstat0);
220 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
221 term |= ((INB(np, nc_sstat2) & 0x01) << 26) | /* sdp1 */
222 ((INW(np, nc_sbdl) & 0xff) << 9) | /* d7-0 */
223 ((INW(np, nc_sbdl) & 0xff00) << 10) | /* d15-8 */
224 INB(np, nc_sbcl); /* req ack bsy sel atn msg cd io */
229 if (term != (2<<7)) {
230 printf("%s: suspicious SCSI data while resetting the BUS.\n",
232 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
233 "0x%lx, expecting 0x%lx\n",
235 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
236 (u_long)term, (u_long)(2<<7));
237 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
241 OUTB(np, nc_scntl1, 0);
246 * Select SCSI clock frequency
248 static void sym_selectclock(struct sym_hcb *np, u_char scntl3)
251 * If multiplier not present or not selected, leave here.
253 if (np->multiplier <= 1) {
254 OUTB(np, nc_scntl3, scntl3);
258 if (sym_verbose >= 2)
259 printf ("%s: enabling clock multiplier\n", sym_name(np));
261 OUTB(np, nc_stest1, DBLEN); /* Enable clock multiplier */
263 * Wait for the LCKFRQ bit to be set if supported by the chip.
264 * Otherwise wait 50 micro-seconds (at least).
266 if (np->features & FE_LCKFRQ) {
268 while (!(INB(np, nc_stest4) & LCKFRQ) && --i > 0)
271 printf("%s: the chip cannot lock the frequency\n",
277 OUTB(np, nc_stest3, HSC); /* Halt the scsi clock */
278 OUTB(np, nc_scntl3, scntl3);
279 OUTB(np, nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
280 OUTB(np, nc_stest3, 0x00); /* Restart scsi clock */
285 * Determine the chip's clock frequency.
287 * This is essential for the negotiation of the synchronous
290 * Note: we have to return the correct value.
291 * THERE IS NO SAFE DEFAULT VALUE.
293 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
294 * 53C860 and 53C875 rev. 1 support fast20 transfers but
295 * do not have a clock doubler and so are provided with a
296 * 80 MHz clock. All other fast20 boards incorporate a doubler
297 * and so should be delivered with a 40 MHz clock.
298 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
299 * clock and provide a clock quadrupler (160 Mhz).
303 * calculate SCSI clock frequency (in KHz)
305 static unsigned getfreq (struct sym_hcb *np, int gen)
311 * Measure GEN timer delay in order
312 * to calculate SCSI clock frequency
314 * This code will never execute too
315 * many loop iterations (if DELAY is
316 * reasonably correct). It could get
317 * too low a delay (too high a freq.)
318 * if the CPU is slow executing the
319 * loop for some reason (an NMI, for
320 * example). For this reason we will
321 * if multiple measurements are to be
322 * performed trust the higher delay
323 * (lower frequency returned).
325 OUTW(np, nc_sien, 0); /* mask all scsi interrupts */
326 INW(np, nc_sist); /* clear pending scsi interrupt */
327 OUTB(np, nc_dien, 0); /* mask all dma interrupts */
328 INW(np, nc_sist); /* another one, just to be sure :) */
330 * The C1010-33 core does not report GEN in SIST,
331 * if this interrupt is masked in SIEN.
332 * I don't know yet if the C1010-66 behaves the same way.
334 if (np->features & FE_C10) {
335 OUTW(np, nc_sien, GEN);
336 OUTB(np, nc_istat1, SIRQD);
338 OUTB(np, nc_scntl3, 4); /* set pre-scaler to divide by 3 */
339 OUTB(np, nc_stime1, 0); /* disable general purpose timer */
340 OUTB(np, nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
341 while (!(INW(np, nc_sist) & GEN) && ms++ < 100000)
342 udelay(1000/4); /* count in 1/4 of ms */
343 OUTB(np, nc_stime1, 0); /* disable general purpose timer */
345 * Undo C1010-33 specific settings.
347 if (np->features & FE_C10) {
348 OUTW(np, nc_sien, 0);
349 OUTB(np, nc_istat1, 0);
352 * set prescaler to divide by whatever 0 means
353 * 0 ought to choose divide by 2, but appears
354 * to set divide by 3.5 mode in my 53c810 ...
356 OUTB(np, nc_scntl3, 0);
359 * adjust for prescaler, and convert into KHz
361 f = ms ? ((1 << gen) * (4340*4)) / ms : 0;
364 * The C1010-33 result is biased by a factor
365 * of 2/3 compared to earlier chips.
367 if (np->features & FE_C10)
370 if (sym_verbose >= 2)
371 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
372 sym_name(np), gen, ms/4, f);
377 static unsigned sym_getfreq (struct sym_hcb *np)
382 getfreq (np, gen); /* throw away first result */
383 f1 = getfreq (np, gen);
384 f2 = getfreq (np, gen);
385 if (f1 > f2) f1 = f2; /* trust lower result */
390 * Get/probe chip SCSI clock frequency
392 static void sym_getclock (struct sym_hcb *np, int mult)
394 unsigned char scntl3 = np->sv_scntl3;
395 unsigned char stest1 = np->sv_stest1;
401 * True with 875/895/896/895A with clock multiplier selected
403 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
404 if (sym_verbose >= 2)
405 printf ("%s: clock multiplier found\n", sym_name(np));
406 np->multiplier = mult;
410 * If multiplier not found or scntl3 not 7,5,3,
411 * reset chip and get frequency from general purpose timer.
412 * Otherwise trust scntl3 BIOS setting.
414 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
415 OUTB(np, nc_stest1, 0); /* make sure doubler is OFF */
416 f1 = sym_getfreq (np);
419 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
421 if (f1 < 45000) f1 = 40000;
422 else if (f1 < 55000) f1 = 50000;
425 if (f1 < 80000 && mult > 1) {
426 if (sym_verbose >= 2)
427 printf ("%s: clock multiplier assumed\n",
429 np->multiplier = mult;
432 if ((scntl3 & 7) == 3) f1 = 40000;
433 else if ((scntl3 & 7) == 5) f1 = 80000;
436 f1 /= np->multiplier;
440 * Compute controller synchronous parameters.
442 f1 *= np->multiplier;
447 * Get/probe PCI clock frequency
449 static int sym_getpciclock (struct sym_hcb *np)
454 * For now, we only need to know about the actual
455 * PCI BUS clock frequency for C1010-66 chips.
458 if (np->features & FE_66MHZ) {
462 OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
464 OUTB(np, nc_stest1, 0);
472 * SYMBIOS chip clock divisor table.
474 * Divisors are multiplied by 10,000,000 in order to make
475 * calculations more simple.
478 static const u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
481 * Get clock factor and sync divisor for a given
482 * synchronous factor period.
485 sym_getsync(struct sym_hcb *np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
487 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
488 int div = np->clock_divn; /* Number of divisors supported */
489 u32 fak; /* Sync factor in sxfer */
490 u32 per; /* Period in tenths of ns */
491 u32 kpc; /* (per * clk) */
495 * Compute the synchronous period in tenths of nano-seconds
497 if (dt && sfac <= 9) per = 125;
498 else if (sfac <= 10) per = 250;
499 else if (sfac == 11) per = 303;
500 else if (sfac == 12) per = 500;
501 else per = 40 * sfac;
509 * For earliest C10 revision 0, we cannot use extra
510 * clocks for the setting of the SCSI clocking.
511 * Note that this limits the lowest sync data transfer
512 * to 5 Mega-transfers per second and may result in
513 * using higher clock divisors.
516 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
518 * Look for the lowest clock divisor that allows an
519 * output speed not faster than the period.
523 if (kpc > (div_10M[div] << 2)) {
528 fak = 0; /* No extra clocks */
529 if (div == np->clock_divn) { /* Are we too fast ? */
539 * Look for the greatest clock divisor that allows an
540 * input speed faster than the period.
543 if (kpc >= (div_10M[div] << 2)) break;
546 * Calculate the lowest clock factor that allows an output
547 * speed not faster than the period, and the max output speed.
548 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
549 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
552 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
553 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
555 fak = (kpc - 1) / div_10M[div] + 1 - 4;
556 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
560 * Check against our hardware limits, or bugs :).
568 * Compute and return sync parameters.
577 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
578 * 128 transfers. All chips support at least 16 transfers
579 * bursts. The 825A, 875 and 895 chips support bursts of up
580 * to 128 transfers and the 895A and 896 support bursts of up
581 * to 64 transfers. All other chips support up to 16
584 * For PCI 32 bit data transfers each transfer is a DWORD.
585 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
587 * We use log base 2 (burst length) as internal code, with
588 * value 0 meaning "burst disabled".
592 * Burst length from burst code.
594 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
597 * Burst code from io register bits.
599 #define burst_code(dmode, ctest4, ctest5) \
600 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
603 * Set initial io register bits from burst code.
605 static __inline void sym_init_burst(struct sym_hcb *np, u_char bc)
607 np->rv_ctest4 &= ~0x80;
608 np->rv_dmode &= ~(0x3 << 6);
609 np->rv_ctest5 &= ~0x4;
612 np->rv_ctest4 |= 0x80;
616 np->rv_dmode |= ((bc & 0x3) << 6);
617 np->rv_ctest5 |= (bc & 0x4);
622 * Save initial settings of some IO registers.
623 * Assumed to have been set by BIOS.
624 * We cannot reset the chip prior to reading the
625 * IO registers, since informations will be lost.
626 * Since the SCRIPTS processor may be running, this
627 * is not safe on paper, but it seems to work quite
630 static void sym_save_initial_setting (struct sym_hcb *np)
632 np->sv_scntl0 = INB(np, nc_scntl0) & 0x0a;
633 np->sv_scntl3 = INB(np, nc_scntl3) & 0x07;
634 np->sv_dmode = INB(np, nc_dmode) & 0xce;
635 np->sv_dcntl = INB(np, nc_dcntl) & 0xa8;
636 np->sv_ctest3 = INB(np, nc_ctest3) & 0x01;
637 np->sv_ctest4 = INB(np, nc_ctest4) & 0x80;
638 np->sv_gpcntl = INB(np, nc_gpcntl);
639 np->sv_stest1 = INB(np, nc_stest1);
640 np->sv_stest2 = INB(np, nc_stest2) & 0x20;
641 np->sv_stest4 = INB(np, nc_stest4);
642 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
643 np->sv_scntl4 = INB(np, nc_scntl4);
644 np->sv_ctest5 = INB(np, nc_ctest5) & 0x04;
647 np->sv_ctest5 = INB(np, nc_ctest5) & 0x24;
651 * Prepare io register values used by sym_start_up()
652 * according to selected and supported features.
654 static int sym_prepare_setting(struct Scsi_Host *shost, struct sym_hcb *np, struct sym_nvram *nvram)
663 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
666 * Guess the frequency of the chip's clock.
668 if (np->features & (FE_ULTRA3 | FE_ULTRA2))
669 np->clock_khz = 160000;
670 else if (np->features & FE_ULTRA)
671 np->clock_khz = 80000;
673 np->clock_khz = 40000;
676 * Get the clock multiplier factor.
678 if (np->features & FE_QUAD)
680 else if (np->features & FE_DBLR)
686 * Measure SCSI clock frequency for chips
687 * it may vary from assumed one.
689 if (np->features & FE_VARCLK)
690 sym_getclock(np, np->multiplier);
693 * Divisor to be used for async (timer pre-scaler).
695 i = np->clock_divn - 1;
697 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
705 * The C1010 uses hardwired divisors for async.
706 * So, we just throw away, the async. divisor.:-)
708 if (np->features & FE_C10)
712 * Minimum synchronous period factor supported by the chip.
713 * Btw, 'period' is in tenths of nanoseconds.
715 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
717 if (period <= 250) np->minsync = 10;
718 else if (period <= 303) np->minsync = 11;
719 else if (period <= 500) np->minsync = 12;
720 else np->minsync = (period + 40 - 1) / 40;
723 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
725 if (np->minsync < 25 &&
726 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
728 else if (np->minsync < 12 &&
729 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
733 * Maximum synchronous period factor supported by the chip.
735 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
736 np->maxsync = period > 2540 ? 254 : period / 10;
739 * If chip is a C1010, guess the sync limits in DT mode.
741 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
742 if (np->clock_khz == 160000) {
745 np->maxoffs_dt = nvram->type ? 62 : 31;
750 * 64 bit addressing (895A/896/1010) ?
752 if (np->features & FE_DAC) {
753 #if SYM_CONF_DMA_ADDRESSING_MODE == 0
754 np->rv_ccntl1 |= (DDAC);
755 #elif SYM_CONF_DMA_ADDRESSING_MODE == 1
757 np->rv_ccntl1 |= (DDAC);
759 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
760 #elif SYM_CONF_DMA_ADDRESSING_MODE == 2
762 np->rv_ccntl1 |= (DDAC);
764 np->rv_ccntl1 |= (0 | EXTIBMV);
769 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
771 if (np->features & FE_NOPM)
772 np->rv_ccntl0 |= (ENPMJ);
775 * C1010-33 Errata: Part Number:609-039638 (rev. 1) is fixed.
776 * In dual channel mode, contention occurs if internal cycles
777 * are used. Disable internal cycles.
779 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_33 &&
780 np->revision_id < 0x1)
781 np->rv_ccntl0 |= DILS;
784 * Select burst length (dwords)
786 burst_max = SYM_SETUP_BURST_ORDER;
787 if (burst_max == 255)
788 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
792 if (burst_max > np->maxburst)
793 burst_max = np->maxburst;
796 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
797 * This chip and the 860 Rev 1 may wrongly use PCI cache line
798 * based transactions on LOAD/STORE instructions. So we have
799 * to prevent these chips from using such PCI transactions in
800 * this driver. The generic ncr driver that does not use
801 * LOAD/STORE instructions does not need this work-around.
803 if ((np->device_id == PCI_DEVICE_ID_NCR_53C810 &&
804 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
805 (np->device_id == PCI_DEVICE_ID_NCR_53C860 &&
806 np->revision_id <= 0x1))
807 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
810 * Select all supported special features.
811 * If we are using on-board RAM for scripts, prefetch (PFEN)
812 * does not help, but burst op fetch (BOF) does.
813 * Disabling PFEN makes sure BOF will be used.
815 if (np->features & FE_ERL)
816 np->rv_dmode |= ERL; /* Enable Read Line */
817 if (np->features & FE_BOF)
818 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
819 if (np->features & FE_ERMP)
820 np->rv_dmode |= ERMP; /* Enable Read Multiple */
822 if ((np->features & FE_PFEN) && !np->ram_ba)
824 if (np->features & FE_PFEN)
826 np->rv_dcntl |= PFEN; /* Prefetch Enable */
827 if (np->features & FE_CLSE)
828 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
829 if (np->features & FE_WRIE)
830 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
831 if (np->features & FE_DFS)
832 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
837 np->rv_ctest4 |= MPEE; /* Master parity checking */
838 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
841 * Get parity checking, host ID and verbose mode from NVRAM
844 sym_nvram_setup_host(shost, np, nvram);
847 * Get SCSI addr of host adapter (set by bios?).
849 if (np->myaddr == 255) {
850 np->myaddr = INB(np, nc_scid) & 0x07;
852 np->myaddr = SYM_SETUP_HOST_ID;
856 * Prepare initial io register bits for burst length
858 sym_init_burst(np, burst_max);
862 * - LVD capable chips (895/895A/896/1010) report the
863 * current BUS mode through the STEST4 IO register.
864 * - For previous generation chips (825/825A/875),
865 * user has to tell us how to check against HVD,
866 * since a 100% safe algorithm is not possible.
868 np->scsi_mode = SMODE_SE;
869 if (np->features & (FE_ULTRA2|FE_ULTRA3))
870 np->scsi_mode = (np->sv_stest4 & SMODE);
871 else if (np->features & FE_DIFF) {
872 if (SYM_SETUP_SCSI_DIFF == 1) {
874 if (np->sv_stest2 & 0x20)
875 np->scsi_mode = SMODE_HVD;
877 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
878 if (!(INB(np, nc_gpreg) & 0x08))
879 np->scsi_mode = SMODE_HVD;
882 else if (SYM_SETUP_SCSI_DIFF == 2)
883 np->scsi_mode = SMODE_HVD;
885 if (np->scsi_mode == SMODE_HVD)
886 np->rv_stest2 |= 0x20;
889 * Set LED support from SCRIPTS.
890 * Ignore this feature for boards known to use a
891 * specific GPIO wiring and for the 895A, 896
892 * and 1010 that drive the LED directly.
894 if ((SYM_SETUP_SCSI_LED ||
895 (nvram->type == SYM_SYMBIOS_NVRAM ||
896 (nvram->type == SYM_TEKRAM_NVRAM &&
897 np->device_id == PCI_DEVICE_ID_NCR_53C895))) &&
898 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
899 np->features |= FE_LED0;
904 switch(SYM_SETUP_IRQ_MODE & 3) {
906 np->rv_dcntl |= IRQM;
909 np->rv_dcntl |= (np->sv_dcntl & IRQM);
916 * Configure targets according to driver setup.
917 * If NVRAM present get targets setup from NVRAM.
919 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
920 struct sym_tcb *tp = &np->target[i];
922 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
923 tp->usrtags = SYM_SETUP_MAX_TAG;
924 tp->usr_width = np->maxwide;
927 sym_nvram_setup_target(tp, i, nvram);
930 tp->usrflags &= ~SYM_TAGS_ENABLED;
934 * Let user know about the settings.
936 printf("%s: %s, ID %d, Fast-%d, %s, %s\n", sym_name(np),
937 sym_nvram_type(nvram), np->myaddr,
938 (np->features & FE_ULTRA3) ? 80 :
939 (np->features & FE_ULTRA2) ? 40 :
940 (np->features & FE_ULTRA) ? 20 : 10,
941 sym_scsi_bus_mode(np->scsi_mode),
942 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
944 * Tell him more on demand.
947 printf("%s: %s IRQ line driver%s\n",
949 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
950 np->ram_ba ? ", using on-chip SRAM" : "");
951 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
952 if (np->features & FE_NOPM)
953 printf("%s: handling phase mismatch from SCRIPTS.\n",
959 if (sym_verbose >= 2) {
960 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
961 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
962 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
963 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
965 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
966 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
967 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
968 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
975 * Test the pci bus snoop logic :-(
977 * Has to be called with interrupts disabled.
979 #ifdef CONFIG_SCSI_SYM53C8XX_MMIO
980 static int sym_regtest(struct sym_hcb *np)
982 register volatile u32 data;
984 * chip registers may NOT be cached.
985 * write 0xffffffff to a read only register area,
986 * and try to read it back.
989 OUTL(np, nc_dstat, data);
990 data = INL(np, nc_dstat);
992 if (data == 0xffffffff) {
994 if ((data & 0xe2f0fffd) != 0x02000080) {
996 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
1003 static inline int sym_regtest(struct sym_hcb *np)
1009 static int sym_snooptest(struct sym_hcb *np)
1011 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
1014 err = sym_regtest(np);
1019 * Enable Master Parity Checking as we intend
1020 * to enable it for normal operations.
1022 OUTB(np, nc_ctest4, (np->rv_ctest4 & MPEE));
1026 pc = SCRIPTZ_BA(np, snooptest);
1030 * Set memory and register.
1032 np->scratch = cpu_to_scr(host_wr);
1033 OUTL(np, nc_temp, sym_wr);
1035 * Start script (exchange values)
1037 OUTL(np, nc_dsa, np->hcb_ba);
1040 * Wait 'til done (with timeout)
1042 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
1043 if (INB(np, nc_istat) & (INTF|SIP|DIP))
1045 if (i>=SYM_SNOOP_TIMEOUT) {
1046 printf ("CACHE TEST FAILED: timeout.\n");
1050 * Check for fatal DMA errors.
1052 dstat = INB(np, nc_dstat);
1053 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
1054 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
1055 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
1056 "DISABLING MASTER DATA PARITY CHECKING.\n",
1058 np->rv_ctest4 &= ~MPEE;
1062 if (dstat & (MDPE|BF|IID)) {
1063 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
1067 * Save termination position.
1069 pc = INL(np, nc_dsp);
1071 * Read memory and register.
1073 host_rd = scr_to_cpu(np->scratch);
1074 sym_rd = INL(np, nc_scratcha);
1075 sym_bk = INL(np, nc_temp);
1077 * Check termination position.
1079 if (pc != SCRIPTZ_BA(np, snoopend)+8) {
1080 printf ("CACHE TEST FAILED: script execution failed.\n");
1081 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
1082 (u_long) SCRIPTZ_BA(np, snooptest), (u_long) pc,
1083 (u_long) SCRIPTZ_BA(np, snoopend) +8);
1089 if (host_wr != sym_rd) {
1090 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
1091 (int) host_wr, (int) sym_rd);
1094 if (host_rd != sym_wr) {
1095 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
1096 (int) sym_wr, (int) host_rd);
1099 if (sym_bk != sym_wr) {
1100 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
1101 (int) sym_wr, (int) sym_bk);
1109 * log message for real hard errors
1111 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sx/s3/s4) @ name (dsp:dbc).
1112 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
1114 * exception register:
1119 * so: control lines as driven by chip.
1120 * si: control lines as seen by chip.
1121 * sd: scsi data lines as seen by chip.
1124 * sx: sxfer (see the manual)
1125 * s3: scntl3 (see the manual)
1126 * s4: scntl4 (see the manual)
1128 * current script command:
1129 * dsp: script address (relative to start of script).
1130 * dbc: first word of script command.
1132 * First 24 register of the chip:
1135 static void sym_log_hard_error(struct sym_hcb *np, u_short sist, u_char dstat)
1141 u_char *script_base;
1144 dsp = INL(np, nc_dsp);
1146 if (dsp > np->scripta_ba &&
1147 dsp <= np->scripta_ba + np->scripta_sz) {
1148 script_ofs = dsp - np->scripta_ba;
1149 script_size = np->scripta_sz;
1150 script_base = (u_char *) np->scripta0;
1151 script_name = "scripta";
1153 else if (np->scriptb_ba < dsp &&
1154 dsp <= np->scriptb_ba + np->scriptb_sz) {
1155 script_ofs = dsp - np->scriptb_ba;
1156 script_size = np->scriptb_sz;
1157 script_base = (u_char *) np->scriptb0;
1158 script_name = "scriptb";
1163 script_name = "mem";
1166 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x/%x) @ (%s %x:%08x).\n",
1167 sym_name(np), (unsigned)INB(np, nc_sdid)&0x0f, dstat, sist,
1168 (unsigned)INB(np, nc_socl), (unsigned)INB(np, nc_sbcl),
1169 (unsigned)INB(np, nc_sbdl), (unsigned)INB(np, nc_sxfer),
1170 (unsigned)INB(np, nc_scntl3),
1171 (np->features & FE_C10) ? (unsigned)INB(np, nc_scntl4) : 0,
1172 script_name, script_ofs, (unsigned)INL(np, nc_dbc));
1174 if (((script_ofs & 3) == 0) &&
1175 (unsigned)script_ofs < script_size) {
1176 printf ("%s: script cmd = %08x\n", sym_name(np),
1177 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
1180 printf ("%s: regdump:", sym_name(np));
1182 printf (" %02x", (unsigned)INB_OFF(np, i));
1188 if (dstat & (MDPE|BF))
1189 sym_log_bus_error(np);
1192 static struct sym_chip sym_dev_table[] = {
1193 {PCI_DEVICE_ID_NCR_53C810, 0x0f, "810", 4, 8, 4, 64,
1196 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1197 {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
1201 {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
1202 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
1205 {PCI_DEVICE_ID_NCR_53C815, 0xff, "815", 4, 8, 4, 64,
1208 {PCI_DEVICE_ID_NCR_53C825, 0x0f, "825", 6, 8, 4, 64,
1209 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
1211 {PCI_DEVICE_ID_NCR_53C825, 0xff, "825a", 6, 8, 4, 2,
1212 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
1214 {PCI_DEVICE_ID_NCR_53C860, 0xff, "860", 4, 8, 5, 1,
1215 FE_ULTRA|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
1217 {PCI_DEVICE_ID_NCR_53C875, 0x01, "875", 6, 16, 5, 2,
1218 FE_WIDE|FE_ULTRA|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1219 FE_RAM|FE_DIFF|FE_VARCLK}
1221 {PCI_DEVICE_ID_NCR_53C875, 0xff, "875", 6, 16, 5, 2,
1222 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1223 FE_RAM|FE_DIFF|FE_VARCLK}
1225 {PCI_DEVICE_ID_NCR_53C875J, 0xff, "875J", 6, 16, 5, 2,
1226 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1227 FE_RAM|FE_DIFF|FE_VARCLK}
1229 {PCI_DEVICE_ID_NCR_53C885, 0xff, "885", 6, 16, 5, 2,
1230 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1231 FE_RAM|FE_DIFF|FE_VARCLK}
1233 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1234 {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
1235 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
1239 {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
1240 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1244 {PCI_DEVICE_ID_NCR_53C896, 0xff, "896", 6, 31, 7, 4,
1245 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1246 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1248 {PCI_DEVICE_ID_LSI_53C895A, 0xff, "895a", 6, 31, 7, 4,
1249 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1250 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1252 {PCI_DEVICE_ID_LSI_53C875A, 0xff, "875a", 6, 31, 7, 4,
1253 FE_WIDE|FE_ULTRA|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1254 FE_RAM|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1256 {PCI_DEVICE_ID_LSI_53C1010_33, 0x00, "1010-33", 6, 31, 7, 8,
1257 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1258 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
1261 {PCI_DEVICE_ID_LSI_53C1010_33, 0xff, "1010-33", 6, 31, 7, 8,
1262 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1263 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
1266 {PCI_DEVICE_ID_LSI_53C1010_66, 0xff, "1010-66", 6, 31, 7, 8,
1267 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1268 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
1271 {PCI_DEVICE_ID_LSI_53C1510, 0xff, "1510d", 6, 31, 7, 4,
1272 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1273 FE_RAM|FE_IO256|FE_LEDC}
1276 #define sym_num_devs \
1277 (sizeof(sym_dev_table) / sizeof(sym_dev_table[0]))
1280 * Look up the chip table.
1282 * Return a pointer to the chip entry if found,
1286 sym_lookup_chip_table (u_short device_id, u_char revision)
1288 struct sym_chip *chip;
1291 for (i = 0; i < sym_num_devs; i++) {
1292 chip = &sym_dev_table[i];
1293 if (device_id != chip->device_id)
1295 if (revision > chip->revision_id)
1303 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1305 * Lookup the 64 bit DMA segments map.
1306 * This is only used if the direct mapping
1307 * has been unsuccessful.
1309 int sym_lookup_dmap(struct sym_hcb *np, u32 h, int s)
1316 /* Look up existing mappings */
1317 for (i = SYM_DMAP_SIZE-1; i > 0; i--) {
1318 if (h == np->dmap_bah[i])
1321 /* If direct mapping is free, get it */
1322 if (!np->dmap_bah[s])
1324 /* Collision -> lookup free mappings */
1325 for (s = SYM_DMAP_SIZE-1; s > 0; s--) {
1326 if (!np->dmap_bah[s])
1330 panic("sym: ran out of 64 bit DMA segment registers");
1333 np->dmap_bah[s] = h;
1339 * Update IO registers scratch C..R so they will be
1340 * in sync. with queued CCB expectations.
1342 static void sym_update_dmap_regs(struct sym_hcb *np)
1346 if (!np->dmap_dirty)
1348 o = offsetof(struct sym_reg, nc_scrx[0]);
1349 for (i = 0; i < SYM_DMAP_SIZE; i++) {
1350 OUTL_OFF(np, o, np->dmap_bah[i]);
1357 /* Enforce all the fiddly SPI rules and the chip limitations */
1358 static void sym_check_goals(struct sym_hcb *np, struct scsi_target *starget,
1359 struct sym_trans *goal)
1361 if (!spi_support_wide(starget))
1364 if (!spi_support_sync(starget)) {
1372 if (spi_support_dt(starget)) {
1373 if (spi_support_dt_only(starget))
1376 if (goal->offset == 0)
1382 /* Some targets fail to properly negotiate DT in SE mode */
1383 if ((np->scsi_mode != SMODE_LVD) || !(np->features & FE_U3EN))
1387 /* all DT transfers must be wide */
1389 if (goal->offset > np->maxoffs_dt)
1390 goal->offset = np->maxoffs_dt;
1391 if (goal->period < np->minsync_dt)
1392 goal->period = np->minsync_dt;
1393 if (goal->period > np->maxsync_dt)
1394 goal->period = np->maxsync_dt;
1396 goal->iu = goal->qas = 0;
1397 if (goal->offset > np->maxoffs)
1398 goal->offset = np->maxoffs;
1399 if (goal->period < np->minsync)
1400 goal->period = np->minsync;
1401 if (goal->period > np->maxsync)
1402 goal->period = np->maxsync;
1407 * Prepare the next negotiation message if needed.
1409 * Fill in the part of message buffer that contains the
1410 * negotiation and the nego_status field of the CCB.
1411 * Returns the size of the message in bytes.
1413 static int sym_prepare_nego(struct sym_hcb *np, struct sym_ccb *cp, u_char *msgptr)
1415 struct sym_tcb *tp = &np->target[cp->target];
1416 struct scsi_target *starget = tp->starget;
1417 struct sym_trans *goal = &tp->tgoal;
1421 sym_check_goals(np, starget, goal);
1424 * Many devices implement PPR in a buggy way, so only use it if we
1428 (goal->iu || goal->dt || goal->qas || (goal->period < 0xa))) {
1430 } else if (spi_width(starget) != goal->width) {
1432 } else if (spi_period(starget) != goal->period ||
1433 spi_offset(starget) != goal->offset) {
1436 goal->check_nego = 0;
1442 msglen += spi_populate_sync_msg(msgptr + msglen, goal->period,
1446 msglen += spi_populate_width_msg(msgptr + msglen, goal->width);
1449 msglen += spi_populate_ppr_msg(msgptr + msglen, goal->period,
1450 goal->offset, goal->width,
1451 (goal->iu ? PPR_OPT_IU : 0) |
1452 (goal->dt ? PPR_OPT_DT : 0) |
1453 (goal->qas ? PPR_OPT_QAS : 0));
1457 cp->nego_status = nego;
1460 tp->nego_cp = cp; /* Keep track a nego will be performed */
1461 if (DEBUG_FLAGS & DEBUG_NEGO) {
1462 sym_print_nego_msg(np, cp->target,
1463 nego == NS_SYNC ? "sync msgout" :
1464 nego == NS_WIDE ? "wide msgout" :
1465 "ppr msgout", msgptr);
1473 * Insert a job into the start queue.
1475 void sym_put_start_queue(struct sym_hcb *np, struct sym_ccb *cp)
1479 #ifdef SYM_CONF_IARB_SUPPORT
1481 * If the previously queued CCB is not yet done,
1482 * set the IARB hint. The SCRIPTS will go with IARB
1483 * for this job when starting the previous one.
1484 * We leave devices a chance to win arbitration by
1485 * not using more than 'iarb_max' consecutive
1486 * immediate arbitrations.
1488 if (np->last_cp && np->iarb_count < np->iarb_max) {
1489 np->last_cp->host_flags |= HF_HINT_IARB;
1497 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1499 * Make SCRIPTS aware of the 64 bit DMA
1500 * segment registers not being up-to-date.
1503 cp->host_xflags |= HX_DMAP_DIRTY;
1507 * Insert first the idle task and then our job.
1508 * The MBs should ensure proper ordering.
1510 qidx = np->squeueput + 2;
1511 if (qidx >= MAX_QUEUE*2) qidx = 0;
1513 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
1514 MEMORY_WRITE_BARRIER();
1515 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
1517 np->squeueput = qidx;
1519 if (DEBUG_FLAGS & DEBUG_QUEUE)
1520 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
1523 * Script processor may be waiting for reselect.
1526 MEMORY_WRITE_BARRIER();
1527 OUTB(np, nc_istat, SIGP|np->istat_sem);
1530 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1532 * Start next ready-to-start CCBs.
1534 void sym_start_next_ccbs(struct sym_hcb *np, struct sym_lcb *lp, int maxn)
1540 * Paranoia, as usual. :-)
1542 assert(!lp->started_tags || !lp->started_no_tag);
1545 * Try to start as many commands as asked by caller.
1546 * Prevent from having both tagged and untagged
1547 * commands queued to the device at the same time.
1550 qp = sym_remque_head(&lp->waiting_ccbq);
1553 cp = sym_que_entry(qp, struct sym_ccb, link2_ccbq);
1554 if (cp->tag != NO_TAG) {
1555 if (lp->started_no_tag ||
1556 lp->started_tags >= lp->started_max) {
1557 sym_insque_head(qp, &lp->waiting_ccbq);
1560 lp->itlq_tbl[cp->tag] = cpu_to_scr(cp->ccb_ba);
1562 cpu_to_scr(SCRIPTA_BA(np, resel_tag));
1565 if (lp->started_no_tag || lp->started_tags) {
1566 sym_insque_head(qp, &lp->waiting_ccbq);
1569 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
1571 cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
1572 ++lp->started_no_tag;
1575 sym_insque_tail(qp, &lp->started_ccbq);
1576 sym_put_start_queue(np, cp);
1579 #endif /* SYM_OPT_HANDLE_DEVICE_QUEUEING */
1582 * The chip may have completed jobs. Look at the DONE QUEUE.
1584 * On paper, memory read barriers may be needed here to
1585 * prevent out of order LOADs by the CPU from having
1586 * prefetched stale data prior to DMA having occurred.
1588 static int sym_wakeup_done (struct sym_hcb *np)
1597 /* MEMORY_READ_BARRIER(); */
1599 dsa = scr_to_cpu(np->dqueue[i]);
1603 if ((i = i+2) >= MAX_QUEUE*2)
1606 cp = sym_ccb_from_dsa(np, dsa);
1608 MEMORY_READ_BARRIER();
1609 sym_complete_ok (np, cp);
1613 printf ("%s: bad DSA (%x) in done queue.\n",
1614 sym_name(np), (u_int) dsa);
1622 * Complete all CCBs queued to the COMP queue.
1624 * These CCBs are assumed:
1625 * - Not to be referenced either by devices or
1626 * SCRIPTS-related queues and datas.
1627 * - To have to be completed with an error condition
1630 * The device queue freeze count is incremented
1631 * for each CCB that does not prevent this.
1632 * This function is called when all CCBs involved
1633 * in error handling/recovery have been reaped.
1635 static void sym_flush_comp_queue(struct sym_hcb *np, int cam_status)
1640 while ((qp = sym_remque_head(&np->comp_ccbq)) != 0) {
1641 struct scsi_cmnd *cmd;
1642 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
1643 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
1644 /* Leave quiet CCBs waiting for resources */
1645 if (cp->host_status == HS_WAIT)
1649 sym_set_cam_status(cmd, cam_status);
1650 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1651 if (sym_get_cam_status(cmd) == DID_SOFT_ERROR) {
1652 struct sym_tcb *tp = &np->target[cp->target];
1653 struct sym_lcb *lp = sym_lp(tp, cp->lun);
1655 sym_remque(&cp->link2_ccbq);
1656 sym_insque_tail(&cp->link2_ccbq,
1659 if (cp->tag != NO_TAG)
1662 --lp->started_no_tag;
1669 sym_free_ccb(np, cp);
1670 sym_xpt_done(np, cmd);
1675 * Complete all active CCBs with error.
1676 * Used on CHIP/SCSI RESET.
1678 static void sym_flush_busy_queue (struct sym_hcb *np, int cam_status)
1681 * Move all active CCBs to the COMP queue
1682 * and flush this queue.
1684 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
1685 sym_que_init(&np->busy_ccbq);
1686 sym_flush_comp_queue(np, cam_status);
1693 * 0: initialisation.
1694 * 1: SCSI BUS RESET delivered or received.
1695 * 2: SCSI BUS MODE changed.
1697 void sym_start_up (struct sym_hcb *np, int reason)
1703 * Reset chip if asked, otherwise just clear fifos.
1708 OUTB(np, nc_stest3, TE|CSF);
1709 OUTONB(np, nc_ctest3, CLF);
1715 phys = np->squeue_ba;
1716 for (i = 0; i < MAX_QUEUE*2; i += 2) {
1717 np->squeue[i] = cpu_to_scr(np->idletask_ba);
1718 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
1720 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
1723 * Start at first entry.
1730 phys = np->dqueue_ba;
1731 for (i = 0; i < MAX_QUEUE*2; i += 2) {
1733 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
1735 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
1738 * Start at first entry.
1743 * Install patches in scripts.
1744 * This also let point to first position the start
1745 * and done queue pointers used from SCRIPTS.
1750 * Wakeup all pending jobs.
1752 sym_flush_busy_queue(np, DID_RESET);
1757 OUTB(np, nc_istat, 0x00); /* Remove Reset, abort */
1759 udelay(2000); /* The 895 needs time for the bus mode to settle */
1761 OUTB(np, nc_scntl0, np->rv_scntl0 | 0xc0);
1762 /* full arb., ena parity, par->ATN */
1763 OUTB(np, nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
1765 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
1767 OUTB(np, nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
1768 OUTW(np, nc_respid, 1ul<<np->myaddr); /* Id to respond to */
1769 OUTB(np, nc_istat , SIGP ); /* Signal Process */
1770 OUTB(np, nc_dmode , np->rv_dmode); /* Burst length, dma mode */
1771 OUTB(np, nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
1773 OUTB(np, nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
1774 OUTB(np, nc_ctest3, np->rv_ctest3); /* Write and invalidate */
1775 OUTB(np, nc_ctest4, np->rv_ctest4); /* Master parity checking */
1777 /* Extended Sreq/Sack filtering not supported on the C10 */
1778 if (np->features & FE_C10)
1779 OUTB(np, nc_stest2, np->rv_stest2);
1781 OUTB(np, nc_stest2, EXT|np->rv_stest2);
1783 OUTB(np, nc_stest3, TE); /* TolerANT enable */
1784 OUTB(np, nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
1787 * For now, disable AIP generation on C1010-66.
1789 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)
1790 OUTB(np, nc_aipcntl1, DISAIP);
1793 * C10101 rev. 0 errata.
1794 * Errant SGE's when in narrow. Write bits 4 & 5 of
1795 * STEST1 register to disable SGE. We probably should do
1796 * that from SCRIPTS for each selection/reselection, but
1797 * I just don't want. :)
1799 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_33 &&
1800 np->revision_id < 1)
1801 OUTB(np, nc_stest1, INB(np, nc_stest1) | 0x30);
1804 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
1805 * Disable overlapped arbitration for some dual function devices,
1806 * regardless revision id (kind of post-chip-design feature. ;-))
1808 if (np->device_id == PCI_DEVICE_ID_NCR_53C875)
1809 OUTB(np, nc_ctest0, (1<<5));
1810 else if (np->device_id == PCI_DEVICE_ID_NCR_53C896)
1811 np->rv_ccntl0 |= DPR;
1814 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
1815 * and/or hardware phase mismatch, since only such chips
1816 * seem to support those IO registers.
1818 if (np->features & (FE_DAC|FE_NOPM)) {
1819 OUTB(np, nc_ccntl0, np->rv_ccntl0);
1820 OUTB(np, nc_ccntl1, np->rv_ccntl1);
1823 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1825 * Set up scratch C and DRS IO registers to map the 32 bit
1826 * DMA address range our data structures are located in.
1829 np->dmap_bah[0] = 0; /* ??? */
1830 OUTL(np, nc_scrx[0], np->dmap_bah[0]);
1831 OUTL(np, nc_drs, np->dmap_bah[0]);
1836 * If phase mismatch handled by scripts (895A/896/1010),
1837 * set PM jump addresses.
1839 if (np->features & FE_NOPM) {
1840 OUTL(np, nc_pmjad1, SCRIPTB_BA(np, pm_handle));
1841 OUTL(np, nc_pmjad2, SCRIPTB_BA(np, pm_handle));
1845 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
1846 * Also set GPIO5 and clear GPIO6 if hardware LED control.
1848 if (np->features & FE_LED0)
1849 OUTB(np, nc_gpcntl, INB(np, nc_gpcntl) & ~0x01);
1850 else if (np->features & FE_LEDC)
1851 OUTB(np, nc_gpcntl, (INB(np, nc_gpcntl) & ~0x41) | 0x20);
1856 OUTW(np, nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
1857 OUTB(np, nc_dien , MDPE|BF|SSI|SIR|IID);
1860 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
1861 * Try to eat the spurious SBMC interrupt that may occur when
1862 * we reset the chip but not the SCSI BUS (at initialization).
1864 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
1865 OUTONW(np, nc_sien, SBMC);
1871 np->scsi_mode = INB(np, nc_stest4) & SMODE;
1875 * Fill in target structure.
1876 * Reinitialize usrsync.
1877 * Reinitialize usrwide.
1878 * Prepare sync negotiation according to actual SCSI bus mode.
1880 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
1881 struct sym_tcb *tp = &np->target[i];
1885 tp->head.wval = np->rv_scntl3;
1890 * Download SCSI SCRIPTS to on-chip RAM if present,
1891 * and start script processor.
1892 * We do the download preferently from the CPU.
1893 * For platforms that may not support PCI memory mapping,
1894 * we use simple SCRIPTS that performs MEMORY MOVEs.
1896 phys = SCRIPTA_BA(np, init);
1898 if (sym_verbose >= 2)
1899 printf("%s: Downloading SCSI SCRIPTS.\n", sym_name(np));
1900 memcpy_toio(np->s.ramaddr, np->scripta0, np->scripta_sz);
1901 if (np->ram_ws == 8192) {
1902 memcpy_toio(np->s.ramaddr + 4096, np->scriptb0, np->scriptb_sz);
1903 phys = scr_to_cpu(np->scr_ram_seg);
1904 OUTL(np, nc_mmws, phys);
1905 OUTL(np, nc_mmrs, phys);
1906 OUTL(np, nc_sfs, phys);
1907 phys = SCRIPTB_BA(np, start64);
1913 OUTL(np, nc_dsa, np->hcb_ba);
1917 * Notify the XPT about the RESET condition.
1920 sym_xpt_async_bus_reset(np);
1924 * Switch trans mode for current job and its target.
1926 static void sym_settrans(struct sym_hcb *np, int target, u_char opts, u_char ofs,
1927 u_char per, u_char wide, u_char div, u_char fak)
1930 u_char sval, wval, uval;
1931 struct sym_tcb *tp = &np->target[target];
1933 assert(target == (INB(np, nc_sdid) & 0x0f));
1935 sval = tp->head.sval;
1936 wval = tp->head.wval;
1937 uval = tp->head.uval;
1940 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
1941 sval, wval, uval, np->rv_scntl3);
1946 if (!(np->features & FE_C10))
1947 sval = (sval & ~0x1f) | ofs;
1949 sval = (sval & ~0x3f) | ofs;
1952 * Set the sync divisor and extra clock factor.
1955 wval = (wval & ~0x70) | ((div+1) << 4);
1956 if (!(np->features & FE_C10))
1957 sval = (sval & ~0xe0) | (fak << 5);
1959 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
1960 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
1961 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
1966 * Set the bus width.
1973 * Set misc. ultra enable bits.
1975 if (np->features & FE_C10) {
1976 uval = uval & ~(U3EN|AIPCKEN);
1978 assert(np->features & FE_U3EN);
1982 wval = wval & ~ULTRA;
1983 if (per <= 12) wval |= ULTRA;
1987 * Stop there if sync parameters are unchanged.
1989 if (tp->head.sval == sval &&
1990 tp->head.wval == wval &&
1991 tp->head.uval == uval)
1993 tp->head.sval = sval;
1994 tp->head.wval = wval;
1995 tp->head.uval = uval;
1998 * Disable extended Sreq/Sack filtering if per < 50.
1999 * Not supported on the C1010.
2001 if (per < 50 && !(np->features & FE_C10))
2002 OUTOFFB(np, nc_stest2, EXT);
2005 * set actual value and sync_status
2007 OUTB(np, nc_sxfer, tp->head.sval);
2008 OUTB(np, nc_scntl3, tp->head.wval);
2010 if (np->features & FE_C10) {
2011 OUTB(np, nc_scntl4, tp->head.uval);
2015 * patch ALL busy ccbs of this target.
2017 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
2019 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
2020 if (cp->target != target)
2022 cp->phys.select.sel_scntl3 = tp->head.wval;
2023 cp->phys.select.sel_sxfer = tp->head.sval;
2024 if (np->features & FE_C10) {
2025 cp->phys.select.sel_scntl4 = tp->head.uval;
2031 * We received a WDTR.
2032 * Let everything be aware of the changes.
2034 static void sym_setwide(struct sym_hcb *np, int target, u_char wide)
2036 struct sym_tcb *tp = &np->target[target];
2037 struct scsi_target *starget = tp->starget;
2039 if (spi_width(starget) == wide)
2042 sym_settrans(np, target, 0, 0, 0, wide, 0, 0);
2044 tp->tgoal.width = wide;
2045 spi_offset(starget) = 0;
2046 spi_period(starget) = 0;
2047 spi_width(starget) = wide;
2048 spi_iu(starget) = 0;
2049 spi_dt(starget) = 0;
2050 spi_qas(starget) = 0;
2052 if (sym_verbose >= 3)
2053 spi_display_xfer_agreement(starget);
2057 * We received a SDTR.
2058 * Let everything be aware of the changes.
2061 sym_setsync(struct sym_hcb *np, int target,
2062 u_char ofs, u_char per, u_char div, u_char fak)
2064 struct sym_tcb *tp = &np->target[target];
2065 struct scsi_target *starget = tp->starget;
2066 u_char wide = (tp->head.wval & EWS) ? BUS_16_BIT : BUS_8_BIT;
2068 sym_settrans(np, target, 0, ofs, per, wide, div, fak);
2070 spi_period(starget) = per;
2071 spi_offset(starget) = ofs;
2072 spi_iu(starget) = spi_dt(starget) = spi_qas(starget) = 0;
2074 if (!tp->tgoal.dt && !tp->tgoal.iu && !tp->tgoal.qas) {
2075 tp->tgoal.period = per;
2076 tp->tgoal.offset = ofs;
2077 tp->tgoal.check_nego = 0;
2080 spi_display_xfer_agreement(starget);
2084 * We received a PPR.
2085 * Let everything be aware of the changes.
2088 sym_setpprot(struct sym_hcb *np, int target, u_char opts, u_char ofs,
2089 u_char per, u_char wide, u_char div, u_char fak)
2091 struct sym_tcb *tp = &np->target[target];
2092 struct scsi_target *starget = tp->starget;
2094 sym_settrans(np, target, opts, ofs, per, wide, div, fak);
2096 spi_width(starget) = tp->tgoal.width = wide;
2097 spi_period(starget) = tp->tgoal.period = per;
2098 spi_offset(starget) = tp->tgoal.offset = ofs;
2099 spi_iu(starget) = tp->tgoal.iu = !!(opts & PPR_OPT_IU);
2100 spi_dt(starget) = tp->tgoal.dt = !!(opts & PPR_OPT_DT);
2101 spi_qas(starget) = tp->tgoal.qas = !!(opts & PPR_OPT_QAS);
2102 tp->tgoal.check_nego = 0;
2104 spi_display_xfer_agreement(starget);
2108 * generic recovery from scsi interrupt
2110 * The doc says that when the chip gets an SCSI interrupt,
2111 * it tries to stop in an orderly fashion, by completing
2112 * an instruction fetch that had started or by flushing
2113 * the DMA fifo for a write to memory that was executing.
2114 * Such a fashion is not enough to know if the instruction
2115 * that was just before the current DSP value has been
2118 * There are some small SCRIPTS sections that deal with
2119 * the start queue and the done queue that may break any
2120 * assomption from the C code if we are interrupted
2121 * inside, so we reset if this happens. Btw, since these
2122 * SCRIPTS sections are executed while the SCRIPTS hasn't
2123 * started SCSI operations, it is very unlikely to happen.
2125 * All the driver data structures are supposed to be
2126 * allocated from the same 4 GB memory window, so there
2127 * is a 1 to 1 relationship between DSA and driver data
2128 * structures. Since we are careful :) to invalidate the
2129 * DSA when we complete a command or when the SCRIPTS
2130 * pushes a DSA into a queue, we can trust it when it
2133 static void sym_recover_scsi_int (struct sym_hcb *np, u_char hsts)
2135 u32 dsp = INL(np, nc_dsp);
2136 u32 dsa = INL(np, nc_dsa);
2137 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
2140 * If we haven't been interrupted inside the SCRIPTS
2141 * critical pathes, we can safely restart the SCRIPTS
2142 * and trust the DSA value if it matches a CCB.
2144 if ((!(dsp > SCRIPTA_BA(np, getjob_begin) &&
2145 dsp < SCRIPTA_BA(np, getjob_end) + 1)) &&
2146 (!(dsp > SCRIPTA_BA(np, ungetjob) &&
2147 dsp < SCRIPTA_BA(np, reselect) + 1)) &&
2148 (!(dsp > SCRIPTB_BA(np, sel_for_abort) &&
2149 dsp < SCRIPTB_BA(np, sel_for_abort_1) + 1)) &&
2150 (!(dsp > SCRIPTA_BA(np, done) &&
2151 dsp < SCRIPTA_BA(np, done_end) + 1))) {
2152 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
2153 OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
2155 * If we have a CCB, let the SCRIPTS call us back for
2156 * the handling of the error with SCRATCHA filled with
2157 * STARTPOS. This way, we will be able to freeze the
2158 * device queue and requeue awaiting IOs.
2161 cp->host_status = hsts;
2162 OUTL_DSP(np, SCRIPTA_BA(np, complete_error));
2165 * Otherwise just restart the SCRIPTS.
2168 OUTL(np, nc_dsa, 0xffffff);
2169 OUTL_DSP(np, SCRIPTA_BA(np, start));
2178 sym_start_reset(np);
2182 * chip exception handler for selection timeout
2184 static void sym_int_sto (struct sym_hcb *np)
2186 u32 dsp = INL(np, nc_dsp);
2188 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
2190 if (dsp == SCRIPTA_BA(np, wf_sel_done) + 8)
2191 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
2193 sym_start_reset(np);
2197 * chip exception handler for unexpected disconnect
2199 static void sym_int_udc (struct sym_hcb *np)
2201 printf ("%s: unexpected disconnect\n", sym_name(np));
2202 sym_recover_scsi_int(np, HS_UNEXPECTED);
2206 * chip exception handler for SCSI bus mode change
2208 * spi2-r12 11.2.3 says a transceiver mode change must
2209 * generate a reset event and a device that detects a reset
2210 * event shall initiate a hard reset. It says also that a
2211 * device that detects a mode change shall set data transfer
2212 * mode to eight bit asynchronous, etc...
2213 * So, just reinitializing all except chip should be enough.
2215 static void sym_int_sbmc (struct sym_hcb *np)
2217 u_char scsi_mode = INB(np, nc_stest4) & SMODE;
2222 printf("%s: SCSI BUS mode change from %s to %s.\n", sym_name(np),
2223 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
2226 * Should suspend command processing for a few seconds and
2227 * reinitialize all except the chip.
2229 sym_start_up (np, 2);
2233 * chip exception handler for SCSI parity error.
2235 * When the chip detects a SCSI parity error and is
2236 * currently executing a (CH)MOV instruction, it does
2237 * not interrupt immediately, but tries to finish the
2238 * transfer of the current scatter entry before
2239 * interrupting. The following situations may occur:
2241 * - The complete scatter entry has been transferred
2242 * without the device having changed phase.
2243 * The chip will then interrupt with the DSP pointing
2244 * to the instruction that follows the MOV.
2246 * - A phase mismatch occurs before the MOV finished
2247 * and phase errors are to be handled by the C code.
2248 * The chip will then interrupt with both PAR and MA
2251 * - A phase mismatch occurs before the MOV finished and
2252 * phase errors are to be handled by SCRIPTS.
2253 * The chip will load the DSP with the phase mismatch
2254 * JUMP address and interrupt the host processor.
2256 static void sym_int_par (struct sym_hcb *np, u_short sist)
2258 u_char hsts = INB(np, HS_PRT);
2259 u32 dsp = INL(np, nc_dsp);
2260 u32 dbc = INL(np, nc_dbc);
2261 u32 dsa = INL(np, nc_dsa);
2262 u_char sbcl = INB(np, nc_sbcl);
2263 u_char cmd = dbc >> 24;
2264 int phase = cmd & 7;
2265 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
2267 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
2268 sym_name(np), hsts, dbc, sbcl);
2271 * Check that the chip is connected to the SCSI BUS.
2273 if (!(INB(np, nc_scntl1) & ISCON)) {
2274 sym_recover_scsi_int(np, HS_UNEXPECTED);
2279 * If the nexus is not clearly identified, reset the bus.
2280 * We will try to do better later.
2286 * Check instruction was a MOV, direction was INPUT and
2289 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
2293 * Keep track of the parity error.
2295 OUTONB(np, HF_PRT, HF_EXT_ERR);
2296 cp->xerr_status |= XE_PARITY_ERR;
2299 * Prepare the message to send to the device.
2301 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
2304 * If the old phase was DATA IN phase, we have to deal with
2305 * the 3 situations described above.
2306 * For other input phases (MSG IN and STATUS), the device
2307 * must resend the whole thing that failed parity checking
2308 * or signal error. So, jumping to dispatcher should be OK.
2310 if (phase == 1 || phase == 5) {
2311 /* Phase mismatch handled by SCRIPTS */
2312 if (dsp == SCRIPTB_BA(np, pm_handle))
2314 /* Phase mismatch handled by the C code */
2317 /* No phase mismatch occurred */
2319 sym_set_script_dp (np, cp, dsp);
2320 OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
2323 else if (phase == 7) /* We definitely cannot handle parity errors */
2324 #if 1 /* in message-in phase due to the relection */
2325 goto reset_all; /* path and various message anticipations. */
2327 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
2330 OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
2334 sym_start_reset(np);
2339 * chip exception handler for phase errors.
2341 * We have to construct a new transfer descriptor,
2342 * to transfer the rest of the current block.
2344 static void sym_int_ma (struct sym_hcb *np)
2357 u_char hflags, hflags0;
2361 dsp = INL(np, nc_dsp);
2362 dbc = INL(np, nc_dbc);
2363 dsa = INL(np, nc_dsa);
2366 rest = dbc & 0xffffff;
2370 * locate matching cp if any.
2372 cp = sym_ccb_from_dsa(np, dsa);
2375 * Donnot take into account dma fifo and various buffers in
2376 * INPUT phase since the chip flushes everything before
2377 * raising the MA interrupt for interrupted INPUT phases.
2378 * For DATA IN phase, we will check for the SWIDE later.
2380 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
2383 if (np->features & FE_DFBC)
2384 delta = INW(np, nc_dfbc);
2389 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
2391 dfifo = INL(np, nc_dfifo);
2394 * Calculate remaining bytes in DMA fifo.
2395 * (CTEST5 = dfifo >> 16)
2397 if (dfifo & (DFS << 16))
2398 delta = ((((dfifo >> 8) & 0x300) |
2399 (dfifo & 0xff)) - rest) & 0x3ff;
2401 delta = ((dfifo & 0xff) - rest) & 0x7f;
2405 * The data in the dma fifo has not been transfered to
2406 * the target -> add the amount to the rest
2407 * and clear the data.
2408 * Check the sstat2 register in case of wide transfer.
2411 ss0 = INB(np, nc_sstat0);
2412 if (ss0 & OLF) rest++;
2413 if (!(np->features & FE_C10))
2414 if (ss0 & ORF) rest++;
2415 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
2416 ss2 = INB(np, nc_sstat2);
2417 if (ss2 & OLF1) rest++;
2418 if (!(np->features & FE_C10))
2419 if (ss2 & ORF1) rest++;
2425 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
2426 OUTB(np, nc_stest3, TE|CSF); /* scsi fifo */
2430 * log the information
2432 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
2433 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(np, nc_sbcl)&7,
2434 (unsigned) rest, (unsigned) delta);
2437 * try to find the interrupted script command,
2438 * and the address at which to continue.
2442 if (dsp > np->scripta_ba &&
2443 dsp <= np->scripta_ba + np->scripta_sz) {
2444 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
2447 else if (dsp > np->scriptb_ba &&
2448 dsp <= np->scriptb_ba + np->scriptb_sz) {
2449 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
2454 * log the information
2456 if (DEBUG_FLAGS & DEBUG_PHASE) {
2457 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
2458 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
2462 printf ("%s: interrupted SCRIPT address not found.\n",
2468 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
2474 * get old startaddress and old length.
2476 oadr = scr_to_cpu(vdsp[1]);
2478 if (cmd & 0x10) { /* Table indirect */
2479 tblp = (u32 *) ((char*) &cp->phys + oadr);
2480 olen = scr_to_cpu(tblp[0]);
2481 oadr = scr_to_cpu(tblp[1]);
2484 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
2487 if (DEBUG_FLAGS & DEBUG_PHASE) {
2488 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
2489 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
2496 * check cmd against assumed interrupted script command.
2497 * If dt data phase, the MOVE instruction hasn't bit 4 of
2500 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
2501 sym_print_addr(cp->cmd,
2502 "internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
2503 cmd, scr_to_cpu(vdsp[0]) >> 24);
2509 * if old phase not dataphase, leave here.
2512 sym_print_addr(cp->cmd,
2513 "phase change %x-%x %d@%08x resid=%d.\n",
2514 cmd&7, INB(np, nc_sbcl)&7, (unsigned)olen,
2515 (unsigned)oadr, (unsigned)rest);
2516 goto unexpected_phase;
2520 * Choose the correct PM save area.
2522 * Look at the PM_SAVE SCRIPT if you want to understand
2523 * this stuff. The equivalent code is implemented in
2524 * SCRIPTS for the 895A, 896 and 1010 that are able to
2525 * handle PM from the SCRIPTS processor.
2527 hflags0 = INB(np, HF_PRT);
2530 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
2531 if (hflags & HF_IN_PM0)
2532 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
2533 else if (hflags & HF_IN_PM1)
2534 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
2536 if (hflags & HF_DP_SAVED)
2537 hflags ^= HF_ACT_PM;
2540 if (!(hflags & HF_ACT_PM)) {
2542 newcmd = SCRIPTA_BA(np, pm0_data);
2546 newcmd = SCRIPTA_BA(np, pm1_data);
2549 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
2550 if (hflags != hflags0)
2551 OUTB(np, HF_PRT, hflags);
2554 * fillin the phase mismatch context
2556 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
2557 pm->sg.size = cpu_to_scr(rest);
2558 pm->ret = cpu_to_scr(nxtdsp);
2561 * If we have a SWIDE,
2562 * - prepare the address to write the SWIDE from SCRIPTS,
2563 * - compute the SCRIPTS address to restart from,
2564 * - move current data pointer context by one byte.
2566 nxtdsp = SCRIPTA_BA(np, dispatch);
2567 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
2568 (INB(np, nc_scntl2) & WSR)) {
2572 * Set up the table indirect for the MOVE
2573 * of the residual byte and adjust the data
2576 tmp = scr_to_cpu(pm->sg.addr);
2577 cp->phys.wresid.addr = cpu_to_scr(tmp);
2578 pm->sg.addr = cpu_to_scr(tmp + 1);
2579 tmp = scr_to_cpu(pm->sg.size);
2580 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
2581 pm->sg.size = cpu_to_scr(tmp - 1);
2584 * If only the residual byte is to be moved,
2585 * no PM context is needed.
2587 if ((tmp&0xffffff) == 1)
2591 * Prepare the address of SCRIPTS that will
2592 * move the residual byte to memory.
2594 nxtdsp = SCRIPTB_BA(np, wsr_ma_helper);
2597 if (DEBUG_FLAGS & DEBUG_PHASE) {
2598 sym_print_addr(cp->cmd, "PM %x %x %x / %x %x %x.\n",
2599 hflags0, hflags, newcmd,
2600 (unsigned)scr_to_cpu(pm->sg.addr),
2601 (unsigned)scr_to_cpu(pm->sg.size),
2602 (unsigned)scr_to_cpu(pm->ret));
2606 * Restart the SCRIPTS processor.
2608 sym_set_script_dp (np, cp, newcmd);
2609 OUTL_DSP(np, nxtdsp);
2613 * Unexpected phase changes that occurs when the current phase
2614 * is not a DATA IN or DATA OUT phase are due to error conditions.
2615 * Such event may only happen when the SCRIPTS is using a
2616 * multibyte SCSI MOVE.
2618 * Phase change Some possible cause
2620 * COMMAND --> MSG IN SCSI parity error detected by target.
2621 * COMMAND --> STATUS Bad command or refused by target.
2622 * MSG OUT --> MSG IN Message rejected by target.
2623 * MSG OUT --> COMMAND Bogus target that discards extended
2624 * negotiation messages.
2626 * The code below does not care of the new phase and so
2627 * trusts the target. Why to annoy it ?
2628 * If the interrupted phase is COMMAND phase, we restart at
2630 * If a target does not get all the messages after selection,
2631 * the code assumes blindly that the target discards extended
2632 * messages and clears the negotiation status.
2633 * If the target does not want all our response to negotiation,
2634 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
2635 * bloat for such a should_not_happen situation).
2636 * In all other situation, we reset the BUS.
2637 * Are these assumptions reasonnable ? (Wait and see ...)
2644 case 2: /* COMMAND phase */
2645 nxtdsp = SCRIPTA_BA(np, dispatch);
2648 case 3: /* STATUS phase */
2649 nxtdsp = SCRIPTA_BA(np, dispatch);
2652 case 6: /* MSG OUT phase */
2654 * If the device may want to use untagged when we want
2655 * tagged, we prepare an IDENTIFY without disc. granted,
2656 * since we will not be able to handle reselect.
2657 * Otherwise, we just don't care.
2659 if (dsp == SCRIPTA_BA(np, send_ident)) {
2660 if (cp->tag != NO_TAG && olen - rest <= 3) {
2661 cp->host_status = HS_BUSY;
2662 np->msgout[0] = IDENTIFY(0, cp->lun);
2663 nxtdsp = SCRIPTB_BA(np, ident_break_atn);
2666 nxtdsp = SCRIPTB_BA(np, ident_break);
2668 else if (dsp == SCRIPTB_BA(np, send_wdtr) ||
2669 dsp == SCRIPTB_BA(np, send_sdtr) ||
2670 dsp == SCRIPTB_BA(np, send_ppr)) {
2671 nxtdsp = SCRIPTB_BA(np, nego_bad_phase);
2672 if (dsp == SCRIPTB_BA(np, send_ppr)) {
2673 struct scsi_device *dev = cp->cmd->device;
2679 case 7: /* MSG IN phase */
2680 nxtdsp = SCRIPTA_BA(np, clrack);
2686 OUTL_DSP(np, nxtdsp);
2691 sym_start_reset(np);
2695 * chip interrupt handler
2697 * In normal situations, interrupt conditions occur one at
2698 * a time. But when something bad happens on the SCSI BUS,
2699 * the chip may raise several interrupt flags before
2700 * stopping and interrupting the CPU. The additionnal
2701 * interrupt flags are stacked in some extra registers
2702 * after the SIP and/or DIP flag has been raised in the
2703 * ISTAT. After the CPU has read the interrupt condition
2704 * flag from SIST or DSTAT, the chip unstacks the other
2705 * interrupt flags and sets the corresponding bits in
2706 * SIST or DSTAT. Since the chip starts stacking once the
2707 * SIP or DIP flag is set, there is a small window of time
2708 * where the stacking does not occur.
2710 * Typically, multiple interrupt conditions may happen in
2711 * the following situations:
2713 * - SCSI parity error + Phase mismatch (PAR|MA)
2714 * When an parity error is detected in input phase
2715 * and the device switches to msg-in phase inside a
2717 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
2718 * When a stupid device does not want to handle the
2719 * recovery of an SCSI parity error.
2720 * - Some combinations of STO, PAR, UDC, ...
2721 * When using non compliant SCSI stuff, when user is
2722 * doing non compliant hot tampering on the BUS, when
2723 * something really bad happens to a device, etc ...
2725 * The heuristic suggested by SYMBIOS to handle
2726 * multiple interrupts is to try unstacking all
2727 * interrupts conditions and to handle them on some
2728 * priority based on error severity.
2729 * This will work when the unstacking has been
2730 * successful, but we cannot be 100 % sure of that,
2731 * since the CPU may have been faster to unstack than
2732 * the chip is able to stack. Hmmm ... But it seems that
2733 * such a situation is very unlikely to happen.
2735 * If this happen, for example STO caught by the CPU
2736 * then UDC happenning before the CPU have restarted
2737 * the SCRIPTS, the driver may wrongly complete the
2738 * same command on UDC, since the SCRIPTS didn't restart
2739 * and the DSA still points to the same command.
2740 * We avoid this situation by setting the DSA to an
2741 * invalid value when the CCB is completed and before
2742 * restarting the SCRIPTS.
2744 * Another issue is that we need some section of our
2745 * recovery procedures to be somehow uninterruptible but
2746 * the SCRIPTS processor does not provides such a
2747 * feature. For this reason, we handle recovery preferently
2748 * from the C code and check against some SCRIPTS critical
2749 * sections from the C code.
2751 * Hopefully, the interrupt handling of the driver is now
2752 * able to resist to weird BUS error conditions, but donnot
2753 * ask me for any guarantee that it will never fail. :-)
2754 * Use at your own decision and risk.
2757 void sym_interrupt (struct sym_hcb *np)
2759 u_char istat, istatc;
2764 * interrupt on the fly ?
2765 * (SCRIPTS may still be running)
2767 * A `dummy read' is needed to ensure that the
2768 * clear of the INTF flag reaches the device
2769 * and that posted writes are flushed to memory
2770 * before the scanning of the DONE queue.
2771 * Note that SCRIPTS also (dummy) read to memory
2772 * prior to deliver the INTF interrupt condition.
2774 istat = INB(np, nc_istat);
2776 OUTB(np, nc_istat, (istat & SIGP) | INTF | np->istat_sem);
2777 istat = INB(np, nc_istat); /* DUMMY READ */
2778 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
2779 sym_wakeup_done(np);
2782 if (!(istat & (SIP|DIP)))
2785 #if 0 /* We should never get this one */
2787 OUTB(np, nc_istat, CABRT);
2791 * PAR and MA interrupts may occur at the same time,
2792 * and we need to know of both in order to handle
2793 * this situation properly. We try to unstack SCSI
2794 * interrupts for that reason. BTW, I dislike a LOT
2795 * such a loop inside the interrupt routine.
2796 * Even if DMA interrupt stacking is very unlikely to
2797 * happen, we also try unstacking these ones, since
2798 * this has no performance impact.
2805 sist |= INW(np, nc_sist);
2807 dstat |= INB(np, nc_dstat);
2808 istatc = INB(np, nc_istat);
2810 } while (istatc & (SIP|DIP));
2812 if (DEBUG_FLAGS & DEBUG_TINY)
2813 printf ("<%d|%x:%x|%x:%x>",
2814 (int)INB(np, nc_scr0),
2816 (unsigned)INL(np, nc_dsp),
2817 (unsigned)INL(np, nc_dbc));
2819 * On paper, a memory read barrier may be needed here to
2820 * prevent out of order LOADs by the CPU from having
2821 * prefetched stale data prior to DMA having occurred.
2822 * And since we are paranoid ... :)
2824 MEMORY_READ_BARRIER();
2827 * First, interrupts we want to service cleanly.
2829 * Phase mismatch (MA) is the most frequent interrupt
2830 * for chip earlier than the 896 and so we have to service
2831 * it as quickly as possible.
2832 * A SCSI parity error (PAR) may be combined with a phase
2833 * mismatch condition (MA).
2834 * Programmed interrupts (SIR) are used to call the C code
2836 * The single step interrupt (SSI) is not used in this
2839 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
2840 !(dstat & (MDPE|BF|ABRT|IID))) {
2841 if (sist & PAR) sym_int_par (np, sist);
2842 else if (sist & MA) sym_int_ma (np);
2843 else if (dstat & SIR) sym_int_sir (np);
2844 else if (dstat & SSI) OUTONB_STD();
2845 else goto unknown_int;
2850 * Now, interrupts that donnot happen in normal
2851 * situations and that we may need to recover from.
2853 * On SCSI RESET (RST), we reset everything.
2854 * On SCSI BUS MODE CHANGE (SBMC), we complete all
2855 * active CCBs with RESET status, prepare all devices
2856 * for negotiating again and restart the SCRIPTS.
2857 * On STO and UDC, we complete the CCB with the corres-
2858 * ponding status and restart the SCRIPTS.
2861 printf("%s: SCSI BUS reset detected.\n", sym_name(np));
2862 sym_start_up (np, 1);
2866 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
2867 OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
2869 if (!(sist & (GEN|HTH|SGE)) &&
2870 !(dstat & (MDPE|BF|ABRT|IID))) {
2871 if (sist & SBMC) sym_int_sbmc (np);
2872 else if (sist & STO) sym_int_sto (np);
2873 else if (sist & UDC) sym_int_udc (np);
2874 else goto unknown_int;
2879 * Now, interrupts we are not able to recover cleanly.
2881 * Log message for hard errors.
2885 sym_log_hard_error(np, sist, dstat);
2887 if ((sist & (GEN|HTH|SGE)) ||
2888 (dstat & (MDPE|BF|ABRT|IID))) {
2889 sym_start_reset(np);
2895 * We just miss the cause of the interrupt. :(
2896 * Print a message. The timeout will do the real work.
2898 printf( "%s: unknown interrupt(s) ignored, "
2899 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
2900 sym_name(np), istat, dstat, sist);
2904 * Dequeue from the START queue all CCBs that match
2905 * a given target/lun/task condition (-1 means all),
2906 * and move them from the BUSY queue to the COMP queue
2907 * with DID_SOFT_ERROR status condition.
2908 * This function is used during error handling/recovery.
2909 * It is called with SCRIPTS not running.
2912 sym_dequeue_from_squeue(struct sym_hcb *np, int i, int target, int lun, int task)
2918 * Make sure the starting index is within range.
2920 assert((i >= 0) && (i < 2*MAX_QUEUE));
2923 * Walk until end of START queue and dequeue every job
2924 * that matches the target/lun/task condition.
2927 while (i != np->squeueput) {
2928 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
2930 #ifdef SYM_CONF_IARB_SUPPORT
2931 /* Forget hints for IARB, they may be no longer relevant */
2932 cp->host_flags &= ~HF_HINT_IARB;
2934 if ((target == -1 || cp->target == target) &&
2935 (lun == -1 || cp->lun == lun) &&
2936 (task == -1 || cp->tag == task)) {
2937 sym_set_cam_status(cp->cmd, DID_SOFT_ERROR);
2938 sym_remque(&cp->link_ccbq);
2939 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
2943 np->squeue[j] = np->squeue[i];
2944 if ((j += 2) >= MAX_QUEUE*2) j = 0;
2946 if ((i += 2) >= MAX_QUEUE*2) i = 0;
2948 if (i != j) /* Copy back the idle task if needed */
2949 np->squeue[j] = np->squeue[i];
2950 np->squeueput = j; /* Update our current start queue pointer */
2956 * chip handler for bad SCSI status condition
2958 * In case of bad SCSI status, we unqueue all the tasks
2959 * currently queued to the controller but not yet started
2960 * and then restart the SCRIPTS processor immediately.
2962 * QUEUE FULL and BUSY conditions are handled the same way.
2963 * Basically all the not yet started tasks are requeued in
2964 * device queue and the queue is frozen until a completion.
2966 * For CHECK CONDITION and COMMAND TERMINATED status, we use
2967 * the CCB of the failed command to prepare a REQUEST SENSE
2968 * SCSI command and queue it to the controller queue.
2970 * SCRATCHA is assumed to have been loaded with STARTPOS
2971 * before the SCRIPTS called the C code.
2973 static void sym_sir_bad_scsi_status(struct sym_hcb *np, int num, struct sym_ccb *cp)
2976 u_char s_status = cp->ssss_status;
2977 u_char h_flags = cp->host_flags;
2982 * Compute the index of the next job to start from SCRIPTS.
2984 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
2987 * The last CCB queued used for IARB hint may be
2988 * no longer relevant. Forget it.
2990 #ifdef SYM_CONF_IARB_SUPPORT
2996 * Now deal with the SCSI status.
3001 if (sym_verbose >= 2) {
3002 sym_print_addr(cp->cmd, "%s\n",
3003 s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
3005 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
3006 sym_complete_error (np, cp);
3011 * If we get an SCSI error when requesting sense, give up.
3013 if (h_flags & HF_SENSE) {
3014 sym_complete_error (np, cp);
3019 * Dequeue all queued CCBs for that device not yet started,
3020 * and restart the SCRIPTS processor immediately.
3022 sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
3023 OUTL_DSP(np, SCRIPTA_BA(np, start));
3026 * Save some info of the actual IO.
3027 * Compute the data residual.
3029 cp->sv_scsi_status = cp->ssss_status;
3030 cp->sv_xerr_status = cp->xerr_status;
3031 cp->sv_resid = sym_compute_residual(np, cp);
3034 * Prepare all needed data structures for
3035 * requesting sense data.
3038 cp->scsi_smsg2[0] = IDENTIFY(0, cp->lun);
3042 * If we are currently using anything different from
3043 * async. 8 bit data transfers with that target,
3044 * start a negotiation, since the device may want
3045 * to report us a UNIT ATTENTION condition due to
3046 * a cause we currently ignore, and we donnot want
3047 * to be stuck with WIDE and/or SYNC data transfer.
3049 * cp->nego_status is filled by sym_prepare_nego().
3051 cp->nego_status = 0;
3052 msglen += sym_prepare_nego(np, cp, &cp->scsi_smsg2[msglen]);
3054 * Message table indirect structure.
3056 cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg2);
3057 cp->phys.smsg.size = cpu_to_scr(msglen);
3062 cp->phys.cmd.addr = CCB_BA(cp, sensecmd);
3063 cp->phys.cmd.size = cpu_to_scr(6);
3066 * patch requested size into sense command
3068 cp->sensecmd[0] = REQUEST_SENSE;
3069 cp->sensecmd[1] = 0;
3070 if (cp->cmd->device->scsi_level <= SCSI_2 && cp->lun <= 7)
3071 cp->sensecmd[1] = cp->lun << 5;
3072 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
3073 cp->data_len = SYM_SNS_BBUF_LEN;
3078 memset(cp->sns_bbuf, 0, SYM_SNS_BBUF_LEN);
3079 cp->phys.sense.addr = CCB_BA(cp, sns_bbuf);
3080 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
3083 * requeue the command.
3085 startp = SCRIPTB_BA(np, sdata_in);
3087 cp->phys.head.savep = cpu_to_scr(startp);
3088 cp->phys.head.lastp = cpu_to_scr(startp);
3089 cp->startp = cpu_to_scr(startp);
3090 cp->goalp = cpu_to_scr(startp + 16);
3092 cp->host_xflags = 0;
3093 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
3094 cp->ssss_status = S_ILLEGAL;
3095 cp->host_flags = (HF_SENSE|HF_DATA_IN);
3096 cp->xerr_status = 0;
3097 cp->extra_bytes = 0;
3099 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
3102 * Requeue the command.
3104 sym_put_start_queue(np, cp);
3107 * Give back to upper layer everything we have dequeued.
3109 sym_flush_comp_queue(np, 0);
3115 * After a device has accepted some management message
3116 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
3117 * a device signals a UNIT ATTENTION condition, some
3118 * tasks are thrown away by the device. We are required
3119 * to reflect that on our tasks list since the device
3120 * will never complete these tasks.
3122 * This function move from the BUSY queue to the COMP
3123 * queue all disconnected CCBs for a given target that
3124 * match the following criteria:
3125 * - lun=-1 means any logical UNIT otherwise a given one.
3126 * - task=-1 means any task, otherwise a given one.
3128 int sym_clear_tasks(struct sym_hcb *np, int cam_status, int target, int lun, int task)
3130 SYM_QUEHEAD qtmp, *qp;
3135 * Move the entire BUSY queue to our temporary queue.
3137 sym_que_init(&qtmp);
3138 sym_que_splice(&np->busy_ccbq, &qtmp);
3139 sym_que_init(&np->busy_ccbq);
3142 * Put all CCBs that matches our criteria into
3143 * the COMP queue and put back other ones into
3146 while ((qp = sym_remque_head(&qtmp)) != 0) {
3147 struct scsi_cmnd *cmd;
3148 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3150 if (cp->host_status != HS_DISCONNECT ||
3151 cp->target != target ||
3152 (lun != -1 && cp->lun != lun) ||
3154 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
3155 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
3158 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3160 /* Preserve the software timeout condition */
3161 if (sym_get_cam_status(cmd) != DID_TIME_OUT)
3162 sym_set_cam_status(cmd, cam_status);
3165 printf("XXXX TASK @%p CLEARED\n", cp);
3172 * chip handler for TASKS recovery
3174 * We cannot safely abort a command, while the SCRIPTS
3175 * processor is running, since we just would be in race
3178 * As long as we have tasks to abort, we keep the SEM
3179 * bit set in the ISTAT. When this bit is set, the
3180 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
3181 * each time it enters the scheduler.
3183 * If we have to reset a target, clear tasks of a unit,
3184 * or to perform the abort of a disconnected job, we
3185 * restart the SCRIPTS for selecting the target. Once
3186 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
3187 * If it loses arbitration, the SCRIPTS will interrupt again
3188 * the next time it will enter its scheduler, and so on ...
3190 * On SIR_TARGET_SELECTED, we scan for the more
3191 * appropriate thing to do:
3193 * - If nothing, we just sent a M_ABORT message to the
3194 * target to get rid of the useless SCSI bus ownership.
3195 * According to the specs, no tasks shall be affected.
3196 * - If the target is to be reset, we send it a M_RESET
3198 * - If a logical UNIT is to be cleared , we send the
3199 * IDENTIFY(lun) + M_ABORT.
3200 * - If an untagged task is to be aborted, we send the
3201 * IDENTIFY(lun) + M_ABORT.
3202 * - If a tagged task is to be aborted, we send the
3203 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
3205 * Once our 'kiss of death' :) message has been accepted
3206 * by the target, the SCRIPTS interrupts again
3207 * (SIR_ABORT_SENT). On this interrupt, we complete
3208 * all the CCBs that should have been aborted by the
3209 * target according to our message.
3211 static void sym_sir_task_recovery(struct sym_hcb *np, int num)
3215 struct sym_tcb *tp = NULL; /* gcc isn't quite smart enough yet */
3216 struct scsi_target *starget;
3217 int target=-1, lun=-1, task;
3222 * The SCRIPTS processor stopped before starting
3223 * the next command in order to allow us to perform
3224 * some task recovery.
3226 case SIR_SCRIPT_STOPPED:
3228 * Do we have any target to reset or unit to clear ?
3230 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
3231 tp = &np->target[i];
3233 (tp->lun0p && tp->lun0p->to_clear)) {
3239 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
3240 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
3250 * If not, walk the busy queue for any
3251 * disconnected CCB to be aborted.
3254 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3255 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
3256 if (cp->host_status != HS_DISCONNECT)
3259 target = cp->target;
3266 * If some target is to be selected,
3267 * prepare and start the selection.
3270 tp = &np->target[target];
3271 np->abrt_sel.sel_id = target;
3272 np->abrt_sel.sel_scntl3 = tp->head.wval;
3273 np->abrt_sel.sel_sxfer = tp->head.sval;
3274 OUTL(np, nc_dsa, np->hcb_ba);
3275 OUTL_DSP(np, SCRIPTB_BA(np, sel_for_abort));
3280 * Now look for a CCB to abort that haven't started yet.
3281 * Btw, the SCRIPTS processor is still stopped, so
3282 * we are not in race.
3286 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3287 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3288 if (cp->host_status != HS_BUSY &&
3289 cp->host_status != HS_NEGOTIATE)
3293 #ifdef SYM_CONF_IARB_SUPPORT
3295 * If we are using IMMEDIATE ARBITRATION, we donnot
3296 * want to cancel the last queued CCB, since the
3297 * SCRIPTS may have anticipated the selection.
3299 if (cp == np->last_cp) {
3304 i = 1; /* Means we have found some */
3309 * We are done, so we donnot need
3310 * to synchronize with the SCRIPTS anylonger.
3311 * Remove the SEM flag from the ISTAT.
3314 OUTB(np, nc_istat, SIGP);
3318 * Compute index of next position in the start
3319 * queue the SCRIPTS intends to start and dequeue
3320 * all CCBs for that device that haven't been started.
3322 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
3323 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
3326 * Make sure at least our IO to abort has been dequeued.
3328 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
3329 assert(i && sym_get_cam_status(cp->cmd) == DID_SOFT_ERROR);
3331 sym_remque(&cp->link_ccbq);
3332 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3335 * Keep track in cam status of the reason of the abort.
3337 if (cp->to_abort == 2)
3338 sym_set_cam_status(cp->cmd, DID_TIME_OUT);
3340 sym_set_cam_status(cp->cmd, DID_ABORT);
3343 * Complete with error everything that we have dequeued.
3345 sym_flush_comp_queue(np, 0);
3348 * The SCRIPTS processor has selected a target
3349 * we may have some manual recovery to perform for.
3351 case SIR_TARGET_SELECTED:
3352 target = INB(np, nc_sdid) & 0xf;
3353 tp = &np->target[target];
3355 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
3358 * If the target is to be reset, prepare a
3359 * M_RESET message and clear the to_reset flag
3360 * since we donnot expect this operation to fail.
3363 np->abrt_msg[0] = M_RESET;
3364 np->abrt_tbl.size = 1;
3370 * Otherwise, look for some logical unit to be cleared.
3372 if (tp->lun0p && tp->lun0p->to_clear)
3374 else if (tp->lunmp) {
3375 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
3376 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
3384 * If a logical unit is to be cleared, prepare
3385 * an IDENTIFY(lun) + ABORT MESSAGE.
3388 struct sym_lcb *lp = sym_lp(tp, lun);
3389 lp->to_clear = 0; /* We don't expect to fail here */
3390 np->abrt_msg[0] = IDENTIFY(0, lun);
3391 np->abrt_msg[1] = M_ABORT;
3392 np->abrt_tbl.size = 2;
3397 * Otherwise, look for some disconnected job to
3398 * abort for this target.
3402 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3403 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3404 if (cp->host_status != HS_DISCONNECT)
3406 if (cp->target != target)
3410 i = 1; /* Means we have some */
3415 * If we have none, probably since the device has
3416 * completed the command before we won abitration,
3417 * send a M_ABORT message without IDENTIFY.
3418 * According to the specs, the device must just
3419 * disconnect the BUS and not abort any task.
3422 np->abrt_msg[0] = M_ABORT;
3423 np->abrt_tbl.size = 1;
3428 * We have some task to abort.
3429 * Set the IDENTIFY(lun)
3431 np->abrt_msg[0] = IDENTIFY(0, cp->lun);
3434 * If we want to abort an untagged command, we
3435 * will send a IDENTIFY + M_ABORT.
3436 * Otherwise (tagged command), we will send
3437 * a IDENTITFY + task attributes + ABORT TAG.
3439 if (cp->tag == NO_TAG) {
3440 np->abrt_msg[1] = M_ABORT;
3441 np->abrt_tbl.size = 2;
3443 np->abrt_msg[1] = cp->scsi_smsg[1];
3444 np->abrt_msg[2] = cp->scsi_smsg[2];
3445 np->abrt_msg[3] = M_ABORT_TAG;
3446 np->abrt_tbl.size = 4;
3449 * Keep track of software timeout condition, since the
3450 * peripheral driver may not count retries on abort
3451 * conditions not due to timeout.
3453 if (cp->to_abort == 2)
3454 sym_set_cam_status(cp->cmd, DID_TIME_OUT);
3455 cp->to_abort = 0; /* We donnot expect to fail here */
3459 * The target has accepted our message and switched
3460 * to BUS FREE phase as we expected.
3462 case SIR_ABORT_SENT:
3463 target = INB(np, nc_sdid) & 0xf;
3464 tp = &np->target[target];
3465 starget = tp->starget;
3468 ** If we didn't abort anything, leave here.
3470 if (np->abrt_msg[0] == M_ABORT)
3474 * If we sent a M_RESET, then a hardware reset has
3475 * been performed by the target.
3476 * - Reset everything to async 8 bit
3477 * - Tell ourself to negotiate next time :-)
3478 * - Prepare to clear all disconnected CCBs for
3479 * this target from our task list (lun=task=-1)
3483 if (np->abrt_msg[0] == M_RESET) {
3485 tp->head.wval = np->rv_scntl3;
3487 spi_period(starget) = 0;
3488 spi_offset(starget) = 0;
3489 spi_width(starget) = 0;
3490 spi_iu(starget) = 0;
3491 spi_dt(starget) = 0;
3492 spi_qas(starget) = 0;
3493 tp->tgoal.check_nego = 1;
3497 * Otherwise, check for the LUN and TASK(s)
3498 * concerned by the cancelation.
3499 * If it is not ABORT_TAG then it is CLEAR_QUEUE
3500 * or an ABORT message :-)
3503 lun = np->abrt_msg[0] & 0x3f;
3504 if (np->abrt_msg[1] == M_ABORT_TAG)
3505 task = np->abrt_msg[2];
3509 * Complete all the CCBs the device should have
3510 * aborted due to our 'kiss of death' message.
3512 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
3513 sym_dequeue_from_squeue(np, i, target, lun, -1);
3514 sym_clear_tasks(np, DID_ABORT, target, lun, task);
3515 sym_flush_comp_queue(np, 0);
3518 * If we sent a BDR, make upper layer aware of that.
3520 if (np->abrt_msg[0] == M_RESET)
3521 sym_xpt_async_sent_bdr(np, target);
3526 * Print to the log the message we intend to send.
3528 if (num == SIR_TARGET_SELECTED) {
3529 dev_info(&tp->starget->dev, "control msgout:");
3530 sym_printl_hex(np->abrt_msg, np->abrt_tbl.size);
3531 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
3535 * Let the SCRIPTS processor continue.
3541 * Gerard's alchemy:) that deals with with the data
3542 * pointer for both MDP and the residual calculation.
3544 * I didn't want to bloat the code by more than 200
3545 * lines for the handling of both MDP and the residual.
3546 * This has been achieved by using a data pointer
3547 * representation consisting in an index in the data
3548 * array (dp_sg) and a negative offset (dp_ofs) that
3549 * have the following meaning:
3551 * - dp_sg = SYM_CONF_MAX_SG
3552 * we are at the end of the data script.
3553 * - dp_sg < SYM_CONF_MAX_SG
3554 * dp_sg points to the next entry of the scatter array
3555 * we want to transfer.
3557 * dp_ofs represents the residual of bytes of the
3558 * previous entry scatter entry we will send first.
3560 * no residual to send first.
3562 * The function sym_evaluate_dp() accepts an arbitray
3563 * offset (basically from the MDP message) and returns
3564 * the corresponding values of dp_sg and dp_ofs.
3567 static int sym_evaluate_dp(struct sym_hcb *np, struct sym_ccb *cp, u32 scr, int *ofs)
3570 int dp_ofs, dp_sg, dp_sgmin;
3575 * Compute the resulted data pointer in term of a script
3576 * address within some DATA script and a signed byte offset.
3580 if (dp_scr == SCRIPTA_BA(np, pm0_data))
3582 else if (dp_scr == SCRIPTA_BA(np, pm1_data))
3588 dp_scr = scr_to_cpu(pm->ret);
3589 dp_ofs -= scr_to_cpu(pm->sg.size) & 0x00ffffff;
3593 * If we are auto-sensing, then we are done.
3595 if (cp->host_flags & HF_SENSE) {
3601 * Deduce the index of the sg entry.
3602 * Keep track of the index of the first valid entry.
3603 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
3606 tmp = scr_to_cpu(cp->goalp);
3607 dp_sg = SYM_CONF_MAX_SG;
3609 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
3610 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
3613 * Move to the sg entry the data pointer belongs to.
3615 * If we are inside the data area, we expect result to be:
3618 * dp_ofs = 0 and dp_sg is the index of the sg entry
3619 * the data pointer belongs to (or the end of the data)
3621 * dp_ofs < 0 and dp_sg is the index of the sg entry
3622 * the data pointer belongs to + 1.
3626 while (dp_sg > dp_sgmin) {
3628 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3629 n = dp_ofs + (tmp & 0xffffff);
3637 else if (dp_ofs > 0) {
3638 while (dp_sg < SYM_CONF_MAX_SG) {
3639 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3640 dp_ofs -= (tmp & 0xffffff);
3648 * Make sure the data pointer is inside the data area.
3649 * If not, return some error.
3651 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
3653 else if (dp_sg > SYM_CONF_MAX_SG ||
3654 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
3658 * Save the extreme pointer if needed.
3660 if (dp_sg > cp->ext_sg ||
3661 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
3663 cp->ext_ofs = dp_ofs;
3677 * chip handler for MODIFY DATA POINTER MESSAGE
3679 * We also call this function on IGNORE WIDE RESIDUE
3680 * messages that do not match a SWIDE full condition.
3681 * Btw, we assume in that situation that such a message
3682 * is equivalent to a MODIFY DATA POINTER (offset=-1).
3685 static void sym_modify_dp(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp, int ofs)
3688 u32 dp_scr = sym_get_script_dp (np, cp);
3696 * Not supported for auto-sense.
3698 if (cp->host_flags & HF_SENSE)
3702 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
3703 * to the resulted data pointer.
3705 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
3710 * And our alchemy:) allows to easily calculate the data
3711 * script address we want to return for the next data phase.
3713 dp_ret = cpu_to_scr(cp->goalp);
3714 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
3717 * If offset / scatter entry is zero we donnot need
3718 * a context for the new current data pointer.
3726 * Get a context for the new current data pointer.
3728 hflags = INB(np, HF_PRT);
3730 if (hflags & HF_DP_SAVED)
3731 hflags ^= HF_ACT_PM;
3733 if (!(hflags & HF_ACT_PM)) {
3735 dp_scr = SCRIPTA_BA(np, pm0_data);
3739 dp_scr = SCRIPTA_BA(np, pm1_data);
3742 hflags &= ~(HF_DP_SAVED);
3744 OUTB(np, HF_PRT, hflags);
3747 * Set up the new current data pointer.
3748 * ofs < 0 there, and for the next data phase, we
3749 * want to transfer part of the data of the sg entry
3750 * corresponding to index dp_sg-1 prior to returning
3751 * to the main data script.
3753 pm->ret = cpu_to_scr(dp_ret);
3754 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
3755 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
3756 pm->sg.addr = cpu_to_scr(tmp);
3757 pm->sg.size = cpu_to_scr(-dp_ofs);
3760 sym_set_script_dp (np, cp, dp_scr);
3761 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
3765 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
3770 * chip calculation of the data residual.
3772 * As I used to say, the requirement of data residual
3773 * in SCSI is broken, useless and cannot be achieved
3774 * without huge complexity.
3775 * But most OSes and even the official CAM require it.
3776 * When stupidity happens to be so widely spread inside
3777 * a community, it gets hard to convince.
3779 * Anyway, I don't care, since I am not going to use
3780 * any software that considers this data residual as
3781 * a relevant information. :)
3784 int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp)
3786 int dp_sg, dp_sgmin, resid = 0;
3790 * Check for some data lost or just thrown away.
3791 * We are not required to be quite accurate in this
3792 * situation. Btw, if we are odd for output and the
3793 * device claims some more data, it may well happen
3794 * than our residual be zero. :-)
3796 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
3797 if (cp->xerr_status & XE_EXTRA_DATA)
3798 resid -= cp->extra_bytes;
3799 if (cp->xerr_status & XE_SODL_UNRUN)
3801 if (cp->xerr_status & XE_SWIDE_OVRUN)
3806 * If all data has been transferred,
3807 * there is no residual.
3809 if (cp->phys.head.lastp == cp->goalp)
3813 * If no data transfer occurs, or if the data
3814 * pointer is weird, return full residual.
3816 if (cp->startp == cp->phys.head.lastp ||
3817 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
3819 return cp->data_len;
3823 * If we were auto-sensing, then we are done.
3825 if (cp->host_flags & HF_SENSE) {
3830 * We are now full comfortable in the computation
3831 * of the data residual (2's complement).
3833 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
3834 resid = -cp->ext_ofs;
3835 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
3836 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3837 resid += (tmp & 0xffffff);
3840 resid -= cp->odd_byte_adjustment;
3843 * Hopefully, the result is not too wrong.
3849 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
3851 * When we try to negotiate, we append the negotiation message
3852 * to the identify and (maybe) simple tag message.
3853 * The host status field is set to HS_NEGOTIATE to mark this
3856 * If the target doesn't answer this message immediately
3857 * (as required by the standard), the SIR_NEGO_FAILED interrupt
3858 * will be raised eventually.
3859 * The handler removes the HS_NEGOTIATE status, and sets the
3860 * negotiated value to the default (async / nowide).
3862 * If we receive a matching answer immediately, we check it
3863 * for validity, and set the values.
3865 * If we receive a Reject message immediately, we assume the
3866 * negotiation has failed, and fall back to standard values.
3868 * If we receive a negotiation message while not in HS_NEGOTIATE
3869 * state, it's a target initiated negotiation. We prepare a
3870 * (hopefully) valid answer, set our parameters, and send back
3871 * this answer to the target.
3873 * If the target doesn't fetch the answer (no message out phase),
3874 * we assume the negotiation has failed, and fall back to default
3875 * settings (SIR_NEGO_PROTO interrupt).
3877 * When we set the values, we adjust them in all ccbs belonging
3878 * to this target, in the controller's register, and in the "phys"
3879 * field of the controller's struct sym_hcb.
3883 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
3886 sym_sync_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
3888 int target = cp->target;
3889 u_char chg, ofs, per, fak, div;
3891 if (DEBUG_FLAGS & DEBUG_NEGO) {
3892 sym_print_nego_msg(np, target, "sync msgin", np->msgin);
3896 * Get requested values.
3903 * Check values against our limits.
3906 if (ofs > np->maxoffs)
3907 {chg = 1; ofs = np->maxoffs;}
3911 if (per < np->minsync)
3912 {chg = 1; per = np->minsync;}
3916 * Get new chip synchronous parameters value.
3919 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
3922 if (DEBUG_FLAGS & DEBUG_NEGO) {
3923 sym_print_addr(cp->cmd,
3924 "sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
3925 ofs, per, div, fak, chg);
3929 * If it was an answer we want to change,
3930 * then it isn't acceptable. Reject it.
3938 sym_setsync (np, target, ofs, per, div, fak);
3941 * It was an answer. We are done.
3947 * It was a request. Prepare an answer message.
3949 spi_populate_sync_msg(np->msgout, per, ofs);
3951 if (DEBUG_FLAGS & DEBUG_NEGO) {
3952 sym_print_nego_msg(np, target, "sync msgout", np->msgout);
3955 np->msgin [0] = M_NOOP;
3960 sym_setsync (np, target, 0, 0, 0, 0);
3964 static void sym_sync_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
3970 * Request or answer ?
3972 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
3973 OUTB(np, HS_PRT, HS_BUSY);
3974 if (cp->nego_status && cp->nego_status != NS_SYNC)
3980 * Check and apply new values.
3982 result = sym_sync_nego_check(np, req, cp);
3983 if (result) /* Not acceptable, reject it */
3985 if (req) { /* Was a request, send response. */
3986 cp->nego_status = NS_SYNC;
3987 OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
3989 else /* Was a response, we are done. */
3990 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
3994 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
3998 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
4001 sym_ppr_nego_check(struct sym_hcb *np, int req, int target)
4003 struct sym_tcb *tp = &np->target[target];
4004 unsigned char fak, div;
4007 unsigned char per = np->msgin[3];
4008 unsigned char ofs = np->msgin[5];
4009 unsigned char wide = np->msgin[6];
4010 unsigned char opts = np->msgin[7] & PPR_OPT_MASK;
4012 if (DEBUG_FLAGS & DEBUG_NEGO) {
4013 sym_print_nego_msg(np, target, "ppr msgin", np->msgin);
4017 * Check values against our limits.
4019 if (wide > np->maxwide) {
4023 if (!wide || !(np->features & FE_U3EN))
4026 if (opts != (np->msgin[7] & PPR_OPT_MASK))
4029 dt = opts & PPR_OPT_DT;
4032 unsigned char maxoffs = dt ? np->maxoffs_dt : np->maxoffs;
4033 if (ofs > maxoffs) {
4040 unsigned char minsync = dt ? np->minsync_dt : np->minsync;
4041 if (per < minsync) {
4048 * Get new chip synchronous parameters value.
4051 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
4055 * If it was an answer we want to change,
4056 * then it isn't acceptable. Reject it.
4064 sym_setpprot(np, target, opts, ofs, per, wide, div, fak);
4067 * It was an answer. We are done.
4073 * It was a request. Prepare an answer message.
4075 spi_populate_ppr_msg(np->msgout, per, ofs, wide, opts);
4077 if (DEBUG_FLAGS & DEBUG_NEGO) {
4078 sym_print_nego_msg(np, target, "ppr msgout", np->msgout);
4081 np->msgin [0] = M_NOOP;
4086 sym_setpprot (np, target, 0, 0, 0, 0, 0, 0);
4088 * If it is a device response that should result in
4089 * ST, we may want to try a legacy negotiation later.
4091 if (!req && !opts) {
4092 tp->tgoal.period = per;
4093 tp->tgoal.offset = ofs;
4094 tp->tgoal.width = wide;
4095 tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
4096 tp->tgoal.check_nego = 1;
4101 static void sym_ppr_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4107 * Request or answer ?
4109 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
4110 OUTB(np, HS_PRT, HS_BUSY);
4111 if (cp->nego_status && cp->nego_status != NS_PPR)
4117 * Check and apply new values.
4119 result = sym_ppr_nego_check(np, req, cp->target);
4120 if (result) /* Not acceptable, reject it */
4122 if (req) { /* Was a request, send response. */
4123 cp->nego_status = NS_PPR;
4124 OUTL_DSP(np, SCRIPTB_BA(np, ppr_resp));
4126 else /* Was a response, we are done. */
4127 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4131 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4135 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
4138 sym_wide_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
4140 int target = cp->target;
4143 if (DEBUG_FLAGS & DEBUG_NEGO) {
4144 sym_print_nego_msg(np, target, "wide msgin", np->msgin);
4148 * Get requested values.
4151 wide = np->msgin[3];
4154 * Check values against our limits.
4156 if (wide > np->maxwide) {
4161 if (DEBUG_FLAGS & DEBUG_NEGO) {
4162 sym_print_addr(cp->cmd, "wdtr: wide=%d chg=%d.\n",
4167 * If it was an answer we want to change,
4168 * then it isn't acceptable. Reject it.
4176 sym_setwide (np, target, wide);
4179 * It was an answer. We are done.
4185 * It was a request. Prepare an answer message.
4187 spi_populate_width_msg(np->msgout, wide);
4189 np->msgin [0] = M_NOOP;
4191 if (DEBUG_FLAGS & DEBUG_NEGO) {
4192 sym_print_nego_msg(np, target, "wide msgout", np->msgout);
4201 static void sym_wide_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4207 * Request or answer ?
4209 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
4210 OUTB(np, HS_PRT, HS_BUSY);
4211 if (cp->nego_status && cp->nego_status != NS_WIDE)
4217 * Check and apply new values.
4219 result = sym_wide_nego_check(np, req, cp);
4220 if (result) /* Not acceptable, reject it */
4222 if (req) { /* Was a request, send response. */
4223 cp->nego_status = NS_WIDE;
4224 OUTL_DSP(np, SCRIPTB_BA(np, wdtr_resp));
4225 } else { /* Was a response. */
4227 * Negotiate for SYNC immediately after WIDE response.
4228 * This allows to negotiate for both WIDE and SYNC on
4229 * a single SCSI command (Suggested by Justin Gibbs).
4231 if (tp->tgoal.offset) {
4232 spi_populate_sync_msg(np->msgout, tp->tgoal.period,
4235 if (DEBUG_FLAGS & DEBUG_NEGO) {
4236 sym_print_nego_msg(np, cp->target,
4237 "sync msgout", np->msgout);
4240 cp->nego_status = NS_SYNC;
4241 OUTB(np, HS_PRT, HS_NEGOTIATE);
4242 OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
4245 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4251 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4255 * Reset DT, SYNC or WIDE to default settings.
4257 * Called when a negotiation does not succeed either
4258 * on rejection or on protocol error.
4260 * A target that understands a PPR message should never
4261 * reject it, and messing with it is very unlikely.
4262 * So, if a PPR makes problems, we may just want to
4263 * try a legacy negotiation later.
4265 static void sym_nego_default(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4267 switch (cp->nego_status) {
4270 sym_setpprot (np, cp->target, 0, 0, 0, 0, 0, 0);
4272 if (tp->tgoal.period < np->minsync)
4273 tp->tgoal.period = np->minsync;
4274 if (tp->tgoal.offset > np->maxoffs)
4275 tp->tgoal.offset = np->maxoffs;
4276 tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
4277 tp->tgoal.check_nego = 1;
4281 sym_setsync (np, cp->target, 0, 0, 0, 0);
4284 sym_setwide (np, cp->target, 0);
4287 np->msgin [0] = M_NOOP;
4288 np->msgout[0] = M_NOOP;
4289 cp->nego_status = 0;
4293 * chip handler for MESSAGE REJECT received in response to
4294 * PPR, WIDE or SYNCHRONOUS negotiation.
4296 static void sym_nego_rejected(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4298 sym_nego_default(np, tp, cp);
4299 OUTB(np, HS_PRT, HS_BUSY);
4303 * chip exception handler for programmed interrupts.
4305 static void sym_int_sir (struct sym_hcb *np)
4307 u_char num = INB(np, nc_dsps);
4308 u32 dsa = INL(np, nc_dsa);
4309 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
4310 u_char target = INB(np, nc_sdid) & 0x0f;
4311 struct sym_tcb *tp = &np->target[target];
4314 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
4317 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
4319 * SCRIPTS tell us that we may have to update
4320 * 64 bit DMA segment registers.
4322 case SIR_DMAP_DIRTY:
4323 sym_update_dmap_regs(np);
4327 * Command has been completed with error condition
4328 * or has been auto-sensed.
4330 case SIR_COMPLETE_ERROR:
4331 sym_complete_error(np, cp);
4334 * The C code is currently trying to recover from something.
4335 * Typically, user want to abort some command.
4337 case SIR_SCRIPT_STOPPED:
4338 case SIR_TARGET_SELECTED:
4339 case SIR_ABORT_SENT:
4340 sym_sir_task_recovery(np, num);
4343 * The device didn't go to MSG OUT phase after having
4344 * been selected with ATN. We donnot want to handle
4347 case SIR_SEL_ATN_NO_MSG_OUT:
4348 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
4349 sym_name (np), target);
4352 * The device didn't switch to MSG IN phase after
4353 * having reseleted the initiator.
4355 case SIR_RESEL_NO_MSG_IN:
4356 printf ("%s:%d: No MSG IN phase after reselection.\n",
4357 sym_name (np), target);
4360 * After reselection, the device sent a message that wasn't
4363 case SIR_RESEL_NO_IDENTIFY:
4364 printf ("%s:%d: No IDENTIFY after reselection.\n",
4365 sym_name (np), target);
4368 * The device reselected a LUN we donnot know about.
4370 case SIR_RESEL_BAD_LUN:
4371 np->msgout[0] = M_RESET;
4374 * The device reselected for an untagged nexus and we
4377 case SIR_RESEL_BAD_I_T_L:
4378 np->msgout[0] = M_ABORT;
4381 * The device reselected for a tagged nexus that we donnot
4384 case SIR_RESEL_BAD_I_T_L_Q:
4385 np->msgout[0] = M_ABORT_TAG;
4388 * The SCRIPTS let us know that the device has grabbed
4389 * our message and will abort the job.
4391 case SIR_RESEL_ABORTED:
4392 np->lastmsg = np->msgout[0];
4393 np->msgout[0] = M_NOOP;
4394 printf ("%s:%d: message %x sent on bad reselection.\n",
4395 sym_name (np), target, np->lastmsg);
4398 * The SCRIPTS let us know that a message has been
4399 * successfully sent to the device.
4401 case SIR_MSG_OUT_DONE:
4402 np->lastmsg = np->msgout[0];
4403 np->msgout[0] = M_NOOP;
4404 /* Should we really care of that */
4405 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
4407 cp->xerr_status &= ~XE_PARITY_ERR;
4408 if (!cp->xerr_status)
4409 OUTOFFB(np, HF_PRT, HF_EXT_ERR);
4414 * The device didn't send a GOOD SCSI status.
4415 * We may have some work to do prior to allow
4416 * the SCRIPTS processor to continue.
4418 case SIR_BAD_SCSI_STATUS:
4421 sym_sir_bad_scsi_status(np, num, cp);
4424 * We are asked by the SCRIPTS to prepare a
4427 case SIR_REJECT_TO_SEND:
4428 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
4429 np->msgout[0] = M_REJECT;
4432 * We have been ODD at the end of a DATA IN
4433 * transfer and the device didn't send a
4434 * IGNORE WIDE RESIDUE message.
4435 * It is a data overrun condition.
4437 case SIR_SWIDE_OVERRUN:
4439 OUTONB(np, HF_PRT, HF_EXT_ERR);
4440 cp->xerr_status |= XE_SWIDE_OVRUN;
4444 * We have been ODD at the end of a DATA OUT
4446 * It is a data underrun condition.
4448 case SIR_SODL_UNDERRUN:
4450 OUTONB(np, HF_PRT, HF_EXT_ERR);
4451 cp->xerr_status |= XE_SODL_UNRUN;
4455 * The device wants us to tranfer more data than
4456 * expected or in the wrong direction.
4457 * The number of extra bytes is in scratcha.
4458 * It is a data overrun condition.
4460 case SIR_DATA_OVERRUN:
4462 OUTONB(np, HF_PRT, HF_EXT_ERR);
4463 cp->xerr_status |= XE_EXTRA_DATA;
4464 cp->extra_bytes += INL(np, nc_scratcha);
4468 * The device switched to an illegal phase (4/5).
4472 OUTONB(np, HF_PRT, HF_EXT_ERR);
4473 cp->xerr_status |= XE_BAD_PHASE;
4477 * We received a message.
4479 case SIR_MSG_RECEIVED:
4482 switch (np->msgin [0]) {
4484 * We received an extended message.
4485 * We handle MODIFY DATA POINTER, SDTR, WDTR
4486 * and reject all other extended messages.
4489 switch (np->msgin [2]) {
4491 if (DEBUG_FLAGS & DEBUG_POINTER)
4492 sym_print_msg(cp, NULL, np->msgin);
4493 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
4494 (np->msgin[5]<<8) + (np->msgin[6]);
4495 sym_modify_dp(np, tp, cp, tmp);
4498 sym_sync_nego(np, tp, cp);
4501 sym_ppr_nego(np, tp, cp);
4504 sym_wide_nego(np, tp, cp);
4511 * We received a 1/2 byte message not handled from SCRIPTS.
4512 * We are only expecting MESSAGE REJECT and IGNORE WIDE
4513 * RESIDUE messages that haven't been anticipated by
4514 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
4515 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
4518 if (DEBUG_FLAGS & DEBUG_POINTER)
4519 sym_print_msg(cp, NULL, np->msgin);
4520 if (cp->host_flags & HF_SENSE)
4521 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4523 sym_modify_dp(np, tp, cp, -1);
4526 if (INB(np, HS_PRT) == HS_NEGOTIATE)
4527 sym_nego_rejected(np, tp, cp);
4529 sym_print_addr(cp->cmd,
4530 "M_REJECT received (%x:%x).\n",
4531 scr_to_cpu(np->lastmsg), np->msgout[0]);
4540 * We received an unknown message.
4541 * Ignore all MSG IN phases and reject it.
4544 sym_print_msg(cp, "WEIRD message received", np->msgin);
4545 OUTL_DSP(np, SCRIPTB_BA(np, msg_weird));
4548 * Negotiation failed.
4549 * Target does not send us the reply.
4550 * Remove the HS_NEGOTIATE status.
4552 case SIR_NEGO_FAILED:
4553 OUTB(np, HS_PRT, HS_BUSY);
4555 * Negotiation failed.
4556 * Target does not want answer message.
4558 case SIR_NEGO_PROTO:
4559 sym_nego_default(np, tp, cp);
4567 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4570 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4577 * Acquire a control block
4579 struct sym_ccb *sym_get_ccb (struct sym_hcb *np, struct scsi_cmnd *cmd, u_char tag_order)
4581 u_char tn = cmd->device->id;
4582 u_char ln = cmd->device->lun;
4583 struct sym_tcb *tp = &np->target[tn];
4584 struct sym_lcb *lp = sym_lp(tp, ln);
4585 u_short tag = NO_TAG;
4587 struct sym_ccb *cp = NULL;
4590 * Look for a free CCB
4592 if (sym_que_empty(&np->free_ccbq))
4594 qp = sym_remque_head(&np->free_ccbq);
4597 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4601 * If we have been asked for a tagged command.
4605 * Debugging purpose.
4607 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4608 if (lp->busy_itl != 0)
4612 * Allocate resources for tags if not yet.
4615 sym_alloc_lcb_tags(np, tn, ln);
4620 * Get a tag for this SCSI IO and set up
4621 * the CCB bus address for reselection,
4622 * and count it for this LUN.
4623 * Toggle reselect path to tagged.
4625 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
4626 tag = lp->cb_tags[lp->ia_tag];
4627 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
4630 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4631 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
4633 cpu_to_scr(SCRIPTA_BA(np, resel_tag));
4635 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4636 cp->tags_si = lp->tags_si;
4637 ++lp->tags_sum[cp->tags_si];
4645 * This command will not be tagged.
4646 * If we already have either a tagged or untagged
4647 * one, refuse to overlap this untagged one.
4651 * Debugging purpose.
4653 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4654 if (lp->busy_itl != 0 || lp->busy_itlq != 0)
4658 * Count this nexus for this LUN.
4659 * Set up the CCB bus address for reselection.
4660 * Toggle reselect path to untagged.
4663 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4664 if (lp->busy_itl == 1) {
4665 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
4667 cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
4675 * Put the CCB into the busy queue.
4677 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4678 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4680 sym_remque(&cp->link2_ccbq);
4681 sym_insque_tail(&cp->link2_ccbq, &lp->waiting_ccbq);
4686 cp->odd_byte_adjustment = 0;
4688 cp->order = tag_order;
4692 if (DEBUG_FLAGS & DEBUG_TAGS) {
4693 sym_print_addr(cmd, "ccb @%p using tag %d.\n", cp, tag);
4699 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4704 * Release one control block
4706 void sym_free_ccb (struct sym_hcb *np, struct sym_ccb *cp)
4708 struct sym_tcb *tp = &np->target[cp->target];
4709 struct sym_lcb *lp = sym_lp(tp, cp->lun);
4711 if (DEBUG_FLAGS & DEBUG_TAGS) {
4712 sym_print_addr(cp->cmd, "ccb @%p freeing tag %d.\n",
4721 * If tagged, release the tag, set the relect path
4723 if (cp->tag != NO_TAG) {
4724 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4725 --lp->tags_sum[cp->tags_si];
4728 * Free the tag value.
4730 lp->cb_tags[lp->if_tag] = cp->tag;
4731 if (++lp->if_tag == SYM_CONF_MAX_TASK)
4734 * Make the reselect path invalid,
4735 * and uncount this CCB.
4737 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
4739 } else { /* Untagged */
4741 * Make the reselect path invalid,
4742 * and uncount this CCB.
4744 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
4748 * If no JOB active, make the LUN reselect path invalid.
4750 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
4752 cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
4756 * We donnot queue more than 1 ccb per target
4757 * with negotiation at any time. If this ccb was
4758 * used for negotiation, clear this info in the tcb.
4760 if (cp == tp->nego_cp)
4763 #ifdef SYM_CONF_IARB_SUPPORT
4765 * If we just complete the last queued CCB,
4766 * clear this info that is no longer relevant.
4768 if (cp == np->last_cp)
4773 * Make this CCB available.
4776 cp->host_status = HS_IDLE;
4777 sym_remque(&cp->link_ccbq);
4778 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4780 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4782 sym_remque(&cp->link2_ccbq);
4783 sym_insque_tail(&cp->link2_ccbq, &np->dummy_ccbq);
4785 if (cp->tag != NO_TAG)
4788 --lp->started_no_tag;
4796 * Allocate a CCB from memory and initialize its fixed part.
4798 static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np)
4800 struct sym_ccb *cp = NULL;
4804 * Prevent from allocating more CCBs than we can
4805 * queue to the controller.
4807 if (np->actccbs >= SYM_CONF_MAX_START)
4811 * Allocate memory for this CCB.
4813 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
4823 * Compute the bus address of this ccb.
4825 cp->ccb_ba = vtobus(cp);
4828 * Insert this ccb into the hashed list.
4830 hcode = CCB_HASH_CODE(cp->ccb_ba);
4831 cp->link_ccbh = np->ccbh[hcode];
4832 np->ccbh[hcode] = cp;
4835 * Initialyze the start and restart actions.
4837 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, idle));
4838 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
4841 * Initilialyze some other fields.
4843 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
4846 * Chain into free ccb queue.
4848 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4851 * Chain into optionnal lists.
4853 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4854 sym_insque_head(&cp->link2_ccbq, &np->dummy_ccbq);
4859 sym_mfree_dma(cp, sizeof(*cp), "CCB");
4864 * Look up a CCB from a DSA value.
4866 static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa)
4871 hcode = CCB_HASH_CODE(dsa);
4872 cp = np->ccbh[hcode];
4874 if (cp->ccb_ba == dsa)
4883 * Target control block initialisation.
4884 * Nothing important to do at the moment.
4886 static void sym_init_tcb (struct sym_hcb *np, u_char tn)
4888 #if 0 /* Hmmm... this checking looks paranoid. */
4890 * Check some alignments required by the chip.
4892 assert (((offsetof(struct sym_reg, nc_sxfer) ^
4893 offsetof(struct sym_tcb, head.sval)) &3) == 0);
4894 assert (((offsetof(struct sym_reg, nc_scntl3) ^
4895 offsetof(struct sym_tcb, head.wval)) &3) == 0);
4900 * Lun control block allocation and initialization.
4902 struct sym_lcb *sym_alloc_lcb (struct sym_hcb *np, u_char tn, u_char ln)
4904 struct sym_tcb *tp = &np->target[tn];
4905 struct sym_lcb *lp = NULL;
4908 * Initialize the target control block if not yet.
4910 sym_init_tcb (np, tn);
4913 * Allocate the LCB bus address array.
4914 * Compute the bus address of this table.
4916 if (ln && !tp->luntbl) {
4919 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
4922 for (i = 0 ; i < 64 ; i++)
4923 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
4924 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
4928 * Allocate the table of pointers for LUN(s) > 0, if needed.
4930 if (ln && !tp->lunmp) {
4931 tp->lunmp = kcalloc(SYM_CONF_MAX_LUN, sizeof(struct sym_lcb *),
4939 * Make it available to the chip.
4941 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
4946 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
4950 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
4954 * Let the itl task point to error handling.
4956 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
4959 * Set the reselect pattern to our default. :)
4961 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
4964 * Set user capabilities.
4966 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
4968 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4970 * Initialize device queueing.
4972 sym_que_init(&lp->waiting_ccbq);
4973 sym_que_init(&lp->started_ccbq);
4974 lp->started_max = SYM_CONF_MAX_TASK;
4975 lp->started_limit = SYM_CONF_MAX_TASK;
4983 * Allocate LCB resources for tagged command queuing.
4985 static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln)
4987 struct sym_tcb *tp = &np->target[tn];
4988 struct sym_lcb *lp = sym_lp(tp, ln);
4992 * Allocate the task table and and the tag allocation
4993 * circular buffer. We want both or none.
4995 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
4998 lp->cb_tags = kcalloc(SYM_CONF_MAX_TASK, 1, GFP_ATOMIC);
5000 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
5001 lp->itlq_tbl = NULL;
5006 * Initialize the task table with invalid entries.
5008 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
5009 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
5012 * Fill up the tag buffer with tag numbers.
5014 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
5018 * Make the task table available to SCRIPTS,
5019 * And accept tagged commands now.
5021 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
5029 * Queue a SCSI IO to the controller.
5031 int sym_queue_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, struct sym_ccb *cp)
5033 struct scsi_device *sdev = cmd->device;
5041 * Keep track of the IO in our CCB.
5046 * Retrieve the target descriptor.
5048 tp = &np->target[cp->target];
5051 * Retrieve the lun descriptor.
5053 lp = sym_lp(tp, sdev->lun);
5055 can_disconnect = (cp->tag != NO_TAG) ||
5056 (lp && (lp->curr_flags & SYM_DISC_ENABLED));
5058 msgptr = cp->scsi_smsg;
5060 msgptr[msglen++] = IDENTIFY(can_disconnect, sdev->lun);
5063 * Build the tag message if present.
5065 if (cp->tag != NO_TAG) {
5066 u_char order = cp->order;
5074 order = M_SIMPLE_TAG;
5076 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
5078 * Avoid too much reordering of SCSI commands.
5079 * The algorithm tries to prevent completion of any
5080 * tagged command from being delayed against more
5081 * than 3 times the max number of queued commands.
5083 if (lp && lp->tags_since > 3*SYM_CONF_MAX_TAG) {
5084 lp->tags_si = !(lp->tags_si);
5085 if (lp->tags_sum[lp->tags_si]) {
5086 order = M_ORDERED_TAG;
5087 if ((DEBUG_FLAGS & DEBUG_TAGS)||sym_verbose>1) {
5089 "ordered tag forced.\n");
5095 msgptr[msglen++] = order;
5098 * For less than 128 tags, actual tags are numbered
5099 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
5100 * with devices that have problems with #TAG 0 or too
5101 * great #TAG numbers. For more tags (up to 256),
5102 * we use directly our tag number.
5104 #if SYM_CONF_MAX_TASK > (512/4)
5105 msgptr[msglen++] = cp->tag;
5107 msgptr[msglen++] = (cp->tag << 1) + 1;
5112 * Build a negotiation message if needed.
5113 * (nego_status is filled by sym_prepare_nego())
5115 cp->nego_status = 0;
5116 if (tp->tgoal.check_nego && !tp->nego_cp && lp) {
5117 msglen += sym_prepare_nego(np, cp, msgptr + msglen);
5123 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
5124 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA(np, resel_dsa));
5129 cp->phys.select.sel_id = cp->target;
5130 cp->phys.select.sel_scntl3 = tp->head.wval;
5131 cp->phys.select.sel_sxfer = tp->head.sval;
5132 cp->phys.select.sel_scntl4 = tp->head.uval;
5137 cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg);
5138 cp->phys.smsg.size = cpu_to_scr(msglen);
5143 cp->host_xflags = 0;
5144 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
5145 cp->ssss_status = S_ILLEGAL;
5146 cp->xerr_status = 0;
5148 cp->extra_bytes = 0;
5151 * extreme data pointer.
5152 * shall be positive, so -1 is lower than lowest.:)
5158 * Build the CDB and DATA descriptor block
5161 return sym_setup_data_and_start(np, cmd, cp);
5165 * Reset a SCSI target (all LUNs of this target).
5167 int sym_reset_scsi_target(struct sym_hcb *np, int target)
5171 if (target == np->myaddr || (u_int)target >= SYM_CONF_MAX_TARGET)
5174 tp = &np->target[target];
5177 np->istat_sem = SEM;
5178 OUTB(np, nc_istat, SIGP|SEM);
5186 static int sym_abort_ccb(struct sym_hcb *np, struct sym_ccb *cp, int timed_out)
5189 * Check that the IO is active.
5191 if (!cp || !cp->host_status || cp->host_status == HS_WAIT)
5195 * If a previous abort didn't succeed in time,
5196 * perform a BUS reset.
5199 sym_reset_scsi_bus(np, 1);
5204 * Mark the CCB for abort and allow time for.
5206 cp->to_abort = timed_out ? 2 : 1;
5209 * Tell the SCRIPTS processor to stop and synchronize with us.
5211 np->istat_sem = SEM;
5212 OUTB(np, nc_istat, SIGP|SEM);
5216 int sym_abort_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, int timed_out)
5222 * Look up our CCB control block.
5225 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5226 struct sym_ccb *cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5227 if (cp2->cmd == cmd) {
5233 return sym_abort_ccb(np, cp, timed_out);
5237 * Complete execution of a SCSI command with extended
5238 * error, SCSI status error, or having been auto-sensed.
5240 * The SCRIPTS processor is not running there, so we
5241 * can safely access IO registers and remove JOBs from
5243 * SCRATCHA is assumed to have been loaded with STARTPOS
5244 * before the SCRIPTS called the C code.
5246 void sym_complete_error(struct sym_hcb *np, struct sym_ccb *cp)
5248 struct scsi_device *sdev;
5249 struct scsi_cmnd *cmd;
5256 * Paranoid check. :)
5258 if (!cp || !cp->cmd)
5263 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
5264 dev_info(&sdev->sdev_gendev, "CCB=%p STAT=%x/%x/%x\n", cp,
5265 cp->host_status, cp->ssss_status, cp->host_flags);
5269 * Get target and lun pointers.
5271 tp = &np->target[cp->target];
5272 lp = sym_lp(tp, sdev->lun);
5275 * Check for extended errors.
5277 if (cp->xerr_status) {
5279 sym_print_xerr(cmd, cp->xerr_status);
5280 if (cp->host_status == HS_COMPLETE)
5281 cp->host_status = HS_COMP_ERR;
5285 * Calculate the residual.
5287 resid = sym_compute_residual(np, cp);
5289 if (!SYM_SETUP_RESIDUAL_SUPPORT) {/* If user does not want residuals */
5290 resid = 0; /* throw them away. :) */
5295 printf("XXXX RESID= %d - 0x%x\n", resid, resid);
5299 * Dequeue all queued CCBs for that device
5300 * not yet started by SCRIPTS.
5302 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
5303 i = sym_dequeue_from_squeue(np, i, cp->target, sdev->lun, -1);
5306 * Restart the SCRIPTS processor.
5308 OUTL_DSP(np, SCRIPTA_BA(np, start));
5310 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5311 if (cp->host_status == HS_COMPLETE &&
5312 cp->ssss_status == S_QUEUE_FULL) {
5313 if (!lp || lp->started_tags - i < 2)
5316 * Decrease queue depth as needed.
5318 lp->started_max = lp->started_tags - i - 1;
5321 if (sym_verbose >= 2) {
5322 sym_print_addr(cmd, " queue depth is now %d\n",
5329 cp->host_status = HS_BUSY;
5330 cp->ssss_status = S_ILLEGAL;
5333 * Let's requeue it to device.
5335 sym_set_cam_status(cmd, DID_SOFT_ERROR);
5341 * Build result in CAM ccb.
5343 sym_set_cam_result_error(np, cp, resid);
5345 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5349 * Add this one to the COMP queue.
5351 sym_remque(&cp->link_ccbq);
5352 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
5355 * Complete all those commands with either error
5356 * or requeue condition.
5358 sym_flush_comp_queue(np, 0);
5360 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5362 * Donnot start more than 1 command after an error.
5364 sym_start_next_ccbs(np, lp, 1);
5369 * Complete execution of a successful SCSI command.
5371 * Only successful commands go to the DONE queue,
5372 * since we need to have the SCRIPTS processor
5373 * stopped on any error condition.
5374 * The SCRIPTS processor is running while we are
5375 * completing successful commands.
5377 void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp)
5381 struct scsi_cmnd *cmd;
5385 * Paranoid check. :)
5387 if (!cp || !cp->cmd)
5389 assert (cp->host_status == HS_COMPLETE);
5397 * Get target and lun pointers.
5399 tp = &np->target[cp->target];
5400 lp = sym_lp(tp, cp->lun);
5403 * If all data have been transferred, given than no
5404 * extended error did occur, there is no residual.
5407 if (cp->phys.head.lastp != cp->goalp)
5408 resid = sym_compute_residual(np, cp);
5411 * Wrong transfer residuals may be worse than just always
5412 * returning zero. User can disable this feature in
5413 * sym53c8xx.h. Residual support is enabled by default.
5415 if (!SYM_SETUP_RESIDUAL_SUPPORT)
5419 printf("XXXX RESID= %d - 0x%x\n", resid, resid);
5423 * Build result in CAM ccb.
5425 sym_set_cam_result_ok(cp, cmd, resid);
5427 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5429 * If max number of started ccbs had been reduced,
5430 * increase it if 200 good status received.
5432 if (lp && lp->started_max < lp->started_limit) {
5434 if (lp->num_sgood >= 200) {
5437 if (sym_verbose >= 2) {
5438 sym_print_addr(cmd, " queue depth is now %d\n",
5448 sym_free_ccb (np, cp);
5450 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5452 * Requeue a couple of awaiting scsi commands.
5454 if (!sym_que_empty(&lp->waiting_ccbq))
5455 sym_start_next_ccbs(np, lp, 2);
5458 * Complete the command.
5460 sym_xpt_done(np, cmd);
5464 * Soft-attach the controller.
5466 int sym_hcb_attach(struct Scsi_Host *shost, struct sym_fw *fw, struct sym_nvram *nvram)
5468 struct sym_hcb *np = sym_get_hcb(shost);
5472 * Get some info about the firmware.
5474 np->scripta_sz = fw->a_size;
5475 np->scriptb_sz = fw->b_size;
5476 np->scriptz_sz = fw->z_size;
5477 np->fw_setup = fw->setup;
5478 np->fw_patch = fw->patch;
5479 np->fw_name = fw->name;
5482 * Save setting of some IO registers, so we will
5483 * be able to probe specific implementations.
5485 sym_save_initial_setting (np);
5488 * Reset the chip now, since it has been reported
5489 * that SCSI clock calibration may not work properly
5490 * if the chip is currently active.
5495 * Prepare controller and devices settings, according
5496 * to chip features, user set-up and driver set-up.
5498 sym_prepare_setting(shost, np, nvram);
5501 * Check the PCI clock frequency.
5502 * Must be performed after prepare_setting since it destroys
5503 * STEST1 that is used to probe for the clock doubler.
5505 i = sym_getpciclock(np);
5506 if (i > 37000 && !(np->features & FE_66MHZ))
5507 printf("%s: PCI BUS clock seems too high: %u KHz.\n",
5511 * Allocate the start queue.
5513 np->squeue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
5516 np->squeue_ba = vtobus(np->squeue);
5519 * Allocate the done queue.
5521 np->dqueue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
5524 np->dqueue_ba = vtobus(np->dqueue);
5527 * Allocate the target bus address array.
5529 np->targtbl = sym_calloc_dma(256, "TARGTBL");
5532 np->targtbl_ba = vtobus(np->targtbl);
5535 * Allocate SCRIPTS areas.
5537 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
5538 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
5539 np->scriptz0 = sym_calloc_dma(np->scriptz_sz, "SCRIPTZ0");
5540 if (!np->scripta0 || !np->scriptb0 || !np->scriptz0)
5544 * Allocate the array of lists of CCBs hashed by DSA.
5546 np->ccbh = kcalloc(sizeof(struct sym_ccb **), CCB_HASH_SIZE, GFP_KERNEL);
5551 * Initialyze the CCB free and busy queues.
5553 sym_que_init(&np->free_ccbq);
5554 sym_que_init(&np->busy_ccbq);
5555 sym_que_init(&np->comp_ccbq);
5558 * Initialization for optional handling
5559 * of device queueing.
5561 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5562 sym_que_init(&np->dummy_ccbq);
5565 * Allocate some CCB. We need at least ONE.
5567 if (!sym_alloc_ccb(np))
5571 * Calculate BUS addresses where we are going
5572 * to load the SCRIPTS.
5574 np->scripta_ba = vtobus(np->scripta0);
5575 np->scriptb_ba = vtobus(np->scriptb0);
5576 np->scriptz_ba = vtobus(np->scriptz0);
5579 np->scripta_ba = np->ram_ba;
5580 if (np->features & FE_RAM8K) {
5582 np->scriptb_ba = np->scripta_ba + 4096;
5583 #if 0 /* May get useful for 64 BIT PCI addressing */
5584 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
5592 * Copy scripts to controller instance.
5594 memcpy(np->scripta0, fw->a_base, np->scripta_sz);
5595 memcpy(np->scriptb0, fw->b_base, np->scriptb_sz);
5596 memcpy(np->scriptz0, fw->z_base, np->scriptz_sz);
5599 * Setup variable parts in scripts and compute
5600 * scripts bus addresses used from the C code.
5602 np->fw_setup(np, fw);
5605 * Bind SCRIPTS with physical addresses usable by the
5606 * SCRIPTS processor (as seen from the BUS = BUS addresses).
5608 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
5609 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
5610 sym_fw_bind_script(np, (u32 *) np->scriptz0, np->scriptz_sz);
5612 #ifdef SYM_CONF_IARB_SUPPORT
5614 * If user wants IARB to be set when we win arbitration
5615 * and have other jobs, compute the max number of consecutive
5616 * settings of IARB hints before we leave devices a chance to
5617 * arbitrate for reselection.
5619 #ifdef SYM_SETUP_IARB_MAX
5620 np->iarb_max = SYM_SETUP_IARB_MAX;
5627 * Prepare the idle and invalid task actions.
5629 np->idletask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5630 np->idletask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5631 np->idletask_ba = vtobus(&np->idletask);
5633 np->notask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5634 np->notask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5635 np->notask_ba = vtobus(&np->notask);
5637 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5638 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5639 np->bad_itl_ba = vtobus(&np->bad_itl);
5641 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5642 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA(np,bad_i_t_l_q));
5643 np->bad_itlq_ba = vtobus(&np->bad_itlq);
5646 * Allocate and prepare the lun JUMP table that is used
5647 * for a target prior the probing of devices (bad lun table).
5648 * A private table will be allocated for the target on the
5649 * first INQUIRY response received.
5651 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
5655 np->badlun_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
5656 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
5657 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
5660 * Prepare the bus address array that contains the bus
5661 * address of each target control block.
5662 * For now, assume all logical units are wrong. :)
5664 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
5665 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
5666 np->target[i].head.luntbl_sa =
5667 cpu_to_scr(vtobus(np->badluntbl));
5668 np->target[i].head.lun0_sa =
5669 cpu_to_scr(vtobus(&np->badlun_sa));
5673 * Now check the cache handling of the pci chipset.
5675 if (sym_snooptest (np)) {
5676 printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np));
5681 * Sigh! we are done.
5690 * Free everything that has been allocated for this device.
5692 void sym_hcb_free(struct sym_hcb *np)
5700 sym_mfree_dma(np->scriptz0, np->scriptz_sz, "SCRIPTZ0");
5702 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
5704 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
5706 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
5708 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
5711 while ((qp = sym_remque_head(&np->free_ccbq)) != 0) {
5712 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5713 sym_mfree_dma(cp, sizeof(*cp), "CCB");
5719 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
5721 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
5722 tp = &np->target[target];
5723 #if SYM_CONF_MAX_LUN > 1
5728 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
git://ftp.safe.ca / safe / jmp / linux-2.6 / blob