2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
3 * of PCI-SCSI IO processors.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
6 * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx>
8 * This driver is derived from the Linux sym53c8xx driver.
9 * Copyright (C) 1998-2000 Gerard Roudier
11 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
12 * a port of the FreeBSD ncr driver to Linux-1.2.13.
14 * The original ncr driver has been written for 386bsd and FreeBSD by
15 * Wolfgang Stanglmeier <wolf@cologne.de>
16 * Stefan Esser <se@mi.Uni-Koeln.de>
17 * Copyright (C) 1994 Wolfgang Stanglmeier
19 * Other major contributions:
21 * NVRAM detection and reading.
22 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
24 *-----------------------------------------------------------------------------
26 * This program is free software; you can redistribute it and/or modify
27 * it under the terms of the GNU General Public License as published by
28 * the Free Software Foundation; either version 2 of the License, or
29 * (at your option) any later version.
31 * This program is distributed in the hope that it will be useful,
32 * but WITHOUT ANY WARRANTY; without even the implied warranty of
33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
34 * GNU General Public License for more details.
36 * You should have received a copy of the GNU General Public License
37 * along with this program; if not, write to the Free Software
38 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
41 #include <linux/slab.h>
42 #include <asm/param.h> /* for timeouts in units of HZ */
45 #include "sym_nvram.h"
48 #define SYM_DEBUG_GENERIC_SUPPORT
52 * Needed function prototypes.
54 static void sym_int_ma (struct sym_hcb *np);
55 static void sym_int_sir (struct sym_hcb *np);
56 static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np);
57 static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa);
58 static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln);
59 static void sym_complete_error (struct sym_hcb *np, struct sym_ccb *cp);
60 static void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp);
61 static int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp);
64 * Print a buffer in hexadecimal format with a ".\n" at end.
66 static void sym_printl_hex(u_char *p, int n)
73 static void sym_print_msg(struct sym_ccb *cp, char *label, u_char *msg)
75 sym_print_addr(cp->cmd, "%s: ", label);
81 static void sym_print_nego_msg(struct sym_hcb *np, int target, char *label, u_char *msg)
83 struct sym_tcb *tp = &np->target[target];
84 dev_info(&tp->starget->dev, "%s: ", label);
91 * Print something that tells about extended errors.
93 void sym_print_xerr(struct scsi_cmnd *cmd, int x_status)
95 if (x_status & XE_PARITY_ERR) {
96 sym_print_addr(cmd, "unrecovered SCSI parity error.\n");
98 if (x_status & XE_EXTRA_DATA) {
99 sym_print_addr(cmd, "extraneous data discarded.\n");
101 if (x_status & XE_BAD_PHASE) {
102 sym_print_addr(cmd, "illegal scsi phase (4/5).\n");
104 if (x_status & XE_SODL_UNRUN) {
105 sym_print_addr(cmd, "ODD transfer in DATA OUT phase.\n");
107 if (x_status & XE_SWIDE_OVRUN) {
108 sym_print_addr(cmd, "ODD transfer in DATA IN phase.\n");
113 * Return a string for SCSI BUS mode.
115 static char *sym_scsi_bus_mode(int mode)
118 case SMODE_HVD: return "HVD";
119 case SMODE_SE: return "SE";
120 case SMODE_LVD: return "LVD";
126 * Soft reset the chip.
128 * Raising SRST when the chip is running may cause
129 * problems on dual function chips (see below).
130 * On the other hand, LVD devices need some delay
131 * to settle and report actual BUS mode in STEST4.
133 static void sym_chip_reset (struct sym_hcb *np)
135 OUTB(np, nc_istat, SRST);
138 OUTB(np, nc_istat, 0);
140 udelay(2000); /* For BUS MODE to settle */
144 * Really soft reset the chip.:)
146 * Some 896 and 876 chip revisions may hang-up if we set
147 * the SRST (soft reset) bit at the wrong time when SCRIPTS
149 * So, we need to abort the current operation prior to
150 * soft resetting the chip.
152 static void sym_soft_reset (struct sym_hcb *np)
157 if (!(np->features & FE_ISTAT1) || !(INB(np, nc_istat1) & SCRUN))
160 OUTB(np, nc_istat, CABRT);
161 for (i = 100000 ; i ; --i) {
162 istat = INB(np, nc_istat);
166 else if (istat & DIP) {
167 if (INB(np, nc_dstat) & ABRT)
172 OUTB(np, nc_istat, 0);
174 printf("%s: unable to abort current chip operation, "
175 "ISTAT=0x%02x.\n", sym_name(np), istat);
181 * Start reset process.
183 * The interrupt handler will reinitialize the chip.
185 static void sym_start_reset(struct sym_hcb *np)
187 sym_reset_scsi_bus(np, 1);
190 int sym_reset_scsi_bus(struct sym_hcb *np, int enab_int)
195 sym_soft_reset(np); /* Soft reset the chip */
197 OUTW(np, nc_sien, RST);
199 * Enable Tolerant, reset IRQD if present and
200 * properly set IRQ mode, prior to resetting the bus.
202 OUTB(np, nc_stest3, TE);
203 OUTB(np, nc_dcntl, (np->rv_dcntl & IRQM));
204 OUTB(np, nc_scntl1, CRST);
208 if (!SYM_SETUP_SCSI_BUS_CHECK)
211 * Check for no terminators or SCSI bus shorts to ground.
212 * Read SCSI data bus, data parity bits and control signals.
213 * We are expecting RESET to be TRUE and other signals to be
216 term = INB(np, nc_sstat0);
217 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
218 term |= ((INB(np, nc_sstat2) & 0x01) << 26) | /* sdp1 */
219 ((INW(np, nc_sbdl) & 0xff) << 9) | /* d7-0 */
220 ((INW(np, nc_sbdl) & 0xff00) << 10) | /* d15-8 */
221 INB(np, nc_sbcl); /* req ack bsy sel atn msg cd io */
226 if (term != (2<<7)) {
227 printf("%s: suspicious SCSI data while resetting the BUS.\n",
229 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
230 "0x%lx, expecting 0x%lx\n",
232 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
233 (u_long)term, (u_long)(2<<7));
234 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
238 OUTB(np, nc_scntl1, 0);
243 * Select SCSI clock frequency
245 static void sym_selectclock(struct sym_hcb *np, u_char scntl3)
248 * If multiplier not present or not selected, leave here.
250 if (np->multiplier <= 1) {
251 OUTB(np, nc_scntl3, scntl3);
255 if (sym_verbose >= 2)
256 printf ("%s: enabling clock multiplier\n", sym_name(np));
258 OUTB(np, nc_stest1, DBLEN); /* Enable clock multiplier */
260 * Wait for the LCKFRQ bit to be set if supported by the chip.
261 * Otherwise wait 50 micro-seconds (at least).
263 if (np->features & FE_LCKFRQ) {
265 while (!(INB(np, nc_stest4) & LCKFRQ) && --i > 0)
268 printf("%s: the chip cannot lock the frequency\n",
274 OUTB(np, nc_stest3, HSC); /* Halt the scsi clock */
275 OUTB(np, nc_scntl3, scntl3);
276 OUTB(np, nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
277 OUTB(np, nc_stest3, 0x00); /* Restart scsi clock */
282 * Determine the chip's clock frequency.
284 * This is essential for the negotiation of the synchronous
287 * Note: we have to return the correct value.
288 * THERE IS NO SAFE DEFAULT VALUE.
290 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
291 * 53C860 and 53C875 rev. 1 support fast20 transfers but
292 * do not have a clock doubler and so are provided with a
293 * 80 MHz clock. All other fast20 boards incorporate a doubler
294 * and so should be delivered with a 40 MHz clock.
295 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
296 * clock and provide a clock quadrupler (160 Mhz).
300 * calculate SCSI clock frequency (in KHz)
302 static unsigned getfreq (struct sym_hcb *np, int gen)
308 * Measure GEN timer delay in order
309 * to calculate SCSI clock frequency
311 * This code will never execute too
312 * many loop iterations (if DELAY is
313 * reasonably correct). It could get
314 * too low a delay (too high a freq.)
315 * if the CPU is slow executing the
316 * loop for some reason (an NMI, for
317 * example). For this reason we will
318 * if multiple measurements are to be
319 * performed trust the higher delay
320 * (lower frequency returned).
322 OUTW(np, nc_sien, 0); /* mask all scsi interrupts */
323 INW(np, nc_sist); /* clear pending scsi interrupt */
324 OUTB(np, nc_dien, 0); /* mask all dma interrupts */
325 INW(np, nc_sist); /* another one, just to be sure :) */
327 * The C1010-33 core does not report GEN in SIST,
328 * if this interrupt is masked in SIEN.
329 * I don't know yet if the C1010-66 behaves the same way.
331 if (np->features & FE_C10) {
332 OUTW(np, nc_sien, GEN);
333 OUTB(np, nc_istat1, SIRQD);
335 OUTB(np, nc_scntl3, 4); /* set pre-scaler to divide by 3 */
336 OUTB(np, nc_stime1, 0); /* disable general purpose timer */
337 OUTB(np, nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
338 while (!(INW(np, nc_sist) & GEN) && ms++ < 100000)
339 udelay(1000/4); /* count in 1/4 of ms */
340 OUTB(np, nc_stime1, 0); /* disable general purpose timer */
342 * Undo C1010-33 specific settings.
344 if (np->features & FE_C10) {
345 OUTW(np, nc_sien, 0);
346 OUTB(np, nc_istat1, 0);
349 * set prescaler to divide by whatever 0 means
350 * 0 ought to choose divide by 2, but appears
351 * to set divide by 3.5 mode in my 53c810 ...
353 OUTB(np, nc_scntl3, 0);
356 * adjust for prescaler, and convert into KHz
358 f = ms ? ((1 << gen) * (4340*4)) / ms : 0;
361 * The C1010-33 result is biased by a factor
362 * of 2/3 compared to earlier chips.
364 if (np->features & FE_C10)
367 if (sym_verbose >= 2)
368 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
369 sym_name(np), gen, ms/4, f);
374 static unsigned sym_getfreq (struct sym_hcb *np)
379 getfreq (np, gen); /* throw away first result */
380 f1 = getfreq (np, gen);
381 f2 = getfreq (np, gen);
382 if (f1 > f2) f1 = f2; /* trust lower result */
387 * Get/probe chip SCSI clock frequency
389 static void sym_getclock (struct sym_hcb *np, int mult)
391 unsigned char scntl3 = np->sv_scntl3;
392 unsigned char stest1 = np->sv_stest1;
398 * True with 875/895/896/895A with clock multiplier selected
400 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
401 if (sym_verbose >= 2)
402 printf ("%s: clock multiplier found\n", sym_name(np));
403 np->multiplier = mult;
407 * If multiplier not found or scntl3 not 7,5,3,
408 * reset chip and get frequency from general purpose timer.
409 * Otherwise trust scntl3 BIOS setting.
411 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
412 OUTB(np, nc_stest1, 0); /* make sure doubler is OFF */
413 f1 = sym_getfreq (np);
416 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
418 if (f1 < 45000) f1 = 40000;
419 else if (f1 < 55000) f1 = 50000;
422 if (f1 < 80000 && mult > 1) {
423 if (sym_verbose >= 2)
424 printf ("%s: clock multiplier assumed\n",
426 np->multiplier = mult;
429 if ((scntl3 & 7) == 3) f1 = 40000;
430 else if ((scntl3 & 7) == 5) f1 = 80000;
433 f1 /= np->multiplier;
437 * Compute controller synchronous parameters.
439 f1 *= np->multiplier;
444 * Get/probe PCI clock frequency
446 static int sym_getpciclock (struct sym_hcb *np)
451 * For now, we only need to know about the actual
452 * PCI BUS clock frequency for C1010-66 chips.
455 if (np->features & FE_66MHZ) {
459 OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
461 OUTB(np, nc_stest1, 0);
469 * SYMBIOS chip clock divisor table.
471 * Divisors are multiplied by 10,000,000 in order to make
472 * calculations more simple.
475 static u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
478 * Get clock factor and sync divisor for a given
479 * synchronous factor period.
482 sym_getsync(struct sym_hcb *np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
484 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
485 int div = np->clock_divn; /* Number of divisors supported */
486 u32 fak; /* Sync factor in sxfer */
487 u32 per; /* Period in tenths of ns */
488 u32 kpc; /* (per * clk) */
492 * Compute the synchronous period in tenths of nano-seconds
494 if (dt && sfac <= 9) per = 125;
495 else if (sfac <= 10) per = 250;
496 else if (sfac == 11) per = 303;
497 else if (sfac == 12) per = 500;
498 else per = 40 * sfac;
506 * For earliest C10 revision 0, we cannot use extra
507 * clocks for the setting of the SCSI clocking.
508 * Note that this limits the lowest sync data transfer
509 * to 5 Mega-transfers per second and may result in
510 * using higher clock divisors.
513 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
515 * Look for the lowest clock divisor that allows an
516 * output speed not faster than the period.
520 if (kpc > (div_10M[div] << 2)) {
525 fak = 0; /* No extra clocks */
526 if (div == np->clock_divn) { /* Are we too fast ? */
536 * Look for the greatest clock divisor that allows an
537 * input speed faster than the period.
540 if (kpc >= (div_10M[div] << 2)) break;
543 * Calculate the lowest clock factor that allows an output
544 * speed not faster than the period, and the max output speed.
545 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
546 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
549 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
550 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
552 fak = (kpc - 1) / div_10M[div] + 1 - 4;
553 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
557 * Check against our hardware limits, or bugs :).
565 * Compute and return sync parameters.
574 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
575 * 128 transfers. All chips support at least 16 transfers
576 * bursts. The 825A, 875 and 895 chips support bursts of up
577 * to 128 transfers and the 895A and 896 support bursts of up
578 * to 64 transfers. All other chips support up to 16
581 * For PCI 32 bit data transfers each transfer is a DWORD.
582 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
584 * We use log base 2 (burst length) as internal code, with
585 * value 0 meaning "burst disabled".
589 * Burst length from burst code.
591 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
594 * Burst code from io register bits.
596 #define burst_code(dmode, ctest4, ctest5) \
597 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
600 * Set initial io register bits from burst code.
602 static __inline void sym_init_burst(struct sym_hcb *np, u_char bc)
604 np->rv_ctest4 &= ~0x80;
605 np->rv_dmode &= ~(0x3 << 6);
606 np->rv_ctest5 &= ~0x4;
609 np->rv_ctest4 |= 0x80;
613 np->rv_dmode |= ((bc & 0x3) << 6);
614 np->rv_ctest5 |= (bc & 0x4);
619 * Save initial settings of some IO registers.
620 * Assumed to have been set by BIOS.
621 * We cannot reset the chip prior to reading the
622 * IO registers, since informations will be lost.
623 * Since the SCRIPTS processor may be running, this
624 * is not safe on paper, but it seems to work quite
627 static void sym_save_initial_setting (struct sym_hcb *np)
629 np->sv_scntl0 = INB(np, nc_scntl0) & 0x0a;
630 np->sv_scntl3 = INB(np, nc_scntl3) & 0x07;
631 np->sv_dmode = INB(np, nc_dmode) & 0xce;
632 np->sv_dcntl = INB(np, nc_dcntl) & 0xa8;
633 np->sv_ctest3 = INB(np, nc_ctest3) & 0x01;
634 np->sv_ctest4 = INB(np, nc_ctest4) & 0x80;
635 np->sv_gpcntl = INB(np, nc_gpcntl);
636 np->sv_stest1 = INB(np, nc_stest1);
637 np->sv_stest2 = INB(np, nc_stest2) & 0x20;
638 np->sv_stest4 = INB(np, nc_stest4);
639 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
640 np->sv_scntl4 = INB(np, nc_scntl4);
641 np->sv_ctest5 = INB(np, nc_ctest5) & 0x04;
644 np->sv_ctest5 = INB(np, nc_ctest5) & 0x24;
648 * Prepare io register values used by sym_start_up()
649 * according to selected and supported features.
651 static int sym_prepare_setting(struct Scsi_Host *shost, struct sym_hcb *np, struct sym_nvram *nvram)
660 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
663 * Guess the frequency of the chip's clock.
665 if (np->features & (FE_ULTRA3 | FE_ULTRA2))
666 np->clock_khz = 160000;
667 else if (np->features & FE_ULTRA)
668 np->clock_khz = 80000;
670 np->clock_khz = 40000;
673 * Get the clock multiplier factor.
675 if (np->features & FE_QUAD)
677 else if (np->features & FE_DBLR)
683 * Measure SCSI clock frequency for chips
684 * it may vary from assumed one.
686 if (np->features & FE_VARCLK)
687 sym_getclock(np, np->multiplier);
690 * Divisor to be used for async (timer pre-scaler).
692 i = np->clock_divn - 1;
694 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
702 * The C1010 uses hardwired divisors for async.
703 * So, we just throw away, the async. divisor.:-)
705 if (np->features & FE_C10)
709 * Minimum synchronous period factor supported by the chip.
710 * Btw, 'period' is in tenths of nanoseconds.
712 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
714 if (period <= 250) np->minsync = 10;
715 else if (period <= 303) np->minsync = 11;
716 else if (period <= 500) np->minsync = 12;
717 else np->minsync = (period + 40 - 1) / 40;
720 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
722 if (np->minsync < 25 &&
723 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
725 else if (np->minsync < 12 &&
726 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
730 * Maximum synchronous period factor supported by the chip.
732 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
733 np->maxsync = period > 2540 ? 254 : period / 10;
736 * If chip is a C1010, guess the sync limits in DT mode.
738 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
739 if (np->clock_khz == 160000) {
742 np->maxoffs_dt = nvram->type ? 62 : 31;
747 * 64 bit addressing (895A/896/1010) ?
749 if (np->features & FE_DAC) {
750 #if SYM_CONF_DMA_ADDRESSING_MODE == 0
751 np->rv_ccntl1 |= (DDAC);
752 #elif SYM_CONF_DMA_ADDRESSING_MODE == 1
754 np->rv_ccntl1 |= (DDAC);
756 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
757 #elif SYM_CONF_DMA_ADDRESSING_MODE == 2
759 np->rv_ccntl1 |= (DDAC);
761 np->rv_ccntl1 |= (0 | EXTIBMV);
766 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
768 if (np->features & FE_NOPM)
769 np->rv_ccntl0 |= (ENPMJ);
772 * C1010-33 Errata: Part Number:609-039638 (rev. 1) is fixed.
773 * In dual channel mode, contention occurs if internal cycles
774 * are used. Disable internal cycles.
776 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_33 &&
777 np->revision_id < 0x1)
778 np->rv_ccntl0 |= DILS;
781 * Select burst length (dwords)
783 burst_max = SYM_SETUP_BURST_ORDER;
784 if (burst_max == 255)
785 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
789 if (burst_max > np->maxburst)
790 burst_max = np->maxburst;
793 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
794 * This chip and the 860 Rev 1 may wrongly use PCI cache line
795 * based transactions on LOAD/STORE instructions. So we have
796 * to prevent these chips from using such PCI transactions in
797 * this driver. The generic ncr driver that does not use
798 * LOAD/STORE instructions does not need this work-around.
800 if ((np->device_id == PCI_DEVICE_ID_NCR_53C810 &&
801 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
802 (np->device_id == PCI_DEVICE_ID_NCR_53C860 &&
803 np->revision_id <= 0x1))
804 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
807 * Select all supported special features.
808 * If we are using on-board RAM for scripts, prefetch (PFEN)
809 * does not help, but burst op fetch (BOF) does.
810 * Disabling PFEN makes sure BOF will be used.
812 if (np->features & FE_ERL)
813 np->rv_dmode |= ERL; /* Enable Read Line */
814 if (np->features & FE_BOF)
815 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
816 if (np->features & FE_ERMP)
817 np->rv_dmode |= ERMP; /* Enable Read Multiple */
819 if ((np->features & FE_PFEN) && !np->ram_ba)
821 if (np->features & FE_PFEN)
823 np->rv_dcntl |= PFEN; /* Prefetch Enable */
824 if (np->features & FE_CLSE)
825 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
826 if (np->features & FE_WRIE)
827 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
828 if (np->features & FE_DFS)
829 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
834 np->rv_ctest4 |= MPEE; /* Master parity checking */
835 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
838 * Get parity checking, host ID and verbose mode from NVRAM
841 sym_nvram_setup_host(shost, np, nvram);
844 * Get SCSI addr of host adapter (set by bios?).
846 if (np->myaddr == 255) {
847 np->myaddr = INB(np, nc_scid) & 0x07;
849 np->myaddr = SYM_SETUP_HOST_ID;
853 * Prepare initial io register bits for burst length
855 sym_init_burst(np, burst_max);
859 * - LVD capable chips (895/895A/896/1010) report the
860 * current BUS mode through the STEST4 IO register.
861 * - For previous generation chips (825/825A/875),
862 * user has to tell us how to check against HVD,
863 * since a 100% safe algorithm is not possible.
865 np->scsi_mode = SMODE_SE;
866 if (np->features & (FE_ULTRA2|FE_ULTRA3))
867 np->scsi_mode = (np->sv_stest4 & SMODE);
868 else if (np->features & FE_DIFF) {
869 if (SYM_SETUP_SCSI_DIFF == 1) {
871 if (np->sv_stest2 & 0x20)
872 np->scsi_mode = SMODE_HVD;
874 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
875 if (!(INB(np, nc_gpreg) & 0x08))
876 np->scsi_mode = SMODE_HVD;
879 else if (SYM_SETUP_SCSI_DIFF == 2)
880 np->scsi_mode = SMODE_HVD;
882 if (np->scsi_mode == SMODE_HVD)
883 np->rv_stest2 |= 0x20;
886 * Set LED support from SCRIPTS.
887 * Ignore this feature for boards known to use a
888 * specific GPIO wiring and for the 895A, 896
889 * and 1010 that drive the LED directly.
891 if ((SYM_SETUP_SCSI_LED ||
892 (nvram->type == SYM_SYMBIOS_NVRAM ||
893 (nvram->type == SYM_TEKRAM_NVRAM &&
894 np->device_id == PCI_DEVICE_ID_NCR_53C895))) &&
895 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
896 np->features |= FE_LED0;
901 switch(SYM_SETUP_IRQ_MODE & 3) {
903 np->rv_dcntl |= IRQM;
906 np->rv_dcntl |= (np->sv_dcntl & IRQM);
913 * Configure targets according to driver setup.
914 * If NVRAM present get targets setup from NVRAM.
916 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
917 struct sym_tcb *tp = &np->target[i];
919 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
920 tp->usrtags = SYM_SETUP_MAX_TAG;
922 sym_nvram_setup_target(tp, i, nvram);
925 tp->usrflags &= ~SYM_TAGS_ENABLED;
929 * Let user know about the settings.
931 printf("%s: %s, ID %d, Fast-%d, %s, %s\n", sym_name(np),
932 sym_nvram_type(nvram), np->myaddr,
933 (np->features & FE_ULTRA3) ? 80 :
934 (np->features & FE_ULTRA2) ? 40 :
935 (np->features & FE_ULTRA) ? 20 : 10,
936 sym_scsi_bus_mode(np->scsi_mode),
937 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
939 * Tell him more on demand.
942 printf("%s: %s IRQ line driver%s\n",
944 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
945 np->ram_ba ? ", using on-chip SRAM" : "");
946 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
947 if (np->features & FE_NOPM)
948 printf("%s: handling phase mismatch from SCRIPTS.\n",
954 if (sym_verbose >= 2) {
955 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
956 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
957 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
958 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
960 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
961 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
962 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
963 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
970 * Test the pci bus snoop logic :-(
972 * Has to be called with interrupts disabled.
974 #ifndef CONFIG_SCSI_SYM53C8XX_IOMAPPED
975 static int sym_regtest (struct sym_hcb *np)
977 register volatile u32 data;
979 * chip registers may NOT be cached.
980 * write 0xffffffff to a read only register area,
981 * and try to read it back.
984 OUTL(np, nc_dstat, data);
985 data = INL(np, nc_dstat);
987 if (data == 0xffffffff) {
989 if ((data & 0xe2f0fffd) != 0x02000080) {
991 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
999 static int sym_snooptest (struct sym_hcb *np)
1001 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
1003 #ifndef CONFIG_SCSI_SYM53C8XX_IOMAPPED
1004 err |= sym_regtest (np);
1005 if (err) return (err);
1009 * Enable Master Parity Checking as we intend
1010 * to enable it for normal operations.
1012 OUTB(np, nc_ctest4, (np->rv_ctest4 & MPEE));
1016 pc = SCRIPTZ_BA(np, snooptest);
1020 * Set memory and register.
1022 np->scratch = cpu_to_scr(host_wr);
1023 OUTL(np, nc_temp, sym_wr);
1025 * Start script (exchange values)
1027 OUTL(np, nc_dsa, np->hcb_ba);
1030 * Wait 'til done (with timeout)
1032 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
1033 if (INB(np, nc_istat) & (INTF|SIP|DIP))
1035 if (i>=SYM_SNOOP_TIMEOUT) {
1036 printf ("CACHE TEST FAILED: timeout.\n");
1040 * Check for fatal DMA errors.
1042 dstat = INB(np, nc_dstat);
1043 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
1044 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
1045 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
1046 "DISABLING MASTER DATA PARITY CHECKING.\n",
1048 np->rv_ctest4 &= ~MPEE;
1052 if (dstat & (MDPE|BF|IID)) {
1053 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
1057 * Save termination position.
1059 pc = INL(np, nc_dsp);
1061 * Read memory and register.
1063 host_rd = scr_to_cpu(np->scratch);
1064 sym_rd = INL(np, nc_scratcha);
1065 sym_bk = INL(np, nc_temp);
1067 * Check termination position.
1069 if (pc != SCRIPTZ_BA(np, snoopend)+8) {
1070 printf ("CACHE TEST FAILED: script execution failed.\n");
1071 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
1072 (u_long) SCRIPTZ_BA(np, snooptest), (u_long) pc,
1073 (u_long) SCRIPTZ_BA(np, snoopend) +8);
1079 if (host_wr != sym_rd) {
1080 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
1081 (int) host_wr, (int) sym_rd);
1084 if (host_rd != sym_wr) {
1085 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
1086 (int) sym_wr, (int) host_rd);
1089 if (sym_bk != sym_wr) {
1090 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
1091 (int) sym_wr, (int) sym_bk);
1099 * log message for real hard errors
1101 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sx/s3/s4) @ name (dsp:dbc).
1102 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
1104 * exception register:
1109 * so: control lines as driven by chip.
1110 * si: control lines as seen by chip.
1111 * sd: scsi data lines as seen by chip.
1114 * sx: sxfer (see the manual)
1115 * s3: scntl3 (see the manual)
1116 * s4: scntl4 (see the manual)
1118 * current script command:
1119 * dsp: script address (relative to start of script).
1120 * dbc: first word of script command.
1122 * First 24 register of the chip:
1125 static void sym_log_hard_error(struct sym_hcb *np, u_short sist, u_char dstat)
1131 u_char *script_base;
1134 dsp = INL(np, nc_dsp);
1136 if (dsp > np->scripta_ba &&
1137 dsp <= np->scripta_ba + np->scripta_sz) {
1138 script_ofs = dsp - np->scripta_ba;
1139 script_size = np->scripta_sz;
1140 script_base = (u_char *) np->scripta0;
1141 script_name = "scripta";
1143 else if (np->scriptb_ba < dsp &&
1144 dsp <= np->scriptb_ba + np->scriptb_sz) {
1145 script_ofs = dsp - np->scriptb_ba;
1146 script_size = np->scriptb_sz;
1147 script_base = (u_char *) np->scriptb0;
1148 script_name = "scriptb";
1153 script_name = "mem";
1156 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x/%x) @ (%s %x:%08x).\n",
1157 sym_name(np), (unsigned)INB(np, nc_sdid)&0x0f, dstat, sist,
1158 (unsigned)INB(np, nc_socl), (unsigned)INB(np, nc_sbcl),
1159 (unsigned)INB(np, nc_sbdl), (unsigned)INB(np, nc_sxfer),
1160 (unsigned)INB(np, nc_scntl3),
1161 (np->features & FE_C10) ? (unsigned)INB(np, nc_scntl4) : 0,
1162 script_name, script_ofs, (unsigned)INL(np, nc_dbc));
1164 if (((script_ofs & 3) == 0) &&
1165 (unsigned)script_ofs < script_size) {
1166 printf ("%s: script cmd = %08x\n", sym_name(np),
1167 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
1170 printf ("%s: regdump:", sym_name(np));
1172 printf (" %02x", (unsigned)INB_OFF(np, i));
1178 if (dstat & (MDPE|BF))
1179 sym_log_bus_error(np);
1182 static struct sym_chip sym_dev_table[] = {
1183 {PCI_DEVICE_ID_NCR_53C810, 0x0f, "810", 4, 8, 4, 64,
1186 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1187 {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
1191 {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
1192 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
1195 {PCI_DEVICE_ID_NCR_53C815, 0xff, "815", 4, 8, 4, 64,
1198 {PCI_DEVICE_ID_NCR_53C825, 0x0f, "825", 6, 8, 4, 64,
1199 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
1201 {PCI_DEVICE_ID_NCR_53C825, 0xff, "825a", 6, 8, 4, 2,
1202 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
1204 {PCI_DEVICE_ID_NCR_53C860, 0xff, "860", 4, 8, 5, 1,
1205 FE_ULTRA|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
1207 {PCI_DEVICE_ID_NCR_53C875, 0x01, "875", 6, 16, 5, 2,
1208 FE_WIDE|FE_ULTRA|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1209 FE_RAM|FE_DIFF|FE_VARCLK}
1211 {PCI_DEVICE_ID_NCR_53C875, 0xff, "875", 6, 16, 5, 2,
1212 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1213 FE_RAM|FE_DIFF|FE_VARCLK}
1215 {PCI_DEVICE_ID_NCR_53C875J, 0xff, "875J", 6, 16, 5, 2,
1216 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1217 FE_RAM|FE_DIFF|FE_VARCLK}
1219 {PCI_DEVICE_ID_NCR_53C885, 0xff, "885", 6, 16, 5, 2,
1220 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1221 FE_RAM|FE_DIFF|FE_VARCLK}
1223 #ifdef SYM_DEBUG_GENERIC_SUPPORT
1224 {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
1225 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
1229 {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
1230 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1234 {PCI_DEVICE_ID_NCR_53C896, 0xff, "896", 6, 31, 7, 4,
1235 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1236 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1238 {PCI_DEVICE_ID_LSI_53C895A, 0xff, "895a", 6, 31, 7, 4,
1239 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1240 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1242 {PCI_DEVICE_ID_LSI_53C875A, 0xff, "875a", 6, 31, 7, 4,
1243 FE_WIDE|FE_ULTRA|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1244 FE_RAM|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
1246 {PCI_DEVICE_ID_LSI_53C1010_33, 0x00, "1010-33", 6, 31, 7, 8,
1247 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1248 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
1251 {PCI_DEVICE_ID_LSI_53C1010_33, 0xff, "1010-33", 6, 31, 7, 8,
1252 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1253 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
1256 {PCI_DEVICE_ID_LSI_53C1010_66, 0xff, "1010-66", 6, 31, 7, 8,
1257 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
1258 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
1261 {PCI_DEVICE_ID_LSI_53C1510, 0xff, "1510d", 6, 31, 7, 4,
1262 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
1263 FE_RAM|FE_IO256|FE_LEDC}
1266 #define sym_num_devs \
1267 (sizeof(sym_dev_table) / sizeof(sym_dev_table[0]))
1270 * Look up the chip table.
1272 * Return a pointer to the chip entry if found,
1276 sym_lookup_chip_table (u_short device_id, u_char revision)
1278 struct sym_chip *chip;
1281 for (i = 0; i < sym_num_devs; i++) {
1282 chip = &sym_dev_table[i];
1283 if (device_id != chip->device_id)
1285 if (revision > chip->revision_id)
1293 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1295 * Lookup the 64 bit DMA segments map.
1296 * This is only used if the direct mapping
1297 * has been unsuccessful.
1299 int sym_lookup_dmap(struct sym_hcb *np, u32 h, int s)
1306 /* Look up existing mappings */
1307 for (i = SYM_DMAP_SIZE-1; i > 0; i--) {
1308 if (h == np->dmap_bah[i])
1311 /* If direct mapping is free, get it */
1312 if (!np->dmap_bah[s])
1314 /* Collision -> lookup free mappings */
1315 for (s = SYM_DMAP_SIZE-1; s > 0; s--) {
1316 if (!np->dmap_bah[s])
1320 panic("sym: ran out of 64 bit DMA segment registers");
1323 np->dmap_bah[s] = h;
1329 * Update IO registers scratch C..R so they will be
1330 * in sync. with queued CCB expectations.
1332 static void sym_update_dmap_regs(struct sym_hcb *np)
1336 if (!np->dmap_dirty)
1338 o = offsetof(struct sym_reg, nc_scrx[0]);
1339 for (i = 0; i < SYM_DMAP_SIZE; i++) {
1340 OUTL_OFF(np, o, np->dmap_bah[i]);
1347 /* Enforce all the fiddly SPI rules and the chip limitations */
1348 static void sym_check_goals(struct sym_hcb *np, struct scsi_target *starget,
1349 struct sym_trans *goal)
1351 if (!spi_support_wide(starget))
1354 if (!spi_support_sync(starget)) {
1362 if (spi_support_dt(starget)) {
1363 if (spi_support_dt_only(starget))
1366 if (goal->offset == 0)
1372 /* Some targets fail to properly negotiate DT in SE mode */
1373 if ((np->scsi_mode != SMODE_LVD) || !(np->features & FE_U3EN))
1377 /* all DT transfers must be wide */
1379 if (goal->offset > np->maxoffs_dt)
1380 goal->offset = np->maxoffs_dt;
1381 if (goal->period < np->minsync_dt)
1382 goal->period = np->minsync_dt;
1383 if (goal->period > np->maxsync_dt)
1384 goal->period = np->maxsync_dt;
1386 goal->iu = goal->qas = 0;
1387 if (goal->offset > np->maxoffs)
1388 goal->offset = np->maxoffs;
1389 if (goal->period < np->minsync)
1390 goal->period = np->minsync;
1391 if (goal->period > np->maxsync)
1392 goal->period = np->maxsync;
1397 * Prepare the next negotiation message if needed.
1399 * Fill in the part of message buffer that contains the
1400 * negotiation and the nego_status field of the CCB.
1401 * Returns the size of the message in bytes.
1403 static int sym_prepare_nego(struct sym_hcb *np, struct sym_ccb *cp, u_char *msgptr)
1405 struct sym_tcb *tp = &np->target[cp->target];
1406 struct scsi_target *starget = tp->starget;
1407 struct sym_trans *goal = &tp->tgoal;
1411 sym_check_goals(np, starget, goal);
1414 * Many devices implement PPR in a buggy way, so only use it if we
1418 (goal->iu || goal->dt || goal->qas || (goal->period < 0xa))) {
1420 } else if (spi_width(starget) != goal->width) {
1422 } else if (spi_period(starget) != goal->period ||
1423 spi_offset(starget) != goal->offset) {
1426 goal->check_nego = 0;
1432 msglen += spi_populate_sync_msg(msgptr + msglen, goal->period,
1436 msglen += spi_populate_width_msg(msgptr + msglen, goal->width);
1439 msglen += spi_populate_ppr_msg(msgptr + msglen, goal->period,
1440 goal->offset, goal->width,
1441 (goal->iu ? PPR_OPT_IU : 0) |
1442 (goal->dt ? PPR_OPT_DT : 0) |
1443 (goal->qas ? PPR_OPT_QAS : 0));
1447 cp->nego_status = nego;
1450 tp->nego_cp = cp; /* Keep track a nego will be performed */
1451 if (DEBUG_FLAGS & DEBUG_NEGO) {
1452 sym_print_nego_msg(np, cp->target,
1453 nego == NS_SYNC ? "sync msgout" :
1454 nego == NS_WIDE ? "wide msgout" :
1455 "ppr msgout", msgptr);
1463 * Insert a job into the start queue.
1465 static void sym_put_start_queue(struct sym_hcb *np, struct sym_ccb *cp)
1469 #ifdef SYM_CONF_IARB_SUPPORT
1471 * If the previously queued CCB is not yet done,
1472 * set the IARB hint. The SCRIPTS will go with IARB
1473 * for this job when starting the previous one.
1474 * We leave devices a chance to win arbitration by
1475 * not using more than 'iarb_max' consecutive
1476 * immediate arbitrations.
1478 if (np->last_cp && np->iarb_count < np->iarb_max) {
1479 np->last_cp->host_flags |= HF_HINT_IARB;
1487 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1489 * Make SCRIPTS aware of the 64 bit DMA
1490 * segment registers not being up-to-date.
1493 cp->host_xflags |= HX_DMAP_DIRTY;
1497 * Insert first the idle task and then our job.
1498 * The MBs should ensure proper ordering.
1500 qidx = np->squeueput + 2;
1501 if (qidx >= MAX_QUEUE*2) qidx = 0;
1503 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
1504 MEMORY_WRITE_BARRIER();
1505 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
1507 np->squeueput = qidx;
1509 if (DEBUG_FLAGS & DEBUG_QUEUE)
1510 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
1513 * Script processor may be waiting for reselect.
1516 MEMORY_WRITE_BARRIER();
1517 OUTB(np, nc_istat, SIGP|np->istat_sem);
1520 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1522 * Start next ready-to-start CCBs.
1524 void sym_start_next_ccbs(struct sym_hcb *np, struct sym_lcb *lp, int maxn)
1530 * Paranoia, as usual. :-)
1532 assert(!lp->started_tags || !lp->started_no_tag);
1535 * Try to start as many commands as asked by caller.
1536 * Prevent from having both tagged and untagged
1537 * commands queued to the device at the same time.
1540 qp = sym_remque_head(&lp->waiting_ccbq);
1543 cp = sym_que_entry(qp, struct sym_ccb, link2_ccbq);
1544 if (cp->tag != NO_TAG) {
1545 if (lp->started_no_tag ||
1546 lp->started_tags >= lp->started_max) {
1547 sym_insque_head(qp, &lp->waiting_ccbq);
1550 lp->itlq_tbl[cp->tag] = cpu_to_scr(cp->ccb_ba);
1552 cpu_to_scr(SCRIPTA_BA(np, resel_tag));
1555 if (lp->started_no_tag || lp->started_tags) {
1556 sym_insque_head(qp, &lp->waiting_ccbq);
1559 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
1561 cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
1562 ++lp->started_no_tag;
1565 sym_insque_tail(qp, &lp->started_ccbq);
1566 sym_put_start_queue(np, cp);
1569 #endif /* SYM_OPT_HANDLE_DEVICE_QUEUEING */
1572 * The chip may have completed jobs. Look at the DONE QUEUE.
1574 * On paper, memory read barriers may be needed here to
1575 * prevent out of order LOADs by the CPU from having
1576 * prefetched stale data prior to DMA having occurred.
1578 static int sym_wakeup_done (struct sym_hcb *np)
1587 /* MEMORY_READ_BARRIER(); */
1589 dsa = scr_to_cpu(np->dqueue[i]);
1593 if ((i = i+2) >= MAX_QUEUE*2)
1596 cp = sym_ccb_from_dsa(np, dsa);
1598 MEMORY_READ_BARRIER();
1599 sym_complete_ok (np, cp);
1603 printf ("%s: bad DSA (%x) in done queue.\n",
1604 sym_name(np), (u_int) dsa);
1612 * Complete all CCBs queued to the COMP queue.
1614 * These CCBs are assumed:
1615 * - Not to be referenced either by devices or
1616 * SCRIPTS-related queues and datas.
1617 * - To have to be completed with an error condition
1620 * The device queue freeze count is incremented
1621 * for each CCB that does not prevent this.
1622 * This function is called when all CCBs involved
1623 * in error handling/recovery have been reaped.
1625 static void sym_flush_comp_queue(struct sym_hcb *np, int cam_status)
1630 while ((qp = sym_remque_head(&np->comp_ccbq)) != 0) {
1631 struct scsi_cmnd *cmd;
1632 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
1633 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
1634 /* Leave quiet CCBs waiting for resources */
1635 if (cp->host_status == HS_WAIT)
1639 sym_set_cam_status(cmd, cam_status);
1640 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
1641 if (sym_get_cam_status(cmd) == DID_SOFT_ERROR) {
1642 struct sym_tcb *tp = &np->target[cp->target];
1643 struct sym_lcb *lp = sym_lp(tp, cp->lun);
1645 sym_remque(&cp->link2_ccbq);
1646 sym_insque_tail(&cp->link2_ccbq,
1649 if (cp->tag != NO_TAG)
1652 --lp->started_no_tag;
1659 sym_free_ccb(np, cp);
1660 sym_xpt_done(np, cmd);
1665 * Complete all active CCBs with error.
1666 * Used on CHIP/SCSI RESET.
1668 static void sym_flush_busy_queue (struct sym_hcb *np, int cam_status)
1671 * Move all active CCBs to the COMP queue
1672 * and flush this queue.
1674 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
1675 sym_que_init(&np->busy_ccbq);
1676 sym_flush_comp_queue(np, cam_status);
1683 * 0: initialisation.
1684 * 1: SCSI BUS RESET delivered or received.
1685 * 2: SCSI BUS MODE changed.
1687 void sym_start_up (struct sym_hcb *np, int reason)
1693 * Reset chip if asked, otherwise just clear fifos.
1698 OUTB(np, nc_stest3, TE|CSF);
1699 OUTONB(np, nc_ctest3, CLF);
1705 phys = np->squeue_ba;
1706 for (i = 0; i < MAX_QUEUE*2; i += 2) {
1707 np->squeue[i] = cpu_to_scr(np->idletask_ba);
1708 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
1710 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
1713 * Start at first entry.
1720 phys = np->dqueue_ba;
1721 for (i = 0; i < MAX_QUEUE*2; i += 2) {
1723 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
1725 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
1728 * Start at first entry.
1733 * Install patches in scripts.
1734 * This also let point to first position the start
1735 * and done queue pointers used from SCRIPTS.
1740 * Wakeup all pending jobs.
1742 sym_flush_busy_queue(np, DID_RESET);
1747 OUTB(np, nc_istat, 0x00); /* Remove Reset, abort */
1749 udelay(2000); /* The 895 needs time for the bus mode to settle */
1751 OUTB(np, nc_scntl0, np->rv_scntl0 | 0xc0);
1752 /* full arb., ena parity, par->ATN */
1753 OUTB(np, nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
1755 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
1757 OUTB(np, nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
1758 OUTW(np, nc_respid, 1ul<<np->myaddr); /* Id to respond to */
1759 OUTB(np, nc_istat , SIGP ); /* Signal Process */
1760 OUTB(np, nc_dmode , np->rv_dmode); /* Burst length, dma mode */
1761 OUTB(np, nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
1763 OUTB(np, nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
1764 OUTB(np, nc_ctest3, np->rv_ctest3); /* Write and invalidate */
1765 OUTB(np, nc_ctest4, np->rv_ctest4); /* Master parity checking */
1767 /* Extended Sreq/Sack filtering not supported on the C10 */
1768 if (np->features & FE_C10)
1769 OUTB(np, nc_stest2, np->rv_stest2);
1771 OUTB(np, nc_stest2, EXT|np->rv_stest2);
1773 OUTB(np, nc_stest3, TE); /* TolerANT enable */
1774 OUTB(np, nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
1777 * For now, disable AIP generation on C1010-66.
1779 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_66)
1780 OUTB(np, nc_aipcntl1, DISAIP);
1783 * C10101 rev. 0 errata.
1784 * Errant SGE's when in narrow. Write bits 4 & 5 of
1785 * STEST1 register to disable SGE. We probably should do
1786 * that from SCRIPTS for each selection/reselection, but
1787 * I just don't want. :)
1789 if (np->device_id == PCI_DEVICE_ID_LSI_53C1010_33 &&
1790 np->revision_id < 1)
1791 OUTB(np, nc_stest1, INB(np, nc_stest1) | 0x30);
1794 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
1795 * Disable overlapped arbitration for some dual function devices,
1796 * regardless revision id (kind of post-chip-design feature. ;-))
1798 if (np->device_id == PCI_DEVICE_ID_NCR_53C875)
1799 OUTB(np, nc_ctest0, (1<<5));
1800 else if (np->device_id == PCI_DEVICE_ID_NCR_53C896)
1801 np->rv_ccntl0 |= DPR;
1804 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
1805 * and/or hardware phase mismatch, since only such chips
1806 * seem to support those IO registers.
1808 if (np->features & (FE_DAC|FE_NOPM)) {
1809 OUTB(np, nc_ccntl0, np->rv_ccntl0);
1810 OUTB(np, nc_ccntl1, np->rv_ccntl1);
1813 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
1815 * Set up scratch C and DRS IO registers to map the 32 bit
1816 * DMA address range our data structures are located in.
1819 np->dmap_bah[0] = 0; /* ??? */
1820 OUTL(np, nc_scrx[0], np->dmap_bah[0]);
1821 OUTL(np, nc_drs, np->dmap_bah[0]);
1826 * If phase mismatch handled by scripts (895A/896/1010),
1827 * set PM jump addresses.
1829 if (np->features & FE_NOPM) {
1830 OUTL(np, nc_pmjad1, SCRIPTB_BA(np, pm_handle));
1831 OUTL(np, nc_pmjad2, SCRIPTB_BA(np, pm_handle));
1835 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
1836 * Also set GPIO5 and clear GPIO6 if hardware LED control.
1838 if (np->features & FE_LED0)
1839 OUTB(np, nc_gpcntl, INB(np, nc_gpcntl) & ~0x01);
1840 else if (np->features & FE_LEDC)
1841 OUTB(np, nc_gpcntl, (INB(np, nc_gpcntl) & ~0x41) | 0x20);
1846 OUTW(np, nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
1847 OUTB(np, nc_dien , MDPE|BF|SSI|SIR|IID);
1850 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
1851 * Try to eat the spurious SBMC interrupt that may occur when
1852 * we reset the chip but not the SCSI BUS (at initialization).
1854 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
1855 OUTONW(np, nc_sien, SBMC);
1861 np->scsi_mode = INB(np, nc_stest4) & SMODE;
1865 * Fill in target structure.
1866 * Reinitialize usrsync.
1867 * Reinitialize usrwide.
1868 * Prepare sync negotiation according to actual SCSI bus mode.
1870 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
1871 struct sym_tcb *tp = &np->target[i];
1875 tp->head.wval = np->rv_scntl3;
1880 * Download SCSI SCRIPTS to on-chip RAM if present,
1881 * and start script processor.
1882 * We do the download preferently from the CPU.
1883 * For platforms that may not support PCI memory mapping,
1884 * we use simple SCRIPTS that performs MEMORY MOVEs.
1886 phys = SCRIPTA_BA(np, init);
1888 if (sym_verbose >= 2)
1889 printf("%s: Downloading SCSI SCRIPTS.\n", sym_name(np));
1890 memcpy_toio(np->s.ramaddr, np->scripta0, np->scripta_sz);
1891 if (np->ram_ws == 8192) {
1892 memcpy_toio(np->s.ramaddr + 4096, np->scriptb0, np->scriptb_sz);
1893 phys = scr_to_cpu(np->scr_ram_seg);
1894 OUTL(np, nc_mmws, phys);
1895 OUTL(np, nc_mmrs, phys);
1896 OUTL(np, nc_sfs, phys);
1897 phys = SCRIPTB_BA(np, start64);
1903 OUTL(np, nc_dsa, np->hcb_ba);
1907 * Notify the XPT about the RESET condition.
1910 sym_xpt_async_bus_reset(np);
1914 * Switch trans mode for current job and its target.
1916 static void sym_settrans(struct sym_hcb *np, int target, u_char opts, u_char ofs,
1917 u_char per, u_char wide, u_char div, u_char fak)
1920 u_char sval, wval, uval;
1921 struct sym_tcb *tp = &np->target[target];
1923 assert(target == (INB(np, nc_sdid) & 0x0f));
1925 sval = tp->head.sval;
1926 wval = tp->head.wval;
1927 uval = tp->head.uval;
1930 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
1931 sval, wval, uval, np->rv_scntl3);
1936 if (!(np->features & FE_C10))
1937 sval = (sval & ~0x1f) | ofs;
1939 sval = (sval & ~0x3f) | ofs;
1942 * Set the sync divisor and extra clock factor.
1945 wval = (wval & ~0x70) | ((div+1) << 4);
1946 if (!(np->features & FE_C10))
1947 sval = (sval & ~0xe0) | (fak << 5);
1949 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
1950 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
1951 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
1956 * Set the bus width.
1963 * Set misc. ultra enable bits.
1965 if (np->features & FE_C10) {
1966 uval = uval & ~(U3EN|AIPCKEN);
1968 assert(np->features & FE_U3EN);
1972 wval = wval & ~ULTRA;
1973 if (per <= 12) wval |= ULTRA;
1977 * Stop there if sync parameters are unchanged.
1979 if (tp->head.sval == sval &&
1980 tp->head.wval == wval &&
1981 tp->head.uval == uval)
1983 tp->head.sval = sval;
1984 tp->head.wval = wval;
1985 tp->head.uval = uval;
1988 * Disable extended Sreq/Sack filtering if per < 50.
1989 * Not supported on the C1010.
1991 if (per < 50 && !(np->features & FE_C10))
1992 OUTOFFB(np, nc_stest2, EXT);
1995 * set actual value and sync_status
1997 OUTB(np, nc_sxfer, tp->head.sval);
1998 OUTB(np, nc_scntl3, tp->head.wval);
2000 if (np->features & FE_C10) {
2001 OUTB(np, nc_scntl4, tp->head.uval);
2005 * patch ALL busy ccbs of this target.
2007 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
2009 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
2010 if (cp->target != target)
2012 cp->phys.select.sel_scntl3 = tp->head.wval;
2013 cp->phys.select.sel_sxfer = tp->head.sval;
2014 if (np->features & FE_C10) {
2015 cp->phys.select.sel_scntl4 = tp->head.uval;
2021 * We received a WDTR.
2022 * Let everything be aware of the changes.
2024 static void sym_setwide(struct sym_hcb *np, int target, u_char wide)
2026 struct sym_tcb *tp = &np->target[target];
2027 struct scsi_target *starget = tp->starget;
2029 if (spi_width(starget) == wide)
2032 sym_settrans(np, target, 0, 0, 0, wide, 0, 0);
2034 tp->tgoal.width = wide;
2035 spi_offset(starget) = 0;
2036 spi_period(starget) = 0;
2037 spi_width(starget) = wide;
2038 spi_iu(starget) = 0;
2039 spi_dt(starget) = 0;
2040 spi_qas(starget) = 0;
2042 if (sym_verbose >= 3)
2043 spi_display_xfer_agreement(starget);
2047 * We received a SDTR.
2048 * Let everything be aware of the changes.
2051 sym_setsync(struct sym_hcb *np, int target,
2052 u_char ofs, u_char per, u_char div, u_char fak)
2054 struct sym_tcb *tp = &np->target[target];
2055 struct scsi_target *starget = tp->starget;
2056 u_char wide = (tp->head.wval & EWS) ? BUS_16_BIT : BUS_8_BIT;
2058 sym_settrans(np, target, 0, ofs, per, wide, div, fak);
2060 spi_period(starget) = per;
2061 spi_offset(starget) = ofs;
2062 spi_iu(starget) = spi_dt(starget) = spi_qas(starget) = 0;
2064 if (!tp->tgoal.dt && !tp->tgoal.iu && !tp->tgoal.qas) {
2065 tp->tgoal.period = per;
2066 tp->tgoal.offset = ofs;
2067 tp->tgoal.check_nego = 0;
2070 spi_display_xfer_agreement(starget);
2074 * We received a PPR.
2075 * Let everything be aware of the changes.
2078 sym_setpprot(struct sym_hcb *np, int target, u_char opts, u_char ofs,
2079 u_char per, u_char wide, u_char div, u_char fak)
2081 struct sym_tcb *tp = &np->target[target];
2082 struct scsi_target *starget = tp->starget;
2084 sym_settrans(np, target, opts, ofs, per, wide, div, fak);
2086 spi_width(starget) = tp->tgoal.width = wide;
2087 spi_period(starget) = tp->tgoal.period = per;
2088 spi_offset(starget) = tp->tgoal.offset = ofs;
2089 spi_iu(starget) = tp->tgoal.iu = !!(opts & PPR_OPT_IU);
2090 spi_dt(starget) = tp->tgoal.dt = !!(opts & PPR_OPT_DT);
2091 spi_qas(starget) = tp->tgoal.qas = !!(opts & PPR_OPT_QAS);
2092 tp->tgoal.check_nego = 0;
2094 spi_display_xfer_agreement(starget);
2098 * generic recovery from scsi interrupt
2100 * The doc says that when the chip gets an SCSI interrupt,
2101 * it tries to stop in an orderly fashion, by completing
2102 * an instruction fetch that had started or by flushing
2103 * the DMA fifo for a write to memory that was executing.
2104 * Such a fashion is not enough to know if the instruction
2105 * that was just before the current DSP value has been
2108 * There are some small SCRIPTS sections that deal with
2109 * the start queue and the done queue that may break any
2110 * assomption from the C code if we are interrupted
2111 * inside, so we reset if this happens. Btw, since these
2112 * SCRIPTS sections are executed while the SCRIPTS hasn't
2113 * started SCSI operations, it is very unlikely to happen.
2115 * All the driver data structures are supposed to be
2116 * allocated from the same 4 GB memory window, so there
2117 * is a 1 to 1 relationship between DSA and driver data
2118 * structures. Since we are careful :) to invalidate the
2119 * DSA when we complete a command or when the SCRIPTS
2120 * pushes a DSA into a queue, we can trust it when it
2123 static void sym_recover_scsi_int (struct sym_hcb *np, u_char hsts)
2125 u32 dsp = INL(np, nc_dsp);
2126 u32 dsa = INL(np, nc_dsa);
2127 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
2130 * If we haven't been interrupted inside the SCRIPTS
2131 * critical pathes, we can safely restart the SCRIPTS
2132 * and trust the DSA value if it matches a CCB.
2134 if ((!(dsp > SCRIPTA_BA(np, getjob_begin) &&
2135 dsp < SCRIPTA_BA(np, getjob_end) + 1)) &&
2136 (!(dsp > SCRIPTA_BA(np, ungetjob) &&
2137 dsp < SCRIPTA_BA(np, reselect) + 1)) &&
2138 (!(dsp > SCRIPTB_BA(np, sel_for_abort) &&
2139 dsp < SCRIPTB_BA(np, sel_for_abort_1) + 1)) &&
2140 (!(dsp > SCRIPTA_BA(np, done) &&
2141 dsp < SCRIPTA_BA(np, done_end) + 1))) {
2142 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
2143 OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
2145 * If we have a CCB, let the SCRIPTS call us back for
2146 * the handling of the error with SCRATCHA filled with
2147 * STARTPOS. This way, we will be able to freeze the
2148 * device queue and requeue awaiting IOs.
2151 cp->host_status = hsts;
2152 OUTL_DSP(np, SCRIPTA_BA(np, complete_error));
2155 * Otherwise just restart the SCRIPTS.
2158 OUTL(np, nc_dsa, 0xffffff);
2159 OUTL_DSP(np, SCRIPTA_BA(np, start));
2168 sym_start_reset(np);
2172 * chip exception handler for selection timeout
2174 static void sym_int_sto (struct sym_hcb *np)
2176 u32 dsp = INL(np, nc_dsp);
2178 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
2180 if (dsp == SCRIPTA_BA(np, wf_sel_done) + 8)
2181 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
2183 sym_start_reset(np);
2187 * chip exception handler for unexpected disconnect
2189 static void sym_int_udc (struct sym_hcb *np)
2191 printf ("%s: unexpected disconnect\n", sym_name(np));
2192 sym_recover_scsi_int(np, HS_UNEXPECTED);
2196 * chip exception handler for SCSI bus mode change
2198 * spi2-r12 11.2.3 says a transceiver mode change must
2199 * generate a reset event and a device that detects a reset
2200 * event shall initiate a hard reset. It says also that a
2201 * device that detects a mode change shall set data transfer
2202 * mode to eight bit asynchronous, etc...
2203 * So, just reinitializing all except chip should be enough.
2205 static void sym_int_sbmc (struct sym_hcb *np)
2207 u_char scsi_mode = INB(np, nc_stest4) & SMODE;
2212 printf("%s: SCSI BUS mode change from %s to %s.\n", sym_name(np),
2213 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
2216 * Should suspend command processing for a few seconds and
2217 * reinitialize all except the chip.
2219 sym_start_up (np, 2);
2223 * chip exception handler for SCSI parity error.
2225 * When the chip detects a SCSI parity error and is
2226 * currently executing a (CH)MOV instruction, it does
2227 * not interrupt immediately, but tries to finish the
2228 * transfer of the current scatter entry before
2229 * interrupting. The following situations may occur:
2231 * - The complete scatter entry has been transferred
2232 * without the device having changed phase.
2233 * The chip will then interrupt with the DSP pointing
2234 * to the instruction that follows the MOV.
2236 * - A phase mismatch occurs before the MOV finished
2237 * and phase errors are to be handled by the C code.
2238 * The chip will then interrupt with both PAR and MA
2241 * - A phase mismatch occurs before the MOV finished and
2242 * phase errors are to be handled by SCRIPTS.
2243 * The chip will load the DSP with the phase mismatch
2244 * JUMP address and interrupt the host processor.
2246 static void sym_int_par (struct sym_hcb *np, u_short sist)
2248 u_char hsts = INB(np, HS_PRT);
2249 u32 dsp = INL(np, nc_dsp);
2250 u32 dbc = INL(np, nc_dbc);
2251 u32 dsa = INL(np, nc_dsa);
2252 u_char sbcl = INB(np, nc_sbcl);
2253 u_char cmd = dbc >> 24;
2254 int phase = cmd & 7;
2255 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
2257 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
2258 sym_name(np), hsts, dbc, sbcl);
2261 * Check that the chip is connected to the SCSI BUS.
2263 if (!(INB(np, nc_scntl1) & ISCON)) {
2264 sym_recover_scsi_int(np, HS_UNEXPECTED);
2269 * If the nexus is not clearly identified, reset the bus.
2270 * We will try to do better later.
2276 * Check instruction was a MOV, direction was INPUT and
2279 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
2283 * Keep track of the parity error.
2285 OUTONB(np, HF_PRT, HF_EXT_ERR);
2286 cp->xerr_status |= XE_PARITY_ERR;
2289 * Prepare the message to send to the device.
2291 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
2294 * If the old phase was DATA IN phase, we have to deal with
2295 * the 3 situations described above.
2296 * For other input phases (MSG IN and STATUS), the device
2297 * must resend the whole thing that failed parity checking
2298 * or signal error. So, jumping to dispatcher should be OK.
2300 if (phase == 1 || phase == 5) {
2301 /* Phase mismatch handled by SCRIPTS */
2302 if (dsp == SCRIPTB_BA(np, pm_handle))
2304 /* Phase mismatch handled by the C code */
2307 /* No phase mismatch occurred */
2309 sym_set_script_dp (np, cp, dsp);
2310 OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
2313 else if (phase == 7) /* We definitely cannot handle parity errors */
2314 #if 1 /* in message-in phase due to the relection */
2315 goto reset_all; /* path and various message anticipations. */
2317 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
2320 OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
2324 sym_start_reset(np);
2329 * chip exception handler for phase errors.
2331 * We have to construct a new transfer descriptor,
2332 * to transfer the rest of the current block.
2334 static void sym_int_ma (struct sym_hcb *np)
2347 u_char hflags, hflags0;
2351 dsp = INL(np, nc_dsp);
2352 dbc = INL(np, nc_dbc);
2353 dsa = INL(np, nc_dsa);
2356 rest = dbc & 0xffffff;
2360 * locate matching cp if any.
2362 cp = sym_ccb_from_dsa(np, dsa);
2365 * Donnot take into account dma fifo and various buffers in
2366 * INPUT phase since the chip flushes everything before
2367 * raising the MA interrupt for interrupted INPUT phases.
2368 * For DATA IN phase, we will check for the SWIDE later.
2370 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
2373 if (np->features & FE_DFBC)
2374 delta = INW(np, nc_dfbc);
2379 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
2381 dfifo = INL(np, nc_dfifo);
2384 * Calculate remaining bytes in DMA fifo.
2385 * (CTEST5 = dfifo >> 16)
2387 if (dfifo & (DFS << 16))
2388 delta = ((((dfifo >> 8) & 0x300) |
2389 (dfifo & 0xff)) - rest) & 0x3ff;
2391 delta = ((dfifo & 0xff) - rest) & 0x7f;
2395 * The data in the dma fifo has not been transfered to
2396 * the target -> add the amount to the rest
2397 * and clear the data.
2398 * Check the sstat2 register in case of wide transfer.
2401 ss0 = INB(np, nc_sstat0);
2402 if (ss0 & OLF) rest++;
2403 if (!(np->features & FE_C10))
2404 if (ss0 & ORF) rest++;
2405 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
2406 ss2 = INB(np, nc_sstat2);
2407 if (ss2 & OLF1) rest++;
2408 if (!(np->features & FE_C10))
2409 if (ss2 & ORF1) rest++;
2415 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
2416 OUTB(np, nc_stest3, TE|CSF); /* scsi fifo */
2420 * log the information
2422 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
2423 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(np, nc_sbcl)&7,
2424 (unsigned) rest, (unsigned) delta);
2427 * try to find the interrupted script command,
2428 * and the address at which to continue.
2432 if (dsp > np->scripta_ba &&
2433 dsp <= np->scripta_ba + np->scripta_sz) {
2434 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
2437 else if (dsp > np->scriptb_ba &&
2438 dsp <= np->scriptb_ba + np->scriptb_sz) {
2439 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
2444 * log the information
2446 if (DEBUG_FLAGS & DEBUG_PHASE) {
2447 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
2448 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
2452 printf ("%s: interrupted SCRIPT address not found.\n",
2458 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
2464 * get old startaddress and old length.
2466 oadr = scr_to_cpu(vdsp[1]);
2468 if (cmd & 0x10) { /* Table indirect */
2469 tblp = (u32 *) ((char*) &cp->phys + oadr);
2470 olen = scr_to_cpu(tblp[0]);
2471 oadr = scr_to_cpu(tblp[1]);
2474 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
2477 if (DEBUG_FLAGS & DEBUG_PHASE) {
2478 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
2479 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
2486 * check cmd against assumed interrupted script command.
2487 * If dt data phase, the MOVE instruction hasn't bit 4 of
2490 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
2491 sym_print_addr(cp->cmd,
2492 "internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
2493 cmd, scr_to_cpu(vdsp[0]) >> 24);
2499 * if old phase not dataphase, leave here.
2502 sym_print_addr(cp->cmd,
2503 "phase change %x-%x %d@%08x resid=%d.\n",
2504 cmd&7, INB(np, nc_sbcl)&7, (unsigned)olen,
2505 (unsigned)oadr, (unsigned)rest);
2506 goto unexpected_phase;
2510 * Choose the correct PM save area.
2512 * Look at the PM_SAVE SCRIPT if you want to understand
2513 * this stuff. The equivalent code is implemented in
2514 * SCRIPTS for the 895A, 896 and 1010 that are able to
2515 * handle PM from the SCRIPTS processor.
2517 hflags0 = INB(np, HF_PRT);
2520 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
2521 if (hflags & HF_IN_PM0)
2522 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
2523 else if (hflags & HF_IN_PM1)
2524 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
2526 if (hflags & HF_DP_SAVED)
2527 hflags ^= HF_ACT_PM;
2530 if (!(hflags & HF_ACT_PM)) {
2532 newcmd = SCRIPTA_BA(np, pm0_data);
2536 newcmd = SCRIPTA_BA(np, pm1_data);
2539 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
2540 if (hflags != hflags0)
2541 OUTB(np, HF_PRT, hflags);
2544 * fillin the phase mismatch context
2546 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
2547 pm->sg.size = cpu_to_scr(rest);
2548 pm->ret = cpu_to_scr(nxtdsp);
2551 * If we have a SWIDE,
2552 * - prepare the address to write the SWIDE from SCRIPTS,
2553 * - compute the SCRIPTS address to restart from,
2554 * - move current data pointer context by one byte.
2556 nxtdsp = SCRIPTA_BA(np, dispatch);
2557 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
2558 (INB(np, nc_scntl2) & WSR)) {
2562 * Set up the table indirect for the MOVE
2563 * of the residual byte and adjust the data
2566 tmp = scr_to_cpu(pm->sg.addr);
2567 cp->phys.wresid.addr = cpu_to_scr(tmp);
2568 pm->sg.addr = cpu_to_scr(tmp + 1);
2569 tmp = scr_to_cpu(pm->sg.size);
2570 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
2571 pm->sg.size = cpu_to_scr(tmp - 1);
2574 * If only the residual byte is to be moved,
2575 * no PM context is needed.
2577 if ((tmp&0xffffff) == 1)
2581 * Prepare the address of SCRIPTS that will
2582 * move the residual byte to memory.
2584 nxtdsp = SCRIPTB_BA(np, wsr_ma_helper);
2587 if (DEBUG_FLAGS & DEBUG_PHASE) {
2588 sym_print_addr(cp->cmd, "PM %x %x %x / %x %x %x.\n",
2589 hflags0, hflags, newcmd,
2590 (unsigned)scr_to_cpu(pm->sg.addr),
2591 (unsigned)scr_to_cpu(pm->sg.size),
2592 (unsigned)scr_to_cpu(pm->ret));
2596 * Restart the SCRIPTS processor.
2598 sym_set_script_dp (np, cp, newcmd);
2599 OUTL_DSP(np, nxtdsp);
2603 * Unexpected phase changes that occurs when the current phase
2604 * is not a DATA IN or DATA OUT phase are due to error conditions.
2605 * Such event may only happen when the SCRIPTS is using a
2606 * multibyte SCSI MOVE.
2608 * Phase change Some possible cause
2610 * COMMAND --> MSG IN SCSI parity error detected by target.
2611 * COMMAND --> STATUS Bad command or refused by target.
2612 * MSG OUT --> MSG IN Message rejected by target.
2613 * MSG OUT --> COMMAND Bogus target that discards extended
2614 * negotiation messages.
2616 * The code below does not care of the new phase and so
2617 * trusts the target. Why to annoy it ?
2618 * If the interrupted phase is COMMAND phase, we restart at
2620 * If a target does not get all the messages after selection,
2621 * the code assumes blindly that the target discards extended
2622 * messages and clears the negotiation status.
2623 * If the target does not want all our response to negotiation,
2624 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
2625 * bloat for such a should_not_happen situation).
2626 * In all other situation, we reset the BUS.
2627 * Are these assumptions reasonnable ? (Wait and see ...)
2634 case 2: /* COMMAND phase */
2635 nxtdsp = SCRIPTA_BA(np, dispatch);
2638 case 3: /* STATUS phase */
2639 nxtdsp = SCRIPTA_BA(np, dispatch);
2642 case 6: /* MSG OUT phase */
2644 * If the device may want to use untagged when we want
2645 * tagged, we prepare an IDENTIFY without disc. granted,
2646 * since we will not be able to handle reselect.
2647 * Otherwise, we just don't care.
2649 if (dsp == SCRIPTA_BA(np, send_ident)) {
2650 if (cp->tag != NO_TAG && olen - rest <= 3) {
2651 cp->host_status = HS_BUSY;
2652 np->msgout[0] = IDENTIFY(0, cp->lun);
2653 nxtdsp = SCRIPTB_BA(np, ident_break_atn);
2656 nxtdsp = SCRIPTB_BA(np, ident_break);
2658 else if (dsp == SCRIPTB_BA(np, send_wdtr) ||
2659 dsp == SCRIPTB_BA(np, send_sdtr) ||
2660 dsp == SCRIPTB_BA(np, send_ppr)) {
2661 nxtdsp = SCRIPTB_BA(np, nego_bad_phase);
2662 if (dsp == SCRIPTB_BA(np, send_ppr)) {
2663 struct scsi_device *dev = cp->cmd->device;
2669 case 7: /* MSG IN phase */
2670 nxtdsp = SCRIPTA_BA(np, clrack);
2676 OUTL_DSP(np, nxtdsp);
2681 sym_start_reset(np);
2685 * chip interrupt handler
2687 * In normal situations, interrupt conditions occur one at
2688 * a time. But when something bad happens on the SCSI BUS,
2689 * the chip may raise several interrupt flags before
2690 * stopping and interrupting the CPU. The additionnal
2691 * interrupt flags are stacked in some extra registers
2692 * after the SIP and/or DIP flag has been raised in the
2693 * ISTAT. After the CPU has read the interrupt condition
2694 * flag from SIST or DSTAT, the chip unstacks the other
2695 * interrupt flags and sets the corresponding bits in
2696 * SIST or DSTAT. Since the chip starts stacking once the
2697 * SIP or DIP flag is set, there is a small window of time
2698 * where the stacking does not occur.
2700 * Typically, multiple interrupt conditions may happen in
2701 * the following situations:
2703 * - SCSI parity error + Phase mismatch (PAR|MA)
2704 * When an parity error is detected in input phase
2705 * and the device switches to msg-in phase inside a
2707 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
2708 * When a stupid device does not want to handle the
2709 * recovery of an SCSI parity error.
2710 * - Some combinations of STO, PAR, UDC, ...
2711 * When using non compliant SCSI stuff, when user is
2712 * doing non compliant hot tampering on the BUS, when
2713 * something really bad happens to a device, etc ...
2715 * The heuristic suggested by SYMBIOS to handle
2716 * multiple interrupts is to try unstacking all
2717 * interrupts conditions and to handle them on some
2718 * priority based on error severity.
2719 * This will work when the unstacking has been
2720 * successful, but we cannot be 100 % sure of that,
2721 * since the CPU may have been faster to unstack than
2722 * the chip is able to stack. Hmmm ... But it seems that
2723 * such a situation is very unlikely to happen.
2725 * If this happen, for example STO caught by the CPU
2726 * then UDC happenning before the CPU have restarted
2727 * the SCRIPTS, the driver may wrongly complete the
2728 * same command on UDC, since the SCRIPTS didn't restart
2729 * and the DSA still points to the same command.
2730 * We avoid this situation by setting the DSA to an
2731 * invalid value when the CCB is completed and before
2732 * restarting the SCRIPTS.
2734 * Another issue is that we need some section of our
2735 * recovery procedures to be somehow uninterruptible but
2736 * the SCRIPTS processor does not provides such a
2737 * feature. For this reason, we handle recovery preferently
2738 * from the C code and check against some SCRIPTS critical
2739 * sections from the C code.
2741 * Hopefully, the interrupt handling of the driver is now
2742 * able to resist to weird BUS error conditions, but donnot
2743 * ask me for any guarantee that it will never fail. :-)
2744 * Use at your own decision and risk.
2747 void sym_interrupt (struct sym_hcb *np)
2749 u_char istat, istatc;
2754 * interrupt on the fly ?
2755 * (SCRIPTS may still be running)
2757 * A `dummy read' is needed to ensure that the
2758 * clear of the INTF flag reaches the device
2759 * and that posted writes are flushed to memory
2760 * before the scanning of the DONE queue.
2761 * Note that SCRIPTS also (dummy) read to memory
2762 * prior to deliver the INTF interrupt condition.
2764 istat = INB(np, nc_istat);
2766 OUTB(np, nc_istat, (istat & SIGP) | INTF | np->istat_sem);
2767 istat = INB(np, nc_istat); /* DUMMY READ */
2768 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
2769 sym_wakeup_done(np);
2772 if (!(istat & (SIP|DIP)))
2775 #if 0 /* We should never get this one */
2777 OUTB(np, nc_istat, CABRT);
2781 * PAR and MA interrupts may occur at the same time,
2782 * and we need to know of both in order to handle
2783 * this situation properly. We try to unstack SCSI
2784 * interrupts for that reason. BTW, I dislike a LOT
2785 * such a loop inside the interrupt routine.
2786 * Even if DMA interrupt stacking is very unlikely to
2787 * happen, we also try unstacking these ones, since
2788 * this has no performance impact.
2795 sist |= INW(np, nc_sist);
2797 dstat |= INB(np, nc_dstat);
2798 istatc = INB(np, nc_istat);
2800 } while (istatc & (SIP|DIP));
2802 if (DEBUG_FLAGS & DEBUG_TINY)
2803 printf ("<%d|%x:%x|%x:%x>",
2804 (int)INB(np, nc_scr0),
2806 (unsigned)INL(np, nc_dsp),
2807 (unsigned)INL(np, nc_dbc));
2809 * On paper, a memory read barrier may be needed here to
2810 * prevent out of order LOADs by the CPU from having
2811 * prefetched stale data prior to DMA having occurred.
2812 * And since we are paranoid ... :)
2814 MEMORY_READ_BARRIER();
2817 * First, interrupts we want to service cleanly.
2819 * Phase mismatch (MA) is the most frequent interrupt
2820 * for chip earlier than the 896 and so we have to service
2821 * it as quickly as possible.
2822 * A SCSI parity error (PAR) may be combined with a phase
2823 * mismatch condition (MA).
2824 * Programmed interrupts (SIR) are used to call the C code
2826 * The single step interrupt (SSI) is not used in this
2829 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
2830 !(dstat & (MDPE|BF|ABRT|IID))) {
2831 if (sist & PAR) sym_int_par (np, sist);
2832 else if (sist & MA) sym_int_ma (np);
2833 else if (dstat & SIR) sym_int_sir (np);
2834 else if (dstat & SSI) OUTONB_STD();
2835 else goto unknown_int;
2840 * Now, interrupts that donnot happen in normal
2841 * situations and that we may need to recover from.
2843 * On SCSI RESET (RST), we reset everything.
2844 * On SCSI BUS MODE CHANGE (SBMC), we complete all
2845 * active CCBs with RESET status, prepare all devices
2846 * for negotiating again and restart the SCRIPTS.
2847 * On STO and UDC, we complete the CCB with the corres-
2848 * ponding status and restart the SCRIPTS.
2851 printf("%s: SCSI BUS reset detected.\n", sym_name(np));
2852 sym_start_up (np, 1);
2856 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
2857 OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
2859 if (!(sist & (GEN|HTH|SGE)) &&
2860 !(dstat & (MDPE|BF|ABRT|IID))) {
2861 if (sist & SBMC) sym_int_sbmc (np);
2862 else if (sist & STO) sym_int_sto (np);
2863 else if (sist & UDC) sym_int_udc (np);
2864 else goto unknown_int;
2869 * Now, interrupts we are not able to recover cleanly.
2871 * Log message for hard errors.
2875 sym_log_hard_error(np, sist, dstat);
2877 if ((sist & (GEN|HTH|SGE)) ||
2878 (dstat & (MDPE|BF|ABRT|IID))) {
2879 sym_start_reset(np);
2885 * We just miss the cause of the interrupt. :(
2886 * Print a message. The timeout will do the real work.
2888 printf( "%s: unknown interrupt(s) ignored, "
2889 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
2890 sym_name(np), istat, dstat, sist);
2894 * Dequeue from the START queue all CCBs that match
2895 * a given target/lun/task condition (-1 means all),
2896 * and move them from the BUSY queue to the COMP queue
2897 * with DID_SOFT_ERROR status condition.
2898 * This function is used during error handling/recovery.
2899 * It is called with SCRIPTS not running.
2902 sym_dequeue_from_squeue(struct sym_hcb *np, int i, int target, int lun, int task)
2908 * Make sure the starting index is within range.
2910 assert((i >= 0) && (i < 2*MAX_QUEUE));
2913 * Walk until end of START queue and dequeue every job
2914 * that matches the target/lun/task condition.
2917 while (i != np->squeueput) {
2918 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
2920 #ifdef SYM_CONF_IARB_SUPPORT
2921 /* Forget hints for IARB, they may be no longer relevant */
2922 cp->host_flags &= ~HF_HINT_IARB;
2924 if ((target == -1 || cp->target == target) &&
2925 (lun == -1 || cp->lun == lun) &&
2926 (task == -1 || cp->tag == task)) {
2927 sym_set_cam_status(cp->cmd, DID_SOFT_ERROR);
2928 sym_remque(&cp->link_ccbq);
2929 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
2933 np->squeue[j] = np->squeue[i];
2934 if ((j += 2) >= MAX_QUEUE*2) j = 0;
2936 if ((i += 2) >= MAX_QUEUE*2) i = 0;
2938 if (i != j) /* Copy back the idle task if needed */
2939 np->squeue[j] = np->squeue[i];
2940 np->squeueput = j; /* Update our current start queue pointer */
2946 * chip handler for bad SCSI status condition
2948 * In case of bad SCSI status, we unqueue all the tasks
2949 * currently queued to the controller but not yet started
2950 * and then restart the SCRIPTS processor immediately.
2952 * QUEUE FULL and BUSY conditions are handled the same way.
2953 * Basically all the not yet started tasks are requeued in
2954 * device queue and the queue is frozen until a completion.
2956 * For CHECK CONDITION and COMMAND TERMINATED status, we use
2957 * the CCB of the failed command to prepare a REQUEST SENSE
2958 * SCSI command and queue it to the controller queue.
2960 * SCRATCHA is assumed to have been loaded with STARTPOS
2961 * before the SCRIPTS called the C code.
2963 static void sym_sir_bad_scsi_status(struct sym_hcb *np, int num, struct sym_ccb *cp)
2966 u_char s_status = cp->ssss_status;
2967 u_char h_flags = cp->host_flags;
2972 * Compute the index of the next job to start from SCRIPTS.
2974 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
2977 * The last CCB queued used for IARB hint may be
2978 * no longer relevant. Forget it.
2980 #ifdef SYM_CONF_IARB_SUPPORT
2986 * Now deal with the SCSI status.
2991 if (sym_verbose >= 2) {
2992 sym_print_addr(cp->cmd, "%s\n",
2993 s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
2995 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
2996 sym_complete_error (np, cp);
3001 * If we get an SCSI error when requesting sense, give up.
3003 if (h_flags & HF_SENSE) {
3004 sym_complete_error (np, cp);
3009 * Dequeue all queued CCBs for that device not yet started,
3010 * and restart the SCRIPTS processor immediately.
3012 sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
3013 OUTL_DSP(np, SCRIPTA_BA(np, start));
3016 * Save some info of the actual IO.
3017 * Compute the data residual.
3019 cp->sv_scsi_status = cp->ssss_status;
3020 cp->sv_xerr_status = cp->xerr_status;
3021 cp->sv_resid = sym_compute_residual(np, cp);
3024 * Prepare all needed data structures for
3025 * requesting sense data.
3028 cp->scsi_smsg2[0] = IDENTIFY(0, cp->lun);
3032 * If we are currently using anything different from
3033 * async. 8 bit data transfers with that target,
3034 * start a negotiation, since the device may want
3035 * to report us a UNIT ATTENTION condition due to
3036 * a cause we currently ignore, and we donnot want
3037 * to be stuck with WIDE and/or SYNC data transfer.
3039 * cp->nego_status is filled by sym_prepare_nego().
3041 cp->nego_status = 0;
3042 msglen += sym_prepare_nego(np, cp, &cp->scsi_smsg2[msglen]);
3044 * Message table indirect structure.
3046 cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg2);
3047 cp->phys.smsg.size = cpu_to_scr(msglen);
3052 cp->phys.cmd.addr = CCB_BA(cp, sensecmd);
3053 cp->phys.cmd.size = cpu_to_scr(6);
3056 * patch requested size into sense command
3058 cp->sensecmd[0] = REQUEST_SENSE;
3059 cp->sensecmd[1] = 0;
3060 if (cp->cmd->device->scsi_level <= SCSI_2 && cp->lun <= 7)
3061 cp->sensecmd[1] = cp->lun << 5;
3062 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
3063 cp->data_len = SYM_SNS_BBUF_LEN;
3068 memset(cp->sns_bbuf, 0, SYM_SNS_BBUF_LEN);
3069 cp->phys.sense.addr = CCB_BA(cp, sns_bbuf);
3070 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
3073 * requeue the command.
3075 startp = SCRIPTB_BA(np, sdata_in);
3077 cp->phys.head.savep = cpu_to_scr(startp);
3078 cp->phys.head.lastp = cpu_to_scr(startp);
3079 cp->startp = cpu_to_scr(startp);
3080 cp->goalp = cpu_to_scr(startp + 16);
3082 cp->host_xflags = 0;
3083 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
3084 cp->ssss_status = S_ILLEGAL;
3085 cp->host_flags = (HF_SENSE|HF_DATA_IN);
3086 cp->xerr_status = 0;
3087 cp->extra_bytes = 0;
3089 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
3092 * Requeue the command.
3094 sym_put_start_queue(np, cp);
3097 * Give back to upper layer everything we have dequeued.
3099 sym_flush_comp_queue(np, 0);
3105 * After a device has accepted some management message
3106 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
3107 * a device signals a UNIT ATTENTION condition, some
3108 * tasks are thrown away by the device. We are required
3109 * to reflect that on our tasks list since the device
3110 * will never complete these tasks.
3112 * This function move from the BUSY queue to the COMP
3113 * queue all disconnected CCBs for a given target that
3114 * match the following criteria:
3115 * - lun=-1 means any logical UNIT otherwise a given one.
3116 * - task=-1 means any task, otherwise a given one.
3118 int sym_clear_tasks(struct sym_hcb *np, int cam_status, int target, int lun, int task)
3120 SYM_QUEHEAD qtmp, *qp;
3125 * Move the entire BUSY queue to our temporary queue.
3127 sym_que_init(&qtmp);
3128 sym_que_splice(&np->busy_ccbq, &qtmp);
3129 sym_que_init(&np->busy_ccbq);
3132 * Put all CCBs that matches our criteria into
3133 * the COMP queue and put back other ones into
3136 while ((qp = sym_remque_head(&qtmp)) != 0) {
3137 struct scsi_cmnd *cmd;
3138 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3140 if (cp->host_status != HS_DISCONNECT ||
3141 cp->target != target ||
3142 (lun != -1 && cp->lun != lun) ||
3144 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
3145 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
3148 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3150 /* Preserve the software timeout condition */
3151 if (sym_get_cam_status(cmd) != DID_TIME_OUT)
3152 sym_set_cam_status(cmd, cam_status);
3155 printf("XXXX TASK @%p CLEARED\n", cp);
3162 * chip handler for TASKS recovery
3164 * We cannot safely abort a command, while the SCRIPTS
3165 * processor is running, since we just would be in race
3168 * As long as we have tasks to abort, we keep the SEM
3169 * bit set in the ISTAT. When this bit is set, the
3170 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
3171 * each time it enters the scheduler.
3173 * If we have to reset a target, clear tasks of a unit,
3174 * or to perform the abort of a disconnected job, we
3175 * restart the SCRIPTS for selecting the target. Once
3176 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
3177 * If it loses arbitration, the SCRIPTS will interrupt again
3178 * the next time it will enter its scheduler, and so on ...
3180 * On SIR_TARGET_SELECTED, we scan for the more
3181 * appropriate thing to do:
3183 * - If nothing, we just sent a M_ABORT message to the
3184 * target to get rid of the useless SCSI bus ownership.
3185 * According to the specs, no tasks shall be affected.
3186 * - If the target is to be reset, we send it a M_RESET
3188 * - If a logical UNIT is to be cleared , we send the
3189 * IDENTIFY(lun) + M_ABORT.
3190 * - If an untagged task is to be aborted, we send the
3191 * IDENTIFY(lun) + M_ABORT.
3192 * - If a tagged task is to be aborted, we send the
3193 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
3195 * Once our 'kiss of death' :) message has been accepted
3196 * by the target, the SCRIPTS interrupts again
3197 * (SIR_ABORT_SENT). On this interrupt, we complete
3198 * all the CCBs that should have been aborted by the
3199 * target according to our message.
3201 static void sym_sir_task_recovery(struct sym_hcb *np, int num)
3205 struct sym_tcb *tp = NULL; /* gcc isn't quite smart enough yet */
3206 struct scsi_target *starget;
3207 int target=-1, lun=-1, task;
3212 * The SCRIPTS processor stopped before starting
3213 * the next command in order to allow us to perform
3214 * some task recovery.
3216 case SIR_SCRIPT_STOPPED:
3218 * Do we have any target to reset or unit to clear ?
3220 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
3221 tp = &np->target[i];
3223 (tp->lun0p && tp->lun0p->to_clear)) {
3229 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
3230 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
3240 * If not, walk the busy queue for any
3241 * disconnected CCB to be aborted.
3244 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3245 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
3246 if (cp->host_status != HS_DISCONNECT)
3249 target = cp->target;
3256 * If some target is to be selected,
3257 * prepare and start the selection.
3260 tp = &np->target[target];
3261 np->abrt_sel.sel_id = target;
3262 np->abrt_sel.sel_scntl3 = tp->head.wval;
3263 np->abrt_sel.sel_sxfer = tp->head.sval;
3264 OUTL(np, nc_dsa, np->hcb_ba);
3265 OUTL_DSP(np, SCRIPTB_BA(np, sel_for_abort));
3270 * Now look for a CCB to abort that haven't started yet.
3271 * Btw, the SCRIPTS processor is still stopped, so
3272 * we are not in race.
3276 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3277 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3278 if (cp->host_status != HS_BUSY &&
3279 cp->host_status != HS_NEGOTIATE)
3283 #ifdef SYM_CONF_IARB_SUPPORT
3285 * If we are using IMMEDIATE ARBITRATION, we donnot
3286 * want to cancel the last queued CCB, since the
3287 * SCRIPTS may have anticipated the selection.
3289 if (cp == np->last_cp) {
3294 i = 1; /* Means we have found some */
3299 * We are done, so we donnot need
3300 * to synchronize with the SCRIPTS anylonger.
3301 * Remove the SEM flag from the ISTAT.
3304 OUTB(np, nc_istat, SIGP);
3308 * Compute index of next position in the start
3309 * queue the SCRIPTS intends to start and dequeue
3310 * all CCBs for that device that haven't been started.
3312 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
3313 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
3316 * Make sure at least our IO to abort has been dequeued.
3318 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
3319 assert(i && sym_get_cam_status(cp->cmd) == DID_SOFT_ERROR);
3321 sym_remque(&cp->link_ccbq);
3322 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
3325 * Keep track in cam status of the reason of the abort.
3327 if (cp->to_abort == 2)
3328 sym_set_cam_status(cp->cmd, DID_TIME_OUT);
3330 sym_set_cam_status(cp->cmd, DID_ABORT);
3333 * Complete with error everything that we have dequeued.
3335 sym_flush_comp_queue(np, 0);
3338 * The SCRIPTS processor has selected a target
3339 * we may have some manual recovery to perform for.
3341 case SIR_TARGET_SELECTED:
3342 target = INB(np, nc_sdid) & 0xf;
3343 tp = &np->target[target];
3345 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
3348 * If the target is to be reset, prepare a
3349 * M_RESET message and clear the to_reset flag
3350 * since we donnot expect this operation to fail.
3353 np->abrt_msg[0] = M_RESET;
3354 np->abrt_tbl.size = 1;
3360 * Otherwise, look for some logical unit to be cleared.
3362 if (tp->lun0p && tp->lun0p->to_clear)
3364 else if (tp->lunmp) {
3365 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
3366 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
3374 * If a logical unit is to be cleared, prepare
3375 * an IDENTIFY(lun) + ABORT MESSAGE.
3378 struct sym_lcb *lp = sym_lp(tp, lun);
3379 lp->to_clear = 0; /* We don't expect to fail here */
3380 np->abrt_msg[0] = IDENTIFY(0, lun);
3381 np->abrt_msg[1] = M_ABORT;
3382 np->abrt_tbl.size = 2;
3387 * Otherwise, look for some disconnected job to
3388 * abort for this target.
3392 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3393 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3394 if (cp->host_status != HS_DISCONNECT)
3396 if (cp->target != target)
3400 i = 1; /* Means we have some */
3405 * If we have none, probably since the device has
3406 * completed the command before we won abitration,
3407 * send a M_ABORT message without IDENTIFY.
3408 * According to the specs, the device must just
3409 * disconnect the BUS and not abort any task.
3412 np->abrt_msg[0] = M_ABORT;
3413 np->abrt_tbl.size = 1;
3418 * We have some task to abort.
3419 * Set the IDENTIFY(lun)
3421 np->abrt_msg[0] = IDENTIFY(0, cp->lun);
3424 * If we want to abort an untagged command, we
3425 * will send a IDENTIFY + M_ABORT.
3426 * Otherwise (tagged command), we will send
3427 * a IDENTITFY + task attributes + ABORT TAG.
3429 if (cp->tag == NO_TAG) {
3430 np->abrt_msg[1] = M_ABORT;
3431 np->abrt_tbl.size = 2;
3433 np->abrt_msg[1] = cp->scsi_smsg[1];
3434 np->abrt_msg[2] = cp->scsi_smsg[2];
3435 np->abrt_msg[3] = M_ABORT_TAG;
3436 np->abrt_tbl.size = 4;
3439 * Keep track of software timeout condition, since the
3440 * peripheral driver may not count retries on abort
3441 * conditions not due to timeout.
3443 if (cp->to_abort == 2)
3444 sym_set_cam_status(cp->cmd, DID_TIME_OUT);
3445 cp->to_abort = 0; /* We donnot expect to fail here */
3449 * The target has accepted our message and switched
3450 * to BUS FREE phase as we expected.
3452 case SIR_ABORT_SENT:
3453 target = INB(np, nc_sdid) & 0xf;
3454 tp = &np->target[target];
3455 starget = tp->starget;
3458 ** If we didn't abort anything, leave here.
3460 if (np->abrt_msg[0] == M_ABORT)
3464 * If we sent a M_RESET, then a hardware reset has
3465 * been performed by the target.
3466 * - Reset everything to async 8 bit
3467 * - Tell ourself to negotiate next time :-)
3468 * - Prepare to clear all disconnected CCBs for
3469 * this target from our task list (lun=task=-1)
3473 if (np->abrt_msg[0] == M_RESET) {
3475 tp->head.wval = np->rv_scntl3;
3477 spi_period(starget) = 0;
3478 spi_offset(starget) = 0;
3479 spi_width(starget) = 0;
3480 spi_iu(starget) = 0;
3481 spi_dt(starget) = 0;
3482 spi_qas(starget) = 0;
3483 tp->tgoal.check_nego = 1;
3487 * Otherwise, check for the LUN and TASK(s)
3488 * concerned by the cancelation.
3489 * If it is not ABORT_TAG then it is CLEAR_QUEUE
3490 * or an ABORT message :-)
3493 lun = np->abrt_msg[0] & 0x3f;
3494 if (np->abrt_msg[1] == M_ABORT_TAG)
3495 task = np->abrt_msg[2];
3499 * Complete all the CCBs the device should have
3500 * aborted due to our 'kiss of death' message.
3502 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
3503 sym_dequeue_from_squeue(np, i, target, lun, -1);
3504 sym_clear_tasks(np, DID_ABORT, target, lun, task);
3505 sym_flush_comp_queue(np, 0);
3508 * If we sent a BDR, make upper layer aware of that.
3510 if (np->abrt_msg[0] == M_RESET)
3511 sym_xpt_async_sent_bdr(np, target);
3516 * Print to the log the message we intend to send.
3518 if (num == SIR_TARGET_SELECTED) {
3519 dev_info(&tp->starget->dev, "control msgout:");
3520 sym_printl_hex(np->abrt_msg, np->abrt_tbl.size);
3521 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
3525 * Let the SCRIPTS processor continue.
3531 * Gerard's alchemy:) that deals with with the data
3532 * pointer for both MDP and the residual calculation.
3534 * I didn't want to bloat the code by more than 200
3535 * lines for the handling of both MDP and the residual.
3536 * This has been achieved by using a data pointer
3537 * representation consisting in an index in the data
3538 * array (dp_sg) and a negative offset (dp_ofs) that
3539 * have the following meaning:
3541 * - dp_sg = SYM_CONF_MAX_SG
3542 * we are at the end of the data script.
3543 * - dp_sg < SYM_CONF_MAX_SG
3544 * dp_sg points to the next entry of the scatter array
3545 * we want to transfer.
3547 * dp_ofs represents the residual of bytes of the
3548 * previous entry scatter entry we will send first.
3550 * no residual to send first.
3552 * The function sym_evaluate_dp() accepts an arbitray
3553 * offset (basically from the MDP message) and returns
3554 * the corresponding values of dp_sg and dp_ofs.
3557 static int sym_evaluate_dp(struct sym_hcb *np, struct sym_ccb *cp, u32 scr, int *ofs)
3560 int dp_ofs, dp_sg, dp_sgmin;
3565 * Compute the resulted data pointer in term of a script
3566 * address within some DATA script and a signed byte offset.
3570 if (dp_scr == SCRIPTA_BA(np, pm0_data))
3572 else if (dp_scr == SCRIPTA_BA(np, pm1_data))
3578 dp_scr = scr_to_cpu(pm->ret);
3579 dp_ofs -= scr_to_cpu(pm->sg.size) & 0x00ffffff;
3583 * If we are auto-sensing, then we are done.
3585 if (cp->host_flags & HF_SENSE) {
3591 * Deduce the index of the sg entry.
3592 * Keep track of the index of the first valid entry.
3593 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
3596 tmp = scr_to_cpu(cp->goalp);
3597 dp_sg = SYM_CONF_MAX_SG;
3599 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
3600 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
3603 * Move to the sg entry the data pointer belongs to.
3605 * If we are inside the data area, we expect result to be:
3608 * dp_ofs = 0 and dp_sg is the index of the sg entry
3609 * the data pointer belongs to (or the end of the data)
3611 * dp_ofs < 0 and dp_sg is the index of the sg entry
3612 * the data pointer belongs to + 1.
3616 while (dp_sg > dp_sgmin) {
3618 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3619 n = dp_ofs + (tmp & 0xffffff);
3627 else if (dp_ofs > 0) {
3628 while (dp_sg < SYM_CONF_MAX_SG) {
3629 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3630 dp_ofs -= (tmp & 0xffffff);
3638 * Make sure the data pointer is inside the data area.
3639 * If not, return some error.
3641 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
3643 else if (dp_sg > SYM_CONF_MAX_SG ||
3644 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
3648 * Save the extreme pointer if needed.
3650 if (dp_sg > cp->ext_sg ||
3651 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
3653 cp->ext_ofs = dp_ofs;
3667 * chip handler for MODIFY DATA POINTER MESSAGE
3669 * We also call this function on IGNORE WIDE RESIDUE
3670 * messages that do not match a SWIDE full condition.
3671 * Btw, we assume in that situation that such a message
3672 * is equivalent to a MODIFY DATA POINTER (offset=-1).
3675 static void sym_modify_dp(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp, int ofs)
3678 u32 dp_scr = sym_get_script_dp (np, cp);
3686 * Not supported for auto-sense.
3688 if (cp->host_flags & HF_SENSE)
3692 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
3693 * to the resulted data pointer.
3695 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
3700 * And our alchemy:) allows to easily calculate the data
3701 * script address we want to return for the next data phase.
3703 dp_ret = cpu_to_scr(cp->goalp);
3704 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
3707 * If offset / scatter entry is zero we donnot need
3708 * a context for the new current data pointer.
3716 * Get a context for the new current data pointer.
3718 hflags = INB(np, HF_PRT);
3720 if (hflags & HF_DP_SAVED)
3721 hflags ^= HF_ACT_PM;
3723 if (!(hflags & HF_ACT_PM)) {
3725 dp_scr = SCRIPTA_BA(np, pm0_data);
3729 dp_scr = SCRIPTA_BA(np, pm1_data);
3732 hflags &= ~(HF_DP_SAVED);
3734 OUTB(np, HF_PRT, hflags);
3737 * Set up the new current data pointer.
3738 * ofs < 0 there, and for the next data phase, we
3739 * want to transfer part of the data of the sg entry
3740 * corresponding to index dp_sg-1 prior to returning
3741 * to the main data script.
3743 pm->ret = cpu_to_scr(dp_ret);
3744 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
3745 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
3746 pm->sg.addr = cpu_to_scr(tmp);
3747 pm->sg.size = cpu_to_scr(-dp_ofs);
3750 sym_set_script_dp (np, cp, dp_scr);
3751 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
3755 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
3760 * chip calculation of the data residual.
3762 * As I used to say, the requirement of data residual
3763 * in SCSI is broken, useless and cannot be achieved
3764 * without huge complexity.
3765 * But most OSes and even the official CAM require it.
3766 * When stupidity happens to be so widely spread inside
3767 * a community, it gets hard to convince.
3769 * Anyway, I don't care, since I am not going to use
3770 * any software that considers this data residual as
3771 * a relevant information. :)
3774 int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp)
3776 int dp_sg, dp_sgmin, resid = 0;
3780 * Check for some data lost or just thrown away.
3781 * We are not required to be quite accurate in this
3782 * situation. Btw, if we are odd for output and the
3783 * device claims some more data, it may well happen
3784 * than our residual be zero. :-)
3786 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
3787 if (cp->xerr_status & XE_EXTRA_DATA)
3788 resid -= cp->extra_bytes;
3789 if (cp->xerr_status & XE_SODL_UNRUN)
3791 if (cp->xerr_status & XE_SWIDE_OVRUN)
3796 * If all data has been transferred,
3797 * there is no residual.
3799 if (cp->phys.head.lastp == cp->goalp)
3803 * If no data transfer occurs, or if the data
3804 * pointer is weird, return full residual.
3806 if (cp->startp == cp->phys.head.lastp ||
3807 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
3809 return cp->data_len;
3813 * If we were auto-sensing, then we are done.
3815 if (cp->host_flags & HF_SENSE) {
3820 * We are now full comfortable in the computation
3821 * of the data residual (2's complement).
3823 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
3824 resid = -cp->ext_ofs;
3825 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
3826 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
3827 resid += (tmp & 0xffffff);
3830 resid -= cp->odd_byte_adjustment;
3833 * Hopefully, the result is not too wrong.
3839 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
3841 * When we try to negotiate, we append the negotiation message
3842 * to the identify and (maybe) simple tag message.
3843 * The host status field is set to HS_NEGOTIATE to mark this
3846 * If the target doesn't answer this message immediately
3847 * (as required by the standard), the SIR_NEGO_FAILED interrupt
3848 * will be raised eventually.
3849 * The handler removes the HS_NEGOTIATE status, and sets the
3850 * negotiated value to the default (async / nowide).
3852 * If we receive a matching answer immediately, we check it
3853 * for validity, and set the values.
3855 * If we receive a Reject message immediately, we assume the
3856 * negotiation has failed, and fall back to standard values.
3858 * If we receive a negotiation message while not in HS_NEGOTIATE
3859 * state, it's a target initiated negotiation. We prepare a
3860 * (hopefully) valid answer, set our parameters, and send back
3861 * this answer to the target.
3863 * If the target doesn't fetch the answer (no message out phase),
3864 * we assume the negotiation has failed, and fall back to default
3865 * settings (SIR_NEGO_PROTO interrupt).
3867 * When we set the values, we adjust them in all ccbs belonging
3868 * to this target, in the controller's register, and in the "phys"
3869 * field of the controller's struct sym_hcb.
3873 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
3876 sym_sync_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
3878 int target = cp->target;
3879 u_char chg, ofs, per, fak, div;
3881 if (DEBUG_FLAGS & DEBUG_NEGO) {
3882 sym_print_nego_msg(np, target, "sync msgin", np->msgin);
3886 * Get requested values.
3893 * Check values against our limits.
3896 if (ofs > np->maxoffs)
3897 {chg = 1; ofs = np->maxoffs;}
3901 if (per < np->minsync)
3902 {chg = 1; per = np->minsync;}
3906 * Get new chip synchronous parameters value.
3909 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
3912 if (DEBUG_FLAGS & DEBUG_NEGO) {
3913 sym_print_addr(cp->cmd,
3914 "sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
3915 ofs, per, div, fak, chg);
3919 * If it was an answer we want to change,
3920 * then it isn't acceptable. Reject it.
3928 sym_setsync (np, target, ofs, per, div, fak);
3931 * It was an answer. We are done.
3937 * It was a request. Prepare an answer message.
3939 spi_populate_sync_msg(np->msgout, per, ofs);
3941 if (DEBUG_FLAGS & DEBUG_NEGO) {
3942 sym_print_nego_msg(np, target, "sync msgout", np->msgout);
3945 np->msgin [0] = M_NOOP;
3950 sym_setsync (np, target, 0, 0, 0, 0);
3954 static void sym_sync_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
3960 * Request or answer ?
3962 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
3963 OUTB(np, HS_PRT, HS_BUSY);
3964 if (cp->nego_status && cp->nego_status != NS_SYNC)
3970 * Check and apply new values.
3972 result = sym_sync_nego_check(np, req, cp);
3973 if (result) /* Not acceptable, reject it */
3975 if (req) { /* Was a request, send response. */
3976 cp->nego_status = NS_SYNC;
3977 OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
3979 else /* Was a response, we are done. */
3980 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
3984 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
3988 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
3991 sym_ppr_nego_check(struct sym_hcb *np, int req, int target)
3993 struct sym_tcb *tp = &np->target[target];
3994 unsigned char fak, div;
3997 unsigned char per = np->msgin[3];
3998 unsigned char ofs = np->msgin[5];
3999 unsigned char wide = np->msgin[6];
4000 unsigned char opts = np->msgin[7] & PPR_OPT_MASK;
4002 if (DEBUG_FLAGS & DEBUG_NEGO) {
4003 sym_print_nego_msg(np, target, "ppr msgin", np->msgin);
4007 * Check values against our limits.
4009 if (wide > np->maxwide) {
4013 if (!wide || !(np->features & FE_U3EN))
4016 if (opts != (np->msgin[7] & PPR_OPT_MASK))
4019 dt = opts & PPR_OPT_DT;
4022 unsigned char maxoffs = dt ? np->maxoffs_dt : np->maxoffs;
4023 if (ofs > maxoffs) {
4030 unsigned char minsync = dt ? np->minsync_dt : np->minsync;
4031 if (per < minsync) {
4038 * Get new chip synchronous parameters value.
4041 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
4045 * If it was an answer we want to change,
4046 * then it isn't acceptable. Reject it.
4054 sym_setpprot(np, target, opts, ofs, per, wide, div, fak);
4057 * It was an answer. We are done.
4063 * It was a request. Prepare an answer message.
4065 spi_populate_ppr_msg(np->msgout, per, ofs, wide, opts);
4067 if (DEBUG_FLAGS & DEBUG_NEGO) {
4068 sym_print_nego_msg(np, target, "ppr msgout", np->msgout);
4071 np->msgin [0] = M_NOOP;
4076 sym_setpprot (np, target, 0, 0, 0, 0, 0, 0);
4078 * If it is a device response that should result in
4079 * ST, we may want to try a legacy negotiation later.
4081 if (!req && !opts) {
4082 tp->tgoal.period = per;
4083 tp->tgoal.offset = ofs;
4084 tp->tgoal.width = wide;
4085 tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
4086 tp->tgoal.check_nego = 1;
4091 static void sym_ppr_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4097 * Request or answer ?
4099 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
4100 OUTB(np, HS_PRT, HS_BUSY);
4101 if (cp->nego_status && cp->nego_status != NS_PPR)
4107 * Check and apply new values.
4109 result = sym_ppr_nego_check(np, req, cp->target);
4110 if (result) /* Not acceptable, reject it */
4112 if (req) { /* Was a request, send response. */
4113 cp->nego_status = NS_PPR;
4114 OUTL_DSP(np, SCRIPTB_BA(np, ppr_resp));
4116 else /* Was a response, we are done. */
4117 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4121 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4125 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
4128 sym_wide_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
4130 int target = cp->target;
4133 if (DEBUG_FLAGS & DEBUG_NEGO) {
4134 sym_print_nego_msg(np, target, "wide msgin", np->msgin);
4138 * Get requested values.
4141 wide = np->msgin[3];
4144 * Check values against our limits.
4146 if (wide > np->maxwide) {
4151 if (DEBUG_FLAGS & DEBUG_NEGO) {
4152 sym_print_addr(cp->cmd, "wdtr: wide=%d chg=%d.\n",
4157 * If it was an answer we want to change,
4158 * then it isn't acceptable. Reject it.
4166 sym_setwide (np, target, wide);
4169 * It was an answer. We are done.
4175 * It was a request. Prepare an answer message.
4177 spi_populate_width_msg(np->msgout, wide);
4179 np->msgin [0] = M_NOOP;
4181 if (DEBUG_FLAGS & DEBUG_NEGO) {
4182 sym_print_nego_msg(np, target, "wide msgout", np->msgout);
4191 static void sym_wide_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4197 * Request or answer ?
4199 if (INB(np, HS_PRT) == HS_NEGOTIATE) {
4200 OUTB(np, HS_PRT, HS_BUSY);
4201 if (cp->nego_status && cp->nego_status != NS_WIDE)
4207 * Check and apply new values.
4209 result = sym_wide_nego_check(np, req, cp);
4210 if (result) /* Not acceptable, reject it */
4212 if (req) { /* Was a request, send response. */
4213 cp->nego_status = NS_WIDE;
4214 OUTL_DSP(np, SCRIPTB_BA(np, wdtr_resp));
4215 } else { /* Was a response. */
4217 * Negotiate for SYNC immediately after WIDE response.
4218 * This allows to negotiate for both WIDE and SYNC on
4219 * a single SCSI command (Suggested by Justin Gibbs).
4221 if (tp->tgoal.offset) {
4222 spi_populate_sync_msg(np->msgout, tp->tgoal.period,
4225 if (DEBUG_FLAGS & DEBUG_NEGO) {
4226 sym_print_nego_msg(np, cp->target,
4227 "sync msgout", np->msgout);
4230 cp->nego_status = NS_SYNC;
4231 OUTB(np, HS_PRT, HS_NEGOTIATE);
4232 OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
4235 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4241 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4245 * Reset DT, SYNC or WIDE to default settings.
4247 * Called when a negotiation does not succeed either
4248 * on rejection or on protocol error.
4250 * A target that understands a PPR message should never
4251 * reject it, and messing with it is very unlikely.
4252 * So, if a PPR makes problems, we may just want to
4253 * try a legacy negotiation later.
4255 static void sym_nego_default(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4257 switch (cp->nego_status) {
4260 sym_setpprot (np, cp->target, 0, 0, 0, 0, 0, 0);
4262 if (tp->tgoal.period < np->minsync)
4263 tp->tgoal.period = np->minsync;
4264 if (tp->tgoal.offset > np->maxoffs)
4265 tp->tgoal.offset = np->maxoffs;
4266 tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
4267 tp->tgoal.check_nego = 1;
4271 sym_setsync (np, cp->target, 0, 0, 0, 0);
4274 sym_setwide (np, cp->target, 0);
4277 np->msgin [0] = M_NOOP;
4278 np->msgout[0] = M_NOOP;
4279 cp->nego_status = 0;
4283 * chip handler for MESSAGE REJECT received in response to
4284 * PPR, WIDE or SYNCHRONOUS negotiation.
4286 static void sym_nego_rejected(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
4288 sym_nego_default(np, tp, cp);
4289 OUTB(np, HS_PRT, HS_BUSY);
4293 * chip exception handler for programmed interrupts.
4295 static void sym_int_sir (struct sym_hcb *np)
4297 u_char num = INB(np, nc_dsps);
4298 u32 dsa = INL(np, nc_dsa);
4299 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
4300 u_char target = INB(np, nc_sdid) & 0x0f;
4301 struct sym_tcb *tp = &np->target[target];
4304 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
4307 #if SYM_CONF_DMA_ADDRESSING_MODE == 2
4309 * SCRIPTS tell us that we may have to update
4310 * 64 bit DMA segment registers.
4312 case SIR_DMAP_DIRTY:
4313 sym_update_dmap_regs(np);
4317 * Command has been completed with error condition
4318 * or has been auto-sensed.
4320 case SIR_COMPLETE_ERROR:
4321 sym_complete_error(np, cp);
4324 * The C code is currently trying to recover from something.
4325 * Typically, user want to abort some command.
4327 case SIR_SCRIPT_STOPPED:
4328 case SIR_TARGET_SELECTED:
4329 case SIR_ABORT_SENT:
4330 sym_sir_task_recovery(np, num);
4333 * The device didn't go to MSG OUT phase after having
4334 * been selected with ATN. We donnot want to handle
4337 case SIR_SEL_ATN_NO_MSG_OUT:
4338 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
4339 sym_name (np), target);
4342 * The device didn't switch to MSG IN phase after
4343 * having reseleted the initiator.
4345 case SIR_RESEL_NO_MSG_IN:
4346 printf ("%s:%d: No MSG IN phase after reselection.\n",
4347 sym_name (np), target);
4350 * After reselection, the device sent a message that wasn't
4353 case SIR_RESEL_NO_IDENTIFY:
4354 printf ("%s:%d: No IDENTIFY after reselection.\n",
4355 sym_name (np), target);
4358 * The device reselected a LUN we donnot know about.
4360 case SIR_RESEL_BAD_LUN:
4361 np->msgout[0] = M_RESET;
4364 * The device reselected for an untagged nexus and we
4367 case SIR_RESEL_BAD_I_T_L:
4368 np->msgout[0] = M_ABORT;
4371 * The device reselected for a tagged nexus that we donnot
4374 case SIR_RESEL_BAD_I_T_L_Q:
4375 np->msgout[0] = M_ABORT_TAG;
4378 * The SCRIPTS let us know that the device has grabbed
4379 * our message and will abort the job.
4381 case SIR_RESEL_ABORTED:
4382 np->lastmsg = np->msgout[0];
4383 np->msgout[0] = M_NOOP;
4384 printf ("%s:%d: message %x sent on bad reselection.\n",
4385 sym_name (np), target, np->lastmsg);
4388 * The SCRIPTS let us know that a message has been
4389 * successfully sent to the device.
4391 case SIR_MSG_OUT_DONE:
4392 np->lastmsg = np->msgout[0];
4393 np->msgout[0] = M_NOOP;
4394 /* Should we really care of that */
4395 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
4397 cp->xerr_status &= ~XE_PARITY_ERR;
4398 if (!cp->xerr_status)
4399 OUTOFFB(np, HF_PRT, HF_EXT_ERR);
4404 * The device didn't send a GOOD SCSI status.
4405 * We may have some work to do prior to allow
4406 * the SCRIPTS processor to continue.
4408 case SIR_BAD_SCSI_STATUS:
4411 sym_sir_bad_scsi_status(np, num, cp);
4414 * We are asked by the SCRIPTS to prepare a
4417 case SIR_REJECT_TO_SEND:
4418 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
4419 np->msgout[0] = M_REJECT;
4422 * We have been ODD at the end of a DATA IN
4423 * transfer and the device didn't send a
4424 * IGNORE WIDE RESIDUE message.
4425 * It is a data overrun condition.
4427 case SIR_SWIDE_OVERRUN:
4429 OUTONB(np, HF_PRT, HF_EXT_ERR);
4430 cp->xerr_status |= XE_SWIDE_OVRUN;
4434 * We have been ODD at the end of a DATA OUT
4436 * It is a data underrun condition.
4438 case SIR_SODL_UNDERRUN:
4440 OUTONB(np, HF_PRT, HF_EXT_ERR);
4441 cp->xerr_status |= XE_SODL_UNRUN;
4445 * The device wants us to tranfer more data than
4446 * expected or in the wrong direction.
4447 * The number of extra bytes is in scratcha.
4448 * It is a data overrun condition.
4450 case SIR_DATA_OVERRUN:
4452 OUTONB(np, HF_PRT, HF_EXT_ERR);
4453 cp->xerr_status |= XE_EXTRA_DATA;
4454 cp->extra_bytes += INL(np, nc_scratcha);
4458 * The device switched to an illegal phase (4/5).
4462 OUTONB(np, HF_PRT, HF_EXT_ERR);
4463 cp->xerr_status |= XE_BAD_PHASE;
4467 * We received a message.
4469 case SIR_MSG_RECEIVED:
4472 switch (np->msgin [0]) {
4474 * We received an extended message.
4475 * We handle MODIFY DATA POINTER, SDTR, WDTR
4476 * and reject all other extended messages.
4479 switch (np->msgin [2]) {
4481 if (DEBUG_FLAGS & DEBUG_POINTER)
4482 sym_print_msg(cp,"modify DP",np->msgin);
4483 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
4484 (np->msgin[5]<<8) + (np->msgin[6]);
4485 sym_modify_dp(np, tp, cp, tmp);
4488 sym_sync_nego(np, tp, cp);
4491 sym_ppr_nego(np, tp, cp);
4494 sym_wide_nego(np, tp, cp);
4501 * We received a 1/2 byte message not handled from SCRIPTS.
4502 * We are only expecting MESSAGE REJECT and IGNORE WIDE
4503 * RESIDUE messages that haven't been anticipated by
4504 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
4505 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
4508 if (DEBUG_FLAGS & DEBUG_POINTER)
4509 sym_print_msg(cp,"ign wide residue", np->msgin);
4510 if (cp->host_flags & HF_SENSE)
4511 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4513 sym_modify_dp(np, tp, cp, -1);
4516 if (INB(np, HS_PRT) == HS_NEGOTIATE)
4517 sym_nego_rejected(np, tp, cp);
4519 sym_print_addr(cp->cmd,
4520 "M_REJECT received (%x:%x).\n",
4521 scr_to_cpu(np->lastmsg), np->msgout[0]);
4530 * We received an unknown message.
4531 * Ignore all MSG IN phases and reject it.
4534 sym_print_msg(cp, "WEIRD message received", np->msgin);
4535 OUTL_DSP(np, SCRIPTB_BA(np, msg_weird));
4538 * Negotiation failed.
4539 * Target does not send us the reply.
4540 * Remove the HS_NEGOTIATE status.
4542 case SIR_NEGO_FAILED:
4543 OUTB(np, HS_PRT, HS_BUSY);
4545 * Negotiation failed.
4546 * Target does not want answer message.
4548 case SIR_NEGO_PROTO:
4549 sym_nego_default(np, tp, cp);
4557 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
4560 OUTL_DSP(np, SCRIPTA_BA(np, clrack));
4567 * Acquire a control block
4569 struct sym_ccb *sym_get_ccb (struct sym_hcb *np, struct scsi_cmnd *cmd, u_char tag_order)
4571 u_char tn = cmd->device->id;
4572 u_char ln = cmd->device->lun;
4573 struct sym_tcb *tp = &np->target[tn];
4574 struct sym_lcb *lp = sym_lp(tp, ln);
4575 u_short tag = NO_TAG;
4577 struct sym_ccb *cp = NULL;
4580 * Look for a free CCB
4582 if (sym_que_empty(&np->free_ccbq))
4584 qp = sym_remque_head(&np->free_ccbq);
4587 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4591 * If we have been asked for a tagged command.
4595 * Debugging purpose.
4597 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4598 assert(lp->busy_itl == 0);
4601 * Allocate resources for tags if not yet.
4604 sym_alloc_lcb_tags(np, tn, ln);
4609 * Get a tag for this SCSI IO and set up
4610 * the CCB bus address for reselection,
4611 * and count it for this LUN.
4612 * Toggle reselect path to tagged.
4614 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
4615 tag = lp->cb_tags[lp->ia_tag];
4616 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
4619 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4620 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
4622 cpu_to_scr(SCRIPTA_BA(np, resel_tag));
4624 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4625 cp->tags_si = lp->tags_si;
4626 ++lp->tags_sum[cp->tags_si];
4634 * This command will not be tagged.
4635 * If we already have either a tagged or untagged
4636 * one, refuse to overlap this untagged one.
4640 * Debugging purpose.
4642 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4643 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
4646 * Count this nexus for this LUN.
4647 * Set up the CCB bus address for reselection.
4648 * Toggle reselect path to untagged.
4651 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
4652 if (lp->busy_itl == 1) {
4653 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
4655 cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
4663 * Put the CCB into the busy queue.
4665 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4666 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4668 sym_remque(&cp->link2_ccbq);
4669 sym_insque_tail(&cp->link2_ccbq, &lp->waiting_ccbq);
4674 cp->odd_byte_adjustment = 0;
4676 cp->order = tag_order;
4680 if (DEBUG_FLAGS & DEBUG_TAGS) {
4681 sym_print_addr(cmd, "ccb @%p using tag %d.\n", cp, tag);
4687 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4692 * Release one control block
4694 void sym_free_ccb (struct sym_hcb *np, struct sym_ccb *cp)
4696 struct sym_tcb *tp = &np->target[cp->target];
4697 struct sym_lcb *lp = sym_lp(tp, cp->lun);
4699 if (DEBUG_FLAGS & DEBUG_TAGS) {
4700 sym_print_addr(cp->cmd, "ccb @%p freeing tag %d.\n",
4709 * If tagged, release the tag, set the relect path
4711 if (cp->tag != NO_TAG) {
4712 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
4713 --lp->tags_sum[cp->tags_si];
4716 * Free the tag value.
4718 lp->cb_tags[lp->if_tag] = cp->tag;
4719 if (++lp->if_tag == SYM_CONF_MAX_TASK)
4722 * Make the reselect path invalid,
4723 * and uncount this CCB.
4725 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
4727 } else { /* Untagged */
4729 * Make the reselect path invalid,
4730 * and uncount this CCB.
4732 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
4736 * If no JOB active, make the LUN reselect path invalid.
4738 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
4740 cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
4744 * We donnot queue more than 1 ccb per target
4745 * with negotiation at any time. If this ccb was
4746 * used for negotiation, clear this info in the tcb.
4748 if (cp == tp->nego_cp)
4751 #ifdef SYM_CONF_IARB_SUPPORT
4753 * If we just complete the last queued CCB,
4754 * clear this info that is no longer relevant.
4756 if (cp == np->last_cp)
4761 * Make this CCB available.
4764 cp->host_status = HS_IDLE;
4765 sym_remque(&cp->link_ccbq);
4766 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4768 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4770 sym_remque(&cp->link2_ccbq);
4771 sym_insque_tail(&cp->link2_ccbq, &np->dummy_ccbq);
4773 if (cp->tag != NO_TAG)
4776 --lp->started_no_tag;
4784 * Allocate a CCB from memory and initialize its fixed part.
4786 static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np)
4788 struct sym_ccb *cp = NULL;
4792 * Prevent from allocating more CCBs than we can
4793 * queue to the controller.
4795 if (np->actccbs >= SYM_CONF_MAX_START)
4799 * Allocate memory for this CCB.
4801 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
4811 * Compute the bus address of this ccb.
4813 cp->ccb_ba = vtobus(cp);
4816 * Insert this ccb into the hashed list.
4818 hcode = CCB_HASH_CODE(cp->ccb_ba);
4819 cp->link_ccbh = np->ccbh[hcode];
4820 np->ccbh[hcode] = cp;
4823 * Initialyze the start and restart actions.
4825 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, idle));
4826 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
4829 * Initilialyze some other fields.
4831 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
4834 * Chain into free ccb queue.
4836 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
4839 * Chain into optionnal lists.
4841 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4842 sym_insque_head(&cp->link2_ccbq, &np->dummy_ccbq);
4847 sym_mfree_dma(cp, sizeof(*cp), "CCB");
4852 * Look up a CCB from a DSA value.
4854 static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa)
4859 hcode = CCB_HASH_CODE(dsa);
4860 cp = np->ccbh[hcode];
4862 if (cp->ccb_ba == dsa)
4871 * Target control block initialisation.
4872 * Nothing important to do at the moment.
4874 static void sym_init_tcb (struct sym_hcb *np, u_char tn)
4876 #if 0 /* Hmmm... this checking looks paranoid. */
4878 * Check some alignments required by the chip.
4880 assert (((offsetof(struct sym_reg, nc_sxfer) ^
4881 offsetof(struct sym_tcb, head.sval)) &3) == 0);
4882 assert (((offsetof(struct sym_reg, nc_scntl3) ^
4883 offsetof(struct sym_tcb, head.wval)) &3) == 0);
4888 * Lun control block allocation and initialization.
4890 struct sym_lcb *sym_alloc_lcb (struct sym_hcb *np, u_char tn, u_char ln)
4892 struct sym_tcb *tp = &np->target[tn];
4893 struct sym_lcb *lp = NULL;
4896 * Initialize the target control block if not yet.
4898 sym_init_tcb (np, tn);
4901 * Allocate the LCB bus address array.
4902 * Compute the bus address of this table.
4904 if (ln && !tp->luntbl) {
4907 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
4910 for (i = 0 ; i < 64 ; i++)
4911 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
4912 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
4916 * Allocate the table of pointers for LUN(s) > 0, if needed.
4918 if (ln && !tp->lunmp) {
4919 tp->lunmp = kcalloc(SYM_CONF_MAX_LUN, sizeof(struct sym_lcb *),
4927 * Make it available to the chip.
4929 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
4934 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
4938 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
4942 * Let the itl task point to error handling.
4944 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
4947 * Set the reselect pattern to our default. :)
4949 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
4952 * Set user capabilities.
4954 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
4956 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
4958 * Initialize device queueing.
4960 sym_que_init(&lp->waiting_ccbq);
4961 sym_que_init(&lp->started_ccbq);
4962 lp->started_max = SYM_CONF_MAX_TASK;
4963 lp->started_limit = SYM_CONF_MAX_TASK;
4971 * Allocate LCB resources for tagged command queuing.
4973 static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln)
4975 struct sym_tcb *tp = &np->target[tn];
4976 struct sym_lcb *lp = sym_lp(tp, ln);
4980 * Allocate the task table and and the tag allocation
4981 * circular buffer. We want both or none.
4983 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
4986 lp->cb_tags = kcalloc(SYM_CONF_MAX_TASK, 1, GFP_ATOMIC);
4988 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
4989 lp->itlq_tbl = NULL;
4994 * Initialize the task table with invalid entries.
4996 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
4997 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
5000 * Fill up the tag buffer with tag numbers.
5002 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
5006 * Make the task table available to SCRIPTS,
5007 * And accept tagged commands now.
5009 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
5017 * Queue a SCSI IO to the controller.
5019 int sym_queue_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, struct sym_ccb *cp)
5021 struct scsi_device *sdev = cmd->device;
5029 * Keep track of the IO in our CCB.
5034 * Retrieve the target descriptor.
5036 tp = &np->target[cp->target];
5039 * Retrieve the lun descriptor.
5041 lp = sym_lp(tp, sdev->lun);
5043 can_disconnect = (cp->tag != NO_TAG) ||
5044 (lp && (lp->curr_flags & SYM_DISC_ENABLED));
5046 msgptr = cp->scsi_smsg;
5048 msgptr[msglen++] = IDENTIFY(can_disconnect, sdev->lun);
5051 * Build the tag message if present.
5053 if (cp->tag != NO_TAG) {
5054 u_char order = cp->order;
5062 order = M_SIMPLE_TAG;
5064 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
5066 * Avoid too much reordering of SCSI commands.
5067 * The algorithm tries to prevent completion of any
5068 * tagged command from being delayed against more
5069 * than 3 times the max number of queued commands.
5071 if (lp && lp->tags_since > 3*SYM_CONF_MAX_TAG) {
5072 lp->tags_si = !(lp->tags_si);
5073 if (lp->tags_sum[lp->tags_si]) {
5074 order = M_ORDERED_TAG;
5075 if ((DEBUG_FLAGS & DEBUG_TAGS)||sym_verbose>1) {
5077 "ordered tag forced.\n");
5083 msgptr[msglen++] = order;
5086 * For less than 128 tags, actual tags are numbered
5087 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
5088 * with devices that have problems with #TAG 0 or too
5089 * great #TAG numbers. For more tags (up to 256),
5090 * we use directly our tag number.
5092 #if SYM_CONF_MAX_TASK > (512/4)
5093 msgptr[msglen++] = cp->tag;
5095 msgptr[msglen++] = (cp->tag << 1) + 1;
5100 * Build a negotiation message if needed.
5101 * (nego_status is filled by sym_prepare_nego())
5103 cp->nego_status = 0;
5104 if (tp->tgoal.check_nego && !tp->nego_cp && lp) {
5105 msglen += sym_prepare_nego(np, cp, msgptr + msglen);
5111 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
5112 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA(np, resel_dsa));
5117 cp->phys.select.sel_id = cp->target;
5118 cp->phys.select.sel_scntl3 = tp->head.wval;
5119 cp->phys.select.sel_sxfer = tp->head.sval;
5120 cp->phys.select.sel_scntl4 = tp->head.uval;
5125 cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg);
5126 cp->phys.smsg.size = cpu_to_scr(msglen);
5131 cp->host_xflags = 0;
5132 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
5133 cp->ssss_status = S_ILLEGAL;
5134 cp->xerr_status = 0;
5136 cp->extra_bytes = 0;
5139 * extreme data pointer.
5140 * shall be positive, so -1 is lower than lowest.:)
5146 * Build the CDB and DATA descriptor block
5149 return sym_setup_data_and_start(np, cmd, cp);
5153 * Reset a SCSI target (all LUNs of this target).
5155 int sym_reset_scsi_target(struct sym_hcb *np, int target)
5159 if (target == np->myaddr || (u_int)target >= SYM_CONF_MAX_TARGET)
5162 tp = &np->target[target];
5165 np->istat_sem = SEM;
5166 OUTB(np, nc_istat, SIGP|SEM);
5174 static int sym_abort_ccb(struct sym_hcb *np, struct sym_ccb *cp, int timed_out)
5177 * Check that the IO is active.
5179 if (!cp || !cp->host_status || cp->host_status == HS_WAIT)
5183 * If a previous abort didn't succeed in time,
5184 * perform a BUS reset.
5187 sym_reset_scsi_bus(np, 1);
5192 * Mark the CCB for abort and allow time for.
5194 cp->to_abort = timed_out ? 2 : 1;
5197 * Tell the SCRIPTS processor to stop and synchronize with us.
5199 np->istat_sem = SEM;
5200 OUTB(np, nc_istat, SIGP|SEM);
5204 int sym_abort_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, int timed_out)
5210 * Look up our CCB control block.
5213 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5214 struct sym_ccb *cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5215 if (cp2->cmd == cmd) {
5221 return sym_abort_ccb(np, cp, timed_out);
5225 * Complete execution of a SCSI command with extended
5226 * error, SCSI status error, or having been auto-sensed.
5228 * The SCRIPTS processor is not running there, so we
5229 * can safely access IO registers and remove JOBs from
5231 * SCRATCHA is assumed to have been loaded with STARTPOS
5232 * before the SCRIPTS called the C code.
5234 void sym_complete_error(struct sym_hcb *np, struct sym_ccb *cp)
5236 struct scsi_device *sdev;
5237 struct scsi_cmnd *cmd;
5244 * Paranoid check. :)
5246 if (!cp || !cp->cmd)
5251 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
5252 dev_info(&sdev->sdev_gendev, "CCB=%p STAT=%x/%x/%x\n", cp,
5253 cp->host_status, cp->ssss_status, cp->host_flags);
5257 * Get target and lun pointers.
5259 tp = &np->target[cp->target];
5260 lp = sym_lp(tp, sdev->lun);
5263 * Check for extended errors.
5265 if (cp->xerr_status) {
5267 sym_print_xerr(cmd, cp->xerr_status);
5268 if (cp->host_status == HS_COMPLETE)
5269 cp->host_status = HS_COMP_ERR;
5273 * Calculate the residual.
5275 resid = sym_compute_residual(np, cp);
5277 if (!SYM_SETUP_RESIDUAL_SUPPORT) {/* If user does not want residuals */
5278 resid = 0; /* throw them away. :) */
5283 printf("XXXX RESID= %d - 0x%x\n", resid, resid);
5287 * Dequeue all queued CCBs for that device
5288 * not yet started by SCRIPTS.
5290 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
5291 i = sym_dequeue_from_squeue(np, i, cp->target, sdev->lun, -1);
5294 * Restart the SCRIPTS processor.
5296 OUTL_DSP(np, SCRIPTA_BA(np, start));
5298 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5299 if (cp->host_status == HS_COMPLETE &&
5300 cp->ssss_status == S_QUEUE_FULL) {
5301 if (!lp || lp->started_tags - i < 2)
5304 * Decrease queue depth as needed.
5306 lp->started_max = lp->started_tags - i - 1;
5309 if (sym_verbose >= 2) {
5310 sym_print_addr(cmd, " queue depth is now %d\n",
5317 cp->host_status = HS_BUSY;
5318 cp->ssss_status = S_ILLEGAL;
5321 * Let's requeue it to device.
5323 sym_set_cam_status(cmd, DID_SOFT_ERROR);
5329 * Build result in CAM ccb.
5331 sym_set_cam_result_error(np, cp, resid);
5333 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5337 * Add this one to the COMP queue.
5339 sym_remque(&cp->link_ccbq);
5340 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
5343 * Complete all those commands with either error
5344 * or requeue condition.
5346 sym_flush_comp_queue(np, 0);
5348 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5350 * Donnot start more than 1 command after an error.
5352 sym_start_next_ccbs(np, lp, 1);
5357 * Complete execution of a successful SCSI command.
5359 * Only successful commands go to the DONE queue,
5360 * since we need to have the SCRIPTS processor
5361 * stopped on any error condition.
5362 * The SCRIPTS processor is running while we are
5363 * completing successful commands.
5365 void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp)
5369 struct scsi_cmnd *cmd;
5373 * Paranoid check. :)
5375 if (!cp || !cp->cmd)
5377 assert (cp->host_status == HS_COMPLETE);
5385 * Get target and lun pointers.
5387 tp = &np->target[cp->target];
5388 lp = sym_lp(tp, cp->lun);
5391 * If all data have been transferred, given than no
5392 * extended error did occur, there is no residual.
5395 if (cp->phys.head.lastp != cp->goalp)
5396 resid = sym_compute_residual(np, cp);
5399 * Wrong transfer residuals may be worse than just always
5400 * returning zero. User can disable this feature in
5401 * sym53c8xx.h. Residual support is enabled by default.
5403 if (!SYM_SETUP_RESIDUAL_SUPPORT)
5407 printf("XXXX RESID= %d - 0x%x\n", resid, resid);
5411 * Build result in CAM ccb.
5413 sym_set_cam_result_ok(cp, cmd, resid);
5415 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5417 * If max number of started ccbs had been reduced,
5418 * increase it if 200 good status received.
5420 if (lp && lp->started_max < lp->started_limit) {
5422 if (lp->num_sgood >= 200) {
5425 if (sym_verbose >= 2) {
5426 sym_print_addr(cmd, " queue depth is now %d\n",
5436 sym_free_ccb (np, cp);
5438 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5440 * Requeue a couple of awaiting scsi commands.
5442 if (!sym_que_empty(&lp->waiting_ccbq))
5443 sym_start_next_ccbs(np, lp, 2);
5446 * Complete the command.
5448 sym_xpt_done(np, cmd);
5452 * Soft-attach the controller.
5454 int sym_hcb_attach(struct Scsi_Host *shost, struct sym_fw *fw, struct sym_nvram *nvram)
5456 struct sym_hcb *np = sym_get_hcb(shost);
5460 * Get some info about the firmware.
5462 np->scripta_sz = fw->a_size;
5463 np->scriptb_sz = fw->b_size;
5464 np->scriptz_sz = fw->z_size;
5465 np->fw_setup = fw->setup;
5466 np->fw_patch = fw->patch;
5467 np->fw_name = fw->name;
5470 * Save setting of some IO registers, so we will
5471 * be able to probe specific implementations.
5473 sym_save_initial_setting (np);
5476 * Reset the chip now, since it has been reported
5477 * that SCSI clock calibration may not work properly
5478 * if the chip is currently active.
5483 * Prepare controller and devices settings, according
5484 * to chip features, user set-up and driver set-up.
5486 sym_prepare_setting(shost, np, nvram);
5489 * Check the PCI clock frequency.
5490 * Must be performed after prepare_setting since it destroys
5491 * STEST1 that is used to probe for the clock doubler.
5493 i = sym_getpciclock(np);
5494 if (i > 37000 && !(np->features & FE_66MHZ))
5495 printf("%s: PCI BUS clock seems too high: %u KHz.\n",
5499 * Allocate the start queue.
5501 np->squeue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
5504 np->squeue_ba = vtobus(np->squeue);
5507 * Allocate the done queue.
5509 np->dqueue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
5512 np->dqueue_ba = vtobus(np->dqueue);
5515 * Allocate the target bus address array.
5517 np->targtbl = sym_calloc_dma(256, "TARGTBL");
5520 np->targtbl_ba = vtobus(np->targtbl);
5523 * Allocate SCRIPTS areas.
5525 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
5526 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
5527 np->scriptz0 = sym_calloc_dma(np->scriptz_sz, "SCRIPTZ0");
5528 if (!np->scripta0 || !np->scriptb0 || !np->scriptz0)
5532 * Allocate the array of lists of CCBs hashed by DSA.
5534 np->ccbh = kcalloc(sizeof(struct sym_ccb **), CCB_HASH_SIZE, GFP_KERNEL);
5539 * Initialyze the CCB free and busy queues.
5541 sym_que_init(&np->free_ccbq);
5542 sym_que_init(&np->busy_ccbq);
5543 sym_que_init(&np->comp_ccbq);
5546 * Initialization for optional handling
5547 * of device queueing.
5549 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
5550 sym_que_init(&np->dummy_ccbq);
5553 * Allocate some CCB. We need at least ONE.
5555 if (!sym_alloc_ccb(np))
5559 * Calculate BUS addresses where we are going
5560 * to load the SCRIPTS.
5562 np->scripta_ba = vtobus(np->scripta0);
5563 np->scriptb_ba = vtobus(np->scriptb0);
5564 np->scriptz_ba = vtobus(np->scriptz0);
5567 np->scripta_ba = np->ram_ba;
5568 if (np->features & FE_RAM8K) {
5570 np->scriptb_ba = np->scripta_ba + 4096;
5571 #if 0 /* May get useful for 64 BIT PCI addressing */
5572 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
5580 * Copy scripts to controller instance.
5582 memcpy(np->scripta0, fw->a_base, np->scripta_sz);
5583 memcpy(np->scriptb0, fw->b_base, np->scriptb_sz);
5584 memcpy(np->scriptz0, fw->z_base, np->scriptz_sz);
5587 * Setup variable parts in scripts and compute
5588 * scripts bus addresses used from the C code.
5590 np->fw_setup(np, fw);
5593 * Bind SCRIPTS with physical addresses usable by the
5594 * SCRIPTS processor (as seen from the BUS = BUS addresses).
5596 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
5597 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
5598 sym_fw_bind_script(np, (u32 *) np->scriptz0, np->scriptz_sz);
5600 #ifdef SYM_CONF_IARB_SUPPORT
5602 * If user wants IARB to be set when we win arbitration
5603 * and have other jobs, compute the max number of consecutive
5604 * settings of IARB hints before we leave devices a chance to
5605 * arbitrate for reselection.
5607 #ifdef SYM_SETUP_IARB_MAX
5608 np->iarb_max = SYM_SETUP_IARB_MAX;
5615 * Prepare the idle and invalid task actions.
5617 np->idletask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5618 np->idletask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5619 np->idletask_ba = vtobus(&np->idletask);
5621 np->notask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5622 np->notask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5623 np->notask_ba = vtobus(&np->notask);
5625 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5626 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
5627 np->bad_itl_ba = vtobus(&np->bad_itl);
5629 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA(np, idle));
5630 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA(np,bad_i_t_l_q));
5631 np->bad_itlq_ba = vtobus(&np->bad_itlq);
5634 * Allocate and prepare the lun JUMP table that is used
5635 * for a target prior the probing of devices (bad lun table).
5636 * A private table will be allocated for the target on the
5637 * first INQUIRY response received.
5639 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
5643 np->badlun_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
5644 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
5645 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
5648 * Prepare the bus address array that contains the bus
5649 * address of each target control block.
5650 * For now, assume all logical units are wrong. :)
5652 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
5653 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
5654 np->target[i].head.luntbl_sa =
5655 cpu_to_scr(vtobus(np->badluntbl));
5656 np->target[i].head.lun0_sa =
5657 cpu_to_scr(vtobus(&np->badlun_sa));
5661 * Now check the cache handling of the pci chipset.
5663 if (sym_snooptest (np)) {
5664 printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np));
5669 * Sigh! we are done.
5678 * Free everything that has been allocated for this device.
5680 void sym_hcb_free(struct sym_hcb *np)
5688 sym_mfree_dma(np->scriptz0, np->scriptz_sz, "SCRIPTZ0");
5690 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
5692 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
5694 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
5696 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
5699 while ((qp = sym_remque_head(&np->free_ccbq)) != 0) {
5700 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5701 sym_mfree_dma(cp, sizeof(*cp), "CCB");
5707 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
5709 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
5710 tp = &np->target[target];
5711 #if SYM_CONF_MAX_LUN > 1
5716 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
git://ftp.safe.ca / safe / jmp / linux-2.6 / blob