SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/rtl818x/rtl8180_dev.c

   1
   2 /*
   3  * Linux device driver for RTL8180 / RTL8185
   4  *
   5  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   6  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   7  *
   8  * Based on the r8180 driver, which is:
   9  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  10  *
  11  * Thanks to Realtek for their support!
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/pci.h>
  20 #include <linux/delay.h>
  21 #include <linux/etherdevice.h>
  22 #include <linux/eeprom_93cx6.h>
  23 #include <net/mac80211.h>
  24
  25 #include "rtl8180.h"
  26 #include "rtl8180_rtl8225.h"
  27 #include "rtl8180_sa2400.h"
  28 #include "rtl8180_max2820.h"
  29 #include "rtl8180_grf5101.h"
  30
  31 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  32 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  33 MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver");
  34 MODULE_LICENSE("GPL");
  35
  36 static DEFINE_PCI_DEVICE_TABLE(rtl8180_table) = {
  37         /* rtl8185 */
  38         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
  39         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) },
  40         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) },
  41
  42         /* rtl8180 */
  43         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) },
  44         { PCI_DEVICE(0x1799, 0x6001) },
  45         { PCI_DEVICE(0x1799, 0x6020) },
  46         { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) },
  47         { }
  48 };
  49
  50 MODULE_DEVICE_TABLE(pci, rtl8180_table);
  51
  52 static const struct ieee80211_rate rtl818x_rates[] = {
  53         { .bitrate = 10, .hw_value = 0, },
  54         { .bitrate = 20, .hw_value = 1, },
  55         { .bitrate = 55, .hw_value = 2, },
  56         { .bitrate = 110, .hw_value = 3, },
  57         { .bitrate = 60, .hw_value = 4, },
  58         { .bitrate = 90, .hw_value = 5, },
  59         { .bitrate = 120, .hw_value = 6, },
  60         { .bitrate = 180, .hw_value = 7, },
  61         { .bitrate = 240, .hw_value = 8, },
  62         { .bitrate = 360, .hw_value = 9, },
  63         { .bitrate = 480, .hw_value = 10, },
  64         { .bitrate = 540, .hw_value = 11, },
  65 };
  66
  67 static const struct ieee80211_channel rtl818x_channels[] = {
  68         { .center_freq = 2412 },
  69         { .center_freq = 2417 },
  70         { .center_freq = 2422 },
  71         { .center_freq = 2427 },
  72         { .center_freq = 2432 },
  73         { .center_freq = 2437 },
  74         { .center_freq = 2442 },
  75         { .center_freq = 2447 },
  76         { .center_freq = 2452 },
  77         { .center_freq = 2457 },
  78         { .center_freq = 2462 },
  79         { .center_freq = 2467 },
  80         { .center_freq = 2472 },
  81         { .center_freq = 2484 },
  82 };
  83
  84
  85 void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  86 {
  87         struct rtl8180_priv *priv = dev->priv;
  88         int i = 10;
  89         u32 buf;
  90
  91         buf = (data << 8) | addr;
  92
  93         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80);
  94         while (i--) {
  95                 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf);
  96                 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
  97                         return;
  98         }
  99 }
 100
 101 static void rtl8180_handle_rx(struct ieee80211_hw *dev)
 102 {
 103         struct rtl8180_priv *priv = dev->priv;
 104         unsigned int count = 32;
 105
 106         while (count--) {
 107                 struct rtl8180_rx_desc *entry = &priv->rx_ring[priv->rx_idx];
 108                 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
 109                 u32 flags = le32_to_cpu(entry->flags);
 110
 111                 if (flags & RTL818X_RX_DESC_FLAG_OWN)
 112                         return;
 113
 114                 if (unlikely(flags & (RTL818X_RX_DESC_FLAG_DMA_FAIL |
 115                                       RTL818X_RX_DESC_FLAG_FOF |
 116                                       RTL818X_RX_DESC_FLAG_RX_ERR)))
 117                         goto done;
 118                 else {
 119                         u32 flags2 = le32_to_cpu(entry->flags2);
 120                         struct ieee80211_rx_status rx_status = {0};
 121                         struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE);
 122
 123                         if (unlikely(!new_skb))
 124                                 goto done;
 125
 126                         pci_unmap_single(priv->pdev,
 127                                          *((dma_addr_t *)skb->cb),
 128                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 129                         skb_put(skb, flags & 0xFFF);
 130
 131                         rx_status.antenna = (flags2 >> 15) & 1;
 132                         /* TODO: improve signal/rssi reporting */
 133                         rx_status.signal = (flags2 >> 8) & 0x7F;
 134                         /* XXX: is this correct? */
 135                         rx_status.rate_idx = (flags >> 20) & 0xF;
 136                         rx_status.freq = dev->conf.channel->center_freq;
 137                         rx_status.band = dev->conf.channel->band;
 138                         rx_status.mactime = le64_to_cpu(entry->tsft);
 139                         rx_status.flag |= RX_FLAG_TSFT;
 140                         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 141                                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 142
 143                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 144                         ieee80211_rx_irqsafe(dev, skb);
 145
 146                         skb = new_skb;
 147                         priv->rx_buf[priv->rx_idx] = skb;
 148                         *((dma_addr_t *) skb->cb) =
 149                                 pci_map_single(priv->pdev, skb_tail_pointer(skb),
 150                                                MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 151                 }
 152
 153         done:
 154                 entry->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
 155                 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
 156                                            MAX_RX_SIZE);
 157                 if (priv->rx_idx == 31)
 158                         entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
 159                 priv->rx_idx = (priv->rx_idx + 1) % 32;
 160         }
 161 }
 162
 163 static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
 164 {
 165         struct rtl8180_priv *priv = dev->priv;
 166         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 167
 168         while (skb_queue_len(&ring->queue)) {
 169                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 170                 struct sk_buff *skb;
 171                 struct ieee80211_tx_info *info;
 172                 u32 flags = le32_to_cpu(entry->flags);
 173
 174                 if (flags & RTL818X_TX_DESC_FLAG_OWN)
 175                         return;
 176
 177                 ring->idx = (ring->idx + 1) % ring->entries;
 178                 skb = __skb_dequeue(&ring->queue);
 179                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 180                                  skb->len, PCI_DMA_TODEVICE);
 181
 182                 info = IEEE80211_SKB_CB(skb);
 183                 ieee80211_tx_info_clear_status(info);
 184
 185                 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
 186                     (flags & RTL818X_TX_DESC_FLAG_TX_OK))
 187                         info->flags |= IEEE80211_TX_STAT_ACK;
 188
 189                 info->status.rates[0].count = (flags & 0xFF) + 1;
 190                 info->status.rates[1].idx = -1;
 191
 192                 ieee80211_tx_status_irqsafe(dev, skb);
 193                 if (ring->entries - skb_queue_len(&ring->queue) == 2)
 194                         ieee80211_wake_queue(dev, prio);
 195         }
 196 }
 197
 198 static irqreturn_t rtl8180_interrupt(int irq, void *dev_id)
 199 {
 200         struct ieee80211_hw *dev = dev_id;
 201         struct rtl8180_priv *priv = dev->priv;
 202         u16 reg;
 203
 204         spin_lock(&priv->lock);
 205         reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
 206         if (unlikely(reg == 0xFFFF)) {
 207                 spin_unlock(&priv->lock);
 208                 return IRQ_HANDLED;
 209         }
 210
 211         rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
 212
 213         if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR))
 214                 rtl8180_handle_tx(dev, 3);
 215
 216         if (reg & (RTL818X_INT_TXH_OK | RTL818X_INT_TXH_ERR))
 217                 rtl8180_handle_tx(dev, 2);
 218
 219         if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR))
 220                 rtl8180_handle_tx(dev, 1);
 221
 222         if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR))
 223                 rtl8180_handle_tx(dev, 0);
 224
 225         if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
 226                 rtl8180_handle_rx(dev);
 227
 228         spin_unlock(&priv->lock);
 229
 230         return IRQ_HANDLED;
 231 }
 232
 233 static int rtl8180_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 234 {
 235         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 236         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
 237         struct rtl8180_priv *priv = dev->priv;
 238         struct rtl8180_tx_ring *ring;
 239         struct rtl8180_tx_desc *entry;
 240         unsigned long flags;
 241         unsigned int idx, prio;
 242         dma_addr_t mapping;
 243         u32 tx_flags;
 244         u8 rc_flags;
 245         u16 plcp_len = 0;
 246         __le16 rts_duration = 0;
 247
 248         prio = skb_get_queue_mapping(skb);
 249         ring = &priv->tx_ring[prio];
 250
 251         mapping = pci_map_single(priv->pdev, skb->data,
 252                                  skb->len, PCI_DMA_TODEVICE);
 253
 254         tx_flags = RTL818X_TX_DESC_FLAG_OWN | RTL818X_TX_DESC_FLAG_FS |
 255                    RTL818X_TX_DESC_FLAG_LS |
 256                    (ieee80211_get_tx_rate(dev, info)->hw_value << 24) |
 257                    skb->len;
 258
 259         if (priv->r8185)
 260                 tx_flags |= RTL818X_TX_DESC_FLAG_DMA |
 261                             RTL818X_TX_DESC_FLAG_NO_ENC;
 262
 263         rc_flags = info->control.rates[0].flags;
 264         if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 265                 tx_flags |= RTL818X_TX_DESC_FLAG_RTS;
 266                 tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 267         } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 268                 tx_flags |= RTL818X_TX_DESC_FLAG_CTS;
 269                 tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 270         }
 271
 272         if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
 273                 rts_duration = ieee80211_rts_duration(dev, priv->vif, skb->len,
 274                                                       info);
 275
 276         if (!priv->r8185) {
 277                 unsigned int remainder;
 278
 279                 plcp_len = DIV_ROUND_UP(16 * (skb->len + 4),
 280                                 (ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
 281                 remainder = (16 * (skb->len + 4)) %
 282                             ((ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
 283                 if (remainder <= 6)
 284                         plcp_len |= 1 << 15;
 285         }
 286
 287         spin_lock_irqsave(&priv->lock, flags);
 288
 289         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
 290                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
 291                         priv->seqno += 0x10;
 292                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
 293                 hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
 294         }
 295
 296         idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
 297         entry = &ring->desc[idx];
 298
 299         entry->rts_duration = rts_duration;
 300         entry->plcp_len = cpu_to_le16(plcp_len);
 301         entry->tx_buf = cpu_to_le32(mapping);
 302         entry->frame_len = cpu_to_le32(skb->len);
 303         entry->flags2 = info->control.rates[1].idx >= 0 ?
 304                 ieee80211_get_alt_retry_rate(dev, info, 0)->bitrate << 4 : 0;
 305         entry->retry_limit = info->control.rates[0].count;
 306         entry->flags = cpu_to_le32(tx_flags);
 307         __skb_queue_tail(&ring->queue, skb);
 308         if (ring->entries - skb_queue_len(&ring->queue) < 2)
 309                 ieee80211_stop_queue(dev, prio);
 310
 311         spin_unlock_irqrestore(&priv->lock, flags);
 312
 313         rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << (prio + 4)));
 314
 315         return 0;
 316 }
 317
 318 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
 319 {
 320         u8 reg;
 321
 322         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 323         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 324         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 325                  reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 326         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
 327         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 328                  reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 329         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 330 }
 331
 332 static int rtl8180_init_hw(struct ieee80211_hw *dev)
 333 {
 334         struct rtl8180_priv *priv = dev->priv;
 335         u16 reg;
 336
 337         rtl818x_iowrite8(priv, &priv->map->CMD, 0);
 338         rtl818x_ioread8(priv, &priv->map->CMD);
 339         msleep(10);
 340
 341         /* reset */
 342         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 343         rtl818x_ioread8(priv, &priv->map->CMD);
 344
 345         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 346         reg &= (1 << 1);
 347         reg |= RTL818X_CMD_RESET;
 348         rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
 349         rtl818x_ioread8(priv, &priv->map->CMD);
 350         msleep(200);
 351
 352         /* check success of reset */
 353         if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
 354                 printk(KERN_ERR "%s: reset timeout!\n", wiphy_name(dev->wiphy));
 355                 return -ETIMEDOUT;
 356         }
 357
 358         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 359         rtl818x_ioread8(priv, &priv->map->CMD);
 360         msleep(200);
 361
 362         if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
 363                 /* For cardbus */
 364                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 365                 reg |= 1 << 1;
 366                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 367                 reg = rtl818x_ioread16(priv, &priv->map->FEMR);
 368                 reg |= (1 << 15) | (1 << 14) | (1 << 4);
 369                 rtl818x_iowrite16(priv, &priv->map->FEMR, reg);
 370         }
 371
 372         rtl818x_iowrite8(priv, &priv->map->MSR, 0);
 373
 374         if (!priv->r8185)
 375                 rtl8180_set_anaparam(priv, priv->anaparam);
 376
 377         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 378         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 379         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 380         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 381         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 382
 383         /* TODO: necessary? specs indicate not */
 384         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 385         reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 386         rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
 387         if (priv->r8185) {
 388                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 389                 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
 390         }
 391         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 392
 393         /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
 394
 395         /* TODO: turn off hw wep on rtl8180 */
 396
 397         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 398
 399         if (priv->r8185) {
 400                 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 401                 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 402                 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 403
 404                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 405
 406                 /* TODO: set ClkRun enable? necessary? */
 407                 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
 408                 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
 409                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 410                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 411                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
 412                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 413         } else {
 414                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1);
 415                 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
 416
 417                 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
 418                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
 419         }
 420
 421         priv->rf->init(dev);
 422         if (priv->r8185)
 423                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 424         return 0;
 425 }
 426
 427 static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
 428 {
 429         struct rtl8180_priv *priv = dev->priv;
 430         struct rtl8180_rx_desc *entry;
 431         int i;
 432
 433         priv->rx_ring = pci_alloc_consistent(priv->pdev,
 434                                              sizeof(*priv->rx_ring) * 32,
 435                                              &priv->rx_ring_dma);
 436
 437         if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
 438                 printk(KERN_ERR "%s: Cannot allocate RX ring\n",
 439                        wiphy_name(dev->wiphy));
 440                 return -ENOMEM;
 441         }
 442
 443         memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * 32);
 444         priv->rx_idx = 0;
 445
 446         for (i = 0; i < 32; i++) {
 447                 struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE);
 448                 dma_addr_t *mapping;
 449                 entry = &priv->rx_ring[i];
 450                 if (!skb)
 451                         return 0;
 452
 453                 priv->rx_buf[i] = skb;
 454                 mapping = (dma_addr_t *)skb->cb;
 455                 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
 456                                           MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 457                 entry->rx_buf = cpu_to_le32(*mapping);
 458                 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
 459                                            MAX_RX_SIZE);
 460         }
 461         entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
 462         return 0;
 463 }
 464
 465 static void rtl8180_free_rx_ring(struct ieee80211_hw *dev)
 466 {
 467         struct rtl8180_priv *priv = dev->priv;
 468         int i;
 469
 470         for (i = 0; i < 32; i++) {
 471                 struct sk_buff *skb = priv->rx_buf[i];
 472                 if (!skb)
 473                         continue;
 474
 475                 pci_unmap_single(priv->pdev,
 476                                  *((dma_addr_t *)skb->cb),
 477                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 478                 kfree_skb(skb);
 479         }
 480
 481         pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * 32,
 482                             priv->rx_ring, priv->rx_ring_dma);
 483         priv->rx_ring = NULL;
 484 }
 485
 486 static int rtl8180_init_tx_ring(struct ieee80211_hw *dev,
 487                                 unsigned int prio, unsigned int entries)
 488 {
 489         struct rtl8180_priv *priv = dev->priv;
 490         struct rtl8180_tx_desc *ring;
 491         dma_addr_t dma;
 492         int i;
 493
 494         ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
 495         if (!ring || (unsigned long)ring & 0xFF) {
 496                 printk(KERN_ERR "%s: Cannot allocate TX ring (prio = %d)\n",
 497                        wiphy_name(dev->wiphy), prio);
 498                 return -ENOMEM;
 499         }
 500
 501         memset(ring, 0, sizeof(*ring)*entries);
 502         priv->tx_ring[prio].desc = ring;
 503         priv->tx_ring[prio].dma = dma;
 504         priv->tx_ring[prio].idx = 0;
 505         priv->tx_ring[prio].entries = entries;
 506         skb_queue_head_init(&priv->tx_ring[prio].queue);
 507
 508         for (i = 0; i < entries; i++)
 509                 ring[i].next_tx_desc =
 510                         cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
 511
 512         return 0;
 513 }
 514
 515 static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio)
 516 {
 517         struct rtl8180_priv *priv = dev->priv;
 518         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 519
 520         while (skb_queue_len(&ring->queue)) {
 521                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 522                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
 523
 524                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 525                                  skb->len, PCI_DMA_TODEVICE);
 526                 kfree_skb(skb);
 527                 ring->idx = (ring->idx + 1) % ring->entries;
 528         }
 529
 530         pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
 531                             ring->desc, ring->dma);
 532         ring->desc = NULL;
 533 }
 534
 535 static int rtl8180_start(struct ieee80211_hw *dev)
 536 {
 537         struct rtl8180_priv *priv = dev->priv;
 538         int ret, i;
 539         u32 reg;
 540
 541         ret = rtl8180_init_rx_ring(dev);
 542         if (ret)
 543                 return ret;
 544
 545         for (i = 0; i < 4; i++)
 546                 if ((ret = rtl8180_init_tx_ring(dev, i, 16)))
 547                         goto err_free_rings;
 548
 549         ret = rtl8180_init_hw(dev);
 550         if (ret)
 551                 goto err_free_rings;
 552
 553         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 554         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 555         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 556         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 557         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 558
 559         ret = request_irq(priv->pdev->irq, rtl8180_interrupt,
 560                           IRQF_SHARED, KBUILD_MODNAME, dev);
 561         if (ret) {
 562                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 563                        wiphy_name(dev->wiphy));
 564                 goto err_free_rings;
 565         }
 566
 567         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 568
 569         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 570         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 571
 572         reg = RTL818X_RX_CONF_ONLYERLPKT |
 573               RTL818X_RX_CONF_RX_AUTORESETPHY |
 574               RTL818X_RX_CONF_MGMT |
 575               RTL818X_RX_CONF_DATA |
 576               (7 << 8 /* MAX RX DMA */) |
 577               RTL818X_RX_CONF_BROADCAST |
 578               RTL818X_RX_CONF_NICMAC;
 579
 580         if (priv->r8185)
 581                 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
 582         else {
 583                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
 584                         ? RTL818X_RX_CONF_CSDM1 : 0;
 585                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
 586                         ? RTL818X_RX_CONF_CSDM2 : 0;
 587         }
 588
 589         priv->rx_conf = reg;
 590         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 591
 592         if (priv->r8185) {
 593                 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 594                 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 595                 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 596                 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 597
 598                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 599                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 600                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 601                 reg |=  RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 602                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 603
 604                 /* disable early TX */
 605                 rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f);
 606         }
 607
 608         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 609         reg |= (6 << 21 /* MAX TX DMA */) |
 610                RTL818X_TX_CONF_NO_ICV;
 611
 612         if (priv->r8185)
 613                 reg &= ~RTL818X_TX_CONF_PROBE_DTS;
 614         else
 615                 reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
 616
 617         /* different meaning, same value on both rtl8185 and rtl8180 */
 618         reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
 619
 620         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 621
 622         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 623         reg |= RTL818X_CMD_RX_ENABLE;
 624         reg |= RTL818X_CMD_TX_ENABLE;
 625         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 626
 627         return 0;
 628
 629  err_free_rings:
 630         rtl8180_free_rx_ring(dev);
 631         for (i = 0; i < 4; i++)
 632                 if (priv->tx_ring[i].desc)
 633                         rtl8180_free_tx_ring(dev, i);
 634
 635         return ret;
 636 }
 637
 638 static void rtl8180_stop(struct ieee80211_hw *dev)
 639 {
 640         struct rtl8180_priv *priv = dev->priv;
 641         u8 reg;
 642         int i;
 643
 644         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 645
 646         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 647         reg &= ~RTL818X_CMD_TX_ENABLE;
 648         reg &= ~RTL818X_CMD_RX_ENABLE;
 649         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 650
 651         priv->rf->stop(dev);
 652
 653         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 654         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 655         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 656         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 657
 658         free_irq(priv->pdev->irq, dev);
 659
 660         rtl8180_free_rx_ring(dev);
 661         for (i = 0; i < 4; i++)
 662                 rtl8180_free_tx_ring(dev, i);
 663 }
 664
 665 static u64 rtl8180_get_tsf(struct ieee80211_hw *dev)
 666 {
 667         struct rtl8180_priv *priv = dev->priv;
 668
 669         return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
 670                (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
 671 }
 672
 673 void rtl8180_beacon_work(struct work_struct *work)
 674 {
 675         struct rtl8180_vif *vif_priv =
 676                 container_of(work, struct rtl8180_vif, beacon_work.work);
 677         struct ieee80211_vif *vif =
 678                 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv);
 679         struct ieee80211_hw *dev = vif_priv->dev;
 680         struct ieee80211_mgmt *mgmt;
 681         struct sk_buff *skb;
 682         int err = 0;
 683
 684         /* don't overflow the tx ring */
 685         if (ieee80211_queue_stopped(dev, 0))
 686                 goto resched;
 687
 688         /* grab a fresh beacon */
 689         skb = ieee80211_beacon_get(dev, vif);
 690
 691         /*
 692          * update beacon timestamp w/ TSF value
 693          * TODO: make hardware update beacon timestamp
 694          */
 695         mgmt = (struct ieee80211_mgmt *)skb->data;
 696         mgmt->u.beacon.timestamp = cpu_to_le64(rtl8180_get_tsf(dev));
 697
 698         /* TODO: use actual beacon queue */
 699         skb_set_queue_mapping(skb, 0);
 700
 701         err = rtl8180_tx(dev, skb);
 702         WARN_ON(err);
 703
 704 resched:
 705         /*
 706          * schedule next beacon
 707          * TODO: use hardware support for beacon timing
 708          */
 709         schedule_delayed_work(&vif_priv->beacon_work,
 710                         usecs_to_jiffies(1024 * vif->bss_conf.beacon_int));
 711 }
 712
 713 static int rtl8180_add_interface(struct ieee80211_hw *dev,
 714                                  struct ieee80211_vif *vif)
 715 {
 716         struct rtl8180_priv *priv = dev->priv;
 717         struct rtl8180_vif *vif_priv;
 718
 719         /*
 720          * We only support one active interface at a time.
 721          */
 722         if (priv->vif)
 723                 return -EBUSY;
 724
 725         switch (vif->type) {
 726         case NL80211_IFTYPE_STATION:
 727         case NL80211_IFTYPE_ADHOC:
 728                 break;
 729         default:
 730                 return -EOPNOTSUPP;
 731         }
 732
 733         priv->vif = vif;
 734
 735         /* Initialize driver private area */
 736         vif_priv = (struct rtl8180_vif *)&vif->drv_priv;
 737         vif_priv->dev = dev;
 738         INIT_DELAYED_WORK(&vif_priv->beacon_work, rtl8180_beacon_work);
 739         vif_priv->enable_beacon = false;
 740
 741         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 742         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
 743                           le32_to_cpu(*(__le32 *)vif->addr));
 744         rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
 745                           le16_to_cpu(*(__le16 *)(vif->addr + 4)));
 746         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 747
 748         return 0;
 749 }
 750
 751 static void rtl8180_remove_interface(struct ieee80211_hw *dev,
 752                                      struct ieee80211_vif *vif)
 753 {
 754         struct rtl8180_priv *priv = dev->priv;
 755         priv->vif = NULL;
 756 }
 757
 758 static int rtl8180_config(struct ieee80211_hw *dev, u32 changed)
 759 {
 760         struct rtl8180_priv *priv = dev->priv;
 761         struct ieee80211_conf *conf = &dev->conf;
 762
 763         priv->rf->set_chan(dev, conf);
 764
 765         return 0;
 766 }
 767
 768 static void rtl8180_bss_info_changed(struct ieee80211_hw *dev,
 769                                      struct ieee80211_vif *vif,
 770                                      struct ieee80211_bss_conf *info,
 771                                      u32 changed)
 772 {
 773         struct rtl8180_priv *priv = dev->priv;
 774         struct rtl8180_vif *vif_priv;
 775         int i;
 776
 777         vif_priv = (struct rtl8180_vif *)&vif->drv_priv;
 778
 779         if (changed & BSS_CHANGED_BSSID) {
 780                 for (i = 0; i < ETH_ALEN; i++)
 781                         rtl818x_iowrite8(priv, &priv->map->BSSID[i],
 782                                          info->bssid[i]);
 783
 784                 if (is_valid_ether_addr(info->bssid))
 785                         rtl818x_iowrite8(priv, &priv->map->MSR,
 786                                          RTL818X_MSR_INFRA);
 787                 else
 788                         rtl818x_iowrite8(priv, &priv->map->MSR,
 789                                          RTL818X_MSR_NO_LINK);
 790         }
 791
 792         if (changed & BSS_CHANGED_ERP_SLOT && priv->rf->conf_erp)
 793                 priv->rf->conf_erp(dev, info);
 794
 795         if (changed & BSS_CHANGED_BEACON_ENABLED)
 796                 vif_priv->enable_beacon = info->enable_beacon;
 797
 798         if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) {
 799                 cancel_delayed_work_sync(&vif_priv->beacon_work);
 800                 if (vif_priv->enable_beacon)
 801                         schedule_work(&vif_priv->beacon_work.work);
 802         }
 803 }
 804
 805 static u64 rtl8180_prepare_multicast(struct ieee80211_hw *dev, int mc_count,
 806                                      struct dev_addr_list *mc_list)
 807 {
 808         return mc_count;
 809 }
 810
 811 static void rtl8180_configure_filter(struct ieee80211_hw *dev,
 812                                      unsigned int changed_flags,
 813                                      unsigned int *total_flags,
 814                                      u64 multicast)
 815 {
 816         struct rtl8180_priv *priv = dev->priv;
 817
 818         if (changed_flags & FIF_FCSFAIL)
 819                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
 820         if (changed_flags & FIF_CONTROL)
 821                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
 822         if (changed_flags & FIF_OTHER_BSS)
 823                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
 824         if (*total_flags & FIF_ALLMULTI || multicast > 0)
 825                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
 826         else
 827                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
 828
 829         *total_flags = 0;
 830
 831         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
 832                 *total_flags |= FIF_FCSFAIL;
 833         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
 834                 *total_flags |= FIF_CONTROL;
 835         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
 836                 *total_flags |= FIF_OTHER_BSS;
 837         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
 838                 *total_flags |= FIF_ALLMULTI;
 839
 840         rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
 841 }
 842
 843 static const struct ieee80211_ops rtl8180_ops = {
 844         .tx                     = rtl8180_tx,
 845         .start                  = rtl8180_start,
 846         .stop                   = rtl8180_stop,
 847         .add_interface          = rtl8180_add_interface,
 848         .remove_interface       = rtl8180_remove_interface,
 849         .config                 = rtl8180_config,
 850         .bss_info_changed       = rtl8180_bss_info_changed,
 851         .prepare_multicast      = rtl8180_prepare_multicast,
 852         .configure_filter       = rtl8180_configure_filter,
 853         .get_tsf                = rtl8180_get_tsf,
 854 };
 855
 856 static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
 857 {
 858         struct ieee80211_hw *dev = eeprom->data;
 859         struct rtl8180_priv *priv = dev->priv;
 860         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 861
 862         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
 863         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
 864         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
 865         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
 866 }
 867
 868 static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom)
 869 {
 870         struct ieee80211_hw *dev = eeprom->data;
 871         struct rtl8180_priv *priv = dev->priv;
 872         u8 reg = 2 << 6;
 873
 874         if (eeprom->reg_data_in)
 875                 reg |= RTL818X_EEPROM_CMD_WRITE;
 876         if (eeprom->reg_data_out)
 877                 reg |= RTL818X_EEPROM_CMD_READ;
 878         if (eeprom->reg_data_clock)
 879                 reg |= RTL818X_EEPROM_CMD_CK;
 880         if (eeprom->reg_chip_select)
 881                 reg |= RTL818X_EEPROM_CMD_CS;
 882
 883         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
 884         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 885         udelay(10);
 886 }
 887
 888 static int __devinit rtl8180_probe(struct pci_dev *pdev,
 889                                    const struct pci_device_id *id)
 890 {
 891         struct ieee80211_hw *dev;
 892         struct rtl8180_priv *priv;
 893         unsigned long mem_addr, mem_len;
 894         unsigned int io_addr, io_len;
 895         int err, i;
 896         struct eeprom_93cx6 eeprom;
 897         const char *chip_name, *rf_name = NULL;
 898         u32 reg;
 899         u16 eeprom_val;
 900         u8 mac_addr[ETH_ALEN];
 901
 902         err = pci_enable_device(pdev);
 903         if (err) {
 904                 printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n",
 905                        pci_name(pdev));
 906                 return err;
 907         }
 908
 909         err = pci_request_regions(pdev, KBUILD_MODNAME);
 910         if (err) {
 911                 printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n",
 912                        pci_name(pdev));
 913                 return err;
 914         }
 915
 916         io_addr = pci_resource_start(pdev, 0);
 917         io_len = pci_resource_len(pdev, 0);
 918         mem_addr = pci_resource_start(pdev, 1);
 919         mem_len = pci_resource_len(pdev, 1);
 920
 921         if (mem_len < sizeof(struct rtl818x_csr) ||
 922             io_len < sizeof(struct rtl818x_csr)) {
 923                 printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n",
 924                        pci_name(pdev));
 925                 err = -ENOMEM;
 926                 goto err_free_reg;
 927         }
 928
 929         if ((err = pci_set_dma_mask(pdev, 0xFFFFFF00ULL)) ||
 930             (err = pci_set_consistent_dma_mask(pdev, 0xFFFFFF00ULL))) {
 931                 printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n",
 932                        pci_name(pdev));
 933                 goto err_free_reg;
 934         }
 935
 936         pci_set_master(pdev);
 937
 938         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops);
 939         if (!dev) {
 940                 printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n",
 941                        pci_name(pdev));
 942                 err = -ENOMEM;
 943                 goto err_free_reg;
 944         }
 945
 946         priv = dev->priv;
 947         priv->pdev = pdev;
 948
 949         dev->max_rates = 2;
 950         SET_IEEE80211_DEV(dev, &pdev->dev);
 951         pci_set_drvdata(pdev, dev);
 952
 953         priv->map = pci_iomap(pdev, 1, mem_len);
 954         if (!priv->map)
 955                 priv->map = pci_iomap(pdev, 0, io_len);
 956
 957         if (!priv->map) {
 958                 printk(KERN_ERR "%s (rtl8180): Cannot map device memory\n",
 959                        pci_name(pdev));
 960                 goto err_free_dev;
 961         }
 962
 963         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
 964         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
 965
 966         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
 967         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
 968
 969         priv->band.band = IEEE80211_BAND_2GHZ;
 970         priv->band.channels = priv->channels;
 971         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
 972         priv->band.bitrates = priv->rates;
 973         priv->band.n_bitrates = 4;
 974         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
 975
 976         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
 977                      IEEE80211_HW_RX_INCLUDES_FCS |
 978                      IEEE80211_HW_SIGNAL_UNSPEC;
 979         dev->vif_data_size = sizeof(struct rtl8180_vif);
 980         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
 981                                         BIT(NL80211_IFTYPE_ADHOC);
 982         dev->queues = 1;
 983         dev->max_signal = 65;
 984
 985         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 986         reg &= RTL818X_TX_CONF_HWVER_MASK;
 987         switch (reg) {
 988         case RTL818X_TX_CONF_R8180_ABCD:
 989                 chip_name = "RTL8180";
 990                 break;
 991         case RTL818X_TX_CONF_R8180_F:
 992                 chip_name = "RTL8180vF";
 993                 break;
 994         case RTL818X_TX_CONF_R8185_ABC:
 995                 chip_name = "RTL8185";
 996                 break;
 997         case RTL818X_TX_CONF_R8185_D:
 998                 chip_name = "RTL8185vD";
 999                 break;
1000         default:
1001                 printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n",
1002                        pci_name(pdev), reg >> 25);
1003                 goto err_iounmap;
1004         }
1005
1006         priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC;
1007         if (priv->r8185) {
1008                 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1009                 pci_try_set_mwi(pdev);
1010         }
1011
1012         eeprom.data = dev;
1013         eeprom.register_read = rtl8180_eeprom_register_read;
1014         eeprom.register_write = rtl8180_eeprom_register_write;
1015         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1016                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1017         else
1018                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1019
1020         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM);
1021         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1022         udelay(10);
1023
1024         eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val);
1025         eeprom_val &= 0xFF;
1026         switch (eeprom_val) {
1027         case 1: rf_name = "Intersil";
1028                 break;
1029         case 2: rf_name = "RFMD";
1030                 break;
1031         case 3: priv->rf = &sa2400_rf_ops;
1032                 break;
1033         case 4: priv->rf = &max2820_rf_ops;
1034                 break;
1035         case 5: priv->rf = &grf5101_rf_ops;
1036                 break;
1037         case 9: priv->rf = rtl8180_detect_rf(dev);
1038                 break;
1039         case 10:
1040                 rf_name = "RTL8255";
1041                 break;
1042         default:
1043                 printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n",
1044                        pci_name(pdev), eeprom_val);
1045                 goto err_iounmap;
1046         }
1047
1048         if (!priv->rf) {
1049                 printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n",
1050                        pci_name(pdev), rf_name);
1051                 goto err_iounmap;
1052         }
1053
1054         eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val);
1055         priv->csthreshold = eeprom_val >> 8;
1056         if (!priv->r8185) {
1057                 __le32 anaparam;
1058                 eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2);
1059                 priv->anaparam = le32_to_cpu(anaparam);
1060                 eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam);
1061         }
1062
1063         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)mac_addr, 3);
1064         if (!is_valid_ether_addr(mac_addr)) {
1065                 printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using"
1066                        " randomly generated MAC addr\n", pci_name(pdev));
1067                 random_ether_addr(mac_addr);
1068         }
1069         SET_IEEE80211_PERM_ADDR(dev, mac_addr);
1070
1071         /* CCK TX power */
1072         for (i = 0; i < 14; i += 2) {
1073                 u16 txpwr;
1074                 eeprom_93cx6_read(&eeprom, 0x10 + (i >> 1), &txpwr);
1075                 priv->channels[i].hw_value = txpwr & 0xFF;
1076                 priv->channels[i + 1].hw_value = txpwr >> 8;
1077         }
1078
1079         /* OFDM TX power */
1080         if (priv->r8185) {
1081                 for (i = 0; i < 14; i += 2) {
1082                         u16 txpwr;
1083                         eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr);
1084                         priv->channels[i].hw_value |= (txpwr & 0xFF) << 8;
1085                         priv->channels[i + 1].hw_value |= txpwr & 0xFF00;
1086                 }
1087         }
1088
1089         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1090
1091         spin_lock_init(&priv->lock);
1092
1093         err = ieee80211_register_hw(dev);
1094         if (err) {
1095                 printk(KERN_ERR "%s (rtl8180): Cannot register device\n",
1096                        pci_name(pdev));
1097                 goto err_iounmap;
1098         }
1099
1100         printk(KERN_INFO "%s: hwaddr %pM, %s + %s\n",
1101                wiphy_name(dev->wiphy), mac_addr,
1102                chip_name, priv->rf->name);
1103
1104         return 0;
1105
1106  err_iounmap:
1107         iounmap(priv->map);
1108
1109  err_free_dev:
1110         pci_set_drvdata(pdev, NULL);
1111         ieee80211_free_hw(dev);
1112
1113  err_free_reg:
1114         pci_release_regions(pdev);
1115         pci_disable_device(pdev);
1116         return err;
1117 }
1118
1119 static void __devexit rtl8180_remove(struct pci_dev *pdev)
1120 {
1121         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
1122         struct rtl8180_priv *priv;
1123
1124         if (!dev)
1125                 return;
1126
1127         ieee80211_unregister_hw(dev);
1128
1129         priv = dev->priv;
1130
1131         pci_iounmap(pdev, priv->map);
1132         pci_release_regions(pdev);
1133         pci_disable_device(pdev);
1134         ieee80211_free_hw(dev);
1135 }
1136
1137 #ifdef CONFIG_PM
1138 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
1139 {
1140         pci_save_state(pdev);
1141         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1142         return 0;
1143 }
1144
1145 static int rtl8180_resume(struct pci_dev *pdev)
1146 {
1147         pci_set_power_state(pdev, PCI_D0);
1148         pci_restore_state(pdev);
1149         return 0;
1150 }
1151
1152 #endif /* CONFIG_PM */
1153
1154 static struct pci_driver rtl8180_driver = {
1155         .name           = KBUILD_MODNAME,
1156         .id_table       = rtl8180_table,
1157         .probe          = rtl8180_probe,
1158         .remove         = __devexit_p(rtl8180_remove),
1159 #ifdef CONFIG_PM
1160         .suspend        = rtl8180_suspend,
1161         .resume         = rtl8180_resume,
1162 #endif /* CONFIG_PM */
1163 };
1164
1165 static int __init rtl8180_init(void)
1166 {
1167         return pci_register_driver(&rtl8180_driver);
1168 }
1169
1170 static void __exit rtl8180_exit(void)
1171 {
1172         pci_unregister_driver(&rtl8180_driver);
1173 }
1174
1175 module_init(rtl8180_init);
1176 module_exit(rtl8180_exit);