SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/rtl818x/rtl8180_dev.c

   1
   2 /*
   3  * Linux device driver for RTL8180 / RTL8185
   4  *
   5  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   6  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   7  *
   8  * Based on the r8180 driver, which is:
   9  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  10  *
  11  * Thanks to Realtek for their support!
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/pci.h>
  20 #include <linux/slab.h>
  21 #include <linux/delay.h>
  22 #include <linux/etherdevice.h>
  23 #include <linux/eeprom_93cx6.h>
  24 #include <net/mac80211.h>
  25
  26 #include "rtl8180.h"
  27 #include "rtl8180_rtl8225.h"
  28 #include "rtl8180_sa2400.h"
  29 #include "rtl8180_max2820.h"
  30 #include "rtl8180_grf5101.h"
  31
  32 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  33 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  34 MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver");
  35 MODULE_LICENSE("GPL");
  36
  37 static DEFINE_PCI_DEVICE_TABLE(rtl8180_table) = {
  38         /* rtl8185 */
  39         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
  40         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) },
  41         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) },
  42
  43         /* rtl8180 */
  44         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) },
  45         { PCI_DEVICE(0x1799, 0x6001) },
  46         { PCI_DEVICE(0x1799, 0x6020) },
  47         { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) },
  48         { }
  49 };
  50
  51 MODULE_DEVICE_TABLE(pci, rtl8180_table);
  52
  53 static const struct ieee80211_rate rtl818x_rates[] = {
  54         { .bitrate = 10, .hw_value = 0, },
  55         { .bitrate = 20, .hw_value = 1, },
  56         { .bitrate = 55, .hw_value = 2, },
  57         { .bitrate = 110, .hw_value = 3, },
  58         { .bitrate = 60, .hw_value = 4, },
  59         { .bitrate = 90, .hw_value = 5, },
  60         { .bitrate = 120, .hw_value = 6, },
  61         { .bitrate = 180, .hw_value = 7, },
  62         { .bitrate = 240, .hw_value = 8, },
  63         { .bitrate = 360, .hw_value = 9, },
  64         { .bitrate = 480, .hw_value = 10, },
  65         { .bitrate = 540, .hw_value = 11, },
  66 };
  67
  68 static const struct ieee80211_channel rtl818x_channels[] = {
  69         { .center_freq = 2412 },
  70         { .center_freq = 2417 },
  71         { .center_freq = 2422 },
  72         { .center_freq = 2427 },
  73         { .center_freq = 2432 },
  74         { .center_freq = 2437 },
  75         { .center_freq = 2442 },
  76         { .center_freq = 2447 },
  77         { .center_freq = 2452 },
  78         { .center_freq = 2457 },
  79         { .center_freq = 2462 },
  80         { .center_freq = 2467 },
  81         { .center_freq = 2472 },
  82         { .center_freq = 2484 },
  83 };
  84
  85
  86 void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  87 {
  88         struct rtl8180_priv *priv = dev->priv;
  89         int i = 10;
  90         u32 buf;
  91
  92         buf = (data << 8) | addr;
  93
  94         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80);
  95         while (i--) {
  96                 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf);
  97                 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
  98                         return;
  99         }
 100 }
 101
 102 static void rtl8180_handle_rx(struct ieee80211_hw *dev)
 103 {
 104         struct rtl8180_priv *priv = dev->priv;
 105         unsigned int count = 32;
 106
 107         while (count--) {
 108                 struct rtl8180_rx_desc *entry = &priv->rx_ring[priv->rx_idx];
 109                 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
 110                 u32 flags = le32_to_cpu(entry->flags);
 111
 112                 if (flags & RTL818X_RX_DESC_FLAG_OWN)
 113                         return;
 114
 115                 if (unlikely(flags & (RTL818X_RX_DESC_FLAG_DMA_FAIL |
 116                                       RTL818X_RX_DESC_FLAG_FOF |
 117                                       RTL818X_RX_DESC_FLAG_RX_ERR)))
 118                         goto done;
 119                 else {
 120                         u32 flags2 = le32_to_cpu(entry->flags2);
 121                         struct ieee80211_rx_status rx_status = {0};
 122                         struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE);
 123
 124                         if (unlikely(!new_skb))
 125                                 goto done;
 126
 127                         pci_unmap_single(priv->pdev,
 128                                          *((dma_addr_t *)skb->cb),
 129                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 130                         skb_put(skb, flags & 0xFFF);
 131
 132                         rx_status.antenna = (flags2 >> 15) & 1;
 133                         /* TODO: improve signal/rssi reporting */
 134                         rx_status.signal = (flags2 >> 8) & 0x7F;
 135                         /* XXX: is this correct? */
 136                         rx_status.rate_idx = (flags >> 20) & 0xF;
 137                         rx_status.freq = dev->conf.channel->center_freq;
 138                         rx_status.band = dev->conf.channel->band;
 139                         rx_status.mactime = le64_to_cpu(entry->tsft);
 140                         rx_status.flag |= RX_FLAG_TSFT;
 141                         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 142                                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 143
 144                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 145                         ieee80211_rx_irqsafe(dev, skb);
 146
 147                         skb = new_skb;
 148                         priv->rx_buf[priv->rx_idx] = skb;
 149                         *((dma_addr_t *) skb->cb) =
 150                                 pci_map_single(priv->pdev, skb_tail_pointer(skb),
 151                                                MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 152                 }
 153
 154         done:
 155                 entry->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
 156                 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
 157                                            MAX_RX_SIZE);
 158                 if (priv->rx_idx == 31)
 159                         entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
 160                 priv->rx_idx = (priv->rx_idx + 1) % 32;
 161         }
 162 }
 163
 164 static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
 165 {
 166         struct rtl8180_priv *priv = dev->priv;
 167         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 168
 169         while (skb_queue_len(&ring->queue)) {
 170                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 171                 struct sk_buff *skb;
 172                 struct ieee80211_tx_info *info;
 173                 u32 flags = le32_to_cpu(entry->flags);
 174
 175                 if (flags & RTL818X_TX_DESC_FLAG_OWN)
 176                         return;
 177
 178                 ring->idx = (ring->idx + 1) % ring->entries;
 179                 skb = __skb_dequeue(&ring->queue);
 180                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 181                                  skb->len, PCI_DMA_TODEVICE);
 182
 183                 info = IEEE80211_SKB_CB(skb);
 184                 ieee80211_tx_info_clear_status(info);
 185
 186                 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
 187                     (flags & RTL818X_TX_DESC_FLAG_TX_OK))
 188                         info->flags |= IEEE80211_TX_STAT_ACK;
 189
 190                 info->status.rates[0].count = (flags & 0xFF) + 1;
 191                 info->status.rates[1].idx = -1;
 192
 193                 ieee80211_tx_status_irqsafe(dev, skb);
 194                 if (ring->entries - skb_queue_len(&ring->queue) == 2)
 195                         ieee80211_wake_queue(dev, prio);
 196         }
 197 }
 198
 199 static irqreturn_t rtl8180_interrupt(int irq, void *dev_id)
 200 {
 201         struct ieee80211_hw *dev = dev_id;
 202         struct rtl8180_priv *priv = dev->priv;
 203         u16 reg;
 204
 205         spin_lock(&priv->lock);
 206         reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
 207         if (unlikely(reg == 0xFFFF)) {
 208                 spin_unlock(&priv->lock);
 209                 return IRQ_HANDLED;
 210         }
 211
 212         rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
 213
 214         if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR))
 215                 rtl8180_handle_tx(dev, 3);
 216
 217         if (reg & (RTL818X_INT_TXH_OK | RTL818X_INT_TXH_ERR))
 218                 rtl8180_handle_tx(dev, 2);
 219
 220         if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR))
 221                 rtl8180_handle_tx(dev, 1);
 222
 223         if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR))
 224                 rtl8180_handle_tx(dev, 0);
 225
 226         if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
 227                 rtl8180_handle_rx(dev);
 228
 229         spin_unlock(&priv->lock);
 230
 231         return IRQ_HANDLED;
 232 }
 233
 234 static int rtl8180_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 235 {
 236         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 237         struct rtl8180_priv *priv = dev->priv;
 238         struct rtl8180_tx_ring *ring;
 239         struct rtl8180_tx_desc *entry;
 240         unsigned long flags;
 241         unsigned int idx, prio;
 242         dma_addr_t mapping;
 243         u32 tx_flags;
 244         u8 rc_flags;
 245         u16 plcp_len = 0;
 246         __le16 rts_duration = 0;
 247
 248         prio = skb_get_queue_mapping(skb);
 249         ring = &priv->tx_ring[prio];
 250
 251         mapping = pci_map_single(priv->pdev, skb->data,
 252                                  skb->len, PCI_DMA_TODEVICE);
 253
 254         tx_flags = RTL818X_TX_DESC_FLAG_OWN | RTL818X_TX_DESC_FLAG_FS |
 255                    RTL818X_TX_DESC_FLAG_LS |
 256                    (ieee80211_get_tx_rate(dev, info)->hw_value << 24) |
 257                    skb->len;
 258
 259         if (priv->r8185)
 260                 tx_flags |= RTL818X_TX_DESC_FLAG_DMA |
 261                             RTL818X_TX_DESC_FLAG_NO_ENC;
 262
 263         rc_flags = info->control.rates[0].flags;
 264         if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 265                 tx_flags |= RTL818X_TX_DESC_FLAG_RTS;
 266                 tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 267         } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 268                 tx_flags |= RTL818X_TX_DESC_FLAG_CTS;
 269                 tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 270         }
 271
 272         if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS)
 273                 rts_duration = ieee80211_rts_duration(dev, priv->vif, skb->len,
 274                                                       info);
 275
 276         if (!priv->r8185) {
 277                 unsigned int remainder;
 278
 279                 plcp_len = DIV_ROUND_UP(16 * (skb->len + 4),
 280                                 (ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
 281                 remainder = (16 * (skb->len + 4)) %
 282                             ((ieee80211_get_tx_rate(dev, info)->bitrate * 2) / 10);
 283                 if (remainder <= 6)
 284                         plcp_len |= 1 << 15;
 285         }
 286
 287         spin_lock_irqsave(&priv->lock, flags);
 288         idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
 289         entry = &ring->desc[idx];
 290
 291         entry->rts_duration = rts_duration;
 292         entry->plcp_len = cpu_to_le16(plcp_len);
 293         entry->tx_buf = cpu_to_le32(mapping);
 294         entry->frame_len = cpu_to_le32(skb->len);
 295         entry->flags2 = info->control.rates[1].idx >= 0 ?
 296                 ieee80211_get_alt_retry_rate(dev, info, 0)->bitrate << 4 : 0;
 297         entry->retry_limit = info->control.rates[0].count;
 298         entry->flags = cpu_to_le32(tx_flags);
 299         __skb_queue_tail(&ring->queue, skb);
 300         if (ring->entries - skb_queue_len(&ring->queue) < 2)
 301                 ieee80211_stop_queue(dev, prio);
 302         spin_unlock_irqrestore(&priv->lock, flags);
 303
 304         rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << (prio + 4)));
 305
 306         return 0;
 307 }
 308
 309 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
 310 {
 311         u8 reg;
 312
 313         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 314         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 315         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 316                  reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 317         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
 318         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 319                  reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 320         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 321 }
 322
 323 static int rtl8180_init_hw(struct ieee80211_hw *dev)
 324 {
 325         struct rtl8180_priv *priv = dev->priv;
 326         u16 reg;
 327
 328         rtl818x_iowrite8(priv, &priv->map->CMD, 0);
 329         rtl818x_ioread8(priv, &priv->map->CMD);
 330         msleep(10);
 331
 332         /* reset */
 333         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 334         rtl818x_ioread8(priv, &priv->map->CMD);
 335
 336         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 337         reg &= (1 << 1);
 338         reg |= RTL818X_CMD_RESET;
 339         rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
 340         rtl818x_ioread8(priv, &priv->map->CMD);
 341         msleep(200);
 342
 343         /* check success of reset */
 344         if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
 345                 printk(KERN_ERR "%s: reset timeout!\n", wiphy_name(dev->wiphy));
 346                 return -ETIMEDOUT;
 347         }
 348
 349         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 350         rtl818x_ioread8(priv, &priv->map->CMD);
 351         msleep(200);
 352
 353         if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
 354                 /* For cardbus */
 355                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 356                 reg |= 1 << 1;
 357                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 358                 reg = rtl818x_ioread16(priv, &priv->map->FEMR);
 359                 reg |= (1 << 15) | (1 << 14) | (1 << 4);
 360                 rtl818x_iowrite16(priv, &priv->map->FEMR, reg);
 361         }
 362
 363         rtl818x_iowrite8(priv, &priv->map->MSR, 0);
 364
 365         if (!priv->r8185)
 366                 rtl8180_set_anaparam(priv, priv->anaparam);
 367
 368         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 369         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 370         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 371         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 372         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 373
 374         /* TODO: necessary? specs indicate not */
 375         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 376         reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 377         rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
 378         if (priv->r8185) {
 379                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 380                 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
 381         }
 382         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 383
 384         /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
 385
 386         /* TODO: turn off hw wep on rtl8180 */
 387
 388         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 389
 390         if (priv->r8185) {
 391                 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 392                 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 393                 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 394
 395                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 396
 397                 /* TODO: set ClkRun enable? necessary? */
 398                 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
 399                 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
 400                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 401                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 402                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
 403                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 404         } else {
 405                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1);
 406                 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
 407
 408                 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
 409                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
 410         }
 411
 412         priv->rf->init(dev);
 413         if (priv->r8185)
 414                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 415         return 0;
 416 }
 417
 418 static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
 419 {
 420         struct rtl8180_priv *priv = dev->priv;
 421         struct rtl8180_rx_desc *entry;
 422         int i;
 423
 424         priv->rx_ring = pci_alloc_consistent(priv->pdev,
 425                                              sizeof(*priv->rx_ring) * 32,
 426                                              &priv->rx_ring_dma);
 427
 428         if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
 429                 printk(KERN_ERR "%s: Cannot allocate RX ring\n",
 430                        wiphy_name(dev->wiphy));
 431                 return -ENOMEM;
 432         }
 433
 434         memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * 32);
 435         priv->rx_idx = 0;
 436
 437         for (i = 0; i < 32; i++) {
 438                 struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE);
 439                 dma_addr_t *mapping;
 440                 entry = &priv->rx_ring[i];
 441                 if (!skb)
 442                         return 0;
 443
 444                 priv->rx_buf[i] = skb;
 445                 mapping = (dma_addr_t *)skb->cb;
 446                 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
 447                                           MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 448                 entry->rx_buf = cpu_to_le32(*mapping);
 449                 entry->flags = cpu_to_le32(RTL818X_RX_DESC_FLAG_OWN |
 450                                            MAX_RX_SIZE);
 451         }
 452         entry->flags |= cpu_to_le32(RTL818X_RX_DESC_FLAG_EOR);
 453         return 0;
 454 }
 455
 456 static void rtl8180_free_rx_ring(struct ieee80211_hw *dev)
 457 {
 458         struct rtl8180_priv *priv = dev->priv;
 459         int i;
 460
 461         for (i = 0; i < 32; i++) {
 462                 struct sk_buff *skb = priv->rx_buf[i];
 463                 if (!skb)
 464                         continue;
 465
 466                 pci_unmap_single(priv->pdev,
 467                                  *((dma_addr_t *)skb->cb),
 468                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 469                 kfree_skb(skb);
 470         }
 471
 472         pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * 32,
 473                             priv->rx_ring, priv->rx_ring_dma);
 474         priv->rx_ring = NULL;
 475 }
 476
 477 static int rtl8180_init_tx_ring(struct ieee80211_hw *dev,
 478                                 unsigned int prio, unsigned int entries)
 479 {
 480         struct rtl8180_priv *priv = dev->priv;
 481         struct rtl8180_tx_desc *ring;
 482         dma_addr_t dma;
 483         int i;
 484
 485         ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
 486         if (!ring || (unsigned long)ring & 0xFF) {
 487                 printk(KERN_ERR "%s: Cannot allocate TX ring (prio = %d)\n",
 488                        wiphy_name(dev->wiphy), prio);
 489                 return -ENOMEM;
 490         }
 491
 492         memset(ring, 0, sizeof(*ring)*entries);
 493         priv->tx_ring[prio].desc = ring;
 494         priv->tx_ring[prio].dma = dma;
 495         priv->tx_ring[prio].idx = 0;
 496         priv->tx_ring[prio].entries = entries;
 497         skb_queue_head_init(&priv->tx_ring[prio].queue);
 498
 499         for (i = 0; i < entries; i++)
 500                 ring[i].next_tx_desc =
 501                         cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
 502
 503         return 0;
 504 }
 505
 506 static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio)
 507 {
 508         struct rtl8180_priv *priv = dev->priv;
 509         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 510
 511         while (skb_queue_len(&ring->queue)) {
 512                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 513                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
 514
 515                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 516                                  skb->len, PCI_DMA_TODEVICE);
 517                 kfree_skb(skb);
 518                 ring->idx = (ring->idx + 1) % ring->entries;
 519         }
 520
 521         pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
 522                             ring->desc, ring->dma);
 523         ring->desc = NULL;
 524 }
 525
 526 static int rtl8180_start(struct ieee80211_hw *dev)
 527 {
 528         struct rtl8180_priv *priv = dev->priv;
 529         int ret, i;
 530         u32 reg;
 531
 532         ret = rtl8180_init_rx_ring(dev);
 533         if (ret)
 534                 return ret;
 535
 536         for (i = 0; i < 4; i++)
 537                 if ((ret = rtl8180_init_tx_ring(dev, i, 16)))
 538                         goto err_free_rings;
 539
 540         ret = rtl8180_init_hw(dev);
 541         if (ret)
 542                 goto err_free_rings;
 543
 544         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 545         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 546         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 547         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 548         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 549
 550         ret = request_irq(priv->pdev->irq, rtl8180_interrupt,
 551                           IRQF_SHARED, KBUILD_MODNAME, dev);
 552         if (ret) {
 553                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 554                        wiphy_name(dev->wiphy));
 555                 goto err_free_rings;
 556         }
 557
 558         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 559
 560         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 561         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 562
 563         reg = RTL818X_RX_CONF_ONLYERLPKT |
 564               RTL818X_RX_CONF_RX_AUTORESETPHY |
 565               RTL818X_RX_CONF_MGMT |
 566               RTL818X_RX_CONF_DATA |
 567               (7 << 8 /* MAX RX DMA */) |
 568               RTL818X_RX_CONF_BROADCAST |
 569               RTL818X_RX_CONF_NICMAC;
 570
 571         if (priv->r8185)
 572                 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
 573         else {
 574                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
 575                         ? RTL818X_RX_CONF_CSDM1 : 0;
 576                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
 577                         ? RTL818X_RX_CONF_CSDM2 : 0;
 578         }
 579
 580         priv->rx_conf = reg;
 581         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 582
 583         if (priv->r8185) {
 584                 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 585                 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 586                 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 587                 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 588
 589                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 590                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 591                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 592                 reg |=  RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 593                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 594
 595                 /* disable early TX */
 596                 rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f);
 597         }
 598
 599         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 600         reg |= (6 << 21 /* MAX TX DMA */) |
 601                RTL818X_TX_CONF_NO_ICV;
 602
 603         if (priv->r8185)
 604                 reg &= ~RTL818X_TX_CONF_PROBE_DTS;
 605         else
 606                 reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
 607
 608         /* different meaning, same value on both rtl8185 and rtl8180 */
 609         reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
 610
 611         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 612
 613         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 614         reg |= RTL818X_CMD_RX_ENABLE;
 615         reg |= RTL818X_CMD_TX_ENABLE;
 616         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 617
 618         return 0;
 619
 620  err_free_rings:
 621         rtl8180_free_rx_ring(dev);
 622         for (i = 0; i < 4; i++)
 623                 if (priv->tx_ring[i].desc)
 624                         rtl8180_free_tx_ring(dev, i);
 625
 626         return ret;
 627 }
 628
 629 static void rtl8180_stop(struct ieee80211_hw *dev)
 630 {
 631         struct rtl8180_priv *priv = dev->priv;
 632         u8 reg;
 633         int i;
 634
 635         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 636
 637         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 638         reg &= ~RTL818X_CMD_TX_ENABLE;
 639         reg &= ~RTL818X_CMD_RX_ENABLE;
 640         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 641
 642         priv->rf->stop(dev);
 643
 644         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 645         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 646         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 647         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 648
 649         free_irq(priv->pdev->irq, dev);
 650
 651         rtl8180_free_rx_ring(dev);
 652         for (i = 0; i < 4; i++)
 653                 rtl8180_free_tx_ring(dev, i);
 654 }
 655
 656 static int rtl8180_add_interface(struct ieee80211_hw *dev,
 657                                  struct ieee80211_vif *vif)
 658 {
 659         struct rtl8180_priv *priv = dev->priv;
 660
 661         /*
 662          * We only support one active interface at a time.
 663          */
 664         if (priv->vif)
 665                 return -EBUSY;
 666
 667         switch (vif->type) {
 668         case NL80211_IFTYPE_STATION:
 669                 break;
 670         default:
 671                 return -EOPNOTSUPP;
 672         }
 673
 674         priv->vif = vif;
 675
 676         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 677         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
 678                           le32_to_cpu(*(__le32 *)vif->addr));
 679         rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
 680                           le16_to_cpu(*(__le16 *)(vif->addr + 4)));
 681         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 682
 683         return 0;
 684 }
 685
 686 static void rtl8180_remove_interface(struct ieee80211_hw *dev,
 687                                      struct ieee80211_vif *vif)
 688 {
 689         struct rtl8180_priv *priv = dev->priv;
 690         priv->vif = NULL;
 691 }
 692
 693 static int rtl8180_config(struct ieee80211_hw *dev, u32 changed)
 694 {
 695         struct rtl8180_priv *priv = dev->priv;
 696         struct ieee80211_conf *conf = &dev->conf;
 697
 698         priv->rf->set_chan(dev, conf);
 699
 700         return 0;
 701 }
 702
 703 static void rtl8180_bss_info_changed(struct ieee80211_hw *dev,
 704                                      struct ieee80211_vif *vif,
 705                                      struct ieee80211_bss_conf *info,
 706                                      u32 changed)
 707 {
 708         struct rtl8180_priv *priv = dev->priv;
 709         int i;
 710
 711         if (changed & BSS_CHANGED_BSSID) {
 712                 for (i = 0; i < ETH_ALEN; i++)
 713                         rtl818x_iowrite8(priv, &priv->map->BSSID[i],
 714                                          info->bssid[i]);
 715
 716                 if (is_valid_ether_addr(info->bssid))
 717                         rtl818x_iowrite8(priv, &priv->map->MSR,
 718                                          RTL818X_MSR_INFRA);
 719                 else
 720                         rtl818x_iowrite8(priv, &priv->map->MSR,
 721                                          RTL818X_MSR_NO_LINK);
 722         }
 723
 724         if (changed & BSS_CHANGED_ERP_SLOT && priv->rf->conf_erp)
 725                 priv->rf->conf_erp(dev, info);
 726 }
 727
 728 static u64 rtl8180_prepare_multicast(struct ieee80211_hw *dev,
 729                                      struct netdev_hw_addr_list *mc_list)
 730 {
 731         return netdev_hw_addr_list_count(mc_list);
 732 }
 733
 734 static void rtl8180_configure_filter(struct ieee80211_hw *dev,
 735                                      unsigned int changed_flags,
 736                                      unsigned int *total_flags,
 737                                      u64 multicast)
 738 {
 739         struct rtl8180_priv *priv = dev->priv;
 740
 741         if (changed_flags & FIF_FCSFAIL)
 742                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
 743         if (changed_flags & FIF_CONTROL)
 744                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
 745         if (changed_flags & FIF_OTHER_BSS)
 746                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
 747         if (*total_flags & FIF_ALLMULTI || multicast > 0)
 748                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
 749         else
 750                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
 751
 752         *total_flags = 0;
 753
 754         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
 755                 *total_flags |= FIF_FCSFAIL;
 756         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
 757                 *total_flags |= FIF_CONTROL;
 758         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
 759                 *total_flags |= FIF_OTHER_BSS;
 760         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
 761                 *total_flags |= FIF_ALLMULTI;
 762
 763         rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
 764 }
 765
 766 static u64 rtl8180_get_tsf(struct ieee80211_hw *dev)
 767 {
 768         struct rtl8180_priv *priv = dev->priv;
 769
 770         return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
 771                (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
 772 }
 773
 774 static const struct ieee80211_ops rtl8180_ops = {
 775         .tx                     = rtl8180_tx,
 776         .start                  = rtl8180_start,
 777         .stop                   = rtl8180_stop,
 778         .add_interface          = rtl8180_add_interface,
 779         .remove_interface       = rtl8180_remove_interface,
 780         .config                 = rtl8180_config,
 781         .bss_info_changed       = rtl8180_bss_info_changed,
 782         .prepare_multicast      = rtl8180_prepare_multicast,
 783         .configure_filter       = rtl8180_configure_filter,
 784         .get_tsf                = rtl8180_get_tsf,
 785 };
 786
 787 static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
 788 {
 789         struct ieee80211_hw *dev = eeprom->data;
 790         struct rtl8180_priv *priv = dev->priv;
 791         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 792
 793         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
 794         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
 795         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
 796         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
 797 }
 798
 799 static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom)
 800 {
 801         struct ieee80211_hw *dev = eeprom->data;
 802         struct rtl8180_priv *priv = dev->priv;
 803         u8 reg = 2 << 6;
 804
 805         if (eeprom->reg_data_in)
 806                 reg |= RTL818X_EEPROM_CMD_WRITE;
 807         if (eeprom->reg_data_out)
 808                 reg |= RTL818X_EEPROM_CMD_READ;
 809         if (eeprom->reg_data_clock)
 810                 reg |= RTL818X_EEPROM_CMD_CK;
 811         if (eeprom->reg_chip_select)
 812                 reg |= RTL818X_EEPROM_CMD_CS;
 813
 814         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
 815         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 816         udelay(10);
 817 }
 818
 819 static int __devinit rtl8180_probe(struct pci_dev *pdev,
 820                                    const struct pci_device_id *id)
 821 {
 822         struct ieee80211_hw *dev;
 823         struct rtl8180_priv *priv;
 824         unsigned long mem_addr, mem_len;
 825         unsigned int io_addr, io_len;
 826         int err, i;
 827         struct eeprom_93cx6 eeprom;
 828         const char *chip_name, *rf_name = NULL;
 829         u32 reg;
 830         u16 eeprom_val;
 831         u8 mac_addr[ETH_ALEN];
 832
 833         err = pci_enable_device(pdev);
 834         if (err) {
 835                 printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n",
 836                        pci_name(pdev));
 837                 return err;
 838         }
 839
 840         err = pci_request_regions(pdev, KBUILD_MODNAME);
 841         if (err) {
 842                 printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n",
 843                        pci_name(pdev));
 844                 return err;
 845         }
 846
 847         io_addr = pci_resource_start(pdev, 0);
 848         io_len = pci_resource_len(pdev, 0);
 849         mem_addr = pci_resource_start(pdev, 1);
 850         mem_len = pci_resource_len(pdev, 1);
 851
 852         if (mem_len < sizeof(struct rtl818x_csr) ||
 853             io_len < sizeof(struct rtl818x_csr)) {
 854                 printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n",
 855                        pci_name(pdev));
 856                 err = -ENOMEM;
 857                 goto err_free_reg;
 858         }
 859
 860         if ((err = pci_set_dma_mask(pdev, 0xFFFFFF00ULL)) ||
 861             (err = pci_set_consistent_dma_mask(pdev, 0xFFFFFF00ULL))) {
 862                 printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n",
 863                        pci_name(pdev));
 864                 goto err_free_reg;
 865         }
 866
 867         pci_set_master(pdev);
 868
 869         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops);
 870         if (!dev) {
 871                 printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n",
 872                        pci_name(pdev));
 873                 err = -ENOMEM;
 874                 goto err_free_reg;
 875         }
 876
 877         priv = dev->priv;
 878         priv->pdev = pdev;
 879
 880         dev->max_rates = 2;
 881         SET_IEEE80211_DEV(dev, &pdev->dev);
 882         pci_set_drvdata(pdev, dev);
 883
 884         priv->map = pci_iomap(pdev, 1, mem_len);
 885         if (!priv->map)
 886                 priv->map = pci_iomap(pdev, 0, io_len);
 887
 888         if (!priv->map) {
 889                 printk(KERN_ERR "%s (rtl8180): Cannot map device memory\n",
 890                        pci_name(pdev));
 891                 goto err_free_dev;
 892         }
 893
 894         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
 895         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
 896
 897         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
 898         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
 899
 900         priv->band.band = IEEE80211_BAND_2GHZ;
 901         priv->band.channels = priv->channels;
 902         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
 903         priv->band.bitrates = priv->rates;
 904         priv->band.n_bitrates = 4;
 905         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
 906
 907         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
 908                      IEEE80211_HW_RX_INCLUDES_FCS |
 909                      IEEE80211_HW_SIGNAL_UNSPEC;
 910         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
 911         dev->queues = 1;
 912         dev->max_signal = 65;
 913
 914         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 915         reg &= RTL818X_TX_CONF_HWVER_MASK;
 916         switch (reg) {
 917         case RTL818X_TX_CONF_R8180_ABCD:
 918                 chip_name = "RTL8180";
 919                 break;
 920         case RTL818X_TX_CONF_R8180_F:
 921                 chip_name = "RTL8180vF";
 922                 break;
 923         case RTL818X_TX_CONF_R8185_ABC:
 924                 chip_name = "RTL8185";
 925                 break;
 926         case RTL818X_TX_CONF_R8185_D:
 927                 chip_name = "RTL8185vD";
 928                 break;
 929         default:
 930                 printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n",
 931                        pci_name(pdev), reg >> 25);
 932                 goto err_iounmap;
 933         }
 934
 935         priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC;
 936         if (priv->r8185) {
 937                 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
 938                 pci_try_set_mwi(pdev);
 939         }
 940
 941         eeprom.data = dev;
 942         eeprom.register_read = rtl8180_eeprom_register_read;
 943         eeprom.register_write = rtl8180_eeprom_register_write;
 944         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
 945                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
 946         else
 947                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
 948
 949         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM);
 950         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 951         udelay(10);
 952
 953         eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val);
 954         eeprom_val &= 0xFF;
 955         switch (eeprom_val) {
 956         case 1: rf_name = "Intersil";
 957                 break;
 958         case 2: rf_name = "RFMD";
 959                 break;
 960         case 3: priv->rf = &sa2400_rf_ops;
 961                 break;
 962         case 4: priv->rf = &max2820_rf_ops;
 963                 break;
 964         case 5: priv->rf = &grf5101_rf_ops;
 965                 break;
 966         case 9: priv->rf = rtl8180_detect_rf(dev);
 967                 break;
 968         case 10:
 969                 rf_name = "RTL8255";
 970                 break;
 971         default:
 972                 printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n",
 973                        pci_name(pdev), eeprom_val);
 974                 goto err_iounmap;
 975         }
 976
 977         if (!priv->rf) {
 978                 printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n",
 979                        pci_name(pdev), rf_name);
 980                 goto err_iounmap;
 981         }
 982
 983         eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val);
 984         priv->csthreshold = eeprom_val >> 8;
 985         if (!priv->r8185) {
 986                 __le32 anaparam;
 987                 eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2);
 988                 priv->anaparam = le32_to_cpu(anaparam);
 989                 eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam);
 990         }
 991
 992         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)mac_addr, 3);
 993         if (!is_valid_ether_addr(mac_addr)) {
 994                 printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using"
 995                        " randomly generated MAC addr\n", pci_name(pdev));
 996                 random_ether_addr(mac_addr);
 997         }
 998         SET_IEEE80211_PERM_ADDR(dev, mac_addr);
 999
1000         /* CCK TX power */
1001         for (i = 0; i < 14; i += 2) {
1002                 u16 txpwr;
1003                 eeprom_93cx6_read(&eeprom, 0x10 + (i >> 1), &txpwr);
1004                 priv->channels[i].hw_value = txpwr & 0xFF;
1005                 priv->channels[i + 1].hw_value = txpwr >> 8;
1006         }
1007
1008         /* OFDM TX power */
1009         if (priv->r8185) {
1010                 for (i = 0; i < 14; i += 2) {
1011                         u16 txpwr;
1012                         eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr);
1013                         priv->channels[i].hw_value |= (txpwr & 0xFF) << 8;
1014                         priv->channels[i + 1].hw_value |= txpwr & 0xFF00;
1015                 }
1016         }
1017
1018         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1019
1020         spin_lock_init(&priv->lock);
1021
1022         err = ieee80211_register_hw(dev);
1023         if (err) {
1024                 printk(KERN_ERR "%s (rtl8180): Cannot register device\n",
1025                        pci_name(pdev));
1026                 goto err_iounmap;
1027         }
1028
1029         printk(KERN_INFO "%s: hwaddr %pM, %s + %s\n",
1030                wiphy_name(dev->wiphy), mac_addr,
1031                chip_name, priv->rf->name);
1032
1033         return 0;
1034
1035  err_iounmap:
1036         iounmap(priv->map);
1037
1038  err_free_dev:
1039         pci_set_drvdata(pdev, NULL);
1040         ieee80211_free_hw(dev);
1041
1042  err_free_reg:
1043         pci_release_regions(pdev);
1044         pci_disable_device(pdev);
1045         return err;
1046 }
1047
1048 static void __devexit rtl8180_remove(struct pci_dev *pdev)
1049 {
1050         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
1051         struct rtl8180_priv *priv;
1052
1053         if (!dev)
1054                 return;
1055
1056         ieee80211_unregister_hw(dev);
1057
1058         priv = dev->priv;
1059
1060         pci_iounmap(pdev, priv->map);
1061         pci_release_regions(pdev);
1062         pci_disable_device(pdev);
1063         ieee80211_free_hw(dev);
1064 }
1065
1066 #ifdef CONFIG_PM
1067 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
1068 {
1069         pci_save_state(pdev);
1070         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1071         return 0;
1072 }
1073
1074 static int rtl8180_resume(struct pci_dev *pdev)
1075 {
1076         pci_set_power_state(pdev, PCI_D0);
1077         pci_restore_state(pdev);
1078         return 0;
1079 }
1080
1081 #endif /* CONFIG_PM */
1082
1083 static struct pci_driver rtl8180_driver = {
1084         .name           = KBUILD_MODNAME,
1085         .id_table       = rtl8180_table,
1086         .probe          = rtl8180_probe,
1087         .remove         = __devexit_p(rtl8180_remove),
1088 #ifdef CONFIG_PM
1089         .suspend        = rtl8180_suspend,
1090         .resume         = rtl8180_resume,
1091 #endif /* CONFIG_PM */
1092 };
1093
1094 static int __init rtl8180_init(void)
1095 {
1096         return pci_register_driver(&rtl8180_driver);
1097 }
1098
1099 static void __exit rtl8180_exit(void)
1100 {
1101         pci_unregister_driver(&rtl8180_driver);
1102 }
1103
1104 module_init(rtl8180_init);
1105 module_exit(rtl8180_exit);