2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.10"
31 static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
32 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
33 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
36 MODULE_DEVICE_TABLE(pci, mwl8k_table);
38 /* Register definitions */
39 #define MWL8K_HIU_GEN_PTR 0x00000c10
40 #define MWL8K_MODE_STA 0x0000005a
41 #define MWL8K_MODE_AP 0x000000a5
42 #define MWL8K_HIU_INT_CODE 0x00000c14
43 #define MWL8K_FWSTA_READY 0xf0f1f2f4
44 #define MWL8K_FWAP_READY 0xf1f2f4a5
45 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
46 #define MWL8K_HIU_SCRATCH 0x00000c40
48 /* Host->device communications */
49 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
50 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
51 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
52 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
53 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
54 #define MWL8K_H2A_INT_DUMMY (1 << 20)
55 #define MWL8K_H2A_INT_RESET (1 << 15)
56 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
57 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
59 /* Device->host communications */
60 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
61 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
62 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
63 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
64 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
65 #define MWL8K_A2H_INT_DUMMY (1 << 20)
66 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
67 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
68 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
69 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
70 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
71 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
72 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
73 #define MWL8K_A2H_INT_RX_READY (1 << 1)
74 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
76 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
77 MWL8K_A2H_INT_CHNL_SWITCHED | \
78 MWL8K_A2H_INT_QUEUE_EMPTY | \
79 MWL8K_A2H_INT_RADAR_DETECT | \
80 MWL8K_A2H_INT_RADIO_ON | \
81 MWL8K_A2H_INT_RADIO_OFF | \
82 MWL8K_A2H_INT_MAC_EVENT | \
83 MWL8K_A2H_INT_OPC_DONE | \
84 MWL8K_A2H_INT_RX_READY | \
85 MWL8K_A2H_INT_TX_DONE)
87 #define MWL8K_RX_QUEUES 1
88 #define MWL8K_TX_QUEUES 4
90 struct mwl8k_rx_queue {
93 /* hw receives here */
96 /* refill descs here */
99 struct mwl8k_rx_desc *rx_desc_area;
100 dma_addr_t rx_desc_dma;
101 struct sk_buff **rx_skb;
104 struct mwl8k_tx_queue {
105 /* hw transmits here */
108 /* sw appends here */
111 struct ieee80211_tx_queue_stats tx_stats;
112 struct mwl8k_tx_desc *tx_desc_area;
113 dma_addr_t tx_desc_dma;
114 struct sk_buff **tx_skb;
117 /* Pointers to the firmware data and meta information about it. */
118 struct mwl8k_firmware {
120 struct firmware *ucode;
122 /* Boot helper code */
123 struct firmware *helper;
128 struct ieee80211_hw *hw;
130 struct pci_dev *pdev;
132 /* firmware files and meta data */
133 struct mwl8k_firmware fw;
136 /* firmware access */
137 struct mutex fw_mutex;
138 struct task_struct *fw_mutex_owner;
140 struct completion *hostcmd_wait;
142 /* lock held over TX and TX reap */
145 /* TX quiesce completion, protected by fw_mutex and tx_lock */
146 struct completion *tx_wait;
148 struct ieee80211_vif *vif;
150 struct ieee80211_channel *current_channel;
152 /* power management status cookie from firmware */
154 dma_addr_t cookie_dma;
161 * Running count of TX packets in flight, to avoid
162 * iterating over the transmit rings each time.
166 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
167 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
170 struct ieee80211_supported_band band;
171 struct ieee80211_channel channels[14];
172 struct ieee80211_rate rates[13];
175 bool radio_short_preamble;
176 bool sniffer_enabled;
179 /* XXX need to convert this to handle multiple interfaces */
181 u8 capture_bssid[ETH_ALEN];
182 struct sk_buff *beacon_skb;
185 * This FJ worker has to be global as it is scheduled from the
186 * RX handler. At this point we don't know which interface it
187 * belongs to until the list of bssids waiting to complete join
190 struct work_struct finalize_join_worker;
192 /* Tasklet to reclaim TX descriptors and buffers after tx */
193 struct tasklet_struct tx_reclaim_task;
196 /* Per interface specific private data */
198 /* backpointer to parent config block */
199 struct mwl8k_priv *priv;
201 /* BSS config of AP or IBSS from mac80211*/
202 struct ieee80211_bss_conf bss_info;
204 /* BSSID of AP or IBSS */
206 u8 mac_addr[ETH_ALEN];
209 * Subset of supported legacy rates.
210 * Intersection of AP and STA supported rates.
212 struct ieee80211_rate legacy_rates[13];
214 /* number of supported legacy rates */
217 /* Index into station database.Returned by update_sta_db call */
220 /* Non AMPDU sequence number assigned by driver */
224 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
226 static const struct ieee80211_channel mwl8k_channels[] = {
227 { .center_freq = 2412, .hw_value = 1, },
228 { .center_freq = 2417, .hw_value = 2, },
229 { .center_freq = 2422, .hw_value = 3, },
230 { .center_freq = 2427, .hw_value = 4, },
231 { .center_freq = 2432, .hw_value = 5, },
232 { .center_freq = 2437, .hw_value = 6, },
233 { .center_freq = 2442, .hw_value = 7, },
234 { .center_freq = 2447, .hw_value = 8, },
235 { .center_freq = 2452, .hw_value = 9, },
236 { .center_freq = 2457, .hw_value = 10, },
237 { .center_freq = 2462, .hw_value = 11, },
240 static const struct ieee80211_rate mwl8k_rates[] = {
241 { .bitrate = 10, .hw_value = 2, },
242 { .bitrate = 20, .hw_value = 4, },
243 { .bitrate = 55, .hw_value = 11, },
244 { .bitrate = 110, .hw_value = 22, },
245 { .bitrate = 220, .hw_value = 44, },
246 { .bitrate = 60, .hw_value = 12, },
247 { .bitrate = 90, .hw_value = 18, },
248 { .bitrate = 120, .hw_value = 24, },
249 { .bitrate = 180, .hw_value = 36, },
250 { .bitrate = 240, .hw_value = 48, },
251 { .bitrate = 360, .hw_value = 72, },
252 { .bitrate = 480, .hw_value = 96, },
253 { .bitrate = 540, .hw_value = 108, },
256 /* Set or get info from Firmware */
257 #define MWL8K_CMD_SET 0x0001
258 #define MWL8K_CMD_GET 0x0000
260 /* Firmware command codes */
261 #define MWL8K_CMD_CODE_DNLD 0x0001
262 #define MWL8K_CMD_GET_HW_SPEC 0x0003
263 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
264 #define MWL8K_CMD_GET_STAT 0x0014
265 #define MWL8K_CMD_RADIO_CONTROL 0x001c
266 #define MWL8K_CMD_RF_TX_POWER 0x001e
267 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
268 #define MWL8K_CMD_SET_POST_SCAN 0x0108
269 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
270 #define MWL8K_CMD_SET_AID 0x010d
271 #define MWL8K_CMD_SET_RATE 0x0110
272 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
273 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
274 #define MWL8K_CMD_SET_SLOT 0x0114
275 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
276 #define MWL8K_CMD_SET_WMM_MODE 0x0123
277 #define MWL8K_CMD_MIMO_CONFIG 0x0125
278 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
279 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
280 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
281 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
282 #define MWL8K_CMD_UPDATE_STADB 0x1123
284 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
286 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
287 snprintf(buf, bufsize, "%s", #x);\
290 switch (cmd & ~0x8000) {
291 MWL8K_CMDNAME(CODE_DNLD);
292 MWL8K_CMDNAME(GET_HW_SPEC);
293 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
294 MWL8K_CMDNAME(GET_STAT);
295 MWL8K_CMDNAME(RADIO_CONTROL);
296 MWL8K_CMDNAME(RF_TX_POWER);
297 MWL8K_CMDNAME(SET_PRE_SCAN);
298 MWL8K_CMDNAME(SET_POST_SCAN);
299 MWL8K_CMDNAME(SET_RF_CHANNEL);
300 MWL8K_CMDNAME(SET_AID);
301 MWL8K_CMDNAME(SET_RATE);
302 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
303 MWL8K_CMDNAME(RTS_THRESHOLD);
304 MWL8K_CMDNAME(SET_SLOT);
305 MWL8K_CMDNAME(SET_EDCA_PARAMS);
306 MWL8K_CMDNAME(SET_WMM_MODE);
307 MWL8K_CMDNAME(MIMO_CONFIG);
308 MWL8K_CMDNAME(USE_FIXED_RATE);
309 MWL8K_CMDNAME(ENABLE_SNIFFER);
310 MWL8K_CMDNAME(SET_MAC_ADDR);
311 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
312 MWL8K_CMDNAME(UPDATE_STADB);
314 snprintf(buf, bufsize, "0x%x", cmd);
321 /* Hardware and firmware reset */
322 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
324 iowrite32(MWL8K_H2A_INT_RESET,
325 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
326 iowrite32(MWL8K_H2A_INT_RESET,
327 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
331 /* Release fw image */
332 static void mwl8k_release_fw(struct firmware **fw)
336 release_firmware(*fw);
340 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
342 mwl8k_release_fw(&priv->fw.ucode);
343 mwl8k_release_fw(&priv->fw.helper);
346 /* Request fw image */
347 static int mwl8k_request_fw(struct mwl8k_priv *priv,
348 const char *fname, struct firmware **fw)
350 /* release current image */
352 mwl8k_release_fw(fw);
354 return request_firmware((const struct firmware **)fw,
355 fname, &priv->pdev->dev);
358 static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
363 priv->part_num = part_num;
365 snprintf(filename, sizeof(filename),
366 "mwl8k/helper_%u.fw", priv->part_num);
368 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
370 printk(KERN_ERR "%s: Error requesting helper firmware "
371 "file %s\n", pci_name(priv->pdev), filename);
375 snprintf(filename, sizeof(filename),
376 "mwl8k/fmimage_%u.fw", priv->part_num);
378 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
380 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
381 pci_name(priv->pdev), filename);
382 mwl8k_release_fw(&priv->fw.helper);
389 struct mwl8k_cmd_pkt {
395 } __attribute__((packed));
401 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
403 void __iomem *regs = priv->regs;
407 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
408 if (pci_dma_mapping_error(priv->pdev, dma_addr))
411 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
412 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
413 iowrite32(MWL8K_H2A_INT_DOORBELL,
414 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
415 iowrite32(MWL8K_H2A_INT_DUMMY,
416 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
422 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
423 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
424 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
432 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
434 return loops ? 0 : -ETIMEDOUT;
437 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
438 const u8 *data, size_t length)
440 struct mwl8k_cmd_pkt *cmd;
444 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
448 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
454 int block_size = length > 256 ? 256 : length;
456 memcpy(cmd->payload, data + done, block_size);
457 cmd->length = cpu_to_le16(block_size);
459 rc = mwl8k_send_fw_load_cmd(priv, cmd,
460 sizeof(*cmd) + block_size);
465 length -= block_size;
470 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
478 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
479 const u8 *data, size_t length)
481 unsigned char *buffer;
482 int may_continue, rc = 0;
483 u32 done, prev_block_size;
485 buffer = kmalloc(1024, GFP_KERNEL);
492 while (may_continue > 0) {
495 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
496 if (block_size & 1) {
500 done += prev_block_size;
501 length -= prev_block_size;
504 if (block_size > 1024 || block_size > length) {
514 if (block_size == 0) {
521 prev_block_size = block_size;
522 memcpy(buffer, data + done, block_size);
524 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
529 if (!rc && length != 0)
537 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
539 struct mwl8k_priv *priv = hw->priv;
540 struct firmware *fw = priv->fw.ucode;
544 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
545 struct firmware *helper = priv->fw.helper;
547 if (helper == NULL) {
548 printk(KERN_ERR "%s: helper image needed but none "
549 "given\n", pci_name(priv->pdev));
553 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
555 printk(KERN_ERR "%s: unable to load firmware "
556 "helper image\n", pci_name(priv->pdev));
561 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
563 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
567 printk(KERN_ERR "%s: unable to load firmware image\n",
568 pci_name(priv->pdev));
572 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
577 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
578 == MWL8K_FWSTA_READY)
583 return loops ? 0 : -ETIMEDOUT;
588 * Defines shared between transmission and reception.
590 /* HT control fields for firmware */
595 } __attribute__((packed));
597 /* Firmware Station database operations */
598 #define MWL8K_STA_DB_ADD_ENTRY 0
599 #define MWL8K_STA_DB_MODIFY_ENTRY 1
600 #define MWL8K_STA_DB_DEL_ENTRY 2
601 #define MWL8K_STA_DB_FLUSH 3
603 /* Peer Entry flags - used to define the type of the peer node */
604 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
606 #define MWL8K_IEEE_LEGACY_DATA_RATES 13
607 #define MWL8K_MCS_BITMAP_SIZE 16
609 struct peer_capability_info {
610 /* Peer type - AP vs. STA. */
613 /* Basic 802.11 capabilities from assoc resp. */
616 /* Set if peer supports 802.11n high throughput (HT). */
619 /* Valid if HT is supported. */
621 __u8 extended_ht_caps;
622 struct ewc_ht_info ewc_info;
624 /* Legacy rate table. Intersection of our rates and peer rates. */
625 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
627 /* HT rate table. Intersection of our rates and peer rates. */
628 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
631 /* If set, interoperability mode, no proprietary extensions. */
635 __le16 amsdu_enabled;
636 } __attribute__((packed));
638 /* Inline functions to manipulate QoS field in data descriptor. */
639 static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
641 u16 val_mask = 1 << 4;
643 /* End of Service Period Bit 4 */
644 return qos | val_mask;
647 static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
651 u16 qos_mask = ~(val_mask << shift);
653 /* Ack Policy Bit 5-6 */
654 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
657 static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
659 u16 val_mask = 1 << 7;
661 /* AMSDU present Bit 7 */
662 return qos | val_mask;
665 static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
669 u16 qos_mask = ~(val_mask << shift);
671 /* Queue Length Bits 8-15 */
672 return (qos & qos_mask) | ((len & val_mask) << shift);
675 /* DMA header used by firmware and hardware. */
676 struct mwl8k_dma_data {
678 struct ieee80211_hdr wh;
679 } __attribute__((packed));
681 /* Routines to add/remove DMA header from skb. */
682 static inline void mwl8k_remove_dma_header(struct sk_buff *skb)
684 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)skb->data;
685 void *dst, *src = &tr->wh;
686 int hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
687 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
689 dst = (void *)tr + space;
691 memmove(dst, src, hdrlen);
692 skb_pull(skb, space);
696 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
698 struct ieee80211_hdr *wh;
700 struct mwl8k_dma_data *tr;
702 wh = (struct ieee80211_hdr *)skb->data;
703 hdrlen = ieee80211_hdrlen(wh->frame_control);
707 * Copy up/down the 802.11 header; the firmware requires
708 * we present a 2-byte payload length followed by a
709 * 4-address header (w/o QoS), followed (optionally) by
710 * any WEP/ExtIV header (but only filled in for CCMP).
712 if (hdrlen != sizeof(struct mwl8k_dma_data))
713 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
715 tr = (struct mwl8k_dma_data *)skb->data;
717 memmove(&tr->wh, wh, hdrlen);
720 memset(tr->wh.addr4, 0, ETH_ALEN);
723 * Firmware length is the length of the fully formed "802.11
724 * payload". That is, everything except for the 802.11 header.
725 * This includes all crypto material including the MIC.
727 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
734 #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
736 struct mwl8k_rx_desc {
740 __le32 pkt_phys_addr;
741 __le32 next_rx_desc_phys_addr;
751 } __attribute__((packed));
753 #define MWL8K_RX_DESCS 256
754 #define MWL8K_RX_MAXSZ 3800
756 #define RATE_INFO_SHORTPRE 0x8000
757 #define RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
758 #define RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
759 #define RATE_INFO_40MHZ 0x0004
760 #define RATE_INFO_SHORTGI 0x0002
761 #define RATE_INFO_MCS_FORMAT 0x0001
763 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
765 struct mwl8k_priv *priv = hw->priv;
766 struct mwl8k_rx_queue *rxq = priv->rxq + index;
770 rxq->rx_desc_count = 0;
774 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
777 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
778 if (rxq->rx_desc_area == NULL) {
779 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
780 wiphy_name(hw->wiphy));
783 memset(rxq->rx_desc_area, 0, size);
785 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
786 sizeof(*rxq->rx_skb), GFP_KERNEL);
787 if (rxq->rx_skb == NULL) {
788 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
789 wiphy_name(hw->wiphy));
790 pci_free_consistent(priv->pdev, size,
791 rxq->rx_desc_area, rxq->rx_desc_dma);
794 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
796 for (i = 0; i < MWL8K_RX_DESCS; i++) {
797 struct mwl8k_rx_desc *rx_desc;
800 rx_desc = rxq->rx_desc_area + i;
801 nexti = (i + 1) % MWL8K_RX_DESCS;
803 rx_desc->next_rx_desc_phys_addr =
804 cpu_to_le32(rxq->rx_desc_dma
805 + nexti * sizeof(*rx_desc));
806 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
812 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
814 struct mwl8k_priv *priv = hw->priv;
815 struct mwl8k_rx_queue *rxq = priv->rxq + index;
819 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
823 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
827 rxq->rx_desc_count++;
830 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
832 rxq->rx_desc_area[rx].pkt_phys_addr =
833 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
834 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
836 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
837 rxq->rx_skb[rx] = skb;
839 rxq->rx_desc_area[rx].rx_ctrl = 0;
847 /* Must be called only when the card's reception is completely halted */
848 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
850 struct mwl8k_priv *priv = hw->priv;
851 struct mwl8k_rx_queue *rxq = priv->rxq + index;
854 for (i = 0; i < MWL8K_RX_DESCS; i++) {
855 if (rxq->rx_skb[i] != NULL) {
858 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
859 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
861 kfree_skb(rxq->rx_skb[i]);
862 rxq->rx_skb[i] = NULL;
869 pci_free_consistent(priv->pdev,
870 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
871 rxq->rx_desc_area, rxq->rx_desc_dma);
872 rxq->rx_desc_area = NULL;
877 * Scan a list of BSSIDs to process for finalize join.
878 * Allows for extension to process multiple BSSIDs.
881 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
883 return priv->capture_beacon &&
884 ieee80211_is_beacon(wh->frame_control) &&
885 !compare_ether_addr(wh->addr3, priv->capture_bssid);
888 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
891 struct mwl8k_priv *priv = hw->priv;
893 priv->capture_beacon = false;
894 memset(priv->capture_bssid, 0, ETH_ALEN);
897 * Use GFP_ATOMIC as rxq_process is called from
898 * the primary interrupt handler, memory allocation call
901 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
902 if (priv->beacon_skb != NULL)
903 ieee80211_queue_work(hw, &priv->finalize_join_worker);
906 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
908 struct mwl8k_priv *priv = hw->priv;
909 struct mwl8k_rx_queue *rxq = priv->rxq + index;
913 while (rxq->rx_desc_count && limit--) {
914 struct mwl8k_rx_desc *rx_desc;
916 struct ieee80211_rx_status status;
918 struct ieee80211_hdr *wh;
921 rx_desc = rxq->rx_desc_area + rxq->rx_head;
922 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
926 skb = rxq->rx_skb[rxq->rx_head];
929 rxq->rx_skb[rxq->rx_head] = NULL;
931 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
932 rxq->rx_desc_count--;
934 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
935 pci_unmap_single(priv->pdev, addr,
936 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
938 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
939 mwl8k_remove_dma_header(skb);
941 wh = (struct ieee80211_hdr *)skb->data;
944 * Check for a pending join operation. Save a
945 * copy of the beacon and schedule a tasklet to
946 * send a FINALIZE_JOIN command to the firmware.
948 if (mwl8k_capture_bssid(priv, wh))
949 mwl8k_save_beacon(hw, skb);
951 rate_info = le16_to_cpu(rx_desc->rate_info);
953 memset(&status, 0, sizeof(status));
955 status.signal = -rx_desc->rssi;
956 status.noise = -rx_desc->noise_level;
957 status.qual = rx_desc->link_quality;
958 status.antenna = RATE_INFO_ANTSELECT(rate_info);
959 status.rate_idx = RATE_INFO_RATEID(rate_info);
961 if (rate_info & RATE_INFO_SHORTPRE)
962 status.flag |= RX_FLAG_SHORTPRE;
963 if (rate_info & RATE_INFO_40MHZ)
964 status.flag |= RX_FLAG_40MHZ;
965 if (rate_info & RATE_INFO_SHORTGI)
966 status.flag |= RX_FLAG_SHORT_GI;
967 if (rate_info & RATE_INFO_MCS_FORMAT)
968 status.flag |= RX_FLAG_HT;
969 status.band = IEEE80211_BAND_2GHZ;
970 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
971 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
972 ieee80211_rx_irqsafe(hw, skb);
982 * Packet transmission.
985 /* Transmit packet ACK policy */
986 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
987 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
989 #define MWL8K_TXD_STATUS_OK 0x00000001
990 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
991 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
992 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
993 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
995 struct mwl8k_tx_desc {
1000 __le32 pkt_phys_addr;
1002 __u8 dest_MAC_addr[ETH_ALEN];
1003 __le32 next_tx_desc_phys_addr;
1008 } __attribute__((packed));
1010 #define MWL8K_TX_DESCS 128
1012 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1014 struct mwl8k_priv *priv = hw->priv;
1015 struct mwl8k_tx_queue *txq = priv->txq + index;
1019 memset(&txq->tx_stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1020 txq->tx_stats.limit = MWL8K_TX_DESCS;
1024 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1027 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
1028 if (txq->tx_desc_area == NULL) {
1029 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1030 wiphy_name(hw->wiphy));
1033 memset(txq->tx_desc_area, 0, size);
1035 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
1037 if (txq->tx_skb == NULL) {
1038 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1039 wiphy_name(hw->wiphy));
1040 pci_free_consistent(priv->pdev, size,
1041 txq->tx_desc_area, txq->tx_desc_dma);
1044 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
1046 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1047 struct mwl8k_tx_desc *tx_desc;
1050 tx_desc = txq->tx_desc_area + i;
1051 nexti = (i + 1) % MWL8K_TX_DESCS;
1053 tx_desc->status = 0;
1054 tx_desc->next_tx_desc_phys_addr =
1055 cpu_to_le32(txq->tx_desc_dma +
1056 nexti * sizeof(*tx_desc));
1062 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1064 iowrite32(MWL8K_H2A_INT_PPA_READY,
1065 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1066 iowrite32(MWL8K_H2A_INT_DUMMY,
1067 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1068 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1071 struct mwl8k_txq_info {
1080 static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1081 struct mwl8k_txq_info *txinfo)
1083 int count, desc, status;
1084 struct mwl8k_tx_queue *txq;
1085 struct mwl8k_tx_desc *tx_desc;
1088 memset(txinfo, 0, MWL8K_TX_QUEUES * sizeof(struct mwl8k_txq_info));
1090 for (count = 0; count < MWL8K_TX_QUEUES; count++) {
1091 txq = priv->txq + count;
1092 txinfo[count].len = txq->tx_stats.len;
1093 txinfo[count].head = txq->tx_head;
1094 txinfo[count].tail = txq->tx_tail;
1095 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1096 tx_desc = txq->tx_desc_area + desc;
1097 status = le32_to_cpu(tx_desc->status);
1099 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1100 txinfo[count].fw_owned++;
1102 txinfo[count].drv_owned++;
1104 if (tx_desc->pkt_len == 0)
1105 txinfo[count].unused++;
1113 * Must be called with priv->fw_mutex held and tx queues stopped.
1115 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1117 struct mwl8k_priv *priv = hw->priv;
1118 DECLARE_COMPLETION_ONSTACK(tx_wait);
1120 unsigned long timeout;
1124 spin_lock_bh(&priv->tx_lock);
1125 count = priv->pending_tx_pkts;
1127 priv->tx_wait = &tx_wait;
1128 spin_unlock_bh(&priv->tx_lock);
1131 struct mwl8k_txq_info txinfo[MWL8K_TX_QUEUES];
1135 timeout = wait_for_completion_timeout(&tx_wait,
1136 msecs_to_jiffies(5000));
1140 spin_lock_bh(&priv->tx_lock);
1141 priv->tx_wait = NULL;
1142 newcount = priv->pending_tx_pkts;
1143 mwl8k_scan_tx_ring(priv, txinfo);
1144 spin_unlock_bh(&priv->tx_lock);
1146 printk(KERN_ERR "%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1147 __func__, __LINE__, count, newcount);
1149 for (index = 0; index < MWL8K_TX_QUEUES; index++)
1150 printk(KERN_ERR "TXQ:%u L:%u H:%u T:%u FW:%u "
1156 txinfo[index].fw_owned,
1157 txinfo[index].drv_owned,
1158 txinfo[index].unused);
1166 #define MWL8K_TXD_SUCCESS(status) \
1167 ((status) & (MWL8K_TXD_STATUS_OK | \
1168 MWL8K_TXD_STATUS_OK_RETRY | \
1169 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1171 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1173 struct mwl8k_priv *priv = hw->priv;
1174 struct mwl8k_tx_queue *txq = priv->txq + index;
1177 while (txq->tx_stats.len > 0) {
1179 struct mwl8k_tx_desc *tx_desc;
1182 struct sk_buff *skb;
1183 struct ieee80211_tx_info *info;
1187 tx_desc = txq->tx_desc_area + tx;
1189 status = le32_to_cpu(tx_desc->status);
1191 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1195 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1198 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
1199 BUG_ON(txq->tx_stats.len == 0);
1200 txq->tx_stats.len--;
1201 priv->pending_tx_pkts--;
1203 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1204 size = le16_to_cpu(tx_desc->pkt_len);
1205 skb = txq->tx_skb[tx];
1206 txq->tx_skb[tx] = NULL;
1208 BUG_ON(skb == NULL);
1209 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1211 mwl8k_remove_dma_header(skb);
1213 /* Mark descriptor as unused */
1214 tx_desc->pkt_phys_addr = 0;
1215 tx_desc->pkt_len = 0;
1217 info = IEEE80211_SKB_CB(skb);
1218 ieee80211_tx_info_clear_status(info);
1219 if (MWL8K_TXD_SUCCESS(status))
1220 info->flags |= IEEE80211_TX_STAT_ACK;
1222 ieee80211_tx_status_irqsafe(hw, skb);
1227 if (wake && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1228 ieee80211_wake_queue(hw, index);
1231 /* must be called only when the card's transmit is completely halted */
1232 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1234 struct mwl8k_priv *priv = hw->priv;
1235 struct mwl8k_tx_queue *txq = priv->txq + index;
1237 mwl8k_txq_reclaim(hw, index, 1);
1242 pci_free_consistent(priv->pdev,
1243 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1244 txq->tx_desc_area, txq->tx_desc_dma);
1245 txq->tx_desc_area = NULL;
1249 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1251 struct mwl8k_priv *priv = hw->priv;
1252 struct ieee80211_tx_info *tx_info;
1253 struct mwl8k_vif *mwl8k_vif;
1254 struct ieee80211_hdr *wh;
1255 struct mwl8k_tx_queue *txq;
1256 struct mwl8k_tx_desc *tx;
1262 wh = (struct ieee80211_hdr *)skb->data;
1263 if (ieee80211_is_data_qos(wh->frame_control))
1264 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1268 mwl8k_add_dma_header(skb);
1269 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1271 tx_info = IEEE80211_SKB_CB(skb);
1272 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1274 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1275 u16 seqno = mwl8k_vif->seqno;
1277 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1278 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1279 mwl8k_vif->seqno = seqno++ % 4096;
1282 /* Setup firmware control bit fields for each frame type. */
1285 if (ieee80211_is_mgmt(wh->frame_control) ||
1286 ieee80211_is_ctl(wh->frame_control)) {
1288 qos = mwl8k_qos_setbit_eosp(qos);
1289 /* Set Queue size to unspecified */
1290 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1291 } else if (ieee80211_is_data(wh->frame_control)) {
1293 if (is_multicast_ether_addr(wh->addr1))
1294 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1296 /* Send pkt in an aggregate if AMPDU frame. */
1297 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1298 qos = mwl8k_qos_setbit_ack(qos,
1299 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1301 qos = mwl8k_qos_setbit_ack(qos,
1302 MWL8K_TXD_ACK_POLICY_NORMAL);
1304 if (qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT)
1305 qos = mwl8k_qos_setbit_amsdu(qos);
1308 dma = pci_map_single(priv->pdev, skb->data,
1309 skb->len, PCI_DMA_TODEVICE);
1311 if (pci_dma_mapping_error(priv->pdev, dma)) {
1312 printk(KERN_DEBUG "%s: failed to dma map skb, "
1313 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1315 return NETDEV_TX_OK;
1318 spin_lock_bh(&priv->tx_lock);
1320 txq = priv->txq + index;
1322 BUG_ON(txq->tx_skb[txq->tx_tail] != NULL);
1323 txq->tx_skb[txq->tx_tail] = skb;
1325 tx = txq->tx_desc_area + txq->tx_tail;
1326 tx->data_rate = txdatarate;
1327 tx->tx_priority = index;
1328 tx->qos_control = cpu_to_le16(qos);
1329 tx->pkt_phys_addr = cpu_to_le32(dma);
1330 tx->pkt_len = cpu_to_le16(skb->len);
1332 tx->peer_id = mwl8k_vif->peer_id;
1334 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1336 txq->tx_stats.count++;
1337 txq->tx_stats.len++;
1338 priv->pending_tx_pkts++;
1341 if (txq->tx_tail == MWL8K_TX_DESCS)
1344 if (txq->tx_head == txq->tx_tail)
1345 ieee80211_stop_queue(hw, index);
1347 mwl8k_tx_start(priv);
1349 spin_unlock_bh(&priv->tx_lock);
1351 return NETDEV_TX_OK;
1358 * We have the following requirements for issuing firmware commands:
1359 * - Some commands require that the packet transmit path is idle when
1360 * the command is issued. (For simplicity, we'll just quiesce the
1361 * transmit path for every command.)
1362 * - There are certain sequences of commands that need to be issued to
1363 * the hardware sequentially, with no other intervening commands.
1365 * This leads to an implementation of a "firmware lock" as a mutex that
1366 * can be taken recursively, and which is taken by both the low-level
1367 * command submission function (mwl8k_post_cmd) as well as any users of
1368 * that function that require issuing of an atomic sequence of commands,
1369 * and quiesces the transmit path whenever it's taken.
1371 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1373 struct mwl8k_priv *priv = hw->priv;
1375 if (priv->fw_mutex_owner != current) {
1378 mutex_lock(&priv->fw_mutex);
1379 ieee80211_stop_queues(hw);
1381 rc = mwl8k_tx_wait_empty(hw);
1383 ieee80211_wake_queues(hw);
1384 mutex_unlock(&priv->fw_mutex);
1389 priv->fw_mutex_owner = current;
1392 priv->fw_mutex_depth++;
1397 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1399 struct mwl8k_priv *priv = hw->priv;
1401 if (!--priv->fw_mutex_depth) {
1402 ieee80211_wake_queues(hw);
1403 priv->fw_mutex_owner = NULL;
1404 mutex_unlock(&priv->fw_mutex);
1410 * Command processing.
1413 /* Timeout firmware commands after 2000ms */
1414 #define MWL8K_CMD_TIMEOUT_MS 2000
1416 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1418 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1419 struct mwl8k_priv *priv = hw->priv;
1420 void __iomem *regs = priv->regs;
1421 dma_addr_t dma_addr;
1422 unsigned int dma_size;
1424 unsigned long timeout = 0;
1427 cmd->result = 0xffff;
1428 dma_size = le16_to_cpu(cmd->length);
1429 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1430 PCI_DMA_BIDIRECTIONAL);
1431 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1434 rc = mwl8k_fw_lock(hw);
1436 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1437 PCI_DMA_BIDIRECTIONAL);
1441 priv->hostcmd_wait = &cmd_wait;
1442 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1443 iowrite32(MWL8K_H2A_INT_DOORBELL,
1444 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1445 iowrite32(MWL8K_H2A_INT_DUMMY,
1446 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1448 timeout = wait_for_completion_timeout(&cmd_wait,
1449 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1451 priv->hostcmd_wait = NULL;
1453 mwl8k_fw_unlock(hw);
1455 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1456 PCI_DMA_BIDIRECTIONAL);
1459 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1460 wiphy_name(hw->wiphy),
1461 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1462 MWL8K_CMD_TIMEOUT_MS);
1465 rc = cmd->result ? -EINVAL : 0;
1467 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1468 wiphy_name(hw->wiphy),
1469 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1470 le16_to_cpu(cmd->result));
1479 struct mwl8k_cmd_get_hw_spec {
1480 struct mwl8k_cmd_pkt header;
1482 __u8 host_interface;
1484 __u8 perm_addr[ETH_ALEN];
1489 __u8 mcs_bitmap[16];
1490 __le32 rx_queue_ptr;
1491 __le32 num_tx_queues;
1492 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1494 __le32 num_tx_desc_per_queue;
1495 __le32 total_rx_desc;
1496 } __attribute__((packed));
1498 static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1500 struct mwl8k_priv *priv = hw->priv;
1501 struct mwl8k_cmd_get_hw_spec *cmd;
1505 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1509 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1510 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1512 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1513 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1514 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
1515 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1516 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1517 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
1518 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1519 cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
1521 rc = mwl8k_post_cmd(hw, &cmd->header);
1524 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1525 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1526 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1527 priv->hw_rev = cmd->hw_rev;
1535 * CMD_MAC_MULTICAST_ADR.
1537 struct mwl8k_cmd_mac_multicast_adr {
1538 struct mwl8k_cmd_pkt header;
1541 __u8 addr[0][ETH_ALEN];
1544 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1545 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1546 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1547 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1549 static struct mwl8k_cmd_pkt *
1550 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1551 int mc_count, struct dev_addr_list *mclist)
1553 struct mwl8k_priv *priv = hw->priv;
1554 struct mwl8k_cmd_mac_multicast_adr *cmd;
1557 if (allmulti || mc_count > priv->num_mcaddrs) {
1562 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1564 cmd = kzalloc(size, GFP_ATOMIC);
1568 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1569 cmd->header.length = cpu_to_le16(size);
1570 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1571 MWL8K_ENABLE_RX_BROADCAST);
1574 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1575 } else if (mc_count) {
1578 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1579 cmd->numaddr = cpu_to_le16(mc_count);
1580 for (i = 0; i < mc_count && mclist; i++) {
1581 if (mclist->da_addrlen != ETH_ALEN) {
1585 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1586 mclist = mclist->next;
1590 return &cmd->header;
1594 * CMD_802_11_GET_STAT.
1596 struct mwl8k_cmd_802_11_get_stat {
1597 struct mwl8k_cmd_pkt header;
1599 } __attribute__((packed));
1601 #define MWL8K_STAT_ACK_FAILURE 9
1602 #define MWL8K_STAT_RTS_FAILURE 12
1603 #define MWL8K_STAT_FCS_ERROR 24
1604 #define MWL8K_STAT_RTS_SUCCESS 11
1606 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1607 struct ieee80211_low_level_stats *stats)
1609 struct mwl8k_cmd_802_11_get_stat *cmd;
1612 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1616 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1617 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1619 rc = mwl8k_post_cmd(hw, &cmd->header);
1621 stats->dot11ACKFailureCount =
1622 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1623 stats->dot11RTSFailureCount =
1624 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1625 stats->dot11FCSErrorCount =
1626 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1627 stats->dot11RTSSuccessCount =
1628 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1636 * CMD_802_11_RADIO_CONTROL.
1638 struct mwl8k_cmd_802_11_radio_control {
1639 struct mwl8k_cmd_pkt header;
1643 } __attribute__((packed));
1646 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1648 struct mwl8k_priv *priv = hw->priv;
1649 struct mwl8k_cmd_802_11_radio_control *cmd;
1652 if (enable == priv->radio_on && !force)
1655 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1659 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1660 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1661 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1662 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1663 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1665 rc = mwl8k_post_cmd(hw, &cmd->header);
1669 priv->radio_on = enable;
1674 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw *hw)
1676 return mwl8k_cmd_802_11_radio_control(hw, 0, 0);
1679 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw *hw)
1681 return mwl8k_cmd_802_11_radio_control(hw, 1, 0);
1685 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1687 struct mwl8k_priv *priv;
1689 if (hw == NULL || hw->priv == NULL)
1693 priv->radio_short_preamble = short_preamble;
1695 return mwl8k_cmd_802_11_radio_control(hw, 1, 1);
1699 * CMD_802_11_RF_TX_POWER.
1701 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1703 struct mwl8k_cmd_802_11_rf_tx_power {
1704 struct mwl8k_cmd_pkt header;
1706 __le16 support_level;
1707 __le16 current_level;
1709 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1710 } __attribute__((packed));
1712 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1714 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1717 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1721 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1722 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1723 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1724 cmd->support_level = cpu_to_le16(dBm);
1726 rc = mwl8k_post_cmd(hw, &cmd->header);
1735 struct mwl8k_cmd_set_pre_scan {
1736 struct mwl8k_cmd_pkt header;
1737 } __attribute__((packed));
1739 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1741 struct mwl8k_cmd_set_pre_scan *cmd;
1744 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1748 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1749 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1751 rc = mwl8k_post_cmd(hw, &cmd->header);
1758 * CMD_SET_POST_SCAN.
1760 struct mwl8k_cmd_set_post_scan {
1761 struct mwl8k_cmd_pkt header;
1763 __u8 bssid[ETH_ALEN];
1764 } __attribute__((packed));
1767 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
1769 struct mwl8k_cmd_set_post_scan *cmd;
1772 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1776 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1777 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1779 memcpy(cmd->bssid, mac, ETH_ALEN);
1781 rc = mwl8k_post_cmd(hw, &cmd->header);
1788 * CMD_SET_RF_CHANNEL.
1790 struct mwl8k_cmd_set_rf_channel {
1791 struct mwl8k_cmd_pkt header;
1793 __u8 current_channel;
1794 __le32 channel_flags;
1795 } __attribute__((packed));
1797 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1798 struct ieee80211_channel *channel)
1800 struct mwl8k_cmd_set_rf_channel *cmd;
1803 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1807 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1808 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1809 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1810 cmd->current_channel = channel->hw_value;
1811 if (channel->band == IEEE80211_BAND_2GHZ)
1812 cmd->channel_flags = cpu_to_le32(0x00000081);
1814 cmd->channel_flags = cpu_to_le32(0x00000000);
1816 rc = mwl8k_post_cmd(hw, &cmd->header);
1825 struct mwl8k_cmd_set_slot {
1826 struct mwl8k_cmd_pkt header;
1829 } __attribute__((packed));
1831 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
1833 struct mwl8k_cmd_set_slot *cmd;
1836 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1840 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1841 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1842 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1843 cmd->short_slot = short_slot_time;
1845 rc = mwl8k_post_cmd(hw, &cmd->header);
1854 struct mwl8k_cmd_mimo_config {
1855 struct mwl8k_cmd_pkt header;
1857 __u8 rx_antenna_map;
1858 __u8 tx_antenna_map;
1859 } __attribute__((packed));
1861 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1863 struct mwl8k_cmd_mimo_config *cmd;
1866 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1870 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1871 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1872 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
1873 cmd->rx_antenna_map = rx;
1874 cmd->tx_antenna_map = tx;
1876 rc = mwl8k_post_cmd(hw, &cmd->header);
1883 * CMD_ENABLE_SNIFFER.
1885 struct mwl8k_cmd_enable_sniffer {
1886 struct mwl8k_cmd_pkt header;
1888 } __attribute__((packed));
1890 static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
1892 struct mwl8k_cmd_enable_sniffer *cmd;
1895 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1899 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
1900 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1901 cmd->action = cpu_to_le32(!!enable);
1903 rc = mwl8k_post_cmd(hw, &cmd->header);
1912 struct mwl8k_cmd_set_mac_addr {
1913 struct mwl8k_cmd_pkt header;
1914 __u8 mac_addr[ETH_ALEN];
1915 } __attribute__((packed));
1917 static int mwl8k_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
1919 struct mwl8k_cmd_set_mac_addr *cmd;
1922 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1926 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
1927 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1928 memcpy(cmd->mac_addr, mac, ETH_ALEN);
1930 rc = mwl8k_post_cmd(hw, &cmd->header);
1938 * CMD_SET_RATEADAPT_MODE.
1940 struct mwl8k_cmd_set_rate_adapt_mode {
1941 struct mwl8k_cmd_pkt header;
1944 } __attribute__((packed));
1946 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
1948 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
1951 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1955 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
1956 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1957 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1958 cmd->mode = cpu_to_le16(mode);
1960 rc = mwl8k_post_cmd(hw, &cmd->header);
1969 struct mwl8k_cmd_set_wmm {
1970 struct mwl8k_cmd_pkt header;
1972 } __attribute__((packed));
1974 static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
1976 struct mwl8k_priv *priv = hw->priv;
1977 struct mwl8k_cmd_set_wmm *cmd;
1980 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1984 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
1985 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1986 cmd->action = cpu_to_le16(!!enable);
1988 rc = mwl8k_post_cmd(hw, &cmd->header);
1992 priv->wmm_enabled = enable;
1998 * CMD_SET_RTS_THRESHOLD.
2000 struct mwl8k_cmd_rts_threshold {
2001 struct mwl8k_cmd_pkt header;
2004 } __attribute__((packed));
2006 static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
2007 u16 action, u16 threshold)
2009 struct mwl8k_cmd_rts_threshold *cmd;
2012 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2016 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2017 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2018 cmd->action = cpu_to_le16(action);
2019 cmd->threshold = cpu_to_le16(threshold);
2021 rc = mwl8k_post_cmd(hw, &cmd->header);
2028 * CMD_SET_EDCA_PARAMS.
2030 struct mwl8k_cmd_set_edca_params {
2031 struct mwl8k_cmd_pkt header;
2033 /* See MWL8K_SET_EDCA_XXX below */
2036 /* TX opportunity in units of 32 us */
2039 /* Log exponent of max contention period: 0...15*/
2042 /* Log exponent of min contention period: 0...15 */
2045 /* Adaptive interframe spacing in units of 32us */
2048 /* TX queue to configure */
2050 } __attribute__((packed));
2052 #define MWL8K_SET_EDCA_CW 0x01
2053 #define MWL8K_SET_EDCA_TXOP 0x02
2054 #define MWL8K_SET_EDCA_AIFS 0x04
2056 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2057 MWL8K_SET_EDCA_TXOP | \
2058 MWL8K_SET_EDCA_AIFS)
2061 mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2062 __u16 cw_min, __u16 cw_max,
2063 __u8 aifs, __u16 txop)
2065 struct mwl8k_cmd_set_edca_params *cmd;
2068 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2073 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2076 qnum ^= !(qnum >> 1);
2078 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2079 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2080 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2081 cmd->txop = cpu_to_le16(txop);
2082 cmd->log_cw_max = (u8)ilog2(cw_max + 1);
2083 cmd->log_cw_min = (u8)ilog2(cw_min + 1);
2087 rc = mwl8k_post_cmd(hw, &cmd->header);
2094 * CMD_FINALIZE_JOIN.
2097 /* FJ beacon buffer size is compiled into the firmware. */
2098 #define MWL8K_FJ_BEACON_MAXLEN 128
2100 struct mwl8k_cmd_finalize_join {
2101 struct mwl8k_cmd_pkt header;
2102 __le32 sleep_interval; /* Number of beacon periods to sleep */
2103 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2104 } __attribute__((packed));
2106 static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2107 __u16 framelen, __u16 dtim)
2109 struct mwl8k_cmd_finalize_join *cmd;
2110 struct ieee80211_mgmt *payload = frame;
2118 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2122 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2123 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2124 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2126 hdrlen = ieee80211_hdrlen(payload->frame_control);
2128 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2130 /* XXX TBD Might just have to abort and return an error */
2131 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2132 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2133 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2134 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2136 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2137 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2139 if (payload && payload_len)
2140 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2142 rc = mwl8k_post_cmd(hw, &cmd->header);
2150 struct mwl8k_cmd_update_sta_db {
2151 struct mwl8k_cmd_pkt header;
2153 /* See STADB_ACTION_TYPE */
2156 /* Peer MAC address */
2157 __u8 peer_addr[ETH_ALEN];
2161 /* Peer info - valid during add/update. */
2162 struct peer_capability_info peer_info;
2163 } __attribute__((packed));
2165 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2166 struct ieee80211_vif *vif, __u32 action)
2168 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2169 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2170 struct mwl8k_cmd_update_sta_db *cmd;
2171 struct peer_capability_info *peer_info;
2172 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2176 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2180 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2181 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2183 cmd->action = cpu_to_le32(action);
2184 peer_info = &cmd->peer_info;
2185 memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
2188 case MWL8K_STA_DB_ADD_ENTRY:
2189 case MWL8K_STA_DB_MODIFY_ENTRY:
2190 /* Build peer_info block */
2191 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2192 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2193 peer_info->interop = 1;
2194 peer_info->amsdu_enabled = 0;
2196 rates = peer_info->legacy_rates;
2197 for (count = 0; count < mv_vif->legacy_nrates; count++)
2198 rates[count] = bitrates[count].hw_value;
2200 rc = mwl8k_post_cmd(hw, &cmd->header);
2202 mv_vif->peer_id = peer_info->station_id;
2206 case MWL8K_STA_DB_DEL_ENTRY:
2207 case MWL8K_STA_DB_FLUSH:
2209 rc = mwl8k_post_cmd(hw, &cmd->header);
2211 mv_vif->peer_id = 0;
2222 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2224 #define MWL8K_FRAME_PROT_DISABLED 0x00
2225 #define MWL8K_FRAME_PROT_11G 0x07
2226 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2227 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2229 struct mwl8k_cmd_update_set_aid {
2230 struct mwl8k_cmd_pkt header;
2233 /* AP's MAC address (BSSID) */
2234 __u8 bssid[ETH_ALEN];
2235 __le16 protection_mode;
2236 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2237 } __attribute__((packed));
2239 static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2240 struct ieee80211_vif *vif)
2242 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2243 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2244 struct mwl8k_cmd_update_set_aid *cmd;
2245 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2250 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2254 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2255 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2256 cmd->aid = cpu_to_le16(info->aid);
2258 memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
2260 if (info->use_cts_prot) {
2261 prot_mode = MWL8K_FRAME_PROT_11G;
2263 switch (info->ht_operation_mode &
2264 IEEE80211_HT_OP_MODE_PROTECTION) {
2265 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2266 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2268 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2269 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2272 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2276 cmd->protection_mode = cpu_to_le16(prot_mode);
2278 for (count = 0; count < mv_vif->legacy_nrates; count++)
2279 cmd->supp_rates[count] = bitrates[count].hw_value;
2281 rc = mwl8k_post_cmd(hw, &cmd->header);
2290 struct mwl8k_cmd_update_rateset {
2291 struct mwl8k_cmd_pkt header;
2292 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2294 /* Bitmap for supported MCS codes. */
2295 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2296 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2297 } __attribute__((packed));
2299 static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2300 struct ieee80211_vif *vif)
2302 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2303 struct mwl8k_cmd_update_rateset *cmd;
2304 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2308 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2312 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2313 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2315 for (count = 0; count < mv_vif->legacy_nrates; count++)
2316 cmd->legacy_rates[count] = bitrates[count].hw_value;
2318 rc = mwl8k_post_cmd(hw, &cmd->header);
2325 * CMD_USE_FIXED_RATE.
2327 #define MWL8K_RATE_TABLE_SIZE 8
2328 #define MWL8K_UCAST_RATE 0
2329 #define MWL8K_USE_AUTO_RATE 0x0002
2331 struct mwl8k_rate_entry {
2332 /* Set to 1 if HT rate, 0 if legacy. */
2335 /* Set to 1 to use retry_count field. */
2336 __le32 enable_retry;
2338 /* Specified legacy rate or MCS. */
2341 /* Number of allowed retries. */
2343 } __attribute__((packed));
2345 struct mwl8k_rate_table {
2346 /* 1 to allow specified rate and below */
2347 __le32 allow_rate_drop;
2349 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2350 } __attribute__((packed));
2352 struct mwl8k_cmd_use_fixed_rate {
2353 struct mwl8k_cmd_pkt header;
2355 struct mwl8k_rate_table rate_table;
2357 /* Unicast, Broadcast or Multicast */
2361 } __attribute__((packed));
2363 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2364 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2366 struct mwl8k_cmd_use_fixed_rate *cmd;
2370 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2374 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2375 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2377 cmd->action = cpu_to_le32(action);
2378 cmd->rate_type = cpu_to_le32(rate_type);
2380 if (rate_table != NULL) {
2382 * Copy over each field manually so that endian
2383 * conversion can be done.
2385 cmd->rate_table.allow_rate_drop =
2386 cpu_to_le32(rate_table->allow_rate_drop);
2387 cmd->rate_table.num_rates =
2388 cpu_to_le32(rate_table->num_rates);
2390 for (count = 0; count < rate_table->num_rates; count++) {
2391 struct mwl8k_rate_entry *dst =
2392 &cmd->rate_table.rate_entry[count];
2393 struct mwl8k_rate_entry *src =
2394 &rate_table->rate_entry[count];
2396 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2397 dst->enable_retry = cpu_to_le32(src->enable_retry);
2398 dst->rate = cpu_to_le32(src->rate);
2399 dst->retry_count = cpu_to_le32(src->retry_count);
2403 rc = mwl8k_post_cmd(hw, &cmd->header);
2411 * Interrupt handling.
2413 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2415 struct ieee80211_hw *hw = dev_id;
2416 struct mwl8k_priv *priv = hw->priv;
2419 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2420 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2425 if (status & MWL8K_A2H_INT_TX_DONE)
2426 tasklet_schedule(&priv->tx_reclaim_task);
2428 if (status & MWL8K_A2H_INT_RX_READY) {
2429 while (rxq_process(hw, 0, 1))
2430 rxq_refill(hw, 0, 1);
2433 if (status & MWL8K_A2H_INT_OPC_DONE) {
2434 if (priv->hostcmd_wait != NULL)
2435 complete(priv->hostcmd_wait);
2438 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2439 if (!mutex_is_locked(&priv->fw_mutex) &&
2440 priv->radio_on && priv->pending_tx_pkts)
2441 mwl8k_tx_start(priv);
2449 * Core driver operations.
2451 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2453 struct mwl8k_priv *priv = hw->priv;
2454 int index = skb_get_queue_mapping(skb);
2457 if (priv->current_channel == NULL) {
2458 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2459 "disabled\n", wiphy_name(hw->wiphy));
2461 return NETDEV_TX_OK;
2464 rc = mwl8k_txq_xmit(hw, index, skb);
2469 static int mwl8k_start(struct ieee80211_hw *hw)
2471 struct mwl8k_priv *priv = hw->priv;
2474 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2475 IRQF_SHARED, MWL8K_NAME, hw);
2477 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2478 wiphy_name(hw->wiphy));
2482 /* Enable tx reclaim tasklet */
2483 tasklet_enable(&priv->tx_reclaim_task);
2485 /* Enable interrupts */
2486 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2488 rc = mwl8k_fw_lock(hw);
2490 rc = mwl8k_cmd_802_11_radio_enable(hw);
2493 rc = mwl8k_cmd_set_pre_scan(hw);
2496 rc = mwl8k_cmd_set_post_scan(hw,
2497 "\x00\x00\x00\x00\x00\x00");
2500 rc = mwl8k_cmd_setrateadaptmode(hw, 0);
2503 rc = mwl8k_set_wmm(hw, 0);
2506 rc = mwl8k_enable_sniffer(hw, 0);
2508 mwl8k_fw_unlock(hw);
2512 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2513 free_irq(priv->pdev->irq, hw);
2514 tasklet_disable(&priv->tx_reclaim_task);
2520 static void mwl8k_stop(struct ieee80211_hw *hw)
2522 struct mwl8k_priv *priv = hw->priv;
2525 mwl8k_cmd_802_11_radio_disable(hw);
2527 ieee80211_stop_queues(hw);
2529 /* Disable interrupts */
2530 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2531 free_irq(priv->pdev->irq, hw);
2533 /* Stop finalize join worker */
2534 cancel_work_sync(&priv->finalize_join_worker);
2535 if (priv->beacon_skb != NULL)
2536 dev_kfree_skb(priv->beacon_skb);
2538 /* Stop tx reclaim tasklet */
2539 tasklet_disable(&priv->tx_reclaim_task);
2541 /* Return all skbs to mac80211 */
2542 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2543 mwl8k_txq_reclaim(hw, i, 1);
2546 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2547 struct ieee80211_if_init_conf *conf)
2549 struct mwl8k_priv *priv = hw->priv;
2550 struct mwl8k_vif *mwl8k_vif;
2553 * We only support one active interface at a time.
2555 if (priv->vif != NULL)
2559 * We only support managed interfaces for now.
2561 if (conf->type != NL80211_IFTYPE_STATION)
2565 * Reject interface creation if sniffer mode is active, as
2566 * STA operation is mutually exclusive with hardware sniffer
2569 if (priv->sniffer_enabled) {
2570 printk(KERN_INFO "%s: unable to create STA "
2571 "interface due to sniffer mode being enabled\n",
2572 wiphy_name(hw->wiphy));
2576 /* Clean out driver private area */
2577 mwl8k_vif = MWL8K_VIF(conf->vif);
2578 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2580 /* Set and save the mac address */
2581 mwl8k_set_mac_addr(hw, conf->mac_addr);
2582 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
2584 /* Back pointer to parent config block */
2585 mwl8k_vif->priv = priv;
2587 /* Setup initial PHY parameters */
2588 memcpy(mwl8k_vif->legacy_rates,
2589 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2590 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2592 /* Set Initial sequence number to zero */
2593 mwl8k_vif->seqno = 0;
2595 priv->vif = conf->vif;
2596 priv->current_channel = NULL;
2601 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2602 struct ieee80211_if_init_conf *conf)
2604 struct mwl8k_priv *priv = hw->priv;
2606 if (priv->vif == NULL)
2609 mwl8k_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
2614 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2616 struct ieee80211_conf *conf = &hw->conf;
2617 struct mwl8k_priv *priv = hw->priv;
2620 if (conf->flags & IEEE80211_CONF_IDLE) {
2621 mwl8k_cmd_802_11_radio_disable(hw);
2622 priv->current_channel = NULL;
2626 rc = mwl8k_fw_lock(hw);
2630 rc = mwl8k_cmd_802_11_radio_enable(hw);
2634 rc = mwl8k_cmd_set_rf_channel(hw, conf->channel);
2638 priv->current_channel = conf->channel;
2640 if (conf->power_level > 18)
2641 conf->power_level = 18;
2642 rc = mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level);
2646 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
2650 mwl8k_fw_unlock(hw);
2655 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
2656 struct ieee80211_vif *vif,
2657 struct ieee80211_bss_conf *info,
2660 struct mwl8k_priv *priv = hw->priv;
2661 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2664 if (changed & BSS_CHANGED_BSSID)
2665 memcpy(mwl8k_vif->bssid, info->bssid, ETH_ALEN);
2667 if ((changed & BSS_CHANGED_ASSOC) == 0)
2670 priv->capture_beacon = false;
2672 rc = mwl8k_fw_lock(hw);
2677 memcpy(&mwl8k_vif->bss_info, info,
2678 sizeof(struct ieee80211_bss_conf));
2681 rc = mwl8k_update_rateset(hw, vif);
2685 /* Turn on rate adaptation */
2686 rc = mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
2687 MWL8K_UCAST_RATE, NULL);
2691 /* Set radio preamble */
2692 rc = mwl8k_set_radio_preamble(hw, info->use_short_preamble);
2697 rc = mwl8k_cmd_set_slot(hw, info->use_short_slot);
2701 /* Update peer rate info */
2702 rc = mwl8k_cmd_update_sta_db(hw, vif,
2703 MWL8K_STA_DB_MODIFY_ENTRY);
2708 rc = mwl8k_cmd_set_aid(hw, vif);
2713 * Finalize the join. Tell rx handler to process
2714 * next beacon from our BSSID.
2716 memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
2717 priv->capture_beacon = true;
2719 rc = mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
2720 memset(&mwl8k_vif->bss_info, 0,
2721 sizeof(struct ieee80211_bss_conf));
2722 memset(mwl8k_vif->bssid, 0, ETH_ALEN);
2726 mwl8k_fw_unlock(hw);
2729 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
2730 int mc_count, struct dev_addr_list *mclist)
2732 struct mwl8k_cmd_pkt *cmd;
2735 * Synthesize and return a command packet that programs the
2736 * hardware multicast address filter. At this point we don't
2737 * know whether FIF_ALLMULTI is being requested, but if it is,
2738 * we'll end up throwing this packet away and creating a new
2739 * one in mwl8k_configure_filter().
2741 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
2743 return (unsigned long)cmd;
2747 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
2748 unsigned int changed_flags,
2749 unsigned int *total_flags)
2751 struct mwl8k_priv *priv = hw->priv;
2754 * Hardware sniffer mode is mutually exclusive with STA
2755 * operation, so refuse to enable sniffer mode if a STA
2756 * interface is active.
2758 if (priv->vif != NULL) {
2759 if (net_ratelimit())
2760 printk(KERN_INFO "%s: not enabling sniffer "
2761 "mode because STA interface is active\n",
2762 wiphy_name(hw->wiphy));
2766 if (!priv->sniffer_enabled) {
2767 if (mwl8k_enable_sniffer(hw, 1))
2769 priv->sniffer_enabled = true;
2772 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
2773 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
2779 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
2780 unsigned int changed_flags,
2781 unsigned int *total_flags,
2784 struct mwl8k_priv *priv = hw->priv;
2785 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
2788 * Enable hardware sniffer mode if FIF_CONTROL or
2789 * FIF_OTHER_BSS is requested.
2791 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
2792 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
2797 /* Clear unsupported feature flags */
2798 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
2800 if (mwl8k_fw_lock(hw))
2803 if (priv->sniffer_enabled) {
2804 mwl8k_enable_sniffer(hw, 0);
2805 priv->sniffer_enabled = false;
2808 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
2809 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
2811 * Disable the BSS filter.
2813 mwl8k_cmd_set_pre_scan(hw);
2818 * Enable the BSS filter.
2820 * If there is an active STA interface, use that
2821 * interface's BSSID, otherwise use a dummy one
2822 * (where the OUI part needs to be nonzero for
2823 * the BSSID to be accepted by POST_SCAN).
2825 bssid = "\x01\x00\x00\x00\x00\x00";
2826 if (priv->vif != NULL)
2827 bssid = MWL8K_VIF(priv->vif)->bssid;
2829 mwl8k_cmd_set_post_scan(hw, bssid);
2834 * If FIF_ALLMULTI is being requested, throw away the command
2835 * packet that ->prepare_multicast() built and replace it with
2836 * a command packet that enables reception of all multicast
2839 if (*total_flags & FIF_ALLMULTI) {
2841 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
2845 mwl8k_post_cmd(hw, cmd);
2849 mwl8k_fw_unlock(hw);
2852 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
2854 return mwl8k_rts_threshold(hw, MWL8K_CMD_SET, value);
2857 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
2858 const struct ieee80211_tx_queue_params *params)
2860 struct mwl8k_priv *priv = hw->priv;
2863 rc = mwl8k_fw_lock(hw);
2865 if (!priv->wmm_enabled)
2866 rc = mwl8k_set_wmm(hw, 1);
2869 rc = mwl8k_set_edca_params(hw, queue,
2875 mwl8k_fw_unlock(hw);
2881 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
2882 struct ieee80211_tx_queue_stats *stats)
2884 struct mwl8k_priv *priv = hw->priv;
2885 struct mwl8k_tx_queue *txq;
2888 spin_lock_bh(&priv->tx_lock);
2889 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
2890 txq = priv->txq + index;
2891 memcpy(&stats[index], &txq->tx_stats,
2892 sizeof(struct ieee80211_tx_queue_stats));
2894 spin_unlock_bh(&priv->tx_lock);
2899 static int mwl8k_get_stats(struct ieee80211_hw *hw,
2900 struct ieee80211_low_level_stats *stats)
2902 return mwl8k_cmd_802_11_get_stat(hw, stats);
2905 static const struct ieee80211_ops mwl8k_ops = {
2907 .start = mwl8k_start,
2909 .add_interface = mwl8k_add_interface,
2910 .remove_interface = mwl8k_remove_interface,
2911 .config = mwl8k_config,
2912 .bss_info_changed = mwl8k_bss_info_changed,
2913 .prepare_multicast = mwl8k_prepare_multicast,
2914 .configure_filter = mwl8k_configure_filter,
2915 .set_rts_threshold = mwl8k_set_rts_threshold,
2916 .conf_tx = mwl8k_conf_tx,
2917 .get_tx_stats = mwl8k_get_tx_stats,
2918 .get_stats = mwl8k_get_stats,
2921 static void mwl8k_tx_reclaim_handler(unsigned long data)
2924 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
2925 struct mwl8k_priv *priv = hw->priv;
2927 spin_lock_bh(&priv->tx_lock);
2928 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2929 mwl8k_txq_reclaim(hw, i, 0);
2931 if (priv->tx_wait != NULL && !priv->pending_tx_pkts) {
2932 complete(priv->tx_wait);
2933 priv->tx_wait = NULL;
2935 spin_unlock_bh(&priv->tx_lock);
2938 static void mwl8k_finalize_join_worker(struct work_struct *work)
2940 struct mwl8k_priv *priv =
2941 container_of(work, struct mwl8k_priv, finalize_join_worker);
2942 struct sk_buff *skb = priv->beacon_skb;
2943 u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
2945 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
2948 priv->beacon_skb = NULL;
2951 static int __devinit mwl8k_probe(struct pci_dev *pdev,
2952 const struct pci_device_id *id)
2954 static int printed_version = 0;
2955 struct ieee80211_hw *hw;
2956 struct mwl8k_priv *priv;
2960 if (!printed_version) {
2961 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
2962 printed_version = 1;
2965 rc = pci_enable_device(pdev);
2967 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
2972 rc = pci_request_regions(pdev, MWL8K_NAME);
2974 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
2979 pci_set_master(pdev);
2981 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
2983 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
2991 priv->sniffer_enabled = false;
2992 priv->wmm_enabled = false;
2993 priv->pending_tx_pkts = 0;
2995 SET_IEEE80211_DEV(hw, &pdev->dev);
2996 pci_set_drvdata(pdev, hw);
2998 priv->regs = pci_iomap(pdev, 1, 0x10000);
2999 if (priv->regs == NULL) {
3000 printk(KERN_ERR "%s: Cannot map device memory\n",
3001 wiphy_name(hw->wiphy));
3005 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3006 priv->band.band = IEEE80211_BAND_2GHZ;
3007 priv->band.channels = priv->channels;
3008 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3009 priv->band.bitrates = priv->rates;
3010 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3011 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3013 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3014 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3017 * Extra headroom is the size of the required DMA header
3018 * minus the size of the smallest 802.11 frame (CTS frame).
3020 hw->extra_tx_headroom =
3021 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3023 hw->channel_change_time = 10;
3025 hw->queues = MWL8K_TX_QUEUES;
3027 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3029 /* Set rssi and noise values to dBm */
3030 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3031 hw->vif_data_size = sizeof(struct mwl8k_vif);
3034 /* Set default radio state and preamble */
3036 priv->radio_short_preamble = 0;
3038 /* Finalize join worker */
3039 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3041 /* TX reclaim tasklet */
3042 tasklet_init(&priv->tx_reclaim_task,
3043 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3044 tasklet_disable(&priv->tx_reclaim_task);
3046 /* Power management cookie */
3047 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3048 if (priv->cookie == NULL)
3051 rc = mwl8k_rxq_init(hw, 0);
3054 rxq_refill(hw, 0, INT_MAX);
3056 mutex_init(&priv->fw_mutex);
3057 priv->fw_mutex_owner = NULL;
3058 priv->fw_mutex_depth = 0;
3059 priv->hostcmd_wait = NULL;
3061 spin_lock_init(&priv->tx_lock);
3063 priv->tx_wait = NULL;
3065 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3066 rc = mwl8k_txq_init(hw, i);
3068 goto err_free_queues;
3071 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3072 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3073 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3074 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3076 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3077 IRQF_SHARED, MWL8K_NAME, hw);
3079 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3080 wiphy_name(hw->wiphy));
3081 goto err_free_queues;
3084 /* Reset firmware and hardware */
3085 mwl8k_hw_reset(priv);
3087 /* Ask userland hotplug daemon for the device firmware */
3088 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3090 printk(KERN_ERR "%s: Firmware files not found\n",
3091 wiphy_name(hw->wiphy));
3095 /* Load firmware into hardware */
3096 rc = mwl8k_load_firmware(hw);
3098 printk(KERN_ERR "%s: Cannot start firmware\n",
3099 wiphy_name(hw->wiphy));
3100 goto err_stop_firmware;
3103 /* Reclaim memory once firmware is successfully loaded */
3104 mwl8k_release_firmware(priv);
3107 * Temporarily enable interrupts. Initial firmware host
3108 * commands use interrupts and avoids polling. Disable
3109 * interrupts when done.
3111 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3113 /* Get config data, mac addrs etc */
3114 rc = mwl8k_cmd_get_hw_spec(hw);
3116 printk(KERN_ERR "%s: Cannot initialise firmware\n",
3117 wiphy_name(hw->wiphy));
3118 goto err_stop_firmware;
3121 /* Turn radio off */
3122 rc = mwl8k_cmd_802_11_radio_disable(hw);
3124 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3125 goto err_stop_firmware;
3128 /* Clear MAC address */
3129 rc = mwl8k_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3131 printk(KERN_ERR "%s: Cannot clear MAC address\n",
3132 wiphy_name(hw->wiphy));
3133 goto err_stop_firmware;
3136 /* Disable interrupts */
3137 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3138 free_irq(priv->pdev->irq, hw);
3140 rc = ieee80211_register_hw(hw);
3142 printk(KERN_ERR "%s: Cannot register device\n",
3143 wiphy_name(hw->wiphy));
3144 goto err_stop_firmware;
3147 printk(KERN_INFO "%s: 88w%u v%d, %pM, firmware version %u.%u.%u.%u\n",
3148 wiphy_name(hw->wiphy), priv->part_num, priv->hw_rev,
3149 hw->wiphy->perm_addr,
3150 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
3151 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
3156 mwl8k_hw_reset(priv);
3157 mwl8k_release_firmware(priv);
3160 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3161 free_irq(priv->pdev->irq, hw);
3164 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3165 mwl8k_txq_deinit(hw, i);
3166 mwl8k_rxq_deinit(hw, 0);
3169 if (priv->cookie != NULL)
3170 pci_free_consistent(priv->pdev, 4,
3171 priv->cookie, priv->cookie_dma);
3173 if (priv->regs != NULL)
3174 pci_iounmap(pdev, priv->regs);
3176 pci_set_drvdata(pdev, NULL);
3177 ieee80211_free_hw(hw);
3180 pci_release_regions(pdev);
3181 pci_disable_device(pdev);
3186 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3188 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3191 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3193 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3194 struct mwl8k_priv *priv;
3201 ieee80211_stop_queues(hw);
3203 ieee80211_unregister_hw(hw);
3205 /* Remove tx reclaim tasklet */
3206 tasklet_kill(&priv->tx_reclaim_task);
3209 mwl8k_hw_reset(priv);
3211 /* Return all skbs to mac80211 */
3212 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3213 mwl8k_txq_reclaim(hw, i, 1);
3215 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3216 mwl8k_txq_deinit(hw, i);
3218 mwl8k_rxq_deinit(hw, 0);
3220 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
3222 pci_iounmap(pdev, priv->regs);
3223 pci_set_drvdata(pdev, NULL);
3224 ieee80211_free_hw(hw);
3225 pci_release_regions(pdev);
3226 pci_disable_device(pdev);
3229 static struct pci_driver mwl8k_driver = {
3231 .id_table = mwl8k_table,
3232 .probe = mwl8k_probe,
3233 .remove = __devexit_p(mwl8k_remove),
3234 .shutdown = __devexit_p(mwl8k_shutdown),
3237 static int __init mwl8k_init(void)
3239 return pci_register_driver(&mwl8k_driver);
3242 static void __exit mwl8k_exit(void)
3244 pci_unregister_driver(&mwl8k_driver);
3247 module_init(mwl8k_init);
3248 module_exit(mwl8k_exit);
3250 MODULE_DESCRIPTION(MWL8K_DESC);
3251 MODULE_VERSION(MWL8K_VERSION);
3252 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3253 MODULE_LICENSE("GPL");