2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.10"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
91 struct mwl8k_device_info {
95 struct rxd_ops *rxd_ops;
99 struct mwl8k_rx_queue {
102 /* hw receives here */
105 /* refill descs here */
112 DECLARE_PCI_UNMAP_ADDR(dma)
116 struct mwl8k_tx_queue {
117 /* hw transmits here */
120 /* sw appends here */
123 struct ieee80211_tx_queue_stats stats;
124 struct mwl8k_tx_desc *txd;
126 struct sk_buff **skb;
129 /* Pointers to the firmware data and meta information about it. */
130 struct mwl8k_firmware {
131 /* Boot helper code */
132 struct firmware *helper;
135 struct firmware *ucode;
141 struct ieee80211_hw *hw;
143 struct pci_dev *pdev;
145 struct mwl8k_device_info *device_info;
147 struct rxd_ops *rxd_ops;
149 /* firmware files and meta data */
150 struct mwl8k_firmware fw;
152 /* firmware access */
153 struct mutex fw_mutex;
154 struct task_struct *fw_mutex_owner;
156 struct completion *hostcmd_wait;
158 /* lock held over TX and TX reap */
161 /* TX quiesce completion, protected by fw_mutex and tx_lock */
162 struct completion *tx_wait;
164 struct ieee80211_vif *vif;
166 struct ieee80211_channel *current_channel;
168 /* power management status cookie from firmware */
170 dma_addr_t cookie_dma;
177 * Running count of TX packets in flight, to avoid
178 * iterating over the transmit rings each time.
182 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
183 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
186 struct ieee80211_supported_band band;
187 struct ieee80211_channel channels[14];
188 struct ieee80211_rate rates[14];
191 bool radio_short_preamble;
192 bool sniffer_enabled;
195 /* XXX need to convert this to handle multiple interfaces */
197 u8 capture_bssid[ETH_ALEN];
198 struct sk_buff *beacon_skb;
201 * This FJ worker has to be global as it is scheduled from the
202 * RX handler. At this point we don't know which interface it
203 * belongs to until the list of bssids waiting to complete join
206 struct work_struct finalize_join_worker;
208 /* Tasklet to reclaim TX descriptors and buffers after tx */
209 struct tasklet_struct tx_reclaim_task;
212 /* Per interface specific private data */
214 /* backpointer to parent config block */
215 struct mwl8k_priv *priv;
217 /* BSS config of AP or IBSS from mac80211*/
218 struct ieee80211_bss_conf bss_info;
220 /* BSSID of AP or IBSS */
222 u8 mac_addr[ETH_ALEN];
224 /* Index into station database. Returned by UPDATE_STADB. */
227 /* Non AMPDU sequence number assigned by driver */
231 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
233 static const struct ieee80211_channel mwl8k_channels[] = {
234 { .center_freq = 2412, .hw_value = 1, },
235 { .center_freq = 2417, .hw_value = 2, },
236 { .center_freq = 2422, .hw_value = 3, },
237 { .center_freq = 2427, .hw_value = 4, },
238 { .center_freq = 2432, .hw_value = 5, },
239 { .center_freq = 2437, .hw_value = 6, },
240 { .center_freq = 2442, .hw_value = 7, },
241 { .center_freq = 2447, .hw_value = 8, },
242 { .center_freq = 2452, .hw_value = 9, },
243 { .center_freq = 2457, .hw_value = 10, },
244 { .center_freq = 2462, .hw_value = 11, },
245 { .center_freq = 2467, .hw_value = 12, },
246 { .center_freq = 2472, .hw_value = 13, },
247 { .center_freq = 2484, .hw_value = 14, },
250 static const struct ieee80211_rate mwl8k_rates[] = {
251 { .bitrate = 10, .hw_value = 2, },
252 { .bitrate = 20, .hw_value = 4, },
253 { .bitrate = 55, .hw_value = 11, },
254 { .bitrate = 110, .hw_value = 22, },
255 { .bitrate = 220, .hw_value = 44, },
256 { .bitrate = 60, .hw_value = 12, },
257 { .bitrate = 90, .hw_value = 18, },
258 { .bitrate = 120, .hw_value = 24, },
259 { .bitrate = 180, .hw_value = 36, },
260 { .bitrate = 240, .hw_value = 48, },
261 { .bitrate = 360, .hw_value = 72, },
262 { .bitrate = 480, .hw_value = 96, },
263 { .bitrate = 540, .hw_value = 108, },
264 { .bitrate = 720, .hw_value = 144, },
267 static const u8 mwl8k_rateids[12] = {
268 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108,
271 /* Set or get info from Firmware */
272 #define MWL8K_CMD_SET 0x0001
273 #define MWL8K_CMD_GET 0x0000
275 /* Firmware command codes */
276 #define MWL8K_CMD_CODE_DNLD 0x0001
277 #define MWL8K_CMD_GET_HW_SPEC 0x0003
278 #define MWL8K_CMD_SET_HW_SPEC 0x0004
279 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
280 #define MWL8K_CMD_GET_STAT 0x0014
281 #define MWL8K_CMD_RADIO_CONTROL 0x001c
282 #define MWL8K_CMD_RF_TX_POWER 0x001e
283 #define MWL8K_CMD_RF_ANTENNA 0x0020
284 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
285 #define MWL8K_CMD_SET_POST_SCAN 0x0108
286 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
287 #define MWL8K_CMD_SET_AID 0x010d
288 #define MWL8K_CMD_SET_RATE 0x0110
289 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
290 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
291 #define MWL8K_CMD_SET_SLOT 0x0114
292 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
293 #define MWL8K_CMD_SET_WMM_MODE 0x0123
294 #define MWL8K_CMD_MIMO_CONFIG 0x0125
295 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
296 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
297 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
298 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
299 #define MWL8K_CMD_UPDATE_STADB 0x1123
301 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
303 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
304 snprintf(buf, bufsize, "%s", #x);\
307 switch (cmd & ~0x8000) {
308 MWL8K_CMDNAME(CODE_DNLD);
309 MWL8K_CMDNAME(GET_HW_SPEC);
310 MWL8K_CMDNAME(SET_HW_SPEC);
311 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
312 MWL8K_CMDNAME(GET_STAT);
313 MWL8K_CMDNAME(RADIO_CONTROL);
314 MWL8K_CMDNAME(RF_TX_POWER);
315 MWL8K_CMDNAME(RF_ANTENNA);
316 MWL8K_CMDNAME(SET_PRE_SCAN);
317 MWL8K_CMDNAME(SET_POST_SCAN);
318 MWL8K_CMDNAME(SET_RF_CHANNEL);
319 MWL8K_CMDNAME(SET_AID);
320 MWL8K_CMDNAME(SET_RATE);
321 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
322 MWL8K_CMDNAME(RTS_THRESHOLD);
323 MWL8K_CMDNAME(SET_SLOT);
324 MWL8K_CMDNAME(SET_EDCA_PARAMS);
325 MWL8K_CMDNAME(SET_WMM_MODE);
326 MWL8K_CMDNAME(MIMO_CONFIG);
327 MWL8K_CMDNAME(USE_FIXED_RATE);
328 MWL8K_CMDNAME(ENABLE_SNIFFER);
329 MWL8K_CMDNAME(SET_MAC_ADDR);
330 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
331 MWL8K_CMDNAME(UPDATE_STADB);
333 snprintf(buf, bufsize, "0x%x", cmd);
340 /* Hardware and firmware reset */
341 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
343 iowrite32(MWL8K_H2A_INT_RESET,
344 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
345 iowrite32(MWL8K_H2A_INT_RESET,
346 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
350 /* Release fw image */
351 static void mwl8k_release_fw(struct firmware **fw)
355 release_firmware(*fw);
359 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
361 mwl8k_release_fw(&priv->fw.ucode);
362 mwl8k_release_fw(&priv->fw.helper);
365 /* Request fw image */
366 static int mwl8k_request_fw(struct mwl8k_priv *priv,
367 const char *fname, struct firmware **fw)
369 /* release current image */
371 mwl8k_release_fw(fw);
373 return request_firmware((const struct firmware **)fw,
374 fname, &priv->pdev->dev);
377 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
379 struct mwl8k_device_info *di = priv->device_info;
382 if (di->helper_image != NULL) {
383 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw.helper);
385 printk(KERN_ERR "%s: Error requesting helper "
386 "firmware file %s\n", pci_name(priv->pdev),
392 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw.ucode);
394 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
395 pci_name(priv->pdev), di->fw_image);
396 mwl8k_release_fw(&priv->fw.helper);
403 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
404 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
406 struct mwl8k_cmd_pkt {
412 } __attribute__((packed));
418 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
420 void __iomem *regs = priv->regs;
424 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
425 if (pci_dma_mapping_error(priv->pdev, dma_addr))
428 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
429 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
430 iowrite32(MWL8K_H2A_INT_DOORBELL,
431 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
432 iowrite32(MWL8K_H2A_INT_DUMMY,
433 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
439 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
440 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
441 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
449 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
451 return loops ? 0 : -ETIMEDOUT;
454 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
455 const u8 *data, size_t length)
457 struct mwl8k_cmd_pkt *cmd;
461 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
465 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
471 int block_size = length > 256 ? 256 : length;
473 memcpy(cmd->payload, data + done, block_size);
474 cmd->length = cpu_to_le16(block_size);
476 rc = mwl8k_send_fw_load_cmd(priv, cmd,
477 sizeof(*cmd) + block_size);
482 length -= block_size;
487 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
495 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
496 const u8 *data, size_t length)
498 unsigned char *buffer;
499 int may_continue, rc = 0;
500 u32 done, prev_block_size;
502 buffer = kmalloc(1024, GFP_KERNEL);
509 while (may_continue > 0) {
512 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
513 if (block_size & 1) {
517 done += prev_block_size;
518 length -= prev_block_size;
521 if (block_size > 1024 || block_size > length) {
531 if (block_size == 0) {
538 prev_block_size = block_size;
539 memcpy(buffer, data + done, block_size);
541 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
546 if (!rc && length != 0)
554 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
556 struct mwl8k_priv *priv = hw->priv;
557 struct firmware *fw = priv->fw.ucode;
558 struct mwl8k_device_info *di = priv->device_info;
562 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
563 struct firmware *helper = priv->fw.helper;
565 if (helper == NULL) {
566 printk(KERN_ERR "%s: helper image needed but none "
567 "given\n", pci_name(priv->pdev));
571 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
573 printk(KERN_ERR "%s: unable to load firmware "
574 "helper image\n", pci_name(priv->pdev));
579 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
581 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
585 printk(KERN_ERR "%s: unable to load firmware image\n",
586 pci_name(priv->pdev));
590 if (di->modes & BIT(NL80211_IFTYPE_AP))
591 iowrite32(MWL8K_MODE_AP, priv->regs + MWL8K_HIU_GEN_PTR);
593 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
599 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
600 if (ready_code == MWL8K_FWAP_READY) {
603 } else if (ready_code == MWL8K_FWSTA_READY) {
612 return loops ? 0 : -ETIMEDOUT;
617 * Defines shared between transmission and reception.
619 /* HT control fields for firmware */
624 } __attribute__((packed));
626 /* Firmware Station database operations */
627 #define MWL8K_STA_DB_ADD_ENTRY 0
628 #define MWL8K_STA_DB_MODIFY_ENTRY 1
629 #define MWL8K_STA_DB_DEL_ENTRY 2
630 #define MWL8K_STA_DB_FLUSH 3
632 /* Peer Entry flags - used to define the type of the peer node */
633 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
635 struct peer_capability_info {
636 /* Peer type - AP vs. STA. */
639 /* Basic 802.11 capabilities from assoc resp. */
642 /* Set if peer supports 802.11n high throughput (HT). */
645 /* Valid if HT is supported. */
647 __u8 extended_ht_caps;
648 struct ewc_ht_info ewc_info;
650 /* Legacy rate table. Intersection of our rates and peer rates. */
651 __u8 legacy_rates[12];
653 /* HT rate table. Intersection of our rates and peer rates. */
657 /* If set, interoperability mode, no proprietary extensions. */
661 __le16 amsdu_enabled;
662 } __attribute__((packed));
664 /* DMA header used by firmware and hardware. */
665 struct mwl8k_dma_data {
667 struct ieee80211_hdr wh;
669 } __attribute__((packed));
671 /* Routines to add/remove DMA header from skb. */
672 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
674 struct mwl8k_dma_data *tr;
677 tr = (struct mwl8k_dma_data *)skb->data;
678 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
680 if (hdrlen != sizeof(tr->wh)) {
681 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
682 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
683 *((__le16 *)(tr->data - 2)) = qos;
685 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
689 if (hdrlen != sizeof(*tr))
690 skb_pull(skb, sizeof(*tr) - hdrlen);
693 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
695 struct ieee80211_hdr *wh;
697 struct mwl8k_dma_data *tr;
700 * Add a firmware DMA header; the firmware requires that we
701 * present a 2-byte payload length followed by a 4-address
702 * header (without QoS field), followed (optionally) by any
703 * WEP/ExtIV header (but only filled in for CCMP).
705 wh = (struct ieee80211_hdr *)skb->data;
707 hdrlen = ieee80211_hdrlen(wh->frame_control);
708 if (hdrlen != sizeof(*tr))
709 skb_push(skb, sizeof(*tr) - hdrlen);
711 if (ieee80211_is_data_qos(wh->frame_control))
714 tr = (struct mwl8k_dma_data *)skb->data;
716 memmove(&tr->wh, wh, hdrlen);
717 if (hdrlen != sizeof(tr->wh))
718 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
721 * Firmware length is the length of the fully formed "802.11
722 * payload". That is, everything except for the 802.11 header.
723 * This includes all crypto material including the MIC.
725 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
730 * Packet reception for 88w8366.
732 struct mwl8k_rxd_8366 {
736 __le32 pkt_phys_addr;
737 __le32 next_rxd_phys_addr;
741 __le32 hw_noise_floor_info;
748 } __attribute__((packed));
750 #define MWL8K_8366_RATE_INFO_MCS_FORMAT 0x80
751 #define MWL8K_8366_RATE_INFO_40MHZ 0x40
752 #define MWL8K_8366_RATE_INFO_RATEID(x) ((x) & 0x3f)
754 #define MWL8K_8366_RX_CTRL_OWNED_BY_HOST 0x80
756 static void mwl8k_rxd_8366_init(void *_rxd, dma_addr_t next_dma_addr)
758 struct mwl8k_rxd_8366 *rxd = _rxd;
760 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
761 rxd->rx_ctrl = MWL8K_8366_RX_CTRL_OWNED_BY_HOST;
764 static void mwl8k_rxd_8366_refill(void *_rxd, dma_addr_t addr, int len)
766 struct mwl8k_rxd_8366 *rxd = _rxd;
768 rxd->pkt_len = cpu_to_le16(len);
769 rxd->pkt_phys_addr = cpu_to_le32(addr);
775 mwl8k_rxd_8366_process(void *_rxd, struct ieee80211_rx_status *status,
778 struct mwl8k_rxd_8366 *rxd = _rxd;
780 if (!(rxd->rx_ctrl & MWL8K_8366_RX_CTRL_OWNED_BY_HOST))
784 memset(status, 0, sizeof(*status));
786 status->signal = -rxd->rssi;
787 status->noise = -rxd->noise_floor;
789 if (rxd->rate & MWL8K_8366_RATE_INFO_MCS_FORMAT) {
790 status->flag |= RX_FLAG_HT;
791 if (rxd->rate & MWL8K_8366_RATE_INFO_40MHZ)
792 status->flag |= RX_FLAG_40MHZ;
793 status->rate_idx = MWL8K_8366_RATE_INFO_RATEID(rxd->rate);
797 for (i = 0; i < ARRAY_SIZE(mwl8k_rates); i++) {
798 if (mwl8k_rates[i].hw_value == rxd->rate) {
799 status->rate_idx = i;
805 status->band = IEEE80211_BAND_2GHZ;
806 status->freq = ieee80211_channel_to_frequency(rxd->channel);
808 *qos = rxd->qos_control;
810 return le16_to_cpu(rxd->pkt_len);
813 static struct rxd_ops rxd_8366_ops = {
814 .rxd_size = sizeof(struct mwl8k_rxd_8366),
815 .rxd_init = mwl8k_rxd_8366_init,
816 .rxd_refill = mwl8k_rxd_8366_refill,
817 .rxd_process = mwl8k_rxd_8366_process,
821 * Packet reception for 88w8687.
823 struct mwl8k_rxd_8687 {
827 __le32 pkt_phys_addr;
828 __le32 next_rxd_phys_addr;
838 } __attribute__((packed));
840 #define MWL8K_8687_RATE_INFO_SHORTPRE 0x8000
841 #define MWL8K_8687_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
842 #define MWL8K_8687_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
843 #define MWL8K_8687_RATE_INFO_40MHZ 0x0004
844 #define MWL8K_8687_RATE_INFO_SHORTGI 0x0002
845 #define MWL8K_8687_RATE_INFO_MCS_FORMAT 0x0001
847 #define MWL8K_8687_RX_CTRL_OWNED_BY_HOST 0x02
849 static void mwl8k_rxd_8687_init(void *_rxd, dma_addr_t next_dma_addr)
851 struct mwl8k_rxd_8687 *rxd = _rxd;
853 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
854 rxd->rx_ctrl = MWL8K_8687_RX_CTRL_OWNED_BY_HOST;
857 static void mwl8k_rxd_8687_refill(void *_rxd, dma_addr_t addr, int len)
859 struct mwl8k_rxd_8687 *rxd = _rxd;
861 rxd->pkt_len = cpu_to_le16(len);
862 rxd->pkt_phys_addr = cpu_to_le32(addr);
868 mwl8k_rxd_8687_process(void *_rxd, struct ieee80211_rx_status *status,
871 struct mwl8k_rxd_8687 *rxd = _rxd;
874 if (!(rxd->rx_ctrl & MWL8K_8687_RX_CTRL_OWNED_BY_HOST))
878 rate_info = le16_to_cpu(rxd->rate_info);
880 memset(status, 0, sizeof(*status));
882 status->signal = -rxd->rssi;
883 status->noise = -rxd->noise_level;
884 status->antenna = MWL8K_8687_RATE_INFO_ANTSELECT(rate_info);
885 status->rate_idx = MWL8K_8687_RATE_INFO_RATEID(rate_info);
887 if (rate_info & MWL8K_8687_RATE_INFO_SHORTPRE)
888 status->flag |= RX_FLAG_SHORTPRE;
889 if (rate_info & MWL8K_8687_RATE_INFO_40MHZ)
890 status->flag |= RX_FLAG_40MHZ;
891 if (rate_info & MWL8K_8687_RATE_INFO_SHORTGI)
892 status->flag |= RX_FLAG_SHORT_GI;
893 if (rate_info & MWL8K_8687_RATE_INFO_MCS_FORMAT)
894 status->flag |= RX_FLAG_HT;
896 status->band = IEEE80211_BAND_2GHZ;
897 status->freq = ieee80211_channel_to_frequency(rxd->channel);
899 *qos = rxd->qos_control;
901 return le16_to_cpu(rxd->pkt_len);
904 static struct rxd_ops rxd_8687_ops = {
905 .rxd_size = sizeof(struct mwl8k_rxd_8687),
906 .rxd_init = mwl8k_rxd_8687_init,
907 .rxd_refill = mwl8k_rxd_8687_refill,
908 .rxd_process = mwl8k_rxd_8687_process,
912 #define MWL8K_RX_DESCS 256
913 #define MWL8K_RX_MAXSZ 3800
915 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
917 struct mwl8k_priv *priv = hw->priv;
918 struct mwl8k_rx_queue *rxq = priv->rxq + index;
926 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
928 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
929 if (rxq->rxd == NULL) {
930 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
931 wiphy_name(hw->wiphy));
934 memset(rxq->rxd, 0, size);
936 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
937 if (rxq->buf == NULL) {
938 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
939 wiphy_name(hw->wiphy));
940 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
943 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
945 for (i = 0; i < MWL8K_RX_DESCS; i++) {
949 dma_addr_t next_dma_addr;
951 desc_size = priv->rxd_ops->rxd_size;
952 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
955 if (nexti == MWL8K_RX_DESCS)
957 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
959 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
965 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
967 struct mwl8k_priv *priv = hw->priv;
968 struct mwl8k_rx_queue *rxq = priv->rxq + index;
972 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
978 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
982 addr = pci_map_single(priv->pdev, skb->data,
983 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
987 if (rxq->tail == MWL8K_RX_DESCS)
989 rxq->buf[rx].skb = skb;
990 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
992 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
993 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
1001 /* Must be called only when the card's reception is completely halted */
1002 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1004 struct mwl8k_priv *priv = hw->priv;
1005 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1008 for (i = 0; i < MWL8K_RX_DESCS; i++) {
1009 if (rxq->buf[i].skb != NULL) {
1010 pci_unmap_single(priv->pdev,
1011 pci_unmap_addr(&rxq->buf[i], dma),
1012 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1013 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
1015 kfree_skb(rxq->buf[i].skb);
1016 rxq->buf[i].skb = NULL;
1023 pci_free_consistent(priv->pdev,
1024 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
1025 rxq->rxd, rxq->rxd_dma);
1031 * Scan a list of BSSIDs to process for finalize join.
1032 * Allows for extension to process multiple BSSIDs.
1035 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1037 return priv->capture_beacon &&
1038 ieee80211_is_beacon(wh->frame_control) &&
1039 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1042 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1043 struct sk_buff *skb)
1045 struct mwl8k_priv *priv = hw->priv;
1047 priv->capture_beacon = false;
1048 memset(priv->capture_bssid, 0, ETH_ALEN);
1051 * Use GFP_ATOMIC as rxq_process is called from
1052 * the primary interrupt handler, memory allocation call
1055 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1056 if (priv->beacon_skb != NULL)
1057 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1060 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1062 struct mwl8k_priv *priv = hw->priv;
1063 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1067 while (rxq->rxd_count && limit--) {
1068 struct sk_buff *skb;
1071 struct ieee80211_rx_status status;
1074 skb = rxq->buf[rxq->head].skb;
1078 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1080 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1084 rxq->buf[rxq->head].skb = NULL;
1086 pci_unmap_single(priv->pdev,
1087 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1088 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1089 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1092 if (rxq->head == MWL8K_RX_DESCS)
1097 skb_put(skb, pkt_len);
1098 mwl8k_remove_dma_header(skb, qos);
1101 * Check for a pending join operation. Save a
1102 * copy of the beacon and schedule a tasklet to
1103 * send a FINALIZE_JOIN command to the firmware.
1105 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1106 mwl8k_save_beacon(hw, skb);
1108 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1109 ieee80211_rx_irqsafe(hw, skb);
1119 * Packet transmission.
1122 #define MWL8K_TXD_STATUS_OK 0x00000001
1123 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1124 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1125 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1126 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1128 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1129 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1130 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1131 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1132 #define MWL8K_QOS_EOSP 0x0010
1134 struct mwl8k_tx_desc {
1139 __le32 pkt_phys_addr;
1141 __u8 dest_MAC_addr[ETH_ALEN];
1142 __le32 next_txd_phys_addr;
1147 } __attribute__((packed));
1149 #define MWL8K_TX_DESCS 128
1151 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1153 struct mwl8k_priv *priv = hw->priv;
1154 struct mwl8k_tx_queue *txq = priv->txq + index;
1158 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1159 txq->stats.limit = MWL8K_TX_DESCS;
1163 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1165 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1166 if (txq->txd == NULL) {
1167 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1168 wiphy_name(hw->wiphy));
1171 memset(txq->txd, 0, size);
1173 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1174 if (txq->skb == NULL) {
1175 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1176 wiphy_name(hw->wiphy));
1177 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1180 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1182 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1183 struct mwl8k_tx_desc *tx_desc;
1186 tx_desc = txq->txd + i;
1187 nexti = (i + 1) % MWL8K_TX_DESCS;
1189 tx_desc->status = 0;
1190 tx_desc->next_txd_phys_addr =
1191 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1197 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1199 iowrite32(MWL8K_H2A_INT_PPA_READY,
1200 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1201 iowrite32(MWL8K_H2A_INT_DUMMY,
1202 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1203 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1206 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1208 struct mwl8k_priv *priv = hw->priv;
1211 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1212 struct mwl8k_tx_queue *txq = priv->txq + i;
1218 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1219 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1222 status = le32_to_cpu(tx_desc->status);
1223 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1228 if (tx_desc->pkt_len == 0)
1232 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1233 "fw_owned=%d drv_owned=%d unused=%d\n",
1234 wiphy_name(hw->wiphy), i,
1235 txq->stats.len, txq->head, txq->tail,
1236 fw_owned, drv_owned, unused);
1241 * Must be called with priv->fw_mutex held and tx queues stopped.
1243 #define MWL8K_TX_WAIT_TIMEOUT_MS 1000
1245 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1247 struct mwl8k_priv *priv = hw->priv;
1248 DECLARE_COMPLETION_ONSTACK(tx_wait);
1255 * The TX queues are stopped at this point, so this test
1256 * doesn't need to take ->tx_lock.
1258 if (!priv->pending_tx_pkts)
1264 spin_lock_bh(&priv->tx_lock);
1265 priv->tx_wait = &tx_wait;
1268 unsigned long timeout;
1270 oldcount = priv->pending_tx_pkts;
1272 spin_unlock_bh(&priv->tx_lock);
1273 timeout = wait_for_completion_timeout(&tx_wait,
1274 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1275 spin_lock_bh(&priv->tx_lock);
1278 WARN_ON(priv->pending_tx_pkts);
1280 printk(KERN_NOTICE "%s: tx rings drained\n",
1281 wiphy_name(hw->wiphy));
1286 if (priv->pending_tx_pkts < oldcount) {
1287 printk(KERN_NOTICE "%s: timeout waiting for tx "
1288 "rings to drain (%d -> %d pkts), retrying\n",
1289 wiphy_name(hw->wiphy), oldcount,
1290 priv->pending_tx_pkts);
1295 priv->tx_wait = NULL;
1297 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1298 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1299 mwl8k_dump_tx_rings(hw);
1303 spin_unlock_bh(&priv->tx_lock);
1308 #define MWL8K_TXD_SUCCESS(status) \
1309 ((status) & (MWL8K_TXD_STATUS_OK | \
1310 MWL8K_TXD_STATUS_OK_RETRY | \
1311 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1313 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1315 struct mwl8k_priv *priv = hw->priv;
1316 struct mwl8k_tx_queue *txq = priv->txq + index;
1319 while (txq->stats.len > 0) {
1321 struct mwl8k_tx_desc *tx_desc;
1324 struct sk_buff *skb;
1325 struct ieee80211_tx_info *info;
1329 tx_desc = txq->txd + tx;
1331 status = le32_to_cpu(tx_desc->status);
1333 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1337 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1340 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1341 BUG_ON(txq->stats.len == 0);
1343 priv->pending_tx_pkts--;
1345 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1346 size = le16_to_cpu(tx_desc->pkt_len);
1348 txq->skb[tx] = NULL;
1350 BUG_ON(skb == NULL);
1351 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1353 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1355 /* Mark descriptor as unused */
1356 tx_desc->pkt_phys_addr = 0;
1357 tx_desc->pkt_len = 0;
1359 info = IEEE80211_SKB_CB(skb);
1360 ieee80211_tx_info_clear_status(info);
1361 if (MWL8K_TXD_SUCCESS(status))
1362 info->flags |= IEEE80211_TX_STAT_ACK;
1364 ieee80211_tx_status_irqsafe(hw, skb);
1369 if (wake && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1370 ieee80211_wake_queue(hw, index);
1373 /* must be called only when the card's transmit is completely halted */
1374 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1376 struct mwl8k_priv *priv = hw->priv;
1377 struct mwl8k_tx_queue *txq = priv->txq + index;
1379 mwl8k_txq_reclaim(hw, index, 1);
1384 pci_free_consistent(priv->pdev,
1385 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1386 txq->txd, txq->txd_dma);
1391 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1393 struct mwl8k_priv *priv = hw->priv;
1394 struct ieee80211_tx_info *tx_info;
1395 struct mwl8k_vif *mwl8k_vif;
1396 struct ieee80211_hdr *wh;
1397 struct mwl8k_tx_queue *txq;
1398 struct mwl8k_tx_desc *tx;
1404 wh = (struct ieee80211_hdr *)skb->data;
1405 if (ieee80211_is_data_qos(wh->frame_control))
1406 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1410 mwl8k_add_dma_header(skb);
1411 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1413 tx_info = IEEE80211_SKB_CB(skb);
1414 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1416 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1417 u16 seqno = mwl8k_vif->seqno;
1419 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1420 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1421 mwl8k_vif->seqno = seqno++ % 4096;
1424 /* Setup firmware control bit fields for each frame type. */
1427 if (ieee80211_is_mgmt(wh->frame_control) ||
1428 ieee80211_is_ctl(wh->frame_control)) {
1430 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1431 } else if (ieee80211_is_data(wh->frame_control)) {
1433 if (is_multicast_ether_addr(wh->addr1))
1434 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1436 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1437 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1438 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1440 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1443 dma = pci_map_single(priv->pdev, skb->data,
1444 skb->len, PCI_DMA_TODEVICE);
1446 if (pci_dma_mapping_error(priv->pdev, dma)) {
1447 printk(KERN_DEBUG "%s: failed to dma map skb, "
1448 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1450 return NETDEV_TX_OK;
1453 spin_lock_bh(&priv->tx_lock);
1455 txq = priv->txq + index;
1457 BUG_ON(txq->skb[txq->tail] != NULL);
1458 txq->skb[txq->tail] = skb;
1460 tx = txq->txd + txq->tail;
1461 tx->data_rate = txdatarate;
1462 tx->tx_priority = index;
1463 tx->qos_control = cpu_to_le16(qos);
1464 tx->pkt_phys_addr = cpu_to_le32(dma);
1465 tx->pkt_len = cpu_to_le16(skb->len);
1467 tx->peer_id = mwl8k_vif->peer_id;
1469 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1473 priv->pending_tx_pkts++;
1476 if (txq->tail == MWL8K_TX_DESCS)
1479 if (txq->head == txq->tail)
1480 ieee80211_stop_queue(hw, index);
1482 mwl8k_tx_start(priv);
1484 spin_unlock_bh(&priv->tx_lock);
1486 return NETDEV_TX_OK;
1493 * We have the following requirements for issuing firmware commands:
1494 * - Some commands require that the packet transmit path is idle when
1495 * the command is issued. (For simplicity, we'll just quiesce the
1496 * transmit path for every command.)
1497 * - There are certain sequences of commands that need to be issued to
1498 * the hardware sequentially, with no other intervening commands.
1500 * This leads to an implementation of a "firmware lock" as a mutex that
1501 * can be taken recursively, and which is taken by both the low-level
1502 * command submission function (mwl8k_post_cmd) as well as any users of
1503 * that function that require issuing of an atomic sequence of commands,
1504 * and quiesces the transmit path whenever it's taken.
1506 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1508 struct mwl8k_priv *priv = hw->priv;
1510 if (priv->fw_mutex_owner != current) {
1513 mutex_lock(&priv->fw_mutex);
1514 ieee80211_stop_queues(hw);
1516 rc = mwl8k_tx_wait_empty(hw);
1518 ieee80211_wake_queues(hw);
1519 mutex_unlock(&priv->fw_mutex);
1524 priv->fw_mutex_owner = current;
1527 priv->fw_mutex_depth++;
1532 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1534 struct mwl8k_priv *priv = hw->priv;
1536 if (!--priv->fw_mutex_depth) {
1537 ieee80211_wake_queues(hw);
1538 priv->fw_mutex_owner = NULL;
1539 mutex_unlock(&priv->fw_mutex);
1545 * Command processing.
1548 /* Timeout firmware commands after 10s */
1549 #define MWL8K_CMD_TIMEOUT_MS 10000
1551 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1553 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1554 struct mwl8k_priv *priv = hw->priv;
1555 void __iomem *regs = priv->regs;
1556 dma_addr_t dma_addr;
1557 unsigned int dma_size;
1559 unsigned long timeout = 0;
1562 cmd->result = 0xffff;
1563 dma_size = le16_to_cpu(cmd->length);
1564 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1565 PCI_DMA_BIDIRECTIONAL);
1566 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1569 rc = mwl8k_fw_lock(hw);
1571 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1572 PCI_DMA_BIDIRECTIONAL);
1576 priv->hostcmd_wait = &cmd_wait;
1577 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1578 iowrite32(MWL8K_H2A_INT_DOORBELL,
1579 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1580 iowrite32(MWL8K_H2A_INT_DUMMY,
1581 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1583 timeout = wait_for_completion_timeout(&cmd_wait,
1584 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1586 priv->hostcmd_wait = NULL;
1588 mwl8k_fw_unlock(hw);
1590 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1591 PCI_DMA_BIDIRECTIONAL);
1594 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1595 wiphy_name(hw->wiphy),
1596 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1597 MWL8K_CMD_TIMEOUT_MS);
1602 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1604 rc = cmd->result ? -EINVAL : 0;
1606 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1607 wiphy_name(hw->wiphy),
1608 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1609 le16_to_cpu(cmd->result));
1611 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1612 wiphy_name(hw->wiphy),
1613 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1621 * CMD_GET_HW_SPEC (STA version).
1623 struct mwl8k_cmd_get_hw_spec_sta {
1624 struct mwl8k_cmd_pkt header;
1626 __u8 host_interface;
1628 __u8 perm_addr[ETH_ALEN];
1633 __u8 mcs_bitmap[16];
1634 __le32 rx_queue_ptr;
1635 __le32 num_tx_queues;
1636 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1638 __le32 num_tx_desc_per_queue;
1640 } __attribute__((packed));
1642 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1644 struct mwl8k_priv *priv = hw->priv;
1645 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1649 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1653 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1654 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1656 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1657 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1658 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1659 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1660 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1661 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1662 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1663 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1665 rc = mwl8k_post_cmd(hw, &cmd->header);
1668 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1669 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1670 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1671 priv->hw_rev = cmd->hw_rev;
1679 * CMD_GET_HW_SPEC (AP version).
1681 struct mwl8k_cmd_get_hw_spec_ap {
1682 struct mwl8k_cmd_pkt header;
1684 __u8 host_interface;
1687 __u8 perm_addr[ETH_ALEN];
1698 } __attribute__((packed));
1700 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1702 struct mwl8k_priv *priv = hw->priv;
1703 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1706 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1710 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1711 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1713 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1714 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1716 rc = mwl8k_post_cmd(hw, &cmd->header);
1721 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1722 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1723 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1724 priv->hw_rev = cmd->hw_rev;
1726 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1727 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1729 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1730 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1732 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1733 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1735 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1736 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1738 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1739 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1741 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1742 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1752 struct mwl8k_cmd_set_hw_spec {
1753 struct mwl8k_cmd_pkt header;
1755 __u8 host_interface;
1757 __u8 perm_addr[ETH_ALEN];
1762 __le32 rx_queue_ptr;
1763 __le32 num_tx_queues;
1764 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1766 __le32 num_tx_desc_per_queue;
1768 } __attribute__((packed));
1770 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1772 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1774 struct mwl8k_priv *priv = hw->priv;
1775 struct mwl8k_cmd_set_hw_spec *cmd;
1779 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1783 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1784 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1786 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1787 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1788 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1789 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1790 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1791 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT);
1792 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1793 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1795 rc = mwl8k_post_cmd(hw, &cmd->header);
1802 * CMD_MAC_MULTICAST_ADR.
1804 struct mwl8k_cmd_mac_multicast_adr {
1805 struct mwl8k_cmd_pkt header;
1808 __u8 addr[0][ETH_ALEN];
1811 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1812 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1813 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1814 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1816 static struct mwl8k_cmd_pkt *
1817 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1818 int mc_count, struct dev_addr_list *mclist)
1820 struct mwl8k_priv *priv = hw->priv;
1821 struct mwl8k_cmd_mac_multicast_adr *cmd;
1824 if (allmulti || mc_count > priv->num_mcaddrs) {
1829 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1831 cmd = kzalloc(size, GFP_ATOMIC);
1835 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1836 cmd->header.length = cpu_to_le16(size);
1837 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1838 MWL8K_ENABLE_RX_BROADCAST);
1841 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1842 } else if (mc_count) {
1845 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1846 cmd->numaddr = cpu_to_le16(mc_count);
1847 for (i = 0; i < mc_count && mclist; i++) {
1848 if (mclist->da_addrlen != ETH_ALEN) {
1852 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1853 mclist = mclist->next;
1857 return &cmd->header;
1863 struct mwl8k_cmd_get_stat {
1864 struct mwl8k_cmd_pkt header;
1866 } __attribute__((packed));
1868 #define MWL8K_STAT_ACK_FAILURE 9
1869 #define MWL8K_STAT_RTS_FAILURE 12
1870 #define MWL8K_STAT_FCS_ERROR 24
1871 #define MWL8K_STAT_RTS_SUCCESS 11
1873 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1874 struct ieee80211_low_level_stats *stats)
1876 struct mwl8k_cmd_get_stat *cmd;
1879 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1883 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1884 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1886 rc = mwl8k_post_cmd(hw, &cmd->header);
1888 stats->dot11ACKFailureCount =
1889 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1890 stats->dot11RTSFailureCount =
1891 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1892 stats->dot11FCSErrorCount =
1893 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1894 stats->dot11RTSSuccessCount =
1895 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1903 * CMD_RADIO_CONTROL.
1905 struct mwl8k_cmd_radio_control {
1906 struct mwl8k_cmd_pkt header;
1910 } __attribute__((packed));
1913 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1915 struct mwl8k_priv *priv = hw->priv;
1916 struct mwl8k_cmd_radio_control *cmd;
1919 if (enable == priv->radio_on && !force)
1922 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1926 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1927 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1928 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1929 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1930 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1932 rc = mwl8k_post_cmd(hw, &cmd->header);
1936 priv->radio_on = enable;
1941 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
1943 return mwl8k_cmd_radio_control(hw, 0, 0);
1946 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
1948 return mwl8k_cmd_radio_control(hw, 1, 0);
1952 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1954 struct mwl8k_priv *priv = hw->priv;
1956 priv->radio_short_preamble = short_preamble;
1958 return mwl8k_cmd_radio_control(hw, 1, 1);
1964 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1966 struct mwl8k_cmd_rf_tx_power {
1967 struct mwl8k_cmd_pkt header;
1969 __le16 support_level;
1970 __le16 current_level;
1972 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1973 } __attribute__((packed));
1975 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1977 struct mwl8k_cmd_rf_tx_power *cmd;
1980 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1984 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1985 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1986 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1987 cmd->support_level = cpu_to_le16(dBm);
1989 rc = mwl8k_post_cmd(hw, &cmd->header);
1998 struct mwl8k_cmd_rf_antenna {
1999 struct mwl8k_cmd_pkt header;
2002 } __attribute__((packed));
2004 #define MWL8K_RF_ANTENNA_RX 1
2005 #define MWL8K_RF_ANTENNA_TX 2
2008 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2010 struct mwl8k_cmd_rf_antenna *cmd;
2013 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2017 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2018 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2019 cmd->antenna = cpu_to_le16(antenna);
2020 cmd->mode = cpu_to_le16(mask);
2022 rc = mwl8k_post_cmd(hw, &cmd->header);
2031 struct mwl8k_cmd_set_pre_scan {
2032 struct mwl8k_cmd_pkt header;
2033 } __attribute__((packed));
2035 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2037 struct mwl8k_cmd_set_pre_scan *cmd;
2040 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2044 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2045 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2047 rc = mwl8k_post_cmd(hw, &cmd->header);
2054 * CMD_SET_POST_SCAN.
2056 struct mwl8k_cmd_set_post_scan {
2057 struct mwl8k_cmd_pkt header;
2059 __u8 bssid[ETH_ALEN];
2060 } __attribute__((packed));
2063 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
2065 struct mwl8k_cmd_set_post_scan *cmd;
2068 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2072 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2073 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2075 memcpy(cmd->bssid, mac, ETH_ALEN);
2077 rc = mwl8k_post_cmd(hw, &cmd->header);
2084 * CMD_SET_RF_CHANNEL.
2086 struct mwl8k_cmd_set_rf_channel {
2087 struct mwl8k_cmd_pkt header;
2089 __u8 current_channel;
2090 __le32 channel_flags;
2091 } __attribute__((packed));
2093 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2094 struct ieee80211_channel *channel)
2096 struct mwl8k_cmd_set_rf_channel *cmd;
2099 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2103 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2104 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2105 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2106 cmd->current_channel = channel->hw_value;
2107 if (channel->band == IEEE80211_BAND_2GHZ)
2108 cmd->channel_flags = cpu_to_le32(0x00000081);
2110 cmd->channel_flags = cpu_to_le32(0x00000000);
2112 rc = mwl8k_post_cmd(hw, &cmd->header);
2121 #define MWL8K_FRAME_PROT_DISABLED 0x00
2122 #define MWL8K_FRAME_PROT_11G 0x07
2123 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2124 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2126 struct mwl8k_cmd_update_set_aid {
2127 struct mwl8k_cmd_pkt header;
2130 /* AP's MAC address (BSSID) */
2131 __u8 bssid[ETH_ALEN];
2132 __le16 protection_mode;
2133 __u8 supp_rates[14];
2134 } __attribute__((packed));
2137 mwl8k_cmd_set_aid(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2139 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2140 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2141 struct mwl8k_cmd_update_set_aid *cmd;
2145 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2149 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2150 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2151 cmd->aid = cpu_to_le16(info->aid);
2153 memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
2155 if (info->use_cts_prot) {
2156 prot_mode = MWL8K_FRAME_PROT_11G;
2158 switch (info->ht_operation_mode &
2159 IEEE80211_HT_OP_MODE_PROTECTION) {
2160 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2161 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2163 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2164 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2167 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2171 cmd->protection_mode = cpu_to_le16(prot_mode);
2173 memcpy(cmd->supp_rates, mwl8k_rateids, sizeof(mwl8k_rateids));
2175 rc = mwl8k_post_cmd(hw, &cmd->header);
2184 struct mwl8k_cmd_set_rate {
2185 struct mwl8k_cmd_pkt header;
2186 __u8 legacy_rates[14];
2188 /* Bitmap for supported MCS codes. */
2191 } __attribute__((packed));
2194 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2196 struct mwl8k_cmd_set_rate *cmd;
2199 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2203 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2204 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2205 memcpy(cmd->legacy_rates, mwl8k_rateids, sizeof(mwl8k_rateids));
2207 rc = mwl8k_post_cmd(hw, &cmd->header);
2214 * CMD_FINALIZE_JOIN.
2216 #define MWL8K_FJ_BEACON_MAXLEN 128
2218 struct mwl8k_cmd_finalize_join {
2219 struct mwl8k_cmd_pkt header;
2220 __le32 sleep_interval; /* Number of beacon periods to sleep */
2221 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2222 } __attribute__((packed));
2224 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2225 int framelen, int dtim)
2227 struct mwl8k_cmd_finalize_join *cmd;
2228 struct ieee80211_mgmt *payload = frame;
2232 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2236 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2237 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2238 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2240 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2241 if (payload_len < 0)
2243 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2244 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2246 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2248 rc = mwl8k_post_cmd(hw, &cmd->header);
2255 * CMD_SET_RTS_THRESHOLD.
2257 struct mwl8k_cmd_set_rts_threshold {
2258 struct mwl8k_cmd_pkt header;
2261 } __attribute__((packed));
2263 static int mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw,
2264 u16 action, u16 threshold)
2266 struct mwl8k_cmd_set_rts_threshold *cmd;
2269 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2273 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2274 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2275 cmd->action = cpu_to_le16(action);
2276 cmd->threshold = cpu_to_le16(threshold);
2278 rc = mwl8k_post_cmd(hw, &cmd->header);
2287 struct mwl8k_cmd_set_slot {
2288 struct mwl8k_cmd_pkt header;
2291 } __attribute__((packed));
2293 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2295 struct mwl8k_cmd_set_slot *cmd;
2298 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2302 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2303 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2304 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2305 cmd->short_slot = short_slot_time;
2307 rc = mwl8k_post_cmd(hw, &cmd->header);
2314 * CMD_SET_EDCA_PARAMS.
2316 struct mwl8k_cmd_set_edca_params {
2317 struct mwl8k_cmd_pkt header;
2319 /* See MWL8K_SET_EDCA_XXX below */
2322 /* TX opportunity in units of 32 us */
2327 /* Log exponent of max contention period: 0...15 */
2330 /* Log exponent of min contention period: 0...15 */
2333 /* Adaptive interframe spacing in units of 32us */
2336 /* TX queue to configure */
2340 /* Log exponent of max contention period: 0...15 */
2343 /* Log exponent of min contention period: 0...15 */
2346 /* Adaptive interframe spacing in units of 32us */
2349 /* TX queue to configure */
2353 } __attribute__((packed));
2355 #define MWL8K_SET_EDCA_CW 0x01
2356 #define MWL8K_SET_EDCA_TXOP 0x02
2357 #define MWL8K_SET_EDCA_AIFS 0x04
2359 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2360 MWL8K_SET_EDCA_TXOP | \
2361 MWL8K_SET_EDCA_AIFS)
2364 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2365 __u16 cw_min, __u16 cw_max,
2366 __u8 aifs, __u16 txop)
2368 struct mwl8k_priv *priv = hw->priv;
2369 struct mwl8k_cmd_set_edca_params *cmd;
2372 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2377 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2380 qnum ^= !(qnum >> 1);
2382 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2383 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2384 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2385 cmd->txop = cpu_to_le16(txop);
2387 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2388 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2389 cmd->ap.aifs = aifs;
2392 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2393 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2394 cmd->sta.aifs = aifs;
2395 cmd->sta.txq = qnum;
2398 rc = mwl8k_post_cmd(hw, &cmd->header);
2407 struct mwl8k_cmd_set_wmm_mode {
2408 struct mwl8k_cmd_pkt header;
2410 } __attribute__((packed));
2412 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2414 struct mwl8k_priv *priv = hw->priv;
2415 struct mwl8k_cmd_set_wmm_mode *cmd;
2418 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2422 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2423 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2424 cmd->action = cpu_to_le16(!!enable);
2426 rc = mwl8k_post_cmd(hw, &cmd->header);
2430 priv->wmm_enabled = enable;
2438 struct mwl8k_cmd_mimo_config {
2439 struct mwl8k_cmd_pkt header;
2441 __u8 rx_antenna_map;
2442 __u8 tx_antenna_map;
2443 } __attribute__((packed));
2445 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2447 struct mwl8k_cmd_mimo_config *cmd;
2450 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2454 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2455 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2456 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2457 cmd->rx_antenna_map = rx;
2458 cmd->tx_antenna_map = tx;
2460 rc = mwl8k_post_cmd(hw, &cmd->header);
2467 * CMD_USE_FIXED_RATE.
2469 #define MWL8K_RATE_TABLE_SIZE 8
2470 #define MWL8K_UCAST_RATE 0
2471 #define MWL8K_USE_AUTO_RATE 0x0002
2473 struct mwl8k_rate_entry {
2474 /* Set to 1 if HT rate, 0 if legacy. */
2477 /* Set to 1 to use retry_count field. */
2478 __le32 enable_retry;
2480 /* Specified legacy rate or MCS. */
2483 /* Number of allowed retries. */
2485 } __attribute__((packed));
2487 struct mwl8k_rate_table {
2488 /* 1 to allow specified rate and below */
2489 __le32 allow_rate_drop;
2491 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2492 } __attribute__((packed));
2494 struct mwl8k_cmd_use_fixed_rate {
2495 struct mwl8k_cmd_pkt header;
2497 struct mwl8k_rate_table rate_table;
2499 /* Unicast, Broadcast or Multicast */
2503 } __attribute__((packed));
2505 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2506 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2508 struct mwl8k_cmd_use_fixed_rate *cmd;
2512 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2516 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2517 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2519 cmd->action = cpu_to_le32(action);
2520 cmd->rate_type = cpu_to_le32(rate_type);
2522 if (rate_table != NULL) {
2524 * Copy over each field manually so that endian
2525 * conversion can be done.
2527 cmd->rate_table.allow_rate_drop =
2528 cpu_to_le32(rate_table->allow_rate_drop);
2529 cmd->rate_table.num_rates =
2530 cpu_to_le32(rate_table->num_rates);
2532 for (count = 0; count < rate_table->num_rates; count++) {
2533 struct mwl8k_rate_entry *dst =
2534 &cmd->rate_table.rate_entry[count];
2535 struct mwl8k_rate_entry *src =
2536 &rate_table->rate_entry[count];
2538 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2539 dst->enable_retry = cpu_to_le32(src->enable_retry);
2540 dst->rate = cpu_to_le32(src->rate);
2541 dst->retry_count = cpu_to_le32(src->retry_count);
2545 rc = mwl8k_post_cmd(hw, &cmd->header);
2552 * CMD_ENABLE_SNIFFER.
2554 struct mwl8k_cmd_enable_sniffer {
2555 struct mwl8k_cmd_pkt header;
2557 } __attribute__((packed));
2559 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2561 struct mwl8k_cmd_enable_sniffer *cmd;
2564 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2568 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2569 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2570 cmd->action = cpu_to_le32(!!enable);
2572 rc = mwl8k_post_cmd(hw, &cmd->header);
2581 struct mwl8k_cmd_set_mac_addr {
2582 struct mwl8k_cmd_pkt header;
2586 __u8 mac_addr[ETH_ALEN];
2588 __u8 mac_addr[ETH_ALEN];
2590 } __attribute__((packed));
2592 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
2594 struct mwl8k_priv *priv = hw->priv;
2595 struct mwl8k_cmd_set_mac_addr *cmd;
2598 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2602 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2603 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2605 cmd->mbss.mac_type = 0;
2606 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2608 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2611 rc = mwl8k_post_cmd(hw, &cmd->header);
2618 * CMD_SET_RATEADAPT_MODE.
2620 struct mwl8k_cmd_set_rate_adapt_mode {
2621 struct mwl8k_cmd_pkt header;
2624 } __attribute__((packed));
2626 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2628 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2631 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2635 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2636 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2637 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2638 cmd->mode = cpu_to_le16(mode);
2640 rc = mwl8k_post_cmd(hw, &cmd->header);
2649 struct mwl8k_cmd_update_stadb {
2650 struct mwl8k_cmd_pkt header;
2652 /* See STADB_ACTION_TYPE */
2655 /* Peer MAC address */
2656 __u8 peer_addr[ETH_ALEN];
2660 /* Peer info - valid during add/update. */
2661 struct peer_capability_info peer_info;
2662 } __attribute__((packed));
2664 static int mwl8k_cmd_update_stadb(struct ieee80211_hw *hw,
2665 struct ieee80211_vif *vif, __u32 action)
2667 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2668 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2669 struct mwl8k_cmd_update_stadb *cmd;
2670 struct peer_capability_info *peer_info;
2673 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2677 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2678 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2680 cmd->action = cpu_to_le32(action);
2681 peer_info = &cmd->peer_info;
2682 memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
2685 case MWL8K_STA_DB_ADD_ENTRY:
2686 case MWL8K_STA_DB_MODIFY_ENTRY:
2687 /* Build peer_info block */
2688 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2689 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2690 memcpy(peer_info->legacy_rates, mwl8k_rateids,
2691 sizeof(mwl8k_rateids));
2692 peer_info->interop = 1;
2693 peer_info->amsdu_enabled = 0;
2695 rc = mwl8k_post_cmd(hw, &cmd->header);
2697 mv_vif->peer_id = peer_info->station_id;
2701 case MWL8K_STA_DB_DEL_ENTRY:
2702 case MWL8K_STA_DB_FLUSH:
2704 rc = mwl8k_post_cmd(hw, &cmd->header);
2706 mv_vif->peer_id = 0;
2716 * Interrupt handling.
2718 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2720 struct ieee80211_hw *hw = dev_id;
2721 struct mwl8k_priv *priv = hw->priv;
2724 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2725 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2730 if (status & MWL8K_A2H_INT_TX_DONE)
2731 tasklet_schedule(&priv->tx_reclaim_task);
2733 if (status & MWL8K_A2H_INT_RX_READY) {
2734 while (rxq_process(hw, 0, 1))
2735 rxq_refill(hw, 0, 1);
2738 if (status & MWL8K_A2H_INT_OPC_DONE) {
2739 if (priv->hostcmd_wait != NULL)
2740 complete(priv->hostcmd_wait);
2743 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2744 if (!mutex_is_locked(&priv->fw_mutex) &&
2745 priv->radio_on && priv->pending_tx_pkts)
2746 mwl8k_tx_start(priv);
2754 * Core driver operations.
2756 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2758 struct mwl8k_priv *priv = hw->priv;
2759 int index = skb_get_queue_mapping(skb);
2762 if (priv->current_channel == NULL) {
2763 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2764 "disabled\n", wiphy_name(hw->wiphy));
2766 return NETDEV_TX_OK;
2769 rc = mwl8k_txq_xmit(hw, index, skb);
2774 static int mwl8k_start(struct ieee80211_hw *hw)
2776 struct mwl8k_priv *priv = hw->priv;
2779 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
2780 IRQF_SHARED, MWL8K_NAME, hw);
2782 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2783 wiphy_name(hw->wiphy));
2787 /* Enable tx reclaim tasklet */
2788 tasklet_enable(&priv->tx_reclaim_task);
2790 /* Enable interrupts */
2791 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2793 rc = mwl8k_fw_lock(hw);
2795 rc = mwl8k_cmd_radio_enable(hw);
2799 rc = mwl8k_cmd_enable_sniffer(hw, 0);
2802 rc = mwl8k_cmd_set_pre_scan(hw);
2805 rc = mwl8k_cmd_set_post_scan(hw,
2806 "\x00\x00\x00\x00\x00\x00");
2810 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
2813 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
2815 mwl8k_fw_unlock(hw);
2819 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2820 free_irq(priv->pdev->irq, hw);
2821 tasklet_disable(&priv->tx_reclaim_task);
2827 static void mwl8k_stop(struct ieee80211_hw *hw)
2829 struct mwl8k_priv *priv = hw->priv;
2832 mwl8k_cmd_radio_disable(hw);
2834 ieee80211_stop_queues(hw);
2836 /* Disable interrupts */
2837 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2838 free_irq(priv->pdev->irq, hw);
2840 /* Stop finalize join worker */
2841 cancel_work_sync(&priv->finalize_join_worker);
2842 if (priv->beacon_skb != NULL)
2843 dev_kfree_skb(priv->beacon_skb);
2845 /* Stop tx reclaim tasklet */
2846 tasklet_disable(&priv->tx_reclaim_task);
2848 /* Return all skbs to mac80211 */
2849 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2850 mwl8k_txq_reclaim(hw, i, 1);
2853 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2854 struct ieee80211_if_init_conf *conf)
2856 struct mwl8k_priv *priv = hw->priv;
2857 struct mwl8k_vif *mwl8k_vif;
2860 * We only support one active interface at a time.
2862 if (priv->vif != NULL)
2866 * We only support managed interfaces for now.
2868 if (conf->type != NL80211_IFTYPE_STATION)
2872 * Reject interface creation if sniffer mode is active, as
2873 * STA operation is mutually exclusive with hardware sniffer
2876 if (priv->sniffer_enabled) {
2877 printk(KERN_INFO "%s: unable to create STA "
2878 "interface due to sniffer mode being enabled\n",
2879 wiphy_name(hw->wiphy));
2883 /* Clean out driver private area */
2884 mwl8k_vif = MWL8K_VIF(conf->vif);
2885 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2887 /* Set and save the mac address */
2888 mwl8k_cmd_set_mac_addr(hw, conf->mac_addr);
2889 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
2891 /* Back pointer to parent config block */
2892 mwl8k_vif->priv = priv;
2894 /* Set Initial sequence number to zero */
2895 mwl8k_vif->seqno = 0;
2897 priv->vif = conf->vif;
2898 priv->current_channel = NULL;
2903 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2904 struct ieee80211_if_init_conf *conf)
2906 struct mwl8k_priv *priv = hw->priv;
2908 if (priv->vif == NULL)
2911 mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
2916 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2918 struct ieee80211_conf *conf = &hw->conf;
2919 struct mwl8k_priv *priv = hw->priv;
2922 if (conf->flags & IEEE80211_CONF_IDLE) {
2923 mwl8k_cmd_radio_disable(hw);
2924 priv->current_channel = NULL;
2928 rc = mwl8k_fw_lock(hw);
2932 rc = mwl8k_cmd_radio_enable(hw);
2936 rc = mwl8k_cmd_set_rf_channel(hw, conf->channel);
2940 priv->current_channel = conf->channel;
2942 if (conf->power_level > 18)
2943 conf->power_level = 18;
2944 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
2949 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
2951 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
2953 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
2957 mwl8k_fw_unlock(hw);
2962 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
2963 struct ieee80211_vif *vif,
2964 struct ieee80211_bss_conf *info,
2967 struct mwl8k_priv *priv = hw->priv;
2968 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2971 if ((changed & BSS_CHANGED_ASSOC) == 0)
2974 priv->capture_beacon = false;
2976 rc = mwl8k_fw_lock(hw);
2981 memcpy(&mwl8k_vif->bss_info, info,
2982 sizeof(struct ieee80211_bss_conf));
2984 memcpy(mwl8k_vif->bssid, info->bssid, ETH_ALEN);
2987 rc = mwl8k_cmd_set_rate(hw, vif);
2991 /* Turn on rate adaptation */
2992 rc = mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
2993 MWL8K_UCAST_RATE, NULL);
2997 /* Set radio preamble */
2998 rc = mwl8k_set_radio_preamble(hw, info->use_short_preamble);
3003 rc = mwl8k_cmd_set_slot(hw, info->use_short_slot);
3007 /* Update peer rate info */
3008 rc = mwl8k_cmd_update_stadb(hw, vif,
3009 MWL8K_STA_DB_MODIFY_ENTRY);
3014 rc = mwl8k_cmd_set_aid(hw, vif);
3019 * Finalize the join. Tell rx handler to process
3020 * next beacon from our BSSID.
3022 memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
3023 priv->capture_beacon = true;
3025 rc = mwl8k_cmd_update_stadb(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
3026 memset(&mwl8k_vif->bss_info, 0,
3027 sizeof(struct ieee80211_bss_conf));
3028 memset(mwl8k_vif->bssid, 0, ETH_ALEN);
3032 mwl8k_fw_unlock(hw);
3035 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3036 int mc_count, struct dev_addr_list *mclist)
3038 struct mwl8k_cmd_pkt *cmd;
3041 * Synthesize and return a command packet that programs the
3042 * hardware multicast address filter. At this point we don't
3043 * know whether FIF_ALLMULTI is being requested, but if it is,
3044 * we'll end up throwing this packet away and creating a new
3045 * one in mwl8k_configure_filter().
3047 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3049 return (unsigned long)cmd;
3053 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3054 unsigned int changed_flags,
3055 unsigned int *total_flags)
3057 struct mwl8k_priv *priv = hw->priv;
3060 * Hardware sniffer mode is mutually exclusive with STA
3061 * operation, so refuse to enable sniffer mode if a STA
3062 * interface is active.
3064 if (priv->vif != NULL) {
3065 if (net_ratelimit())
3066 printk(KERN_INFO "%s: not enabling sniffer "
3067 "mode because STA interface is active\n",
3068 wiphy_name(hw->wiphy));
3072 if (!priv->sniffer_enabled) {
3073 if (mwl8k_cmd_enable_sniffer(hw, 1))
3075 priv->sniffer_enabled = true;
3078 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3079 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3085 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3086 unsigned int changed_flags,
3087 unsigned int *total_flags,
3090 struct mwl8k_priv *priv = hw->priv;
3091 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3094 * AP firmware doesn't allow fine-grained control over
3095 * the receive filter.
3098 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3104 * Enable hardware sniffer mode if FIF_CONTROL or
3105 * FIF_OTHER_BSS is requested.
3107 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3108 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3113 /* Clear unsupported feature flags */
3114 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3116 if (mwl8k_fw_lock(hw))
3119 if (priv->sniffer_enabled) {
3120 mwl8k_cmd_enable_sniffer(hw, 0);
3121 priv->sniffer_enabled = false;
3124 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3125 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3127 * Disable the BSS filter.
3129 mwl8k_cmd_set_pre_scan(hw);
3134 * Enable the BSS filter.
3136 * If there is an active STA interface, use that
3137 * interface's BSSID, otherwise use a dummy one
3138 * (where the OUI part needs to be nonzero for
3139 * the BSSID to be accepted by POST_SCAN).
3141 bssid = "\x01\x00\x00\x00\x00\x00";
3142 if (priv->vif != NULL)
3143 bssid = MWL8K_VIF(priv->vif)->bssid;
3145 mwl8k_cmd_set_post_scan(hw, bssid);
3150 * If FIF_ALLMULTI is being requested, throw away the command
3151 * packet that ->prepare_multicast() built and replace it with
3152 * a command packet that enables reception of all multicast
3155 if (*total_flags & FIF_ALLMULTI) {
3157 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3161 mwl8k_post_cmd(hw, cmd);
3165 mwl8k_fw_unlock(hw);
3168 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3170 return mwl8k_cmd_set_rts_threshold(hw, MWL8K_CMD_SET, value);
3173 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3174 const struct ieee80211_tx_queue_params *params)
3176 struct mwl8k_priv *priv = hw->priv;
3179 rc = mwl8k_fw_lock(hw);
3181 if (!priv->wmm_enabled)
3182 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3185 rc = mwl8k_cmd_set_edca_params(hw, queue,
3191 mwl8k_fw_unlock(hw);
3197 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3198 struct ieee80211_tx_queue_stats *stats)
3200 struct mwl8k_priv *priv = hw->priv;
3201 struct mwl8k_tx_queue *txq;
3204 spin_lock_bh(&priv->tx_lock);
3205 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3206 txq = priv->txq + index;
3207 memcpy(&stats[index], &txq->stats,
3208 sizeof(struct ieee80211_tx_queue_stats));
3210 spin_unlock_bh(&priv->tx_lock);
3215 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3216 struct ieee80211_low_level_stats *stats)
3218 return mwl8k_cmd_get_stat(hw, stats);
3221 static const struct ieee80211_ops mwl8k_ops = {
3223 .start = mwl8k_start,
3225 .add_interface = mwl8k_add_interface,
3226 .remove_interface = mwl8k_remove_interface,
3227 .config = mwl8k_config,
3228 .bss_info_changed = mwl8k_bss_info_changed,
3229 .prepare_multicast = mwl8k_prepare_multicast,
3230 .configure_filter = mwl8k_configure_filter,
3231 .set_rts_threshold = mwl8k_set_rts_threshold,
3232 .conf_tx = mwl8k_conf_tx,
3233 .get_tx_stats = mwl8k_get_tx_stats,
3234 .get_stats = mwl8k_get_stats,
3237 static void mwl8k_tx_reclaim_handler(unsigned long data)
3240 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3241 struct mwl8k_priv *priv = hw->priv;
3243 spin_lock_bh(&priv->tx_lock);
3244 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3245 mwl8k_txq_reclaim(hw, i, 0);
3247 if (priv->tx_wait != NULL && !priv->pending_tx_pkts) {
3248 complete(priv->tx_wait);
3249 priv->tx_wait = NULL;
3251 spin_unlock_bh(&priv->tx_lock);
3254 static void mwl8k_finalize_join_worker(struct work_struct *work)
3256 struct mwl8k_priv *priv =
3257 container_of(work, struct mwl8k_priv, finalize_join_worker);
3258 struct sk_buff *skb = priv->beacon_skb;
3259 u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
3261 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim);
3264 priv->beacon_skb = NULL;
3272 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3274 .part_name = "88w8687",
3275 .helper_image = "mwl8k/helper_8687.fw",
3276 .fw_image = "mwl8k/fmimage_8687.fw",
3277 .rxd_ops = &rxd_8687_ops,
3278 .modes = BIT(NL80211_IFTYPE_STATION),
3281 .part_name = "88w8366",
3282 .helper_image = "mwl8k/helper_8366.fw",
3283 .fw_image = "mwl8k/fmimage_8366.fw",
3284 .rxd_ops = &rxd_8366_ops,
3289 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3290 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3291 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3292 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3295 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3297 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3298 const struct pci_device_id *id)
3300 static int printed_version = 0;
3301 struct ieee80211_hw *hw;
3302 struct mwl8k_priv *priv;
3306 if (!printed_version) {
3307 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3308 printed_version = 1;
3311 rc = pci_enable_device(pdev);
3313 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3318 rc = pci_request_regions(pdev, MWL8K_NAME);
3320 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3322 goto err_disable_device;
3325 pci_set_master(pdev);
3327 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3329 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3337 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3338 priv->rxd_ops = priv->device_info->rxd_ops;
3339 priv->sniffer_enabled = false;
3340 priv->wmm_enabled = false;
3341 priv->pending_tx_pkts = 0;
3343 SET_IEEE80211_DEV(hw, &pdev->dev);
3344 pci_set_drvdata(pdev, hw);
3346 priv->sram = pci_iomap(pdev, 0, 0x10000);
3347 if (priv->sram == NULL) {
3348 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3349 wiphy_name(hw->wiphy));
3354 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3355 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3357 priv->regs = pci_iomap(pdev, 1, 0x10000);
3358 if (priv->regs == NULL) {
3359 priv->regs = pci_iomap(pdev, 2, 0x10000);
3360 if (priv->regs == NULL) {
3361 printk(KERN_ERR "%s: Cannot map device registers\n",
3362 wiphy_name(hw->wiphy));
3367 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3368 priv->band.band = IEEE80211_BAND_2GHZ;
3369 priv->band.channels = priv->channels;
3370 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3371 priv->band.bitrates = priv->rates;
3372 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3373 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3375 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3376 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3379 * Extra headroom is the size of the required DMA header
3380 * minus the size of the smallest 802.11 frame (CTS frame).
3382 hw->extra_tx_headroom =
3383 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3385 hw->channel_change_time = 10;
3387 hw->queues = MWL8K_TX_QUEUES;
3389 hw->wiphy->interface_modes = priv->device_info->modes;
3391 /* Set rssi and noise values to dBm */
3392 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3393 hw->vif_data_size = sizeof(struct mwl8k_vif);
3396 /* Set default radio state and preamble */
3398 priv->radio_short_preamble = 0;
3400 /* Finalize join worker */
3401 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3403 /* TX reclaim tasklet */
3404 tasklet_init(&priv->tx_reclaim_task,
3405 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3406 tasklet_disable(&priv->tx_reclaim_task);
3408 /* Power management cookie */
3409 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3410 if (priv->cookie == NULL)
3413 rc = mwl8k_rxq_init(hw, 0);
3416 rxq_refill(hw, 0, INT_MAX);
3418 mutex_init(&priv->fw_mutex);
3419 priv->fw_mutex_owner = NULL;
3420 priv->fw_mutex_depth = 0;
3421 priv->hostcmd_wait = NULL;
3423 spin_lock_init(&priv->tx_lock);
3425 priv->tx_wait = NULL;
3427 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3428 rc = mwl8k_txq_init(hw, i);
3430 goto err_free_queues;
3433 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3434 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3435 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3436 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3438 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3439 IRQF_SHARED, MWL8K_NAME, hw);
3441 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3442 wiphy_name(hw->wiphy));
3443 goto err_free_queues;
3446 /* Reset firmware and hardware */
3447 mwl8k_hw_reset(priv);
3449 /* Ask userland hotplug daemon for the device firmware */
3450 rc = mwl8k_request_firmware(priv);
3452 printk(KERN_ERR "%s: Firmware files not found\n",
3453 wiphy_name(hw->wiphy));
3457 /* Load firmware into hardware */
3458 rc = mwl8k_load_firmware(hw);
3460 printk(KERN_ERR "%s: Cannot start firmware\n",
3461 wiphy_name(hw->wiphy));
3462 goto err_stop_firmware;
3465 /* Reclaim memory once firmware is successfully loaded */
3466 mwl8k_release_firmware(priv);
3469 * Temporarily enable interrupts. Initial firmware host
3470 * commands use interrupts and avoids polling. Disable
3471 * interrupts when done.
3473 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3475 /* Get config data, mac addrs etc */
3477 rc = mwl8k_cmd_get_hw_spec_ap(hw);
3479 rc = mwl8k_cmd_set_hw_spec(hw);
3481 rc = mwl8k_cmd_get_hw_spec_sta(hw);
3484 printk(KERN_ERR "%s: Cannot initialise firmware\n",
3485 wiphy_name(hw->wiphy));
3486 goto err_stop_firmware;
3489 /* Turn radio off */
3490 rc = mwl8k_cmd_radio_disable(hw);
3492 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3493 goto err_stop_firmware;
3496 /* Clear MAC address */
3497 rc = mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3499 printk(KERN_ERR "%s: Cannot clear MAC address\n",
3500 wiphy_name(hw->wiphy));
3501 goto err_stop_firmware;
3504 /* Disable interrupts */
3505 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3506 free_irq(priv->pdev->irq, hw);
3508 rc = ieee80211_register_hw(hw);
3510 printk(KERN_ERR "%s: Cannot register device\n",
3511 wiphy_name(hw->wiphy));
3512 goto err_stop_firmware;
3515 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3516 wiphy_name(hw->wiphy), priv->device_info->part_name,
3517 priv->hw_rev, hw->wiphy->perm_addr,
3518 priv->ap_fw ? "AP" : "STA",
3519 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
3520 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
3525 mwl8k_hw_reset(priv);
3526 mwl8k_release_firmware(priv);
3529 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3530 free_irq(priv->pdev->irq, hw);
3533 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3534 mwl8k_txq_deinit(hw, i);
3535 mwl8k_rxq_deinit(hw, 0);
3538 if (priv->cookie != NULL)
3539 pci_free_consistent(priv->pdev, 4,
3540 priv->cookie, priv->cookie_dma);
3542 if (priv->regs != NULL)
3543 pci_iounmap(pdev, priv->regs);
3545 if (priv->sram != NULL)
3546 pci_iounmap(pdev, priv->sram);
3548 pci_set_drvdata(pdev, NULL);
3549 ieee80211_free_hw(hw);
3552 pci_release_regions(pdev);
3555 pci_disable_device(pdev);
3560 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3562 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3565 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3567 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3568 struct mwl8k_priv *priv;
3575 ieee80211_stop_queues(hw);
3577 ieee80211_unregister_hw(hw);
3579 /* Remove tx reclaim tasklet */
3580 tasklet_kill(&priv->tx_reclaim_task);
3583 mwl8k_hw_reset(priv);
3585 /* Return all skbs to mac80211 */
3586 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3587 mwl8k_txq_reclaim(hw, i, 1);
3589 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3590 mwl8k_txq_deinit(hw, i);
3592 mwl8k_rxq_deinit(hw, 0);
3594 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
3596 pci_iounmap(pdev, priv->regs);
3597 pci_iounmap(pdev, priv->sram);
3598 pci_set_drvdata(pdev, NULL);
3599 ieee80211_free_hw(hw);
3600 pci_release_regions(pdev);
3601 pci_disable_device(pdev);
3604 static struct pci_driver mwl8k_driver = {
3606 .id_table = mwl8k_pci_id_table,
3607 .probe = mwl8k_probe,
3608 .remove = __devexit_p(mwl8k_remove),
3609 .shutdown = __devexit_p(mwl8k_shutdown),
3612 static int __init mwl8k_init(void)
3614 return pci_register_driver(&mwl8k_driver);
3617 static void __exit mwl8k_exit(void)
3619 pci_unregister_driver(&mwl8k_driver);
3622 module_init(mwl8k_init);
3623 module_exit(mwl8k_exit);
3625 MODULE_DESCRIPTION(MWL8K_DESC);
3626 MODULE_VERSION(MWL8K_VERSION);
3627 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3628 MODULE_LICENSE("GPL");