2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.11"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
91 struct mwl8k_device_info {
95 struct rxd_ops *ap_rxd_ops;
98 struct mwl8k_rx_queue {
101 /* hw receives here */
104 /* refill descs here */
111 DECLARE_PCI_UNMAP_ADDR(dma)
115 struct mwl8k_tx_queue {
116 /* hw transmits here */
119 /* sw appends here */
122 struct ieee80211_tx_queue_stats stats;
123 struct mwl8k_tx_desc *txd;
125 struct sk_buff **skb;
129 struct ieee80211_hw *hw;
130 struct pci_dev *pdev;
132 struct mwl8k_device_info *device_info;
138 struct firmware *fw_helper;
139 struct firmware *fw_ucode;
141 /* hardware/firmware parameters */
143 struct rxd_ops *rxd_ops;
145 /* firmware access */
146 struct mutex fw_mutex;
147 struct task_struct *fw_mutex_owner;
149 struct completion *hostcmd_wait;
151 /* lock held over TX and TX reap */
154 /* TX quiesce completion, protected by fw_mutex and tx_lock */
155 struct completion *tx_wait;
157 struct ieee80211_vif *vif;
159 /* power management status cookie from firmware */
161 dma_addr_t cookie_dma;
168 * Running count of TX packets in flight, to avoid
169 * iterating over the transmit rings each time.
173 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
174 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
177 struct ieee80211_supported_band band;
178 struct ieee80211_channel channels[14];
179 struct ieee80211_rate rates[14];
182 bool radio_short_preamble;
183 bool sniffer_enabled;
186 struct work_struct sta_notify_worker;
187 spinlock_t sta_notify_list_lock;
188 struct list_head sta_notify_list;
190 /* XXX need to convert this to handle multiple interfaces */
192 u8 capture_bssid[ETH_ALEN];
193 struct sk_buff *beacon_skb;
196 * This FJ worker has to be global as it is scheduled from the
197 * RX handler. At this point we don't know which interface it
198 * belongs to until the list of bssids waiting to complete join
201 struct work_struct finalize_join_worker;
203 /* Tasklet to perform TX reclaim. */
204 struct tasklet_struct poll_tx_task;
206 /* Tasklet to perform RX. */
207 struct tasklet_struct poll_rx_task;
210 /* Per interface specific private data */
212 /* Non AMPDU sequence number assigned by driver. */
215 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
218 /* Index into station database. Returned by UPDATE_STADB. */
221 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
223 static const struct ieee80211_channel mwl8k_channels[] = {
224 { .center_freq = 2412, .hw_value = 1, },
225 { .center_freq = 2417, .hw_value = 2, },
226 { .center_freq = 2422, .hw_value = 3, },
227 { .center_freq = 2427, .hw_value = 4, },
228 { .center_freq = 2432, .hw_value = 5, },
229 { .center_freq = 2437, .hw_value = 6, },
230 { .center_freq = 2442, .hw_value = 7, },
231 { .center_freq = 2447, .hw_value = 8, },
232 { .center_freq = 2452, .hw_value = 9, },
233 { .center_freq = 2457, .hw_value = 10, },
234 { .center_freq = 2462, .hw_value = 11, },
235 { .center_freq = 2467, .hw_value = 12, },
236 { .center_freq = 2472, .hw_value = 13, },
237 { .center_freq = 2484, .hw_value = 14, },
240 static const struct ieee80211_rate mwl8k_rates[] = {
241 { .bitrate = 10, .hw_value = 2, },
242 { .bitrate = 20, .hw_value = 4, },
243 { .bitrate = 55, .hw_value = 11, },
244 { .bitrate = 110, .hw_value = 22, },
245 { .bitrate = 220, .hw_value = 44, },
246 { .bitrate = 60, .hw_value = 12, },
247 { .bitrate = 90, .hw_value = 18, },
248 { .bitrate = 120, .hw_value = 24, },
249 { .bitrate = 180, .hw_value = 36, },
250 { .bitrate = 240, .hw_value = 48, },
251 { .bitrate = 360, .hw_value = 72, },
252 { .bitrate = 480, .hw_value = 96, },
253 { .bitrate = 540, .hw_value = 108, },
254 { .bitrate = 720, .hw_value = 144, },
257 /* Set or get info from Firmware */
258 #define MWL8K_CMD_SET 0x0001
259 #define MWL8K_CMD_GET 0x0000
261 /* Firmware command codes */
262 #define MWL8K_CMD_CODE_DNLD 0x0001
263 #define MWL8K_CMD_GET_HW_SPEC 0x0003
264 #define MWL8K_CMD_SET_HW_SPEC 0x0004
265 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
266 #define MWL8K_CMD_GET_STAT 0x0014
267 #define MWL8K_CMD_RADIO_CONTROL 0x001c
268 #define MWL8K_CMD_RF_TX_POWER 0x001e
269 #define MWL8K_CMD_RF_ANTENNA 0x0020
270 #define MWL8K_CMD_SET_BEACON 0x0100
271 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
272 #define MWL8K_CMD_SET_POST_SCAN 0x0108
273 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
274 #define MWL8K_CMD_SET_AID 0x010d
275 #define MWL8K_CMD_SET_RATE 0x0110
276 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
277 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
278 #define MWL8K_CMD_SET_SLOT 0x0114
279 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
280 #define MWL8K_CMD_SET_WMM_MODE 0x0123
281 #define MWL8K_CMD_MIMO_CONFIG 0x0125
282 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
283 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
284 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
285 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
286 #define MWL8K_CMD_BSS_START 0x1100
287 #define MWL8K_CMD_SET_NEW_STN 0x1111
288 #define MWL8K_CMD_UPDATE_STADB 0x1123
290 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
292 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
293 snprintf(buf, bufsize, "%s", #x);\
296 switch (cmd & ~0x8000) {
297 MWL8K_CMDNAME(CODE_DNLD);
298 MWL8K_CMDNAME(GET_HW_SPEC);
299 MWL8K_CMDNAME(SET_HW_SPEC);
300 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
301 MWL8K_CMDNAME(GET_STAT);
302 MWL8K_CMDNAME(RADIO_CONTROL);
303 MWL8K_CMDNAME(RF_TX_POWER);
304 MWL8K_CMDNAME(RF_ANTENNA);
305 MWL8K_CMDNAME(SET_BEACON);
306 MWL8K_CMDNAME(SET_PRE_SCAN);
307 MWL8K_CMDNAME(SET_POST_SCAN);
308 MWL8K_CMDNAME(SET_RF_CHANNEL);
309 MWL8K_CMDNAME(SET_AID);
310 MWL8K_CMDNAME(SET_RATE);
311 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
312 MWL8K_CMDNAME(RTS_THRESHOLD);
313 MWL8K_CMDNAME(SET_SLOT);
314 MWL8K_CMDNAME(SET_EDCA_PARAMS);
315 MWL8K_CMDNAME(SET_WMM_MODE);
316 MWL8K_CMDNAME(MIMO_CONFIG);
317 MWL8K_CMDNAME(USE_FIXED_RATE);
318 MWL8K_CMDNAME(ENABLE_SNIFFER);
319 MWL8K_CMDNAME(SET_MAC_ADDR);
320 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
321 MWL8K_CMDNAME(BSS_START);
322 MWL8K_CMDNAME(SET_NEW_STN);
323 MWL8K_CMDNAME(UPDATE_STADB);
325 snprintf(buf, bufsize, "0x%x", cmd);
332 /* Hardware and firmware reset */
333 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
335 iowrite32(MWL8K_H2A_INT_RESET,
336 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
337 iowrite32(MWL8K_H2A_INT_RESET,
338 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
342 /* Release fw image */
343 static void mwl8k_release_fw(struct firmware **fw)
347 release_firmware(*fw);
351 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
353 mwl8k_release_fw(&priv->fw_ucode);
354 mwl8k_release_fw(&priv->fw_helper);
357 /* Request fw image */
358 static int mwl8k_request_fw(struct mwl8k_priv *priv,
359 const char *fname, struct firmware **fw)
361 /* release current image */
363 mwl8k_release_fw(fw);
365 return request_firmware((const struct firmware **)fw,
366 fname, &priv->pdev->dev);
369 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
371 struct mwl8k_device_info *di = priv->device_info;
374 if (di->helper_image != NULL) {
375 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
377 printk(KERN_ERR "%s: Error requesting helper "
378 "firmware file %s\n", pci_name(priv->pdev),
384 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
386 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
387 pci_name(priv->pdev), di->fw_image);
388 mwl8k_release_fw(&priv->fw_helper);
395 struct mwl8k_cmd_pkt {
401 } __attribute__((packed));
407 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
409 void __iomem *regs = priv->regs;
413 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
414 if (pci_dma_mapping_error(priv->pdev, dma_addr))
417 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
418 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
419 iowrite32(MWL8K_H2A_INT_DOORBELL,
420 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
421 iowrite32(MWL8K_H2A_INT_DUMMY,
422 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
428 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
429 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
430 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
438 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
440 return loops ? 0 : -ETIMEDOUT;
443 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
444 const u8 *data, size_t length)
446 struct mwl8k_cmd_pkt *cmd;
450 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
454 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
460 int block_size = length > 256 ? 256 : length;
462 memcpy(cmd->payload, data + done, block_size);
463 cmd->length = cpu_to_le16(block_size);
465 rc = mwl8k_send_fw_load_cmd(priv, cmd,
466 sizeof(*cmd) + block_size);
471 length -= block_size;
476 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
484 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
485 const u8 *data, size_t length)
487 unsigned char *buffer;
488 int may_continue, rc = 0;
489 u32 done, prev_block_size;
491 buffer = kmalloc(1024, GFP_KERNEL);
498 while (may_continue > 0) {
501 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
502 if (block_size & 1) {
506 done += prev_block_size;
507 length -= prev_block_size;
510 if (block_size > 1024 || block_size > length) {
520 if (block_size == 0) {
527 prev_block_size = block_size;
528 memcpy(buffer, data + done, block_size);
530 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
535 if (!rc && length != 0)
543 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
545 struct mwl8k_priv *priv = hw->priv;
546 struct firmware *fw = priv->fw_ucode;
550 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
551 struct firmware *helper = priv->fw_helper;
553 if (helper == NULL) {
554 printk(KERN_ERR "%s: helper image needed but none "
555 "given\n", pci_name(priv->pdev));
559 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
561 printk(KERN_ERR "%s: unable to load firmware "
562 "helper image\n", pci_name(priv->pdev));
567 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
569 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
573 printk(KERN_ERR "%s: unable to load firmware image\n",
574 pci_name(priv->pdev));
578 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
584 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
585 if (ready_code == MWL8K_FWAP_READY) {
588 } else if (ready_code == MWL8K_FWSTA_READY) {
597 return loops ? 0 : -ETIMEDOUT;
601 /* DMA header used by firmware and hardware. */
602 struct mwl8k_dma_data {
604 struct ieee80211_hdr wh;
606 } __attribute__((packed));
608 /* Routines to add/remove DMA header from skb. */
609 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
611 struct mwl8k_dma_data *tr;
614 tr = (struct mwl8k_dma_data *)skb->data;
615 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
617 if (hdrlen != sizeof(tr->wh)) {
618 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
619 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
620 *((__le16 *)(tr->data - 2)) = qos;
622 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
626 if (hdrlen != sizeof(*tr))
627 skb_pull(skb, sizeof(*tr) - hdrlen);
630 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
632 struct ieee80211_hdr *wh;
634 struct mwl8k_dma_data *tr;
637 * Add a firmware DMA header; the firmware requires that we
638 * present a 2-byte payload length followed by a 4-address
639 * header (without QoS field), followed (optionally) by any
640 * WEP/ExtIV header (but only filled in for CCMP).
642 wh = (struct ieee80211_hdr *)skb->data;
644 hdrlen = ieee80211_hdrlen(wh->frame_control);
645 if (hdrlen != sizeof(*tr))
646 skb_push(skb, sizeof(*tr) - hdrlen);
648 if (ieee80211_is_data_qos(wh->frame_control))
651 tr = (struct mwl8k_dma_data *)skb->data;
653 memmove(&tr->wh, wh, hdrlen);
654 if (hdrlen != sizeof(tr->wh))
655 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
658 * Firmware length is the length of the fully formed "802.11
659 * payload". That is, everything except for the 802.11 header.
660 * This includes all crypto material including the MIC.
662 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
667 * Packet reception for 88w8366 AP firmware.
669 struct mwl8k_rxd_8366_ap {
673 __le32 pkt_phys_addr;
674 __le32 next_rxd_phys_addr;
678 __le32 hw_noise_floor_info;
685 } __attribute__((packed));
687 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
688 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
689 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
691 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
693 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
695 struct mwl8k_rxd_8366_ap *rxd = _rxd;
697 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
698 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
701 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
703 struct mwl8k_rxd_8366_ap *rxd = _rxd;
705 rxd->pkt_len = cpu_to_le16(len);
706 rxd->pkt_phys_addr = cpu_to_le32(addr);
712 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
715 struct mwl8k_rxd_8366_ap *rxd = _rxd;
717 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
721 memset(status, 0, sizeof(*status));
723 status->signal = -rxd->rssi;
724 status->noise = -rxd->noise_floor;
726 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
727 status->flag |= RX_FLAG_HT;
728 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
729 status->flag |= RX_FLAG_40MHZ;
730 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
734 for (i = 0; i < ARRAY_SIZE(mwl8k_rates); i++) {
735 if (mwl8k_rates[i].hw_value == rxd->rate) {
736 status->rate_idx = i;
742 status->band = IEEE80211_BAND_2GHZ;
743 status->freq = ieee80211_channel_to_frequency(rxd->channel);
745 *qos = rxd->qos_control;
747 return le16_to_cpu(rxd->pkt_len);
750 static struct rxd_ops rxd_8366_ap_ops = {
751 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
752 .rxd_init = mwl8k_rxd_8366_ap_init,
753 .rxd_refill = mwl8k_rxd_8366_ap_refill,
754 .rxd_process = mwl8k_rxd_8366_ap_process,
758 * Packet reception for STA firmware.
760 struct mwl8k_rxd_sta {
764 __le32 pkt_phys_addr;
765 __le32 next_rxd_phys_addr;
775 } __attribute__((packed));
777 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
778 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
779 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
780 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
781 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
782 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
784 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
786 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
788 struct mwl8k_rxd_sta *rxd = _rxd;
790 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
791 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
794 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
796 struct mwl8k_rxd_sta *rxd = _rxd;
798 rxd->pkt_len = cpu_to_le16(len);
799 rxd->pkt_phys_addr = cpu_to_le32(addr);
805 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
808 struct mwl8k_rxd_sta *rxd = _rxd;
811 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
815 rate_info = le16_to_cpu(rxd->rate_info);
817 memset(status, 0, sizeof(*status));
819 status->signal = -rxd->rssi;
820 status->noise = -rxd->noise_level;
821 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
822 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
824 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
825 status->flag |= RX_FLAG_SHORTPRE;
826 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
827 status->flag |= RX_FLAG_40MHZ;
828 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
829 status->flag |= RX_FLAG_SHORT_GI;
830 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
831 status->flag |= RX_FLAG_HT;
833 status->band = IEEE80211_BAND_2GHZ;
834 status->freq = ieee80211_channel_to_frequency(rxd->channel);
836 *qos = rxd->qos_control;
838 return le16_to_cpu(rxd->pkt_len);
841 static struct rxd_ops rxd_sta_ops = {
842 .rxd_size = sizeof(struct mwl8k_rxd_sta),
843 .rxd_init = mwl8k_rxd_sta_init,
844 .rxd_refill = mwl8k_rxd_sta_refill,
845 .rxd_process = mwl8k_rxd_sta_process,
849 #define MWL8K_RX_DESCS 256
850 #define MWL8K_RX_MAXSZ 3800
852 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
854 struct mwl8k_priv *priv = hw->priv;
855 struct mwl8k_rx_queue *rxq = priv->rxq + index;
863 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
865 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
866 if (rxq->rxd == NULL) {
867 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
868 wiphy_name(hw->wiphy));
871 memset(rxq->rxd, 0, size);
873 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
874 if (rxq->buf == NULL) {
875 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
876 wiphy_name(hw->wiphy));
877 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
880 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
882 for (i = 0; i < MWL8K_RX_DESCS; i++) {
886 dma_addr_t next_dma_addr;
888 desc_size = priv->rxd_ops->rxd_size;
889 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
892 if (nexti == MWL8K_RX_DESCS)
894 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
896 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
902 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
904 struct mwl8k_priv *priv = hw->priv;
905 struct mwl8k_rx_queue *rxq = priv->rxq + index;
909 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
915 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
919 addr = pci_map_single(priv->pdev, skb->data,
920 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
924 if (rxq->tail == MWL8K_RX_DESCS)
926 rxq->buf[rx].skb = skb;
927 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
929 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
930 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
938 /* Must be called only when the card's reception is completely halted */
939 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
941 struct mwl8k_priv *priv = hw->priv;
942 struct mwl8k_rx_queue *rxq = priv->rxq + index;
945 for (i = 0; i < MWL8K_RX_DESCS; i++) {
946 if (rxq->buf[i].skb != NULL) {
947 pci_unmap_single(priv->pdev,
948 pci_unmap_addr(&rxq->buf[i], dma),
949 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
950 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
952 kfree_skb(rxq->buf[i].skb);
953 rxq->buf[i].skb = NULL;
960 pci_free_consistent(priv->pdev,
961 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
962 rxq->rxd, rxq->rxd_dma);
968 * Scan a list of BSSIDs to process for finalize join.
969 * Allows for extension to process multiple BSSIDs.
972 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
974 return priv->capture_beacon &&
975 ieee80211_is_beacon(wh->frame_control) &&
976 !compare_ether_addr(wh->addr3, priv->capture_bssid);
979 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
982 struct mwl8k_priv *priv = hw->priv;
984 priv->capture_beacon = false;
985 memset(priv->capture_bssid, 0, ETH_ALEN);
988 * Use GFP_ATOMIC as rxq_process is called from
989 * the primary interrupt handler, memory allocation call
992 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
993 if (priv->beacon_skb != NULL)
994 ieee80211_queue_work(hw, &priv->finalize_join_worker);
997 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
999 struct mwl8k_priv *priv = hw->priv;
1000 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1004 while (rxq->rxd_count && limit--) {
1005 struct sk_buff *skb;
1008 struct ieee80211_rx_status status;
1011 skb = rxq->buf[rxq->head].skb;
1015 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1017 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1021 rxq->buf[rxq->head].skb = NULL;
1023 pci_unmap_single(priv->pdev,
1024 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1025 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1026 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1029 if (rxq->head == MWL8K_RX_DESCS)
1034 skb_put(skb, pkt_len);
1035 mwl8k_remove_dma_header(skb, qos);
1038 * Check for a pending join operation. Save a
1039 * copy of the beacon and schedule a tasklet to
1040 * send a FINALIZE_JOIN command to the firmware.
1042 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1043 mwl8k_save_beacon(hw, skb);
1045 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1046 ieee80211_rx_irqsafe(hw, skb);
1056 * Packet transmission.
1059 #define MWL8K_TXD_STATUS_OK 0x00000001
1060 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1061 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1062 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1063 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1065 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1066 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1067 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1068 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1069 #define MWL8K_QOS_EOSP 0x0010
1071 struct mwl8k_tx_desc {
1076 __le32 pkt_phys_addr;
1078 __u8 dest_MAC_addr[ETH_ALEN];
1079 __le32 next_txd_phys_addr;
1084 } __attribute__((packed));
1086 #define MWL8K_TX_DESCS 128
1088 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1090 struct mwl8k_priv *priv = hw->priv;
1091 struct mwl8k_tx_queue *txq = priv->txq + index;
1095 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1096 txq->stats.limit = MWL8K_TX_DESCS;
1100 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1102 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1103 if (txq->txd == NULL) {
1104 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1105 wiphy_name(hw->wiphy));
1108 memset(txq->txd, 0, size);
1110 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1111 if (txq->skb == NULL) {
1112 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1113 wiphy_name(hw->wiphy));
1114 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1117 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1119 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1120 struct mwl8k_tx_desc *tx_desc;
1123 tx_desc = txq->txd + i;
1124 nexti = (i + 1) % MWL8K_TX_DESCS;
1126 tx_desc->status = 0;
1127 tx_desc->next_txd_phys_addr =
1128 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1134 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1136 iowrite32(MWL8K_H2A_INT_PPA_READY,
1137 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1138 iowrite32(MWL8K_H2A_INT_DUMMY,
1139 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1140 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1143 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1145 struct mwl8k_priv *priv = hw->priv;
1148 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1149 struct mwl8k_tx_queue *txq = priv->txq + i;
1155 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1156 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1159 status = le32_to_cpu(tx_desc->status);
1160 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1165 if (tx_desc->pkt_len == 0)
1169 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1170 "fw_owned=%d drv_owned=%d unused=%d\n",
1171 wiphy_name(hw->wiphy), i,
1172 txq->stats.len, txq->head, txq->tail,
1173 fw_owned, drv_owned, unused);
1178 * Must be called with priv->fw_mutex held and tx queues stopped.
1180 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1182 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1184 struct mwl8k_priv *priv = hw->priv;
1185 DECLARE_COMPLETION_ONSTACK(tx_wait);
1192 * The TX queues are stopped at this point, so this test
1193 * doesn't need to take ->tx_lock.
1195 if (!priv->pending_tx_pkts)
1201 spin_lock_bh(&priv->tx_lock);
1202 priv->tx_wait = &tx_wait;
1205 unsigned long timeout;
1207 oldcount = priv->pending_tx_pkts;
1209 spin_unlock_bh(&priv->tx_lock);
1210 timeout = wait_for_completion_timeout(&tx_wait,
1211 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1212 spin_lock_bh(&priv->tx_lock);
1215 WARN_ON(priv->pending_tx_pkts);
1217 printk(KERN_NOTICE "%s: tx rings drained\n",
1218 wiphy_name(hw->wiphy));
1223 if (priv->pending_tx_pkts < oldcount) {
1224 printk(KERN_NOTICE "%s: waiting for tx rings "
1225 "to drain (%d -> %d pkts)\n",
1226 wiphy_name(hw->wiphy), oldcount,
1227 priv->pending_tx_pkts);
1232 priv->tx_wait = NULL;
1234 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1235 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1236 mwl8k_dump_tx_rings(hw);
1240 spin_unlock_bh(&priv->tx_lock);
1245 #define MWL8K_TXD_SUCCESS(status) \
1246 ((status) & (MWL8K_TXD_STATUS_OK | \
1247 MWL8K_TXD_STATUS_OK_RETRY | \
1248 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1251 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1253 struct mwl8k_priv *priv = hw->priv;
1254 struct mwl8k_tx_queue *txq = priv->txq + index;
1258 while (txq->stats.len > 0 && limit--) {
1260 struct mwl8k_tx_desc *tx_desc;
1263 struct sk_buff *skb;
1264 struct ieee80211_tx_info *info;
1268 tx_desc = txq->txd + tx;
1270 status = le32_to_cpu(tx_desc->status);
1272 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1276 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1279 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1280 BUG_ON(txq->stats.len == 0);
1282 priv->pending_tx_pkts--;
1284 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1285 size = le16_to_cpu(tx_desc->pkt_len);
1287 txq->skb[tx] = NULL;
1289 BUG_ON(skb == NULL);
1290 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1292 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1294 /* Mark descriptor as unused */
1295 tx_desc->pkt_phys_addr = 0;
1296 tx_desc->pkt_len = 0;
1298 info = IEEE80211_SKB_CB(skb);
1299 ieee80211_tx_info_clear_status(info);
1300 if (MWL8K_TXD_SUCCESS(status))
1301 info->flags |= IEEE80211_TX_STAT_ACK;
1303 ieee80211_tx_status_irqsafe(hw, skb);
1308 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1309 ieee80211_wake_queue(hw, index);
1314 /* must be called only when the card's transmit is completely halted */
1315 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1317 struct mwl8k_priv *priv = hw->priv;
1318 struct mwl8k_tx_queue *txq = priv->txq + index;
1320 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1325 pci_free_consistent(priv->pdev,
1326 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1327 txq->txd, txq->txd_dma);
1332 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1334 struct mwl8k_priv *priv = hw->priv;
1335 struct ieee80211_tx_info *tx_info;
1336 struct mwl8k_vif *mwl8k_vif;
1337 struct ieee80211_hdr *wh;
1338 struct mwl8k_tx_queue *txq;
1339 struct mwl8k_tx_desc *tx;
1345 wh = (struct ieee80211_hdr *)skb->data;
1346 if (ieee80211_is_data_qos(wh->frame_control))
1347 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1351 mwl8k_add_dma_header(skb);
1352 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1354 tx_info = IEEE80211_SKB_CB(skb);
1355 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1357 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1358 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1359 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1360 mwl8k_vif->seqno += 0x10;
1363 /* Setup firmware control bit fields for each frame type. */
1366 if (ieee80211_is_mgmt(wh->frame_control) ||
1367 ieee80211_is_ctl(wh->frame_control)) {
1369 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1370 } else if (ieee80211_is_data(wh->frame_control)) {
1372 if (is_multicast_ether_addr(wh->addr1))
1373 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1375 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1376 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1377 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1379 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1382 dma = pci_map_single(priv->pdev, skb->data,
1383 skb->len, PCI_DMA_TODEVICE);
1385 if (pci_dma_mapping_error(priv->pdev, dma)) {
1386 printk(KERN_DEBUG "%s: failed to dma map skb, "
1387 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1389 return NETDEV_TX_OK;
1392 spin_lock_bh(&priv->tx_lock);
1394 txq = priv->txq + index;
1396 BUG_ON(txq->skb[txq->tail] != NULL);
1397 txq->skb[txq->tail] = skb;
1399 tx = txq->txd + txq->tail;
1400 tx->data_rate = txdatarate;
1401 tx->tx_priority = index;
1402 tx->qos_control = cpu_to_le16(qos);
1403 tx->pkt_phys_addr = cpu_to_le32(dma);
1404 tx->pkt_len = cpu_to_le16(skb->len);
1406 if (!priv->ap_fw && tx_info->control.sta != NULL)
1407 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1411 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1415 priv->pending_tx_pkts++;
1418 if (txq->tail == MWL8K_TX_DESCS)
1421 if (txq->head == txq->tail)
1422 ieee80211_stop_queue(hw, index);
1424 mwl8k_tx_start(priv);
1426 spin_unlock_bh(&priv->tx_lock);
1428 return NETDEV_TX_OK;
1435 * We have the following requirements for issuing firmware commands:
1436 * - Some commands require that the packet transmit path is idle when
1437 * the command is issued. (For simplicity, we'll just quiesce the
1438 * transmit path for every command.)
1439 * - There are certain sequences of commands that need to be issued to
1440 * the hardware sequentially, with no other intervening commands.
1442 * This leads to an implementation of a "firmware lock" as a mutex that
1443 * can be taken recursively, and which is taken by both the low-level
1444 * command submission function (mwl8k_post_cmd) as well as any users of
1445 * that function that require issuing of an atomic sequence of commands,
1446 * and quiesces the transmit path whenever it's taken.
1448 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1450 struct mwl8k_priv *priv = hw->priv;
1452 if (priv->fw_mutex_owner != current) {
1455 mutex_lock(&priv->fw_mutex);
1456 ieee80211_stop_queues(hw);
1458 rc = mwl8k_tx_wait_empty(hw);
1460 ieee80211_wake_queues(hw);
1461 mutex_unlock(&priv->fw_mutex);
1466 priv->fw_mutex_owner = current;
1469 priv->fw_mutex_depth++;
1474 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1476 struct mwl8k_priv *priv = hw->priv;
1478 if (!--priv->fw_mutex_depth) {
1479 ieee80211_wake_queues(hw);
1480 priv->fw_mutex_owner = NULL;
1481 mutex_unlock(&priv->fw_mutex);
1487 * Command processing.
1490 /* Timeout firmware commands after 10s */
1491 #define MWL8K_CMD_TIMEOUT_MS 10000
1493 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1495 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1496 struct mwl8k_priv *priv = hw->priv;
1497 void __iomem *regs = priv->regs;
1498 dma_addr_t dma_addr;
1499 unsigned int dma_size;
1501 unsigned long timeout = 0;
1504 cmd->result = 0xffff;
1505 dma_size = le16_to_cpu(cmd->length);
1506 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1507 PCI_DMA_BIDIRECTIONAL);
1508 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1511 rc = mwl8k_fw_lock(hw);
1513 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1514 PCI_DMA_BIDIRECTIONAL);
1518 priv->hostcmd_wait = &cmd_wait;
1519 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1520 iowrite32(MWL8K_H2A_INT_DOORBELL,
1521 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1522 iowrite32(MWL8K_H2A_INT_DUMMY,
1523 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1525 timeout = wait_for_completion_timeout(&cmd_wait,
1526 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1528 priv->hostcmd_wait = NULL;
1530 mwl8k_fw_unlock(hw);
1532 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1533 PCI_DMA_BIDIRECTIONAL);
1536 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1537 wiphy_name(hw->wiphy),
1538 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1539 MWL8K_CMD_TIMEOUT_MS);
1544 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1546 rc = cmd->result ? -EINVAL : 0;
1548 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1549 wiphy_name(hw->wiphy),
1550 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1551 le16_to_cpu(cmd->result));
1553 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1554 wiphy_name(hw->wiphy),
1555 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1563 * CMD_GET_HW_SPEC (STA version).
1565 struct mwl8k_cmd_get_hw_spec_sta {
1566 struct mwl8k_cmd_pkt header;
1568 __u8 host_interface;
1570 __u8 perm_addr[ETH_ALEN];
1575 __u8 mcs_bitmap[16];
1576 __le32 rx_queue_ptr;
1577 __le32 num_tx_queues;
1578 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1580 __le32 num_tx_desc_per_queue;
1582 } __attribute__((packed));
1584 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1585 #define MWL8K_CAP_GREENFIELD 0x08000000
1586 #define MWL8K_CAP_AMPDU 0x04000000
1587 #define MWL8K_CAP_RX_STBC 0x01000000
1588 #define MWL8K_CAP_TX_STBC 0x00800000
1589 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1590 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1591 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1592 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1593 #define MWL8K_CAP_DELAY_BA 0x00003000
1594 #define MWL8K_CAP_MIMO 0x00000200
1595 #define MWL8K_CAP_40MHZ 0x00000100
1597 static void mwl8k_set_ht_caps(struct ieee80211_hw *hw, u32 cap)
1599 struct mwl8k_priv *priv = hw->priv;
1603 priv->band.ht_cap.ht_supported = 1;
1605 if (cap & MWL8K_CAP_MAX_AMSDU)
1606 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1607 if (cap & MWL8K_CAP_GREENFIELD)
1608 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1609 if (cap & MWL8K_CAP_AMPDU) {
1610 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1611 priv->band.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1612 priv->band.ht_cap.ampdu_density =
1613 IEEE80211_HT_MPDU_DENSITY_NONE;
1615 if (cap & MWL8K_CAP_RX_STBC)
1616 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1617 if (cap & MWL8K_CAP_TX_STBC)
1618 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1619 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1620 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1621 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1622 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1623 if (cap & MWL8K_CAP_DELAY_BA)
1624 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1625 if (cap & MWL8K_CAP_40MHZ)
1626 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1628 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1629 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1631 priv->band.ht_cap.mcs.rx_mask[0] = 0xff;
1632 if (rx_streams >= 2)
1633 priv->band.ht_cap.mcs.rx_mask[1] = 0xff;
1634 if (rx_streams >= 3)
1635 priv->band.ht_cap.mcs.rx_mask[2] = 0xff;
1636 priv->band.ht_cap.mcs.rx_mask[4] = 0x01;
1637 priv->band.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1639 if (rx_streams != tx_streams) {
1640 priv->band.ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1641 priv->band.ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1642 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1646 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1648 struct mwl8k_priv *priv = hw->priv;
1649 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1653 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1657 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1658 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1660 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1661 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1662 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1663 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1664 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1665 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1666 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1667 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1669 rc = mwl8k_post_cmd(hw, &cmd->header);
1672 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1673 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1674 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1675 priv->hw_rev = cmd->hw_rev;
1676 if (cmd->caps & cpu_to_le32(MWL8K_CAP_MIMO))
1677 mwl8k_set_ht_caps(hw, le32_to_cpu(cmd->caps));
1685 * CMD_GET_HW_SPEC (AP version).
1687 struct mwl8k_cmd_get_hw_spec_ap {
1688 struct mwl8k_cmd_pkt header;
1690 __u8 host_interface;
1693 __u8 perm_addr[ETH_ALEN];
1704 } __attribute__((packed));
1706 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1708 struct mwl8k_priv *priv = hw->priv;
1709 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1712 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1716 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1717 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1719 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1720 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1722 rc = mwl8k_post_cmd(hw, &cmd->header);
1727 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1728 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1729 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1730 priv->hw_rev = cmd->hw_rev;
1732 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1733 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1735 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1736 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1738 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1739 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1741 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1742 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1744 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1745 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1747 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1748 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1758 struct mwl8k_cmd_set_hw_spec {
1759 struct mwl8k_cmd_pkt header;
1761 __u8 host_interface;
1763 __u8 perm_addr[ETH_ALEN];
1768 __le32 rx_queue_ptr;
1769 __le32 num_tx_queues;
1770 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1772 __le32 num_tx_desc_per_queue;
1774 } __attribute__((packed));
1776 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1777 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1778 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1780 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1782 struct mwl8k_priv *priv = hw->priv;
1783 struct mwl8k_cmd_set_hw_spec *cmd;
1787 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1791 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1792 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1794 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1795 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1796 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1797 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1798 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1799 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1800 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1801 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1802 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1803 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1805 rc = mwl8k_post_cmd(hw, &cmd->header);
1812 * CMD_MAC_MULTICAST_ADR.
1814 struct mwl8k_cmd_mac_multicast_adr {
1815 struct mwl8k_cmd_pkt header;
1818 __u8 addr[0][ETH_ALEN];
1821 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1822 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1823 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1824 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1826 static struct mwl8k_cmd_pkt *
1827 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1828 int mc_count, struct dev_addr_list *mclist)
1830 struct mwl8k_priv *priv = hw->priv;
1831 struct mwl8k_cmd_mac_multicast_adr *cmd;
1834 if (allmulti || mc_count > priv->num_mcaddrs) {
1839 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1841 cmd = kzalloc(size, GFP_ATOMIC);
1845 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1846 cmd->header.length = cpu_to_le16(size);
1847 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1848 MWL8K_ENABLE_RX_BROADCAST);
1851 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1852 } else if (mc_count) {
1855 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1856 cmd->numaddr = cpu_to_le16(mc_count);
1857 for (i = 0; i < mc_count && mclist; i++) {
1858 if (mclist->da_addrlen != ETH_ALEN) {
1862 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1863 mclist = mclist->next;
1867 return &cmd->header;
1873 struct mwl8k_cmd_get_stat {
1874 struct mwl8k_cmd_pkt header;
1876 } __attribute__((packed));
1878 #define MWL8K_STAT_ACK_FAILURE 9
1879 #define MWL8K_STAT_RTS_FAILURE 12
1880 #define MWL8K_STAT_FCS_ERROR 24
1881 #define MWL8K_STAT_RTS_SUCCESS 11
1883 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1884 struct ieee80211_low_level_stats *stats)
1886 struct mwl8k_cmd_get_stat *cmd;
1889 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1893 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1894 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1896 rc = mwl8k_post_cmd(hw, &cmd->header);
1898 stats->dot11ACKFailureCount =
1899 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1900 stats->dot11RTSFailureCount =
1901 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1902 stats->dot11FCSErrorCount =
1903 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1904 stats->dot11RTSSuccessCount =
1905 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1913 * CMD_RADIO_CONTROL.
1915 struct mwl8k_cmd_radio_control {
1916 struct mwl8k_cmd_pkt header;
1920 } __attribute__((packed));
1923 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1925 struct mwl8k_priv *priv = hw->priv;
1926 struct mwl8k_cmd_radio_control *cmd;
1929 if (enable == priv->radio_on && !force)
1932 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1936 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1937 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1938 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1939 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1940 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1942 rc = mwl8k_post_cmd(hw, &cmd->header);
1946 priv->radio_on = enable;
1951 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
1953 return mwl8k_cmd_radio_control(hw, 0, 0);
1956 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
1958 return mwl8k_cmd_radio_control(hw, 1, 0);
1962 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1964 struct mwl8k_priv *priv = hw->priv;
1966 priv->radio_short_preamble = short_preamble;
1968 return mwl8k_cmd_radio_control(hw, 1, 1);
1974 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1976 struct mwl8k_cmd_rf_tx_power {
1977 struct mwl8k_cmd_pkt header;
1979 __le16 support_level;
1980 __le16 current_level;
1982 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1983 } __attribute__((packed));
1985 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1987 struct mwl8k_cmd_rf_tx_power *cmd;
1990 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1994 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1995 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1996 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1997 cmd->support_level = cpu_to_le16(dBm);
1999 rc = mwl8k_post_cmd(hw, &cmd->header);
2008 struct mwl8k_cmd_rf_antenna {
2009 struct mwl8k_cmd_pkt header;
2012 } __attribute__((packed));
2014 #define MWL8K_RF_ANTENNA_RX 1
2015 #define MWL8K_RF_ANTENNA_TX 2
2018 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2020 struct mwl8k_cmd_rf_antenna *cmd;
2023 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2027 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2028 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2029 cmd->antenna = cpu_to_le16(antenna);
2030 cmd->mode = cpu_to_le16(mask);
2032 rc = mwl8k_post_cmd(hw, &cmd->header);
2041 struct mwl8k_cmd_set_beacon {
2042 struct mwl8k_cmd_pkt header;
2047 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, u8 *beacon, int len)
2049 struct mwl8k_cmd_set_beacon *cmd;
2052 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2056 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2057 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2058 cmd->beacon_len = cpu_to_le16(len);
2059 memcpy(cmd->beacon, beacon, len);
2061 rc = mwl8k_post_cmd(hw, &cmd->header);
2070 struct mwl8k_cmd_set_pre_scan {
2071 struct mwl8k_cmd_pkt header;
2072 } __attribute__((packed));
2074 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2076 struct mwl8k_cmd_set_pre_scan *cmd;
2079 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2083 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2084 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2086 rc = mwl8k_post_cmd(hw, &cmd->header);
2093 * CMD_SET_POST_SCAN.
2095 struct mwl8k_cmd_set_post_scan {
2096 struct mwl8k_cmd_pkt header;
2098 __u8 bssid[ETH_ALEN];
2099 } __attribute__((packed));
2102 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2104 struct mwl8k_cmd_set_post_scan *cmd;
2107 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2111 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2112 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2114 memcpy(cmd->bssid, mac, ETH_ALEN);
2116 rc = mwl8k_post_cmd(hw, &cmd->header);
2123 * CMD_SET_RF_CHANNEL.
2125 struct mwl8k_cmd_set_rf_channel {
2126 struct mwl8k_cmd_pkt header;
2128 __u8 current_channel;
2129 __le32 channel_flags;
2130 } __attribute__((packed));
2132 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2133 struct ieee80211_conf *conf)
2135 struct ieee80211_channel *channel = conf->channel;
2136 struct mwl8k_cmd_set_rf_channel *cmd;
2139 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2143 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2144 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2145 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2146 cmd->current_channel = channel->hw_value;
2148 if (channel->band == IEEE80211_BAND_2GHZ)
2149 cmd->channel_flags |= cpu_to_le32(0x00000001);
2151 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2152 conf->channel_type == NL80211_CHAN_HT20)
2153 cmd->channel_flags |= cpu_to_le32(0x00000080);
2154 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2155 cmd->channel_flags |= cpu_to_le32(0x000001900);
2156 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2157 cmd->channel_flags |= cpu_to_le32(0x000000900);
2159 rc = mwl8k_post_cmd(hw, &cmd->header);
2168 #define MWL8K_FRAME_PROT_DISABLED 0x00
2169 #define MWL8K_FRAME_PROT_11G 0x07
2170 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2171 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2173 struct mwl8k_cmd_update_set_aid {
2174 struct mwl8k_cmd_pkt header;
2177 /* AP's MAC address (BSSID) */
2178 __u8 bssid[ETH_ALEN];
2179 __le16 protection_mode;
2180 __u8 supp_rates[14];
2181 } __attribute__((packed));
2183 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2189 * Clear nonstandard rates 4 and 13.
2193 for (i = 0, j = 0; i < 14; i++) {
2194 if (mask & (1 << i))
2195 rates[j++] = mwl8k_rates[i].hw_value;
2200 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2201 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2203 struct mwl8k_cmd_update_set_aid *cmd;
2207 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2211 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2212 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2213 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2214 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2216 if (vif->bss_conf.use_cts_prot) {
2217 prot_mode = MWL8K_FRAME_PROT_11G;
2219 switch (vif->bss_conf.ht_operation_mode &
2220 IEEE80211_HT_OP_MODE_PROTECTION) {
2221 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2222 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2224 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2225 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2228 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2232 cmd->protection_mode = cpu_to_le16(prot_mode);
2234 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2236 rc = mwl8k_post_cmd(hw, &cmd->header);
2245 struct mwl8k_cmd_set_rate {
2246 struct mwl8k_cmd_pkt header;
2247 __u8 legacy_rates[14];
2249 /* Bitmap for supported MCS codes. */
2252 } __attribute__((packed));
2255 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2256 u32 legacy_rate_mask, u8 *mcs_rates)
2258 struct mwl8k_cmd_set_rate *cmd;
2261 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2265 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2266 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2267 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2268 memcpy(cmd->mcs_set, mcs_rates, 16);
2270 rc = mwl8k_post_cmd(hw, &cmd->header);
2277 * CMD_FINALIZE_JOIN.
2279 #define MWL8K_FJ_BEACON_MAXLEN 128
2281 struct mwl8k_cmd_finalize_join {
2282 struct mwl8k_cmd_pkt header;
2283 __le32 sleep_interval; /* Number of beacon periods to sleep */
2284 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2285 } __attribute__((packed));
2287 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2288 int framelen, int dtim)
2290 struct mwl8k_cmd_finalize_join *cmd;
2291 struct ieee80211_mgmt *payload = frame;
2295 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2299 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2300 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2301 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2303 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2304 if (payload_len < 0)
2306 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2307 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2309 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2311 rc = mwl8k_post_cmd(hw, &cmd->header);
2318 * CMD_SET_RTS_THRESHOLD.
2320 struct mwl8k_cmd_set_rts_threshold {
2321 struct mwl8k_cmd_pkt header;
2324 } __attribute__((packed));
2327 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2329 struct mwl8k_cmd_set_rts_threshold *cmd;
2332 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2336 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2337 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2338 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2339 cmd->threshold = cpu_to_le16(rts_thresh);
2341 rc = mwl8k_post_cmd(hw, &cmd->header);
2350 struct mwl8k_cmd_set_slot {
2351 struct mwl8k_cmd_pkt header;
2354 } __attribute__((packed));
2356 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2358 struct mwl8k_cmd_set_slot *cmd;
2361 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2365 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2366 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2367 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2368 cmd->short_slot = short_slot_time;
2370 rc = mwl8k_post_cmd(hw, &cmd->header);
2377 * CMD_SET_EDCA_PARAMS.
2379 struct mwl8k_cmd_set_edca_params {
2380 struct mwl8k_cmd_pkt header;
2382 /* See MWL8K_SET_EDCA_XXX below */
2385 /* TX opportunity in units of 32 us */
2390 /* Log exponent of max contention period: 0...15 */
2393 /* Log exponent of min contention period: 0...15 */
2396 /* Adaptive interframe spacing in units of 32us */
2399 /* TX queue to configure */
2403 /* Log exponent of max contention period: 0...15 */
2406 /* Log exponent of min contention period: 0...15 */
2409 /* Adaptive interframe spacing in units of 32us */
2412 /* TX queue to configure */
2416 } __attribute__((packed));
2418 #define MWL8K_SET_EDCA_CW 0x01
2419 #define MWL8K_SET_EDCA_TXOP 0x02
2420 #define MWL8K_SET_EDCA_AIFS 0x04
2422 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2423 MWL8K_SET_EDCA_TXOP | \
2424 MWL8K_SET_EDCA_AIFS)
2427 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2428 __u16 cw_min, __u16 cw_max,
2429 __u8 aifs, __u16 txop)
2431 struct mwl8k_priv *priv = hw->priv;
2432 struct mwl8k_cmd_set_edca_params *cmd;
2435 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2439 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2440 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2441 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2442 cmd->txop = cpu_to_le16(txop);
2444 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2445 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2446 cmd->ap.aifs = aifs;
2449 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2450 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2451 cmd->sta.aifs = aifs;
2452 cmd->sta.txq = qnum;
2455 rc = mwl8k_post_cmd(hw, &cmd->header);
2464 struct mwl8k_cmd_set_wmm_mode {
2465 struct mwl8k_cmd_pkt header;
2467 } __attribute__((packed));
2469 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2471 struct mwl8k_priv *priv = hw->priv;
2472 struct mwl8k_cmd_set_wmm_mode *cmd;
2475 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2479 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2480 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2481 cmd->action = cpu_to_le16(!!enable);
2483 rc = mwl8k_post_cmd(hw, &cmd->header);
2487 priv->wmm_enabled = enable;
2495 struct mwl8k_cmd_mimo_config {
2496 struct mwl8k_cmd_pkt header;
2498 __u8 rx_antenna_map;
2499 __u8 tx_antenna_map;
2500 } __attribute__((packed));
2502 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2504 struct mwl8k_cmd_mimo_config *cmd;
2507 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2511 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2512 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2513 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2514 cmd->rx_antenna_map = rx;
2515 cmd->tx_antenna_map = tx;
2517 rc = mwl8k_post_cmd(hw, &cmd->header);
2524 * CMD_USE_FIXED_RATE (STA version).
2526 struct mwl8k_cmd_use_fixed_rate_sta {
2527 struct mwl8k_cmd_pkt header;
2529 __le32 allow_rate_drop;
2533 __le32 enable_retry;
2540 } __attribute__((packed));
2542 #define MWL8K_USE_AUTO_RATE 0x0002
2543 #define MWL8K_UCAST_RATE 0
2545 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2547 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2550 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2554 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2555 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2556 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2557 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2559 rc = mwl8k_post_cmd(hw, &cmd->header);
2566 * CMD_USE_FIXED_RATE (AP version).
2568 struct mwl8k_cmd_use_fixed_rate_ap {
2569 struct mwl8k_cmd_pkt header;
2571 __le32 allow_rate_drop;
2573 struct mwl8k_rate_entry_ap {
2575 __le32 enable_retry;
2580 u8 multicast_rate_type;
2582 } __attribute__((packed));
2585 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2587 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2590 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2594 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2595 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2596 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2597 cmd->multicast_rate = mcast;
2598 cmd->management_rate = mgmt;
2600 rc = mwl8k_post_cmd(hw, &cmd->header);
2607 * CMD_ENABLE_SNIFFER.
2609 struct mwl8k_cmd_enable_sniffer {
2610 struct mwl8k_cmd_pkt header;
2612 } __attribute__((packed));
2614 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2616 struct mwl8k_cmd_enable_sniffer *cmd;
2619 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2623 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2624 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2625 cmd->action = cpu_to_le32(!!enable);
2627 rc = mwl8k_post_cmd(hw, &cmd->header);
2636 struct mwl8k_cmd_set_mac_addr {
2637 struct mwl8k_cmd_pkt header;
2641 __u8 mac_addr[ETH_ALEN];
2643 __u8 mac_addr[ETH_ALEN];
2645 } __attribute__((packed));
2647 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2648 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2650 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
2652 struct mwl8k_priv *priv = hw->priv;
2653 struct mwl8k_cmd_set_mac_addr *cmd;
2656 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2660 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2661 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2663 cmd->mbss.mac_type = cpu_to_le16(MWL8K_MAC_TYPE_PRIMARY_AP);
2664 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2666 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2669 rc = mwl8k_post_cmd(hw, &cmd->header);
2676 * CMD_SET_RATEADAPT_MODE.
2678 struct mwl8k_cmd_set_rate_adapt_mode {
2679 struct mwl8k_cmd_pkt header;
2682 } __attribute__((packed));
2684 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2686 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2689 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2693 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2694 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2695 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2696 cmd->mode = cpu_to_le16(mode);
2698 rc = mwl8k_post_cmd(hw, &cmd->header);
2707 struct mwl8k_cmd_bss_start {
2708 struct mwl8k_cmd_pkt header;
2710 } __attribute__((packed));
2712 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, int enable)
2714 struct mwl8k_cmd_bss_start *cmd;
2717 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2721 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2722 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2723 cmd->enable = cpu_to_le32(enable);
2725 rc = mwl8k_post_cmd(hw, &cmd->header);
2734 struct mwl8k_cmd_set_new_stn {
2735 struct mwl8k_cmd_pkt header;
2741 __le32 legacy_rates;
2744 __le16 ht_capabilities_info;
2745 __u8 mac_ht_param_info;
2747 __u8 control_channel;
2754 } __attribute__((packed));
2756 #define MWL8K_STA_ACTION_ADD 0
2757 #define MWL8K_STA_ACTION_REMOVE 2
2759 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2760 struct ieee80211_vif *vif,
2761 struct ieee80211_sta *sta)
2763 struct mwl8k_cmd_set_new_stn *cmd;
2766 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2770 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2771 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2772 cmd->aid = cpu_to_le16(sta->aid);
2773 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2774 cmd->stn_id = cpu_to_le16(sta->aid);
2775 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2776 cmd->legacy_rates = cpu_to_le32(sta->supp_rates[IEEE80211_BAND_2GHZ]);
2777 if (sta->ht_cap.ht_supported) {
2778 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2779 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2780 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2781 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2782 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2783 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2784 ((sta->ht_cap.ampdu_density & 7) << 2);
2785 cmd->is_qos_sta = 1;
2788 rc = mwl8k_post_cmd(hw, &cmd->header);
2794 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2795 struct ieee80211_vif *vif)
2797 struct mwl8k_cmd_set_new_stn *cmd;
2800 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2804 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2805 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2806 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
2808 rc = mwl8k_post_cmd(hw, &cmd->header);
2814 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
2815 struct ieee80211_vif *vif, u8 *addr)
2817 struct mwl8k_cmd_set_new_stn *cmd;
2820 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2824 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2825 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2826 memcpy(cmd->mac_addr, addr, ETH_ALEN);
2827 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
2829 rc = mwl8k_post_cmd(hw, &cmd->header);
2838 struct ewc_ht_info {
2842 } __attribute__((packed));
2844 struct peer_capability_info {
2845 /* Peer type - AP vs. STA. */
2848 /* Basic 802.11 capabilities from assoc resp. */
2851 /* Set if peer supports 802.11n high throughput (HT). */
2854 /* Valid if HT is supported. */
2856 __u8 extended_ht_caps;
2857 struct ewc_ht_info ewc_info;
2859 /* Legacy rate table. Intersection of our rates and peer rates. */
2860 __u8 legacy_rates[12];
2862 /* HT rate table. Intersection of our rates and peer rates. */
2866 /* If set, interoperability mode, no proprietary extensions. */
2870 __le16 amsdu_enabled;
2871 } __attribute__((packed));
2873 struct mwl8k_cmd_update_stadb {
2874 struct mwl8k_cmd_pkt header;
2876 /* See STADB_ACTION_TYPE */
2879 /* Peer MAC address */
2880 __u8 peer_addr[ETH_ALEN];
2884 /* Peer info - valid during add/update. */
2885 struct peer_capability_info peer_info;
2886 } __attribute__((packed));
2888 #define MWL8K_STA_DB_MODIFY_ENTRY 1
2889 #define MWL8K_STA_DB_DEL_ENTRY 2
2891 /* Peer Entry flags - used to define the type of the peer node */
2892 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
2894 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
2895 struct ieee80211_vif *vif,
2896 struct ieee80211_sta *sta)
2898 struct mwl8k_cmd_update_stadb *cmd;
2899 struct peer_capability_info *p;
2902 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2906 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2907 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2908 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
2909 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
2911 p = &cmd->peer_info;
2912 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2913 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
2914 p->ht_support = sta->ht_cap.ht_supported;
2915 p->ht_caps = sta->ht_cap.cap;
2916 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
2917 ((sta->ht_cap.ampdu_density & 7) << 2);
2918 legacy_rate_mask_to_array(p->legacy_rates,
2919 sta->supp_rates[IEEE80211_BAND_2GHZ]);
2920 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
2922 p->amsdu_enabled = 0;
2924 rc = mwl8k_post_cmd(hw, &cmd->header);
2927 return rc ? rc : p->station_id;
2930 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
2931 struct ieee80211_vif *vif, u8 *addr)
2933 struct mwl8k_cmd_update_stadb *cmd;
2936 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2940 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2941 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2942 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
2943 memcpy(cmd->peer_addr, addr, ETH_ALEN);
2945 rc = mwl8k_post_cmd(hw, &cmd->header);
2953 * Interrupt handling.
2955 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2957 struct ieee80211_hw *hw = dev_id;
2958 struct mwl8k_priv *priv = hw->priv;
2961 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2965 if (status & MWL8K_A2H_INT_TX_DONE) {
2966 status &= ~MWL8K_A2H_INT_TX_DONE;
2967 tasklet_schedule(&priv->poll_tx_task);
2970 if (status & MWL8K_A2H_INT_RX_READY) {
2971 status &= ~MWL8K_A2H_INT_RX_READY;
2972 tasklet_schedule(&priv->poll_rx_task);
2976 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2978 if (status & MWL8K_A2H_INT_OPC_DONE) {
2979 if (priv->hostcmd_wait != NULL)
2980 complete(priv->hostcmd_wait);
2983 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2984 if (!mutex_is_locked(&priv->fw_mutex) &&
2985 priv->radio_on && priv->pending_tx_pkts)
2986 mwl8k_tx_start(priv);
2992 static void mwl8k_tx_poll(unsigned long data)
2994 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
2995 struct mwl8k_priv *priv = hw->priv;
3001 spin_lock_bh(&priv->tx_lock);
3003 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3004 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3006 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3007 complete(priv->tx_wait);
3008 priv->tx_wait = NULL;
3011 spin_unlock_bh(&priv->tx_lock);
3014 writel(~MWL8K_A2H_INT_TX_DONE,
3015 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3017 tasklet_schedule(&priv->poll_tx_task);
3021 static void mwl8k_rx_poll(unsigned long data)
3023 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3024 struct mwl8k_priv *priv = hw->priv;
3028 limit -= rxq_process(hw, 0, limit);
3029 limit -= rxq_refill(hw, 0, limit);
3032 writel(~MWL8K_A2H_INT_RX_READY,
3033 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3035 tasklet_schedule(&priv->poll_rx_task);
3041 * Core driver operations.
3043 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3045 struct mwl8k_priv *priv = hw->priv;
3046 int index = skb_get_queue_mapping(skb);
3049 if (!priv->radio_on) {
3050 printk(KERN_DEBUG "%s: dropped TX frame since radio "
3051 "disabled\n", wiphy_name(hw->wiphy));
3053 return NETDEV_TX_OK;
3056 rc = mwl8k_txq_xmit(hw, index, skb);
3061 static int mwl8k_start(struct ieee80211_hw *hw)
3063 struct mwl8k_priv *priv = hw->priv;
3066 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3067 IRQF_SHARED, MWL8K_NAME, hw);
3069 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3070 wiphy_name(hw->wiphy));
3074 /* Enable TX reclaim and RX tasklets. */
3075 tasklet_enable(&priv->poll_tx_task);
3076 tasklet_enable(&priv->poll_rx_task);
3078 /* Enable interrupts */
3079 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3081 rc = mwl8k_fw_lock(hw);
3083 rc = mwl8k_cmd_radio_enable(hw);
3087 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3090 rc = mwl8k_cmd_set_pre_scan(hw);
3093 rc = mwl8k_cmd_set_post_scan(hw,
3094 "\x00\x00\x00\x00\x00\x00");
3098 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3101 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3103 mwl8k_fw_unlock(hw);
3107 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3108 free_irq(priv->pdev->irq, hw);
3109 tasklet_disable(&priv->poll_tx_task);
3110 tasklet_disable(&priv->poll_rx_task);
3116 static void mwl8k_stop(struct ieee80211_hw *hw)
3118 struct mwl8k_priv *priv = hw->priv;
3121 mwl8k_cmd_radio_disable(hw);
3123 ieee80211_stop_queues(hw);
3125 /* Disable interrupts */
3126 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3127 free_irq(priv->pdev->irq, hw);
3129 /* Stop finalize join worker */
3130 cancel_work_sync(&priv->finalize_join_worker);
3131 if (priv->beacon_skb != NULL)
3132 dev_kfree_skb(priv->beacon_skb);
3134 /* Stop TX reclaim and RX tasklets. */
3135 tasklet_disable(&priv->poll_tx_task);
3136 tasklet_disable(&priv->poll_rx_task);
3138 /* Return all skbs to mac80211 */
3139 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3140 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3143 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3144 struct ieee80211_vif *vif)
3146 struct mwl8k_priv *priv = hw->priv;
3147 struct mwl8k_vif *mwl8k_vif;
3150 * We only support one active interface at a time.
3152 if (priv->vif != NULL)
3156 * Reject interface creation if sniffer mode is active, as
3157 * STA operation is mutually exclusive with hardware sniffer
3158 * mode. (Sniffer mode is only used on STA firmware.)
3160 if (priv->sniffer_enabled) {
3161 printk(KERN_INFO "%s: unable to create STA "
3162 "interface due to sniffer mode being enabled\n",
3163 wiphy_name(hw->wiphy));
3167 /* Set the mac address. */
3168 mwl8k_cmd_set_mac_addr(hw, vif->addr);
3171 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3173 /* Clean out driver private area */
3174 mwl8k_vif = MWL8K_VIF(vif);
3175 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3177 /* Set Initial sequence number to zero */
3178 mwl8k_vif->seqno = 0;
3185 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3186 struct ieee80211_vif *vif)
3188 struct mwl8k_priv *priv = hw->priv;
3191 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3193 mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3198 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3200 struct ieee80211_conf *conf = &hw->conf;
3201 struct mwl8k_priv *priv = hw->priv;
3204 if (conf->flags & IEEE80211_CONF_IDLE) {
3205 mwl8k_cmd_radio_disable(hw);
3209 rc = mwl8k_fw_lock(hw);
3213 rc = mwl8k_cmd_radio_enable(hw);
3217 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3221 if (conf->power_level > 18)
3222 conf->power_level = 18;
3223 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3228 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3230 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3232 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3236 mwl8k_fw_unlock(hw);
3242 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3243 struct ieee80211_bss_conf *info, u32 changed)
3245 struct mwl8k_priv *priv = hw->priv;
3246 u32 ap_legacy_rates;
3247 u8 ap_mcs_rates[16];
3250 if (mwl8k_fw_lock(hw))
3254 * No need to capture a beacon if we're no longer associated.
3256 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3257 priv->capture_beacon = false;
3260 * Get the AP's legacy and MCS rates.
3262 if (vif->bss_conf.assoc) {
3263 struct ieee80211_sta *ap;
3267 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3273 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3274 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3279 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3280 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3284 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3289 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3290 rc = mwl8k_set_radio_preamble(hw,
3291 vif->bss_conf.use_short_preamble);
3296 if (changed & BSS_CHANGED_ERP_SLOT) {
3297 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3302 if (vif->bss_conf.assoc &&
3303 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3305 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3310 if (vif->bss_conf.assoc &&
3311 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3313 * Finalize the join. Tell rx handler to process
3314 * next beacon from our BSSID.
3316 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3317 priv->capture_beacon = true;
3321 mwl8k_fw_unlock(hw);
3325 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3326 struct ieee80211_bss_conf *info, u32 changed)
3330 if (mwl8k_fw_lock(hw))
3333 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3334 rc = mwl8k_set_radio_preamble(hw,
3335 vif->bss_conf.use_short_preamble);
3340 if (changed & BSS_CHANGED_BASIC_RATES) {
3345 * Use lowest supported basic rate for multicasts
3346 * and management frames (such as probe responses --
3347 * beacons will always go out at 1 Mb/s).
3349 idx = ffs(vif->bss_conf.basic_rates);
3350 rate = idx ? mwl8k_rates[idx - 1].hw_value : 2;
3352 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3355 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3356 struct sk_buff *skb;
3358 skb = ieee80211_beacon_get(hw, vif);
3360 mwl8k_cmd_set_beacon(hw, skb->data, skb->len);
3365 if (changed & BSS_CHANGED_BEACON_ENABLED)
3366 mwl8k_cmd_bss_start(hw, info->enable_beacon);
3369 mwl8k_fw_unlock(hw);
3373 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3374 struct ieee80211_bss_conf *info, u32 changed)
3376 struct mwl8k_priv *priv = hw->priv;
3379 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3381 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3384 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3385 int mc_count, struct dev_addr_list *mclist)
3387 struct mwl8k_cmd_pkt *cmd;
3390 * Synthesize and return a command packet that programs the
3391 * hardware multicast address filter. At this point we don't
3392 * know whether FIF_ALLMULTI is being requested, but if it is,
3393 * we'll end up throwing this packet away and creating a new
3394 * one in mwl8k_configure_filter().
3396 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3398 return (unsigned long)cmd;
3402 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3403 unsigned int changed_flags,
3404 unsigned int *total_flags)
3406 struct mwl8k_priv *priv = hw->priv;
3409 * Hardware sniffer mode is mutually exclusive with STA
3410 * operation, so refuse to enable sniffer mode if a STA
3411 * interface is active.
3413 if (priv->vif != NULL) {
3414 if (net_ratelimit())
3415 printk(KERN_INFO "%s: not enabling sniffer "
3416 "mode because STA interface is active\n",
3417 wiphy_name(hw->wiphy));
3421 if (!priv->sniffer_enabled) {
3422 if (mwl8k_cmd_enable_sniffer(hw, 1))
3424 priv->sniffer_enabled = true;
3427 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3428 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3434 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3435 unsigned int changed_flags,
3436 unsigned int *total_flags,
3439 struct mwl8k_priv *priv = hw->priv;
3440 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3443 * AP firmware doesn't allow fine-grained control over
3444 * the receive filter.
3447 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3453 * Enable hardware sniffer mode if FIF_CONTROL or
3454 * FIF_OTHER_BSS is requested.
3456 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3457 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3462 /* Clear unsupported feature flags */
3463 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3465 if (mwl8k_fw_lock(hw)) {
3470 if (priv->sniffer_enabled) {
3471 mwl8k_cmd_enable_sniffer(hw, 0);
3472 priv->sniffer_enabled = false;
3475 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3476 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3478 * Disable the BSS filter.
3480 mwl8k_cmd_set_pre_scan(hw);
3485 * Enable the BSS filter.
3487 * If there is an active STA interface, use that
3488 * interface's BSSID, otherwise use a dummy one
3489 * (where the OUI part needs to be nonzero for
3490 * the BSSID to be accepted by POST_SCAN).
3492 bssid = "\x01\x00\x00\x00\x00\x00";
3493 if (priv->vif != NULL)
3494 bssid = priv->vif->bss_conf.bssid;
3496 mwl8k_cmd_set_post_scan(hw, bssid);
3501 * If FIF_ALLMULTI is being requested, throw away the command
3502 * packet that ->prepare_multicast() built and replace it with
3503 * a command packet that enables reception of all multicast
3506 if (*total_flags & FIF_ALLMULTI) {
3508 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3512 mwl8k_post_cmd(hw, cmd);
3516 mwl8k_fw_unlock(hw);
3519 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3521 return mwl8k_cmd_set_rts_threshold(hw, value);
3524 struct mwl8k_sta_notify_item
3526 struct list_head list;
3527 struct ieee80211_vif *vif;
3528 enum sta_notify_cmd cmd;
3529 struct ieee80211_sta sta;
3533 mwl8k_do_sta_notify(struct ieee80211_hw *hw, struct mwl8k_sta_notify_item *s)
3535 struct mwl8k_priv *priv = hw->priv;
3538 * STA firmware uses UPDATE_STADB, AP firmware uses SET_NEW_STN.
3540 if (!priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3543 rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
3545 struct ieee80211_sta *sta;
3548 sta = ieee80211_find_sta(s->vif, s->sta.addr);
3550 MWL8K_STA(sta)->peer_id = rc;
3553 } else if (!priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3554 mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
3555 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3556 mwl8k_cmd_set_new_stn_add(hw, s->vif, &s->sta);
3557 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3558 mwl8k_cmd_set_new_stn_del(hw, s->vif, s->sta.addr);
3562 static void mwl8k_sta_notify_worker(struct work_struct *work)
3564 struct mwl8k_priv *priv =
3565 container_of(work, struct mwl8k_priv, sta_notify_worker);
3566 struct ieee80211_hw *hw = priv->hw;
3568 spin_lock_bh(&priv->sta_notify_list_lock);
3569 while (!list_empty(&priv->sta_notify_list)) {
3570 struct mwl8k_sta_notify_item *s;
3572 s = list_entry(priv->sta_notify_list.next,
3573 struct mwl8k_sta_notify_item, list);
3576 spin_unlock_bh(&priv->sta_notify_list_lock);
3578 mwl8k_do_sta_notify(hw, s);
3581 spin_lock_bh(&priv->sta_notify_list_lock);
3583 spin_unlock_bh(&priv->sta_notify_list_lock);
3587 mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3588 enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
3590 struct mwl8k_priv *priv = hw->priv;
3591 struct mwl8k_sta_notify_item *s;
3593 if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
3596 s = kmalloc(sizeof(*s), GFP_ATOMIC);
3602 spin_lock(&priv->sta_notify_list_lock);
3603 list_add_tail(&s->list, &priv->sta_notify_list);
3604 spin_unlock(&priv->sta_notify_list_lock);
3606 ieee80211_queue_work(hw, &priv->sta_notify_worker);
3610 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3611 const struct ieee80211_tx_queue_params *params)
3613 struct mwl8k_priv *priv = hw->priv;
3616 rc = mwl8k_fw_lock(hw);
3618 if (!priv->wmm_enabled)
3619 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3622 rc = mwl8k_cmd_set_edca_params(hw, queue,
3628 mwl8k_fw_unlock(hw);
3634 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3635 struct ieee80211_tx_queue_stats *stats)
3637 struct mwl8k_priv *priv = hw->priv;
3638 struct mwl8k_tx_queue *txq;
3641 spin_lock_bh(&priv->tx_lock);
3642 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3643 txq = priv->txq + index;
3644 memcpy(&stats[index], &txq->stats,
3645 sizeof(struct ieee80211_tx_queue_stats));
3647 spin_unlock_bh(&priv->tx_lock);
3652 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3653 struct ieee80211_low_level_stats *stats)
3655 return mwl8k_cmd_get_stat(hw, stats);
3659 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3660 enum ieee80211_ampdu_mlme_action action,
3661 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3664 case IEEE80211_AMPDU_RX_START:
3665 case IEEE80211_AMPDU_RX_STOP:
3666 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3674 static const struct ieee80211_ops mwl8k_ops = {
3676 .start = mwl8k_start,
3678 .add_interface = mwl8k_add_interface,
3679 .remove_interface = mwl8k_remove_interface,
3680 .config = mwl8k_config,
3681 .bss_info_changed = mwl8k_bss_info_changed,
3682 .prepare_multicast = mwl8k_prepare_multicast,
3683 .configure_filter = mwl8k_configure_filter,
3684 .set_rts_threshold = mwl8k_set_rts_threshold,
3685 .sta_notify = mwl8k_sta_notify,
3686 .conf_tx = mwl8k_conf_tx,
3687 .get_tx_stats = mwl8k_get_tx_stats,
3688 .get_stats = mwl8k_get_stats,
3689 .ampdu_action = mwl8k_ampdu_action,
3692 static void mwl8k_finalize_join_worker(struct work_struct *work)
3694 struct mwl8k_priv *priv =
3695 container_of(work, struct mwl8k_priv, finalize_join_worker);
3696 struct sk_buff *skb = priv->beacon_skb;
3698 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
3699 priv->vif->bss_conf.dtim_period);
3702 priv->beacon_skb = NULL;
3711 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3713 .part_name = "88w8363",
3714 .helper_image = "mwl8k/helper_8363.fw",
3715 .fw_image = "mwl8k/fmimage_8363.fw",
3718 .part_name = "88w8687",
3719 .helper_image = "mwl8k/helper_8687.fw",
3720 .fw_image = "mwl8k/fmimage_8687.fw",
3723 .part_name = "88w8366",
3724 .helper_image = "mwl8k/helper_8366.fw",
3725 .fw_image = "mwl8k/fmimage_8366.fw",
3726 .ap_rxd_ops = &rxd_8366_ap_ops,
3730 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
3731 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
3732 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
3733 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
3734 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
3735 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
3737 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3738 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3739 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3740 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3741 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3742 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3743 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
3746 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3748 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3749 const struct pci_device_id *id)
3751 static int printed_version = 0;
3752 struct ieee80211_hw *hw;
3753 struct mwl8k_priv *priv;
3757 if (!printed_version) {
3758 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3759 printed_version = 1;
3763 rc = pci_enable_device(pdev);
3765 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3770 rc = pci_request_regions(pdev, MWL8K_NAME);
3772 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3774 goto err_disable_device;
3777 pci_set_master(pdev);
3780 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3782 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3787 SET_IEEE80211_DEV(hw, &pdev->dev);
3788 pci_set_drvdata(pdev, hw);
3793 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3796 priv->sram = pci_iomap(pdev, 0, 0x10000);
3797 if (priv->sram == NULL) {
3798 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3799 wiphy_name(hw->wiphy));
3804 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3805 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3807 priv->regs = pci_iomap(pdev, 1, 0x10000);
3808 if (priv->regs == NULL) {
3809 priv->regs = pci_iomap(pdev, 2, 0x10000);
3810 if (priv->regs == NULL) {
3811 printk(KERN_ERR "%s: Cannot map device registers\n",
3812 wiphy_name(hw->wiphy));
3818 /* Reset firmware and hardware */
3819 mwl8k_hw_reset(priv);
3821 /* Ask userland hotplug daemon for the device firmware */
3822 rc = mwl8k_request_firmware(priv);
3824 printk(KERN_ERR "%s: Firmware files not found\n",
3825 wiphy_name(hw->wiphy));
3826 goto err_stop_firmware;
3829 /* Load firmware into hardware */
3830 rc = mwl8k_load_firmware(hw);
3832 printk(KERN_ERR "%s: Cannot start firmware\n",
3833 wiphy_name(hw->wiphy));
3834 goto err_stop_firmware;
3837 /* Reclaim memory once firmware is successfully loaded */
3838 mwl8k_release_firmware(priv);
3842 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3843 if (priv->rxd_ops == NULL) {
3844 printk(KERN_ERR "%s: Driver does not have AP "
3845 "firmware image support for this hardware\n",
3846 wiphy_name(hw->wiphy));
3847 goto err_stop_firmware;
3850 priv->rxd_ops = &rxd_sta_ops;
3853 priv->sniffer_enabled = false;
3854 priv->wmm_enabled = false;
3855 priv->pending_tx_pkts = 0;
3858 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3859 priv->band.band = IEEE80211_BAND_2GHZ;
3860 priv->band.channels = priv->channels;
3861 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3862 priv->band.bitrates = priv->rates;
3863 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3864 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3866 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3867 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3870 * Extra headroom is the size of the required DMA header
3871 * minus the size of the smallest 802.11 frame (CTS frame).
3873 hw->extra_tx_headroom =
3874 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3876 hw->channel_change_time = 10;
3878 hw->queues = MWL8K_TX_QUEUES;
3880 /* Set rssi and noise values to dBm */
3881 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3882 hw->vif_data_size = sizeof(struct mwl8k_vif);
3883 hw->sta_data_size = sizeof(struct mwl8k_sta);
3886 /* Set default radio state and preamble */
3888 priv->radio_short_preamble = 0;
3890 /* Station database handling */
3891 INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
3892 spin_lock_init(&priv->sta_notify_list_lock);
3893 INIT_LIST_HEAD(&priv->sta_notify_list);
3895 /* Finalize join worker */
3896 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3898 /* TX reclaim and RX tasklets. */
3899 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
3900 tasklet_disable(&priv->poll_tx_task);
3901 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
3902 tasklet_disable(&priv->poll_rx_task);
3904 /* Power management cookie */
3905 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3906 if (priv->cookie == NULL)
3907 goto err_stop_firmware;
3909 rc = mwl8k_rxq_init(hw, 0);
3911 goto err_free_cookie;
3912 rxq_refill(hw, 0, INT_MAX);
3914 mutex_init(&priv->fw_mutex);
3915 priv->fw_mutex_owner = NULL;
3916 priv->fw_mutex_depth = 0;
3917 priv->hostcmd_wait = NULL;
3919 spin_lock_init(&priv->tx_lock);
3921 priv->tx_wait = NULL;
3923 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3924 rc = mwl8k_txq_init(hw, i);
3926 goto err_free_queues;
3929 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3930 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3931 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
3932 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3933 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3935 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3936 IRQF_SHARED, MWL8K_NAME, hw);
3938 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3939 wiphy_name(hw->wiphy));
3940 goto err_free_queues;
3944 * Temporarily enable interrupts. Initial firmware host
3945 * commands use interrupts and avoid polling. Disable
3946 * interrupts when done.
3948 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3950 /* Get config data, mac addrs etc */
3952 rc = mwl8k_cmd_get_hw_spec_ap(hw);
3954 rc = mwl8k_cmd_set_hw_spec(hw);
3956 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_AP);
3958 rc = mwl8k_cmd_get_hw_spec_sta(hw);
3960 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3963 printk(KERN_ERR "%s: Cannot initialise firmware\n",
3964 wiphy_name(hw->wiphy));
3968 /* Turn radio off */
3969 rc = mwl8k_cmd_radio_disable(hw);
3971 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3975 /* Clear MAC address */
3976 rc = mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3978 printk(KERN_ERR "%s: Cannot clear MAC address\n",
3979 wiphy_name(hw->wiphy));
3983 /* Disable interrupts */
3984 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3985 free_irq(priv->pdev->irq, hw);
3987 rc = ieee80211_register_hw(hw);
3989 printk(KERN_ERR "%s: Cannot register device\n",
3990 wiphy_name(hw->wiphy));
3991 goto err_free_queues;
3994 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3995 wiphy_name(hw->wiphy), priv->device_info->part_name,
3996 priv->hw_rev, hw->wiphy->perm_addr,
3997 priv->ap_fw ? "AP" : "STA",
3998 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
3999 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4004 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4005 free_irq(priv->pdev->irq, hw);
4008 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4009 mwl8k_txq_deinit(hw, i);
4010 mwl8k_rxq_deinit(hw, 0);
4013 if (priv->cookie != NULL)
4014 pci_free_consistent(priv->pdev, 4,
4015 priv->cookie, priv->cookie_dma);
4018 mwl8k_hw_reset(priv);
4019 mwl8k_release_firmware(priv);
4022 if (priv->regs != NULL)
4023 pci_iounmap(pdev, priv->regs);
4025 if (priv->sram != NULL)
4026 pci_iounmap(pdev, priv->sram);
4028 pci_set_drvdata(pdev, NULL);
4029 ieee80211_free_hw(hw);
4032 pci_release_regions(pdev);
4035 pci_disable_device(pdev);
4040 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4042 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4045 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4047 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4048 struct mwl8k_priv *priv;
4055 ieee80211_stop_queues(hw);
4057 ieee80211_unregister_hw(hw);
4059 /* Remove TX reclaim and RX tasklets. */
4060 tasklet_kill(&priv->poll_tx_task);
4061 tasklet_kill(&priv->poll_rx_task);
4064 mwl8k_hw_reset(priv);
4066 /* Return all skbs to mac80211 */
4067 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4068 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4070 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4071 mwl8k_txq_deinit(hw, i);
4073 mwl8k_rxq_deinit(hw, 0);
4075 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4077 pci_iounmap(pdev, priv->regs);
4078 pci_iounmap(pdev, priv->sram);
4079 pci_set_drvdata(pdev, NULL);
4080 ieee80211_free_hw(hw);
4081 pci_release_regions(pdev);
4082 pci_disable_device(pdev);
4085 static struct pci_driver mwl8k_driver = {
4087 .id_table = mwl8k_pci_id_table,
4088 .probe = mwl8k_probe,
4089 .remove = __devexit_p(mwl8k_remove),
4090 .shutdown = __devexit_p(mwl8k_shutdown),
4093 static int __init mwl8k_init(void)
4095 return pci_register_driver(&mwl8k_driver);
4098 static void __exit mwl8k_exit(void)
4100 pci_unregister_driver(&mwl8k_driver);
4103 module_init(mwl8k_init);
4104 module_exit(mwl8k_exit);
4106 MODULE_DESCRIPTION(MWL8K_DESC);
4107 MODULE_VERSION(MWL8K_VERSION);
4108 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4109 MODULE_LICENSE("GPL");