2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.11"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
91 struct mwl8k_device_info {
95 struct rxd_ops *ap_rxd_ops;
98 struct mwl8k_rx_queue {
101 /* hw receives here */
104 /* refill descs here */
111 DECLARE_PCI_UNMAP_ADDR(dma)
115 struct mwl8k_tx_queue {
116 /* hw transmits here */
119 /* sw appends here */
122 struct ieee80211_tx_queue_stats stats;
123 struct mwl8k_tx_desc *txd;
125 struct sk_buff **skb;
129 struct ieee80211_hw *hw;
130 struct pci_dev *pdev;
132 struct mwl8k_device_info *device_info;
138 struct firmware *fw_helper;
139 struct firmware *fw_ucode;
141 /* hardware/firmware parameters */
143 struct rxd_ops *rxd_ops;
145 /* firmware access */
146 struct mutex fw_mutex;
147 struct task_struct *fw_mutex_owner;
149 struct completion *hostcmd_wait;
151 /* lock held over TX and TX reap */
154 /* TX quiesce completion, protected by fw_mutex and tx_lock */
155 struct completion *tx_wait;
157 struct ieee80211_vif *vif;
159 struct ieee80211_channel *current_channel;
161 /* power management status cookie from firmware */
163 dma_addr_t cookie_dma;
170 * Running count of TX packets in flight, to avoid
171 * iterating over the transmit rings each time.
175 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
176 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
179 struct ieee80211_supported_band band;
180 struct ieee80211_channel channels[14];
181 struct ieee80211_rate rates[14];
184 bool radio_short_preamble;
185 bool sniffer_enabled;
188 struct work_struct sta_notify_worker;
189 spinlock_t sta_notify_list_lock;
190 struct list_head sta_notify_list;
192 /* XXX need to convert this to handle multiple interfaces */
194 u8 capture_bssid[ETH_ALEN];
195 struct sk_buff *beacon_skb;
198 * This FJ worker has to be global as it is scheduled from the
199 * RX handler. At this point we don't know which interface it
200 * belongs to until the list of bssids waiting to complete join
203 struct work_struct finalize_join_worker;
205 /* Tasklet to reclaim TX descriptors and buffers after tx */
206 struct tasklet_struct tx_reclaim_task;
209 /* Per interface specific private data */
211 /* Local MAC address. */
212 u8 mac_addr[ETH_ALEN];
214 /* Non AMPDU sequence number assigned by driver */
217 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
220 /* Index into station database. Returned by UPDATE_STADB. */
223 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
225 static const struct ieee80211_channel mwl8k_channels[] = {
226 { .center_freq = 2412, .hw_value = 1, },
227 { .center_freq = 2417, .hw_value = 2, },
228 { .center_freq = 2422, .hw_value = 3, },
229 { .center_freq = 2427, .hw_value = 4, },
230 { .center_freq = 2432, .hw_value = 5, },
231 { .center_freq = 2437, .hw_value = 6, },
232 { .center_freq = 2442, .hw_value = 7, },
233 { .center_freq = 2447, .hw_value = 8, },
234 { .center_freq = 2452, .hw_value = 9, },
235 { .center_freq = 2457, .hw_value = 10, },
236 { .center_freq = 2462, .hw_value = 11, },
237 { .center_freq = 2467, .hw_value = 12, },
238 { .center_freq = 2472, .hw_value = 13, },
239 { .center_freq = 2484, .hw_value = 14, },
242 static const struct ieee80211_rate mwl8k_rates[] = {
243 { .bitrate = 10, .hw_value = 2, },
244 { .bitrate = 20, .hw_value = 4, },
245 { .bitrate = 55, .hw_value = 11, },
246 { .bitrate = 110, .hw_value = 22, },
247 { .bitrate = 220, .hw_value = 44, },
248 { .bitrate = 60, .hw_value = 12, },
249 { .bitrate = 90, .hw_value = 18, },
250 { .bitrate = 120, .hw_value = 24, },
251 { .bitrate = 180, .hw_value = 36, },
252 { .bitrate = 240, .hw_value = 48, },
253 { .bitrate = 360, .hw_value = 72, },
254 { .bitrate = 480, .hw_value = 96, },
255 { .bitrate = 540, .hw_value = 108, },
256 { .bitrate = 720, .hw_value = 144, },
259 /* Set or get info from Firmware */
260 #define MWL8K_CMD_SET 0x0001
261 #define MWL8K_CMD_GET 0x0000
263 /* Firmware command codes */
264 #define MWL8K_CMD_CODE_DNLD 0x0001
265 #define MWL8K_CMD_GET_HW_SPEC 0x0003
266 #define MWL8K_CMD_SET_HW_SPEC 0x0004
267 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
268 #define MWL8K_CMD_GET_STAT 0x0014
269 #define MWL8K_CMD_RADIO_CONTROL 0x001c
270 #define MWL8K_CMD_RF_TX_POWER 0x001e
271 #define MWL8K_CMD_RF_ANTENNA 0x0020
272 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
273 #define MWL8K_CMD_SET_POST_SCAN 0x0108
274 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
275 #define MWL8K_CMD_SET_AID 0x010d
276 #define MWL8K_CMD_SET_RATE 0x0110
277 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
278 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
279 #define MWL8K_CMD_SET_SLOT 0x0114
280 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
281 #define MWL8K_CMD_SET_WMM_MODE 0x0123
282 #define MWL8K_CMD_MIMO_CONFIG 0x0125
283 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
284 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
285 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
286 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
287 #define MWL8K_CMD_UPDATE_STADB 0x1123
289 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
291 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
292 snprintf(buf, bufsize, "%s", #x);\
295 switch (cmd & ~0x8000) {
296 MWL8K_CMDNAME(CODE_DNLD);
297 MWL8K_CMDNAME(GET_HW_SPEC);
298 MWL8K_CMDNAME(SET_HW_SPEC);
299 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
300 MWL8K_CMDNAME(GET_STAT);
301 MWL8K_CMDNAME(RADIO_CONTROL);
302 MWL8K_CMDNAME(RF_TX_POWER);
303 MWL8K_CMDNAME(RF_ANTENNA);
304 MWL8K_CMDNAME(SET_PRE_SCAN);
305 MWL8K_CMDNAME(SET_POST_SCAN);
306 MWL8K_CMDNAME(SET_RF_CHANNEL);
307 MWL8K_CMDNAME(SET_AID);
308 MWL8K_CMDNAME(SET_RATE);
309 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
310 MWL8K_CMDNAME(RTS_THRESHOLD);
311 MWL8K_CMDNAME(SET_SLOT);
312 MWL8K_CMDNAME(SET_EDCA_PARAMS);
313 MWL8K_CMDNAME(SET_WMM_MODE);
314 MWL8K_CMDNAME(MIMO_CONFIG);
315 MWL8K_CMDNAME(USE_FIXED_RATE);
316 MWL8K_CMDNAME(ENABLE_SNIFFER);
317 MWL8K_CMDNAME(SET_MAC_ADDR);
318 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
319 MWL8K_CMDNAME(UPDATE_STADB);
321 snprintf(buf, bufsize, "0x%x", cmd);
328 /* Hardware and firmware reset */
329 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
331 iowrite32(MWL8K_H2A_INT_RESET,
332 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
333 iowrite32(MWL8K_H2A_INT_RESET,
334 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
338 /* Release fw image */
339 static void mwl8k_release_fw(struct firmware **fw)
343 release_firmware(*fw);
347 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
349 mwl8k_release_fw(&priv->fw_ucode);
350 mwl8k_release_fw(&priv->fw_helper);
353 /* Request fw image */
354 static int mwl8k_request_fw(struct mwl8k_priv *priv,
355 const char *fname, struct firmware **fw)
357 /* release current image */
359 mwl8k_release_fw(fw);
361 return request_firmware((const struct firmware **)fw,
362 fname, &priv->pdev->dev);
365 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
367 struct mwl8k_device_info *di = priv->device_info;
370 if (di->helper_image != NULL) {
371 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
373 printk(KERN_ERR "%s: Error requesting helper "
374 "firmware file %s\n", pci_name(priv->pdev),
380 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
382 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
383 pci_name(priv->pdev), di->fw_image);
384 mwl8k_release_fw(&priv->fw_helper);
391 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
392 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
394 struct mwl8k_cmd_pkt {
400 } __attribute__((packed));
406 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
408 void __iomem *regs = priv->regs;
412 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
413 if (pci_dma_mapping_error(priv->pdev, dma_addr))
416 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
417 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
418 iowrite32(MWL8K_H2A_INT_DOORBELL,
419 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
420 iowrite32(MWL8K_H2A_INT_DUMMY,
421 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
427 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
428 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
429 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
437 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
439 return loops ? 0 : -ETIMEDOUT;
442 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
443 const u8 *data, size_t length)
445 struct mwl8k_cmd_pkt *cmd;
449 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
453 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
459 int block_size = length > 256 ? 256 : length;
461 memcpy(cmd->payload, data + done, block_size);
462 cmd->length = cpu_to_le16(block_size);
464 rc = mwl8k_send_fw_load_cmd(priv, cmd,
465 sizeof(*cmd) + block_size);
470 length -= block_size;
475 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
483 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
484 const u8 *data, size_t length)
486 unsigned char *buffer;
487 int may_continue, rc = 0;
488 u32 done, prev_block_size;
490 buffer = kmalloc(1024, GFP_KERNEL);
497 while (may_continue > 0) {
500 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
501 if (block_size & 1) {
505 done += prev_block_size;
506 length -= prev_block_size;
509 if (block_size > 1024 || block_size > length) {
519 if (block_size == 0) {
526 prev_block_size = block_size;
527 memcpy(buffer, data + done, block_size);
529 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
534 if (!rc && length != 0)
542 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
544 struct mwl8k_priv *priv = hw->priv;
545 struct firmware *fw = priv->fw_ucode;
549 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
550 struct firmware *helper = priv->fw_helper;
552 if (helper == NULL) {
553 printk(KERN_ERR "%s: helper image needed but none "
554 "given\n", pci_name(priv->pdev));
558 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
560 printk(KERN_ERR "%s: unable to load firmware "
561 "helper image\n", pci_name(priv->pdev));
566 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
568 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
572 printk(KERN_ERR "%s: unable to load firmware image\n",
573 pci_name(priv->pdev));
577 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
583 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
584 if (ready_code == MWL8K_FWAP_READY) {
587 } else if (ready_code == MWL8K_FWSTA_READY) {
596 return loops ? 0 : -ETIMEDOUT;
600 /* DMA header used by firmware and hardware. */
601 struct mwl8k_dma_data {
603 struct ieee80211_hdr wh;
605 } __attribute__((packed));
607 /* Routines to add/remove DMA header from skb. */
608 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
610 struct mwl8k_dma_data *tr;
613 tr = (struct mwl8k_dma_data *)skb->data;
614 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
616 if (hdrlen != sizeof(tr->wh)) {
617 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
618 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
619 *((__le16 *)(tr->data - 2)) = qos;
621 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
625 if (hdrlen != sizeof(*tr))
626 skb_pull(skb, sizeof(*tr) - hdrlen);
629 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
631 struct ieee80211_hdr *wh;
633 struct mwl8k_dma_data *tr;
636 * Add a firmware DMA header; the firmware requires that we
637 * present a 2-byte payload length followed by a 4-address
638 * header (without QoS field), followed (optionally) by any
639 * WEP/ExtIV header (but only filled in for CCMP).
641 wh = (struct ieee80211_hdr *)skb->data;
643 hdrlen = ieee80211_hdrlen(wh->frame_control);
644 if (hdrlen != sizeof(*tr))
645 skb_push(skb, sizeof(*tr) - hdrlen);
647 if (ieee80211_is_data_qos(wh->frame_control))
650 tr = (struct mwl8k_dma_data *)skb->data;
652 memmove(&tr->wh, wh, hdrlen);
653 if (hdrlen != sizeof(tr->wh))
654 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
657 * Firmware length is the length of the fully formed "802.11
658 * payload". That is, everything except for the 802.11 header.
659 * This includes all crypto material including the MIC.
661 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
666 * Packet reception for 88w8366 AP firmware.
668 struct mwl8k_rxd_8366_ap {
672 __le32 pkt_phys_addr;
673 __le32 next_rxd_phys_addr;
677 __le32 hw_noise_floor_info;
684 } __attribute__((packed));
686 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
687 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
688 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
690 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
692 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
694 struct mwl8k_rxd_8366_ap *rxd = _rxd;
696 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
697 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
700 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
702 struct mwl8k_rxd_8366_ap *rxd = _rxd;
704 rxd->pkt_len = cpu_to_le16(len);
705 rxd->pkt_phys_addr = cpu_to_le32(addr);
711 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
714 struct mwl8k_rxd_8366_ap *rxd = _rxd;
716 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
720 memset(status, 0, sizeof(*status));
722 status->signal = -rxd->rssi;
723 status->noise = -rxd->noise_floor;
725 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
726 status->flag |= RX_FLAG_HT;
727 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
728 status->flag |= RX_FLAG_40MHZ;
729 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
733 for (i = 0; i < ARRAY_SIZE(mwl8k_rates); i++) {
734 if (mwl8k_rates[i].hw_value == rxd->rate) {
735 status->rate_idx = i;
741 status->band = IEEE80211_BAND_2GHZ;
742 status->freq = ieee80211_channel_to_frequency(rxd->channel);
744 *qos = rxd->qos_control;
746 return le16_to_cpu(rxd->pkt_len);
749 static struct rxd_ops rxd_8366_ap_ops = {
750 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
751 .rxd_init = mwl8k_rxd_8366_ap_init,
752 .rxd_refill = mwl8k_rxd_8366_ap_refill,
753 .rxd_process = mwl8k_rxd_8366_ap_process,
757 * Packet reception for STA firmware.
759 struct mwl8k_rxd_sta {
763 __le32 pkt_phys_addr;
764 __le32 next_rxd_phys_addr;
774 } __attribute__((packed));
776 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
777 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
778 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
779 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
780 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
781 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
783 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
785 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
787 struct mwl8k_rxd_sta *rxd = _rxd;
789 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
790 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
793 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
795 struct mwl8k_rxd_sta *rxd = _rxd;
797 rxd->pkt_len = cpu_to_le16(len);
798 rxd->pkt_phys_addr = cpu_to_le32(addr);
804 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
807 struct mwl8k_rxd_sta *rxd = _rxd;
810 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
814 rate_info = le16_to_cpu(rxd->rate_info);
816 memset(status, 0, sizeof(*status));
818 status->signal = -rxd->rssi;
819 status->noise = -rxd->noise_level;
820 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
821 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
823 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
824 status->flag |= RX_FLAG_SHORTPRE;
825 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
826 status->flag |= RX_FLAG_40MHZ;
827 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
828 status->flag |= RX_FLAG_SHORT_GI;
829 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
830 status->flag |= RX_FLAG_HT;
832 status->band = IEEE80211_BAND_2GHZ;
833 status->freq = ieee80211_channel_to_frequency(rxd->channel);
835 *qos = rxd->qos_control;
837 return le16_to_cpu(rxd->pkt_len);
840 static struct rxd_ops rxd_sta_ops = {
841 .rxd_size = sizeof(struct mwl8k_rxd_sta),
842 .rxd_init = mwl8k_rxd_sta_init,
843 .rxd_refill = mwl8k_rxd_sta_refill,
844 .rxd_process = mwl8k_rxd_sta_process,
848 #define MWL8K_RX_DESCS 256
849 #define MWL8K_RX_MAXSZ 3800
851 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
853 struct mwl8k_priv *priv = hw->priv;
854 struct mwl8k_rx_queue *rxq = priv->rxq + index;
862 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
864 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
865 if (rxq->rxd == NULL) {
866 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
867 wiphy_name(hw->wiphy));
870 memset(rxq->rxd, 0, size);
872 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
873 if (rxq->buf == NULL) {
874 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
875 wiphy_name(hw->wiphy));
876 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
879 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
881 for (i = 0; i < MWL8K_RX_DESCS; i++) {
885 dma_addr_t next_dma_addr;
887 desc_size = priv->rxd_ops->rxd_size;
888 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
891 if (nexti == MWL8K_RX_DESCS)
893 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
895 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
901 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
903 struct mwl8k_priv *priv = hw->priv;
904 struct mwl8k_rx_queue *rxq = priv->rxq + index;
908 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
914 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
918 addr = pci_map_single(priv->pdev, skb->data,
919 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
923 if (rxq->tail == MWL8K_RX_DESCS)
925 rxq->buf[rx].skb = skb;
926 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
928 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
929 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
937 /* Must be called only when the card's reception is completely halted */
938 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
940 struct mwl8k_priv *priv = hw->priv;
941 struct mwl8k_rx_queue *rxq = priv->rxq + index;
944 for (i = 0; i < MWL8K_RX_DESCS; i++) {
945 if (rxq->buf[i].skb != NULL) {
946 pci_unmap_single(priv->pdev,
947 pci_unmap_addr(&rxq->buf[i], dma),
948 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
949 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
951 kfree_skb(rxq->buf[i].skb);
952 rxq->buf[i].skb = NULL;
959 pci_free_consistent(priv->pdev,
960 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
961 rxq->rxd, rxq->rxd_dma);
967 * Scan a list of BSSIDs to process for finalize join.
968 * Allows for extension to process multiple BSSIDs.
971 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
973 return priv->capture_beacon &&
974 ieee80211_is_beacon(wh->frame_control) &&
975 !compare_ether_addr(wh->addr3, priv->capture_bssid);
978 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
981 struct mwl8k_priv *priv = hw->priv;
983 priv->capture_beacon = false;
984 memset(priv->capture_bssid, 0, ETH_ALEN);
987 * Use GFP_ATOMIC as rxq_process is called from
988 * the primary interrupt handler, memory allocation call
991 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
992 if (priv->beacon_skb != NULL)
993 ieee80211_queue_work(hw, &priv->finalize_join_worker);
996 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
998 struct mwl8k_priv *priv = hw->priv;
999 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1003 while (rxq->rxd_count && limit--) {
1004 struct sk_buff *skb;
1007 struct ieee80211_rx_status status;
1010 skb = rxq->buf[rxq->head].skb;
1014 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1016 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1020 rxq->buf[rxq->head].skb = NULL;
1022 pci_unmap_single(priv->pdev,
1023 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1024 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1025 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1028 if (rxq->head == MWL8K_RX_DESCS)
1033 skb_put(skb, pkt_len);
1034 mwl8k_remove_dma_header(skb, qos);
1037 * Check for a pending join operation. Save a
1038 * copy of the beacon and schedule a tasklet to
1039 * send a FINALIZE_JOIN command to the firmware.
1041 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1042 mwl8k_save_beacon(hw, skb);
1044 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1045 ieee80211_rx_irqsafe(hw, skb);
1055 * Packet transmission.
1058 #define MWL8K_TXD_STATUS_OK 0x00000001
1059 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1060 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1061 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1062 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1064 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1065 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1066 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1067 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1068 #define MWL8K_QOS_EOSP 0x0010
1070 struct mwl8k_tx_desc {
1075 __le32 pkt_phys_addr;
1077 __u8 dest_MAC_addr[ETH_ALEN];
1078 __le32 next_txd_phys_addr;
1083 } __attribute__((packed));
1085 #define MWL8K_TX_DESCS 128
1087 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1089 struct mwl8k_priv *priv = hw->priv;
1090 struct mwl8k_tx_queue *txq = priv->txq + index;
1094 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1095 txq->stats.limit = MWL8K_TX_DESCS;
1099 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1101 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1102 if (txq->txd == NULL) {
1103 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1104 wiphy_name(hw->wiphy));
1107 memset(txq->txd, 0, size);
1109 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1110 if (txq->skb == NULL) {
1111 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1112 wiphy_name(hw->wiphy));
1113 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1116 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1118 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1119 struct mwl8k_tx_desc *tx_desc;
1122 tx_desc = txq->txd + i;
1123 nexti = (i + 1) % MWL8K_TX_DESCS;
1125 tx_desc->status = 0;
1126 tx_desc->next_txd_phys_addr =
1127 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1133 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1135 iowrite32(MWL8K_H2A_INT_PPA_READY,
1136 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1137 iowrite32(MWL8K_H2A_INT_DUMMY,
1138 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1139 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1142 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1144 struct mwl8k_priv *priv = hw->priv;
1147 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1148 struct mwl8k_tx_queue *txq = priv->txq + i;
1154 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1155 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1158 status = le32_to_cpu(tx_desc->status);
1159 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1164 if (tx_desc->pkt_len == 0)
1168 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1169 "fw_owned=%d drv_owned=%d unused=%d\n",
1170 wiphy_name(hw->wiphy), i,
1171 txq->stats.len, txq->head, txq->tail,
1172 fw_owned, drv_owned, unused);
1177 * Must be called with priv->fw_mutex held and tx queues stopped.
1179 #define MWL8K_TX_WAIT_TIMEOUT_MS 1000
1181 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1183 struct mwl8k_priv *priv = hw->priv;
1184 DECLARE_COMPLETION_ONSTACK(tx_wait);
1191 * The TX queues are stopped at this point, so this test
1192 * doesn't need to take ->tx_lock.
1194 if (!priv->pending_tx_pkts)
1200 spin_lock_bh(&priv->tx_lock);
1201 priv->tx_wait = &tx_wait;
1204 unsigned long timeout;
1206 oldcount = priv->pending_tx_pkts;
1208 spin_unlock_bh(&priv->tx_lock);
1209 timeout = wait_for_completion_timeout(&tx_wait,
1210 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1211 spin_lock_bh(&priv->tx_lock);
1214 WARN_ON(priv->pending_tx_pkts);
1216 printk(KERN_NOTICE "%s: tx rings drained\n",
1217 wiphy_name(hw->wiphy));
1222 if (priv->pending_tx_pkts < oldcount) {
1223 printk(KERN_NOTICE "%s: waiting for tx rings "
1224 "to drain (%d -> %d pkts)\n",
1225 wiphy_name(hw->wiphy), oldcount,
1226 priv->pending_tx_pkts);
1231 priv->tx_wait = NULL;
1233 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1234 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1235 mwl8k_dump_tx_rings(hw);
1239 spin_unlock_bh(&priv->tx_lock);
1244 #define MWL8K_TXD_SUCCESS(status) \
1245 ((status) & (MWL8K_TXD_STATUS_OK | \
1246 MWL8K_TXD_STATUS_OK_RETRY | \
1247 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1249 static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1251 struct mwl8k_priv *priv = hw->priv;
1252 struct mwl8k_tx_queue *txq = priv->txq + index;
1255 while (txq->stats.len > 0) {
1257 struct mwl8k_tx_desc *tx_desc;
1260 struct sk_buff *skb;
1261 struct ieee80211_tx_info *info;
1265 tx_desc = txq->txd + tx;
1267 status = le32_to_cpu(tx_desc->status);
1269 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1273 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1276 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1277 BUG_ON(txq->stats.len == 0);
1279 priv->pending_tx_pkts--;
1281 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1282 size = le16_to_cpu(tx_desc->pkt_len);
1284 txq->skb[tx] = NULL;
1286 BUG_ON(skb == NULL);
1287 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1289 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1291 /* Mark descriptor as unused */
1292 tx_desc->pkt_phys_addr = 0;
1293 tx_desc->pkt_len = 0;
1295 info = IEEE80211_SKB_CB(skb);
1296 ieee80211_tx_info_clear_status(info);
1297 if (MWL8K_TXD_SUCCESS(status))
1298 info->flags |= IEEE80211_TX_STAT_ACK;
1300 ieee80211_tx_status_irqsafe(hw, skb);
1305 if (wake && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1306 ieee80211_wake_queue(hw, index);
1309 /* must be called only when the card's transmit is completely halted */
1310 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1312 struct mwl8k_priv *priv = hw->priv;
1313 struct mwl8k_tx_queue *txq = priv->txq + index;
1315 mwl8k_txq_reclaim(hw, index, 1);
1320 pci_free_consistent(priv->pdev,
1321 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1322 txq->txd, txq->txd_dma);
1327 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1329 struct mwl8k_priv *priv = hw->priv;
1330 struct ieee80211_tx_info *tx_info;
1331 struct mwl8k_vif *mwl8k_vif;
1332 struct ieee80211_hdr *wh;
1333 struct mwl8k_tx_queue *txq;
1334 struct mwl8k_tx_desc *tx;
1340 wh = (struct ieee80211_hdr *)skb->data;
1341 if (ieee80211_is_data_qos(wh->frame_control))
1342 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1346 mwl8k_add_dma_header(skb);
1347 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1349 tx_info = IEEE80211_SKB_CB(skb);
1350 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1352 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1353 u16 seqno = mwl8k_vif->seqno;
1355 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1356 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1357 mwl8k_vif->seqno = seqno++ % 4096;
1360 /* Setup firmware control bit fields for each frame type. */
1363 if (ieee80211_is_mgmt(wh->frame_control) ||
1364 ieee80211_is_ctl(wh->frame_control)) {
1366 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1367 } else if (ieee80211_is_data(wh->frame_control)) {
1369 if (is_multicast_ether_addr(wh->addr1))
1370 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1372 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1373 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1374 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1376 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1379 dma = pci_map_single(priv->pdev, skb->data,
1380 skb->len, PCI_DMA_TODEVICE);
1382 if (pci_dma_mapping_error(priv->pdev, dma)) {
1383 printk(KERN_DEBUG "%s: failed to dma map skb, "
1384 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1386 return NETDEV_TX_OK;
1389 spin_lock_bh(&priv->tx_lock);
1391 txq = priv->txq + index;
1393 BUG_ON(txq->skb[txq->tail] != NULL);
1394 txq->skb[txq->tail] = skb;
1396 tx = txq->txd + txq->tail;
1397 tx->data_rate = txdatarate;
1398 tx->tx_priority = index;
1399 tx->qos_control = cpu_to_le16(qos);
1400 tx->pkt_phys_addr = cpu_to_le32(dma);
1401 tx->pkt_len = cpu_to_le16(skb->len);
1403 if (!priv->ap_fw && tx_info->control.sta != NULL)
1404 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1408 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1412 priv->pending_tx_pkts++;
1415 if (txq->tail == MWL8K_TX_DESCS)
1418 if (txq->head == txq->tail)
1419 ieee80211_stop_queue(hw, index);
1421 mwl8k_tx_start(priv);
1423 spin_unlock_bh(&priv->tx_lock);
1425 return NETDEV_TX_OK;
1432 * We have the following requirements for issuing firmware commands:
1433 * - Some commands require that the packet transmit path is idle when
1434 * the command is issued. (For simplicity, we'll just quiesce the
1435 * transmit path for every command.)
1436 * - There are certain sequences of commands that need to be issued to
1437 * the hardware sequentially, with no other intervening commands.
1439 * This leads to an implementation of a "firmware lock" as a mutex that
1440 * can be taken recursively, and which is taken by both the low-level
1441 * command submission function (mwl8k_post_cmd) as well as any users of
1442 * that function that require issuing of an atomic sequence of commands,
1443 * and quiesces the transmit path whenever it's taken.
1445 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1447 struct mwl8k_priv *priv = hw->priv;
1449 if (priv->fw_mutex_owner != current) {
1452 mutex_lock(&priv->fw_mutex);
1453 ieee80211_stop_queues(hw);
1455 rc = mwl8k_tx_wait_empty(hw);
1457 ieee80211_wake_queues(hw);
1458 mutex_unlock(&priv->fw_mutex);
1463 priv->fw_mutex_owner = current;
1466 priv->fw_mutex_depth++;
1471 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1473 struct mwl8k_priv *priv = hw->priv;
1475 if (!--priv->fw_mutex_depth) {
1476 ieee80211_wake_queues(hw);
1477 priv->fw_mutex_owner = NULL;
1478 mutex_unlock(&priv->fw_mutex);
1484 * Command processing.
1487 /* Timeout firmware commands after 10s */
1488 #define MWL8K_CMD_TIMEOUT_MS 10000
1490 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1492 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1493 struct mwl8k_priv *priv = hw->priv;
1494 void __iomem *regs = priv->regs;
1495 dma_addr_t dma_addr;
1496 unsigned int dma_size;
1498 unsigned long timeout = 0;
1501 cmd->result = 0xffff;
1502 dma_size = le16_to_cpu(cmd->length);
1503 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1504 PCI_DMA_BIDIRECTIONAL);
1505 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1508 rc = mwl8k_fw_lock(hw);
1510 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1511 PCI_DMA_BIDIRECTIONAL);
1515 priv->hostcmd_wait = &cmd_wait;
1516 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1517 iowrite32(MWL8K_H2A_INT_DOORBELL,
1518 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1519 iowrite32(MWL8K_H2A_INT_DUMMY,
1520 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1522 timeout = wait_for_completion_timeout(&cmd_wait,
1523 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1525 priv->hostcmd_wait = NULL;
1527 mwl8k_fw_unlock(hw);
1529 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1530 PCI_DMA_BIDIRECTIONAL);
1533 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1534 wiphy_name(hw->wiphy),
1535 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1536 MWL8K_CMD_TIMEOUT_MS);
1541 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1543 rc = cmd->result ? -EINVAL : 0;
1545 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1546 wiphy_name(hw->wiphy),
1547 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1548 le16_to_cpu(cmd->result));
1550 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1551 wiphy_name(hw->wiphy),
1552 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1560 * CMD_GET_HW_SPEC (STA version).
1562 struct mwl8k_cmd_get_hw_spec_sta {
1563 struct mwl8k_cmd_pkt header;
1565 __u8 host_interface;
1567 __u8 perm_addr[ETH_ALEN];
1572 __u8 mcs_bitmap[16];
1573 __le32 rx_queue_ptr;
1574 __le32 num_tx_queues;
1575 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1577 __le32 num_tx_desc_per_queue;
1579 } __attribute__((packed));
1581 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1583 struct mwl8k_priv *priv = hw->priv;
1584 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1588 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1592 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1593 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1595 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1596 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1597 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1598 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1599 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1600 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1601 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1602 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1604 rc = mwl8k_post_cmd(hw, &cmd->header);
1607 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1608 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1609 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1610 priv->hw_rev = cmd->hw_rev;
1618 * CMD_GET_HW_SPEC (AP version).
1620 struct mwl8k_cmd_get_hw_spec_ap {
1621 struct mwl8k_cmd_pkt header;
1623 __u8 host_interface;
1626 __u8 perm_addr[ETH_ALEN];
1637 } __attribute__((packed));
1639 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1641 struct mwl8k_priv *priv = hw->priv;
1642 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1645 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1649 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1650 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1652 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1653 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1655 rc = mwl8k_post_cmd(hw, &cmd->header);
1660 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1661 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1662 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1663 priv->hw_rev = cmd->hw_rev;
1665 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1666 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1668 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1669 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1671 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1672 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1674 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1675 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1677 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1678 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1680 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1681 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1691 struct mwl8k_cmd_set_hw_spec {
1692 struct mwl8k_cmd_pkt header;
1694 __u8 host_interface;
1696 __u8 perm_addr[ETH_ALEN];
1701 __le32 rx_queue_ptr;
1702 __le32 num_tx_queues;
1703 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1705 __le32 num_tx_desc_per_queue;
1707 } __attribute__((packed));
1709 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1711 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1713 struct mwl8k_priv *priv = hw->priv;
1714 struct mwl8k_cmd_set_hw_spec *cmd;
1718 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1722 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1723 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1725 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1726 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1727 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1728 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1729 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1730 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT);
1731 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1732 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1734 rc = mwl8k_post_cmd(hw, &cmd->header);
1741 * CMD_MAC_MULTICAST_ADR.
1743 struct mwl8k_cmd_mac_multicast_adr {
1744 struct mwl8k_cmd_pkt header;
1747 __u8 addr[0][ETH_ALEN];
1750 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1751 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1752 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1753 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1755 static struct mwl8k_cmd_pkt *
1756 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1757 int mc_count, struct dev_addr_list *mclist)
1759 struct mwl8k_priv *priv = hw->priv;
1760 struct mwl8k_cmd_mac_multicast_adr *cmd;
1763 if (allmulti || mc_count > priv->num_mcaddrs) {
1768 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1770 cmd = kzalloc(size, GFP_ATOMIC);
1774 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1775 cmd->header.length = cpu_to_le16(size);
1776 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1777 MWL8K_ENABLE_RX_BROADCAST);
1780 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1781 } else if (mc_count) {
1784 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1785 cmd->numaddr = cpu_to_le16(mc_count);
1786 for (i = 0; i < mc_count && mclist; i++) {
1787 if (mclist->da_addrlen != ETH_ALEN) {
1791 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1792 mclist = mclist->next;
1796 return &cmd->header;
1802 struct mwl8k_cmd_get_stat {
1803 struct mwl8k_cmd_pkt header;
1805 } __attribute__((packed));
1807 #define MWL8K_STAT_ACK_FAILURE 9
1808 #define MWL8K_STAT_RTS_FAILURE 12
1809 #define MWL8K_STAT_FCS_ERROR 24
1810 #define MWL8K_STAT_RTS_SUCCESS 11
1812 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1813 struct ieee80211_low_level_stats *stats)
1815 struct mwl8k_cmd_get_stat *cmd;
1818 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1822 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1823 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1825 rc = mwl8k_post_cmd(hw, &cmd->header);
1827 stats->dot11ACKFailureCount =
1828 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1829 stats->dot11RTSFailureCount =
1830 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1831 stats->dot11FCSErrorCount =
1832 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1833 stats->dot11RTSSuccessCount =
1834 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1842 * CMD_RADIO_CONTROL.
1844 struct mwl8k_cmd_radio_control {
1845 struct mwl8k_cmd_pkt header;
1849 } __attribute__((packed));
1852 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1854 struct mwl8k_priv *priv = hw->priv;
1855 struct mwl8k_cmd_radio_control *cmd;
1858 if (enable == priv->radio_on && !force)
1861 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1865 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1866 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1867 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1868 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1869 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1871 rc = mwl8k_post_cmd(hw, &cmd->header);
1875 priv->radio_on = enable;
1880 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
1882 return mwl8k_cmd_radio_control(hw, 0, 0);
1885 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
1887 return mwl8k_cmd_radio_control(hw, 1, 0);
1891 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1893 struct mwl8k_priv *priv = hw->priv;
1895 priv->radio_short_preamble = short_preamble;
1897 return mwl8k_cmd_radio_control(hw, 1, 1);
1903 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1905 struct mwl8k_cmd_rf_tx_power {
1906 struct mwl8k_cmd_pkt header;
1908 __le16 support_level;
1909 __le16 current_level;
1911 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1912 } __attribute__((packed));
1914 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1916 struct mwl8k_cmd_rf_tx_power *cmd;
1919 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1923 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1924 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1925 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1926 cmd->support_level = cpu_to_le16(dBm);
1928 rc = mwl8k_post_cmd(hw, &cmd->header);
1937 struct mwl8k_cmd_rf_antenna {
1938 struct mwl8k_cmd_pkt header;
1941 } __attribute__((packed));
1943 #define MWL8K_RF_ANTENNA_RX 1
1944 #define MWL8K_RF_ANTENNA_TX 2
1947 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
1949 struct mwl8k_cmd_rf_antenna *cmd;
1952 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1956 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
1957 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1958 cmd->antenna = cpu_to_le16(antenna);
1959 cmd->mode = cpu_to_le16(mask);
1961 rc = mwl8k_post_cmd(hw, &cmd->header);
1970 struct mwl8k_cmd_set_pre_scan {
1971 struct mwl8k_cmd_pkt header;
1972 } __attribute__((packed));
1974 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1976 struct mwl8k_cmd_set_pre_scan *cmd;
1979 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1983 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1984 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1986 rc = mwl8k_post_cmd(hw, &cmd->header);
1993 * CMD_SET_POST_SCAN.
1995 struct mwl8k_cmd_set_post_scan {
1996 struct mwl8k_cmd_pkt header;
1998 __u8 bssid[ETH_ALEN];
1999 } __attribute__((packed));
2002 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2004 struct mwl8k_cmd_set_post_scan *cmd;
2007 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2011 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2012 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2014 memcpy(cmd->bssid, mac, ETH_ALEN);
2016 rc = mwl8k_post_cmd(hw, &cmd->header);
2023 * CMD_SET_RF_CHANNEL.
2025 struct mwl8k_cmd_set_rf_channel {
2026 struct mwl8k_cmd_pkt header;
2028 __u8 current_channel;
2029 __le32 channel_flags;
2030 } __attribute__((packed));
2032 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2033 struct ieee80211_conf *conf)
2035 struct ieee80211_channel *channel = conf->channel;
2036 struct mwl8k_cmd_set_rf_channel *cmd;
2039 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2043 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2044 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2045 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2046 cmd->current_channel = channel->hw_value;
2048 if (channel->band == IEEE80211_BAND_2GHZ)
2049 cmd->channel_flags |= cpu_to_le32(0x00000001);
2051 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2052 conf->channel_type == NL80211_CHAN_HT20)
2053 cmd->channel_flags |= cpu_to_le32(0x00000080);
2054 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2055 cmd->channel_flags |= cpu_to_le32(0x000001900);
2056 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2057 cmd->channel_flags |= cpu_to_le32(0x000000900);
2059 rc = mwl8k_post_cmd(hw, &cmd->header);
2068 #define MWL8K_FRAME_PROT_DISABLED 0x00
2069 #define MWL8K_FRAME_PROT_11G 0x07
2070 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2071 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2073 struct mwl8k_cmd_update_set_aid {
2074 struct mwl8k_cmd_pkt header;
2077 /* AP's MAC address (BSSID) */
2078 __u8 bssid[ETH_ALEN];
2079 __le16 protection_mode;
2080 __u8 supp_rates[14];
2081 } __attribute__((packed));
2083 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2089 * Clear nonstandard rates 4 and 13.
2093 for (i = 0, j = 0; i < 14; i++) {
2094 if (mask & (1 << i))
2095 rates[j++] = mwl8k_rates[i].hw_value;
2100 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2101 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2103 struct mwl8k_cmd_update_set_aid *cmd;
2107 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2111 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2112 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2113 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2114 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2116 if (vif->bss_conf.use_cts_prot) {
2117 prot_mode = MWL8K_FRAME_PROT_11G;
2119 switch (vif->bss_conf.ht_operation_mode &
2120 IEEE80211_HT_OP_MODE_PROTECTION) {
2121 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2122 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2124 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2125 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2128 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2132 cmd->protection_mode = cpu_to_le16(prot_mode);
2134 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2136 rc = mwl8k_post_cmd(hw, &cmd->header);
2145 struct mwl8k_cmd_set_rate {
2146 struct mwl8k_cmd_pkt header;
2147 __u8 legacy_rates[14];
2149 /* Bitmap for supported MCS codes. */
2152 } __attribute__((packed));
2155 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2156 u32 legacy_rate_mask, u8 *mcs_rates)
2158 struct mwl8k_cmd_set_rate *cmd;
2161 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2165 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2166 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2167 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2168 memcpy(cmd->mcs_set, mcs_rates, 16);
2170 rc = mwl8k_post_cmd(hw, &cmd->header);
2177 * CMD_FINALIZE_JOIN.
2179 #define MWL8K_FJ_BEACON_MAXLEN 128
2181 struct mwl8k_cmd_finalize_join {
2182 struct mwl8k_cmd_pkt header;
2183 __le32 sleep_interval; /* Number of beacon periods to sleep */
2184 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2185 } __attribute__((packed));
2187 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2188 int framelen, int dtim)
2190 struct mwl8k_cmd_finalize_join *cmd;
2191 struct ieee80211_mgmt *payload = frame;
2195 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2199 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2200 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2201 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2203 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2204 if (payload_len < 0)
2206 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2207 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2209 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2211 rc = mwl8k_post_cmd(hw, &cmd->header);
2218 * CMD_SET_RTS_THRESHOLD.
2220 struct mwl8k_cmd_set_rts_threshold {
2221 struct mwl8k_cmd_pkt header;
2224 } __attribute__((packed));
2226 static int mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw,
2227 u16 action, u16 threshold)
2229 struct mwl8k_cmd_set_rts_threshold *cmd;
2232 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2236 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2237 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2238 cmd->action = cpu_to_le16(action);
2239 cmd->threshold = cpu_to_le16(threshold);
2241 rc = mwl8k_post_cmd(hw, &cmd->header);
2250 struct mwl8k_cmd_set_slot {
2251 struct mwl8k_cmd_pkt header;
2254 } __attribute__((packed));
2256 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2258 struct mwl8k_cmd_set_slot *cmd;
2261 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2265 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2266 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2267 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2268 cmd->short_slot = short_slot_time;
2270 rc = mwl8k_post_cmd(hw, &cmd->header);
2277 * CMD_SET_EDCA_PARAMS.
2279 struct mwl8k_cmd_set_edca_params {
2280 struct mwl8k_cmd_pkt header;
2282 /* See MWL8K_SET_EDCA_XXX below */
2285 /* TX opportunity in units of 32 us */
2290 /* Log exponent of max contention period: 0...15 */
2293 /* Log exponent of min contention period: 0...15 */
2296 /* Adaptive interframe spacing in units of 32us */
2299 /* TX queue to configure */
2303 /* Log exponent of max contention period: 0...15 */
2306 /* Log exponent of min contention period: 0...15 */
2309 /* Adaptive interframe spacing in units of 32us */
2312 /* TX queue to configure */
2316 } __attribute__((packed));
2318 #define MWL8K_SET_EDCA_CW 0x01
2319 #define MWL8K_SET_EDCA_TXOP 0x02
2320 #define MWL8K_SET_EDCA_AIFS 0x04
2322 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2323 MWL8K_SET_EDCA_TXOP | \
2324 MWL8K_SET_EDCA_AIFS)
2327 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2328 __u16 cw_min, __u16 cw_max,
2329 __u8 aifs, __u16 txop)
2331 struct mwl8k_priv *priv = hw->priv;
2332 struct mwl8k_cmd_set_edca_params *cmd;
2335 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2340 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2343 qnum ^= !(qnum >> 1);
2345 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2346 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2347 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2348 cmd->txop = cpu_to_le16(txop);
2350 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2351 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2352 cmd->ap.aifs = aifs;
2355 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2356 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2357 cmd->sta.aifs = aifs;
2358 cmd->sta.txq = qnum;
2361 rc = mwl8k_post_cmd(hw, &cmd->header);
2370 struct mwl8k_cmd_set_wmm_mode {
2371 struct mwl8k_cmd_pkt header;
2373 } __attribute__((packed));
2375 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2377 struct mwl8k_priv *priv = hw->priv;
2378 struct mwl8k_cmd_set_wmm_mode *cmd;
2381 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2385 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2386 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2387 cmd->action = cpu_to_le16(!!enable);
2389 rc = mwl8k_post_cmd(hw, &cmd->header);
2393 priv->wmm_enabled = enable;
2401 struct mwl8k_cmd_mimo_config {
2402 struct mwl8k_cmd_pkt header;
2404 __u8 rx_antenna_map;
2405 __u8 tx_antenna_map;
2406 } __attribute__((packed));
2408 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2410 struct mwl8k_cmd_mimo_config *cmd;
2413 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2417 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2418 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2419 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2420 cmd->rx_antenna_map = rx;
2421 cmd->tx_antenna_map = tx;
2423 rc = mwl8k_post_cmd(hw, &cmd->header);
2430 * CMD_USE_FIXED_RATE.
2432 #define MWL8K_RATE_TABLE_SIZE 8
2433 #define MWL8K_UCAST_RATE 0
2434 #define MWL8K_USE_AUTO_RATE 0x0002
2436 struct mwl8k_rate_entry {
2437 /* Set to 1 if HT rate, 0 if legacy. */
2440 /* Set to 1 to use retry_count field. */
2441 __le32 enable_retry;
2443 /* Specified legacy rate or MCS. */
2446 /* Number of allowed retries. */
2448 } __attribute__((packed));
2450 struct mwl8k_rate_table {
2451 /* 1 to allow specified rate and below */
2452 __le32 allow_rate_drop;
2454 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2455 } __attribute__((packed));
2457 struct mwl8k_cmd_use_fixed_rate {
2458 struct mwl8k_cmd_pkt header;
2460 struct mwl8k_rate_table rate_table;
2462 /* Unicast, Broadcast or Multicast */
2466 } __attribute__((packed));
2468 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2469 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2471 struct mwl8k_cmd_use_fixed_rate *cmd;
2475 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2479 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2480 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2482 cmd->action = cpu_to_le32(action);
2483 cmd->rate_type = cpu_to_le32(rate_type);
2485 if (rate_table != NULL) {
2487 * Copy over each field manually so that endian
2488 * conversion can be done.
2490 cmd->rate_table.allow_rate_drop =
2491 cpu_to_le32(rate_table->allow_rate_drop);
2492 cmd->rate_table.num_rates =
2493 cpu_to_le32(rate_table->num_rates);
2495 for (count = 0; count < rate_table->num_rates; count++) {
2496 struct mwl8k_rate_entry *dst =
2497 &cmd->rate_table.rate_entry[count];
2498 struct mwl8k_rate_entry *src =
2499 &rate_table->rate_entry[count];
2501 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2502 dst->enable_retry = cpu_to_le32(src->enable_retry);
2503 dst->rate = cpu_to_le32(src->rate);
2504 dst->retry_count = cpu_to_le32(src->retry_count);
2508 rc = mwl8k_post_cmd(hw, &cmd->header);
2515 * CMD_ENABLE_SNIFFER.
2517 struct mwl8k_cmd_enable_sniffer {
2518 struct mwl8k_cmd_pkt header;
2520 } __attribute__((packed));
2522 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2524 struct mwl8k_cmd_enable_sniffer *cmd;
2527 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2531 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2532 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2533 cmd->action = cpu_to_le32(!!enable);
2535 rc = mwl8k_post_cmd(hw, &cmd->header);
2544 struct mwl8k_cmd_set_mac_addr {
2545 struct mwl8k_cmd_pkt header;
2549 __u8 mac_addr[ETH_ALEN];
2551 __u8 mac_addr[ETH_ALEN];
2553 } __attribute__((packed));
2555 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
2557 struct mwl8k_priv *priv = hw->priv;
2558 struct mwl8k_cmd_set_mac_addr *cmd;
2561 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2565 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2566 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2568 cmd->mbss.mac_type = 0;
2569 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2571 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2574 rc = mwl8k_post_cmd(hw, &cmd->header);
2581 * CMD_SET_RATEADAPT_MODE.
2583 struct mwl8k_cmd_set_rate_adapt_mode {
2584 struct mwl8k_cmd_pkt header;
2587 } __attribute__((packed));
2589 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2591 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2594 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2598 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2599 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2600 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2601 cmd->mode = cpu_to_le16(mode);
2603 rc = mwl8k_post_cmd(hw, &cmd->header);
2612 struct ewc_ht_info {
2616 } __attribute__((packed));
2618 struct peer_capability_info {
2619 /* Peer type - AP vs. STA. */
2622 /* Basic 802.11 capabilities from assoc resp. */
2625 /* Set if peer supports 802.11n high throughput (HT). */
2628 /* Valid if HT is supported. */
2630 __u8 extended_ht_caps;
2631 struct ewc_ht_info ewc_info;
2633 /* Legacy rate table. Intersection of our rates and peer rates. */
2634 __u8 legacy_rates[12];
2636 /* HT rate table. Intersection of our rates and peer rates. */
2640 /* If set, interoperability mode, no proprietary extensions. */
2644 __le16 amsdu_enabled;
2645 } __attribute__((packed));
2647 struct mwl8k_cmd_update_stadb {
2648 struct mwl8k_cmd_pkt header;
2650 /* See STADB_ACTION_TYPE */
2653 /* Peer MAC address */
2654 __u8 peer_addr[ETH_ALEN];
2658 /* Peer info - valid during add/update. */
2659 struct peer_capability_info peer_info;
2660 } __attribute__((packed));
2662 #define MWL8K_STA_DB_MODIFY_ENTRY 1
2663 #define MWL8K_STA_DB_DEL_ENTRY 2
2665 /* Peer Entry flags - used to define the type of the peer node */
2666 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
2668 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
2669 struct ieee80211_vif *vif,
2670 struct ieee80211_sta *sta)
2672 struct mwl8k_cmd_update_stadb *cmd;
2673 struct peer_capability_info *p;
2676 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2680 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2681 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2682 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
2683 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
2685 p = &cmd->peer_info;
2686 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2687 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
2688 p->ht_support = sta->ht_cap.ht_supported;
2689 p->ht_caps = sta->ht_cap.cap;
2690 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
2691 ((sta->ht_cap.ampdu_density & 7) << 2);
2692 legacy_rate_mask_to_array(p->legacy_rates,
2693 sta->supp_rates[IEEE80211_BAND_2GHZ]);
2694 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
2696 p->amsdu_enabled = 0;
2698 rc = mwl8k_post_cmd(hw, &cmd->header);
2701 return rc ? rc : p->station_id;
2704 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
2705 struct ieee80211_vif *vif, u8 *addr)
2707 struct mwl8k_cmd_update_stadb *cmd;
2710 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2714 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2715 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2716 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
2717 memcpy(cmd->peer_addr, addr, ETH_ALEN);
2719 rc = mwl8k_post_cmd(hw, &cmd->header);
2727 * Interrupt handling.
2729 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2731 struct ieee80211_hw *hw = dev_id;
2732 struct mwl8k_priv *priv = hw->priv;
2735 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2736 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2741 if (status & MWL8K_A2H_INT_TX_DONE)
2742 tasklet_schedule(&priv->tx_reclaim_task);
2744 if (status & MWL8K_A2H_INT_RX_READY) {
2745 while (rxq_process(hw, 0, 1))
2746 rxq_refill(hw, 0, 1);
2749 if (status & MWL8K_A2H_INT_OPC_DONE) {
2750 if (priv->hostcmd_wait != NULL)
2751 complete(priv->hostcmd_wait);
2754 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2755 if (!mutex_is_locked(&priv->fw_mutex) &&
2756 priv->radio_on && priv->pending_tx_pkts)
2757 mwl8k_tx_start(priv);
2765 * Core driver operations.
2767 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2769 struct mwl8k_priv *priv = hw->priv;
2770 int index = skb_get_queue_mapping(skb);
2773 if (priv->current_channel == NULL) {
2774 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2775 "disabled\n", wiphy_name(hw->wiphy));
2777 return NETDEV_TX_OK;
2780 rc = mwl8k_txq_xmit(hw, index, skb);
2785 static int mwl8k_start(struct ieee80211_hw *hw)
2787 struct mwl8k_priv *priv = hw->priv;
2790 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
2791 IRQF_SHARED, MWL8K_NAME, hw);
2793 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2794 wiphy_name(hw->wiphy));
2798 /* Enable tx reclaim tasklet */
2799 tasklet_enable(&priv->tx_reclaim_task);
2801 /* Enable interrupts */
2802 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2804 rc = mwl8k_fw_lock(hw);
2806 rc = mwl8k_cmd_radio_enable(hw);
2810 rc = mwl8k_cmd_enable_sniffer(hw, 0);
2813 rc = mwl8k_cmd_set_pre_scan(hw);
2816 rc = mwl8k_cmd_set_post_scan(hw,
2817 "\x00\x00\x00\x00\x00\x00");
2821 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
2824 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
2826 mwl8k_fw_unlock(hw);
2830 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2831 free_irq(priv->pdev->irq, hw);
2832 tasklet_disable(&priv->tx_reclaim_task);
2838 static void mwl8k_stop(struct ieee80211_hw *hw)
2840 struct mwl8k_priv *priv = hw->priv;
2843 mwl8k_cmd_radio_disable(hw);
2845 ieee80211_stop_queues(hw);
2847 /* Disable interrupts */
2848 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2849 free_irq(priv->pdev->irq, hw);
2851 /* Stop finalize join worker */
2852 cancel_work_sync(&priv->finalize_join_worker);
2853 if (priv->beacon_skb != NULL)
2854 dev_kfree_skb(priv->beacon_skb);
2856 /* Stop tx reclaim tasklet */
2857 tasklet_disable(&priv->tx_reclaim_task);
2859 /* Return all skbs to mac80211 */
2860 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2861 mwl8k_txq_reclaim(hw, i, 1);
2864 static int mwl8k_add_interface(struct ieee80211_hw *hw,
2865 struct ieee80211_vif *vif)
2867 struct mwl8k_priv *priv = hw->priv;
2868 struct mwl8k_vif *mwl8k_vif;
2871 * We only support one active interface at a time.
2873 if (priv->vif != NULL)
2877 * We only support managed interfaces for now.
2879 if (vif->type != NL80211_IFTYPE_STATION)
2883 * Reject interface creation if sniffer mode is active, as
2884 * STA operation is mutually exclusive with hardware sniffer
2887 if (priv->sniffer_enabled) {
2888 printk(KERN_INFO "%s: unable to create STA "
2889 "interface due to sniffer mode being enabled\n",
2890 wiphy_name(hw->wiphy));
2894 /* Clean out driver private area */
2895 mwl8k_vif = MWL8K_VIF(vif);
2896 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2898 /* Set and save the mac address */
2899 mwl8k_cmd_set_mac_addr(hw, vif->addr);
2900 memcpy(mwl8k_vif->mac_addr, vif->addr, ETH_ALEN);
2902 /* Set Initial sequence number to zero */
2903 mwl8k_vif->seqno = 0;
2906 priv->current_channel = NULL;
2911 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2912 struct ieee80211_vif *vif)
2914 struct mwl8k_priv *priv = hw->priv;
2916 if (priv->vif == NULL)
2919 mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
2924 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2926 struct ieee80211_conf *conf = &hw->conf;
2927 struct mwl8k_priv *priv = hw->priv;
2930 if (conf->flags & IEEE80211_CONF_IDLE) {
2931 mwl8k_cmd_radio_disable(hw);
2932 priv->current_channel = NULL;
2936 rc = mwl8k_fw_lock(hw);
2940 rc = mwl8k_cmd_radio_enable(hw);
2944 rc = mwl8k_cmd_set_rf_channel(hw, conf);
2948 priv->current_channel = conf->channel;
2950 if (conf->power_level > 18)
2951 conf->power_level = 18;
2952 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
2957 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
2959 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
2961 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
2965 mwl8k_fw_unlock(hw);
2970 static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
2971 struct ieee80211_vif *vif,
2972 struct ieee80211_bss_conf *info,
2975 struct mwl8k_priv *priv = hw->priv;
2976 u32 ap_legacy_rates;
2977 u8 ap_mcs_rates[16];
2980 if (mwl8k_fw_lock(hw))
2984 * No need to capture a beacon if we're no longer associated.
2986 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
2987 priv->capture_beacon = false;
2990 * Get the AP's legacy and MCS rates.
2992 ap_legacy_rates = 0;
2993 if (vif->bss_conf.assoc) {
2994 struct ieee80211_sta *ap;
2997 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3003 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3004 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3009 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3010 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3014 rc = mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
3015 MWL8K_UCAST_RATE, NULL);
3020 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3021 rc = mwl8k_set_radio_preamble(hw,
3022 vif->bss_conf.use_short_preamble);
3027 if (changed & BSS_CHANGED_ERP_SLOT) {
3028 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3033 if (((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) ||
3034 (changed & (BSS_CHANGED_ERP_CTS_PROT | BSS_CHANGED_HT))) {
3035 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3040 if (vif->bss_conf.assoc &&
3041 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3043 * Finalize the join. Tell rx handler to process
3044 * next beacon from our BSSID.
3046 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3047 priv->capture_beacon = true;
3051 mwl8k_fw_unlock(hw);
3054 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3055 int mc_count, struct dev_addr_list *mclist)
3057 struct mwl8k_cmd_pkt *cmd;
3060 * Synthesize and return a command packet that programs the
3061 * hardware multicast address filter. At this point we don't
3062 * know whether FIF_ALLMULTI is being requested, but if it is,
3063 * we'll end up throwing this packet away and creating a new
3064 * one in mwl8k_configure_filter().
3066 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3068 return (unsigned long)cmd;
3072 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3073 unsigned int changed_flags,
3074 unsigned int *total_flags)
3076 struct mwl8k_priv *priv = hw->priv;
3079 * Hardware sniffer mode is mutually exclusive with STA
3080 * operation, so refuse to enable sniffer mode if a STA
3081 * interface is active.
3083 if (priv->vif != NULL) {
3084 if (net_ratelimit())
3085 printk(KERN_INFO "%s: not enabling sniffer "
3086 "mode because STA interface is active\n",
3087 wiphy_name(hw->wiphy));
3091 if (!priv->sniffer_enabled) {
3092 if (mwl8k_cmd_enable_sniffer(hw, 1))
3094 priv->sniffer_enabled = true;
3097 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3098 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3104 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3105 unsigned int changed_flags,
3106 unsigned int *total_flags,
3109 struct mwl8k_priv *priv = hw->priv;
3110 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3113 * AP firmware doesn't allow fine-grained control over
3114 * the receive filter.
3117 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3123 * Enable hardware sniffer mode if FIF_CONTROL or
3124 * FIF_OTHER_BSS is requested.
3126 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3127 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3132 /* Clear unsupported feature flags */
3133 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3135 if (mwl8k_fw_lock(hw))
3138 if (priv->sniffer_enabled) {
3139 mwl8k_cmd_enable_sniffer(hw, 0);
3140 priv->sniffer_enabled = false;
3143 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3144 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3146 * Disable the BSS filter.
3148 mwl8k_cmd_set_pre_scan(hw);
3153 * Enable the BSS filter.
3155 * If there is an active STA interface, use that
3156 * interface's BSSID, otherwise use a dummy one
3157 * (where the OUI part needs to be nonzero for
3158 * the BSSID to be accepted by POST_SCAN).
3160 bssid = "\x01\x00\x00\x00\x00\x00";
3161 if (priv->vif != NULL)
3162 bssid = priv->vif->bss_conf.bssid;
3164 mwl8k_cmd_set_post_scan(hw, bssid);
3169 * If FIF_ALLMULTI is being requested, throw away the command
3170 * packet that ->prepare_multicast() built and replace it with
3171 * a command packet that enables reception of all multicast
3174 if (*total_flags & FIF_ALLMULTI) {
3176 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3180 mwl8k_post_cmd(hw, cmd);
3184 mwl8k_fw_unlock(hw);
3187 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3189 return mwl8k_cmd_set_rts_threshold(hw, MWL8K_CMD_SET, value);
3192 struct mwl8k_sta_notify_item
3194 struct list_head list;
3195 struct ieee80211_vif *vif;
3196 enum sta_notify_cmd cmd;
3197 struct ieee80211_sta sta;
3200 static void mwl8k_sta_notify_worker(struct work_struct *work)
3202 struct mwl8k_priv *priv =
3203 container_of(work, struct mwl8k_priv, sta_notify_worker);
3204 struct ieee80211_hw *hw = priv->hw;
3206 spin_lock_bh(&priv->sta_notify_list_lock);
3207 while (!list_empty(&priv->sta_notify_list)) {
3208 struct mwl8k_sta_notify_item *s;
3210 s = list_entry(priv->sta_notify_list.next,
3211 struct mwl8k_sta_notify_item, list);
3214 spin_unlock_bh(&priv->sta_notify_list_lock);
3216 if (s->cmd == STA_NOTIFY_ADD) {
3219 rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
3221 struct ieee80211_sta *sta;
3224 sta = ieee80211_find_sta(s->vif, s->sta.addr);
3226 MWL8K_STA(sta)->peer_id = rc;
3230 mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
3235 spin_lock_bh(&priv->sta_notify_list_lock);
3237 spin_unlock_bh(&priv->sta_notify_list_lock);
3241 mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3242 enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
3244 struct mwl8k_priv *priv = hw->priv;
3245 struct mwl8k_sta_notify_item *s;
3247 if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
3250 s = kmalloc(sizeof(*s), GFP_ATOMIC);
3256 spin_lock(&priv->sta_notify_list_lock);
3257 list_add_tail(&s->list, &priv->sta_notify_list);
3258 spin_unlock(&priv->sta_notify_list_lock);
3260 ieee80211_queue_work(hw, &priv->sta_notify_worker);
3264 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3265 const struct ieee80211_tx_queue_params *params)
3267 struct mwl8k_priv *priv = hw->priv;
3270 rc = mwl8k_fw_lock(hw);
3272 if (!priv->wmm_enabled)
3273 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3276 rc = mwl8k_cmd_set_edca_params(hw, queue,
3282 mwl8k_fw_unlock(hw);
3288 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3289 struct ieee80211_tx_queue_stats *stats)
3291 struct mwl8k_priv *priv = hw->priv;
3292 struct mwl8k_tx_queue *txq;
3295 spin_lock_bh(&priv->tx_lock);
3296 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3297 txq = priv->txq + index;
3298 memcpy(&stats[index], &txq->stats,
3299 sizeof(struct ieee80211_tx_queue_stats));
3301 spin_unlock_bh(&priv->tx_lock);
3306 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3307 struct ieee80211_low_level_stats *stats)
3309 return mwl8k_cmd_get_stat(hw, stats);
3313 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3314 enum ieee80211_ampdu_mlme_action action,
3315 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3318 case IEEE80211_AMPDU_RX_START:
3319 case IEEE80211_AMPDU_RX_STOP:
3320 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3328 static const struct ieee80211_ops mwl8k_ops = {
3330 .start = mwl8k_start,
3332 .add_interface = mwl8k_add_interface,
3333 .remove_interface = mwl8k_remove_interface,
3334 .config = mwl8k_config,
3335 .bss_info_changed = mwl8k_bss_info_changed,
3336 .prepare_multicast = mwl8k_prepare_multicast,
3337 .configure_filter = mwl8k_configure_filter,
3338 .set_rts_threshold = mwl8k_set_rts_threshold,
3339 .sta_notify = mwl8k_sta_notify,
3340 .conf_tx = mwl8k_conf_tx,
3341 .get_tx_stats = mwl8k_get_tx_stats,
3342 .get_stats = mwl8k_get_stats,
3343 .ampdu_action = mwl8k_ampdu_action,
3346 static void mwl8k_tx_reclaim_handler(unsigned long data)
3349 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3350 struct mwl8k_priv *priv = hw->priv;
3352 spin_lock_bh(&priv->tx_lock);
3353 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3354 mwl8k_txq_reclaim(hw, i, 0);
3356 if (priv->tx_wait != NULL && !priv->pending_tx_pkts) {
3357 complete(priv->tx_wait);
3358 priv->tx_wait = NULL;
3360 spin_unlock_bh(&priv->tx_lock);
3363 static void mwl8k_finalize_join_worker(struct work_struct *work)
3365 struct mwl8k_priv *priv =
3366 container_of(work, struct mwl8k_priv, finalize_join_worker);
3367 struct sk_buff *skb = priv->beacon_skb;
3369 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
3370 priv->vif->bss_conf.dtim_period);
3373 priv->beacon_skb = NULL;
3382 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3384 .part_name = "88w8363",
3385 .helper_image = "mwl8k/helper_8363.fw",
3386 .fw_image = "mwl8k/fmimage_8363.fw",
3389 .part_name = "88w8687",
3390 .helper_image = "mwl8k/helper_8687.fw",
3391 .fw_image = "mwl8k/fmimage_8687.fw",
3394 .part_name = "88w8366",
3395 .helper_image = "mwl8k/helper_8366.fw",
3396 .fw_image = "mwl8k/fmimage_8366.fw",
3397 .ap_rxd_ops = &rxd_8366_ap_ops,
3401 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3402 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3403 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3404 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3405 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3406 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3409 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3411 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3412 const struct pci_device_id *id)
3414 static int printed_version = 0;
3415 struct ieee80211_hw *hw;
3416 struct mwl8k_priv *priv;
3420 if (!printed_version) {
3421 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3422 printed_version = 1;
3426 rc = pci_enable_device(pdev);
3428 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3433 rc = pci_request_regions(pdev, MWL8K_NAME);
3435 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3437 goto err_disable_device;
3440 pci_set_master(pdev);
3443 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3445 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3450 SET_IEEE80211_DEV(hw, &pdev->dev);
3451 pci_set_drvdata(pdev, hw);
3456 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3459 priv->sram = pci_iomap(pdev, 0, 0x10000);
3460 if (priv->sram == NULL) {
3461 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3462 wiphy_name(hw->wiphy));
3467 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3468 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3470 priv->regs = pci_iomap(pdev, 1, 0x10000);
3471 if (priv->regs == NULL) {
3472 priv->regs = pci_iomap(pdev, 2, 0x10000);
3473 if (priv->regs == NULL) {
3474 printk(KERN_ERR "%s: Cannot map device registers\n",
3475 wiphy_name(hw->wiphy));
3481 /* Reset firmware and hardware */
3482 mwl8k_hw_reset(priv);
3484 /* Ask userland hotplug daemon for the device firmware */
3485 rc = mwl8k_request_firmware(priv);
3487 printk(KERN_ERR "%s: Firmware files not found\n",
3488 wiphy_name(hw->wiphy));
3489 goto err_stop_firmware;
3492 /* Load firmware into hardware */
3493 rc = mwl8k_load_firmware(hw);
3495 printk(KERN_ERR "%s: Cannot start firmware\n",
3496 wiphy_name(hw->wiphy));
3497 goto err_stop_firmware;
3500 /* Reclaim memory once firmware is successfully loaded */
3501 mwl8k_release_firmware(priv);
3505 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3506 if (priv->rxd_ops == NULL) {
3507 printk(KERN_ERR "%s: Driver does not have AP "
3508 "firmware image support for this hardware\n",
3509 wiphy_name(hw->wiphy));
3510 goto err_stop_firmware;
3513 priv->rxd_ops = &rxd_sta_ops;
3516 priv->sniffer_enabled = false;
3517 priv->wmm_enabled = false;
3518 priv->pending_tx_pkts = 0;
3521 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3522 priv->band.band = IEEE80211_BAND_2GHZ;
3523 priv->band.channels = priv->channels;
3524 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3525 priv->band.bitrates = priv->rates;
3526 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3527 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3529 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3530 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3533 * Extra headroom is the size of the required DMA header
3534 * minus the size of the smallest 802.11 frame (CTS frame).
3536 hw->extra_tx_headroom =
3537 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3539 hw->channel_change_time = 10;
3541 hw->queues = MWL8K_TX_QUEUES;
3543 /* Set rssi and noise values to dBm */
3544 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3545 hw->vif_data_size = sizeof(struct mwl8k_vif);
3546 hw->sta_data_size = sizeof(struct mwl8k_sta);
3549 /* Set default radio state and preamble */
3551 priv->radio_short_preamble = 0;
3553 /* Station database handling */
3554 INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
3555 spin_lock_init(&priv->sta_notify_list_lock);
3556 INIT_LIST_HEAD(&priv->sta_notify_list);
3558 /* Finalize join worker */
3559 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3561 /* TX reclaim tasklet */
3562 tasklet_init(&priv->tx_reclaim_task,
3563 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3564 tasklet_disable(&priv->tx_reclaim_task);
3566 /* Power management cookie */
3567 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3568 if (priv->cookie == NULL)
3569 goto err_stop_firmware;
3571 rc = mwl8k_rxq_init(hw, 0);
3573 goto err_free_cookie;
3574 rxq_refill(hw, 0, INT_MAX);
3576 mutex_init(&priv->fw_mutex);
3577 priv->fw_mutex_owner = NULL;
3578 priv->fw_mutex_depth = 0;
3579 priv->hostcmd_wait = NULL;
3581 spin_lock_init(&priv->tx_lock);
3583 priv->tx_wait = NULL;
3585 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3586 rc = mwl8k_txq_init(hw, i);
3588 goto err_free_queues;
3591 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3592 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3593 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3594 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3596 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3597 IRQF_SHARED, MWL8K_NAME, hw);
3599 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3600 wiphy_name(hw->wiphy));
3601 goto err_free_queues;
3605 * Temporarily enable interrupts. Initial firmware host
3606 * commands use interrupts and avoids polling. Disable
3607 * interrupts when done.
3609 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3611 /* Get config data, mac addrs etc */
3613 rc = mwl8k_cmd_get_hw_spec_ap(hw);
3615 rc = mwl8k_cmd_set_hw_spec(hw);
3617 rc = mwl8k_cmd_get_hw_spec_sta(hw);
3619 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3622 printk(KERN_ERR "%s: Cannot initialise firmware\n",
3623 wiphy_name(hw->wiphy));
3627 /* Turn radio off */
3628 rc = mwl8k_cmd_radio_disable(hw);
3630 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3634 /* Clear MAC address */
3635 rc = mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3637 printk(KERN_ERR "%s: Cannot clear MAC address\n",
3638 wiphy_name(hw->wiphy));
3642 /* Disable interrupts */
3643 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3644 free_irq(priv->pdev->irq, hw);
3646 rc = ieee80211_register_hw(hw);
3648 printk(KERN_ERR "%s: Cannot register device\n",
3649 wiphy_name(hw->wiphy));
3650 goto err_free_queues;
3653 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3654 wiphy_name(hw->wiphy), priv->device_info->part_name,
3655 priv->hw_rev, hw->wiphy->perm_addr,
3656 priv->ap_fw ? "AP" : "STA",
3657 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
3658 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
3663 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3664 free_irq(priv->pdev->irq, hw);
3667 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3668 mwl8k_txq_deinit(hw, i);
3669 mwl8k_rxq_deinit(hw, 0);
3672 if (priv->cookie != NULL)
3673 pci_free_consistent(priv->pdev, 4,
3674 priv->cookie, priv->cookie_dma);
3677 mwl8k_hw_reset(priv);
3678 mwl8k_release_firmware(priv);
3681 if (priv->regs != NULL)
3682 pci_iounmap(pdev, priv->regs);
3684 if (priv->sram != NULL)
3685 pci_iounmap(pdev, priv->sram);
3687 pci_set_drvdata(pdev, NULL);
3688 ieee80211_free_hw(hw);
3691 pci_release_regions(pdev);
3694 pci_disable_device(pdev);
3699 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3701 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3704 static void __devexit mwl8k_remove(struct pci_dev *pdev)
3706 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3707 struct mwl8k_priv *priv;
3714 ieee80211_stop_queues(hw);
3716 ieee80211_unregister_hw(hw);
3718 /* Remove tx reclaim tasklet */
3719 tasklet_kill(&priv->tx_reclaim_task);
3722 mwl8k_hw_reset(priv);
3724 /* Return all skbs to mac80211 */
3725 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3726 mwl8k_txq_reclaim(hw, i, 1);
3728 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3729 mwl8k_txq_deinit(hw, i);
3731 mwl8k_rxq_deinit(hw, 0);
3733 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
3735 pci_iounmap(pdev, priv->regs);
3736 pci_iounmap(pdev, priv->sram);
3737 pci_set_drvdata(pdev, NULL);
3738 ieee80211_free_hw(hw);
3739 pci_release_regions(pdev);
3740 pci_disable_device(pdev);
3743 static struct pci_driver mwl8k_driver = {
3745 .id_table = mwl8k_pci_id_table,
3746 .probe = mwl8k_probe,
3747 .remove = __devexit_p(mwl8k_remove),
3748 .shutdown = __devexit_p(mwl8k_shutdown),
3751 static int __init mwl8k_init(void)
3753 return pci_register_driver(&mwl8k_driver);
3756 static void __exit mwl8k_exit(void)
3758 pci_unregister_driver(&mwl8k_driver);
3761 module_init(mwl8k_init);
3762 module_exit(mwl8k_exit);
3764 MODULE_DESCRIPTION(MWL8K_DESC);
3765 MODULE_VERSION(MWL8K_VERSION);
3766 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3767 MODULE_LICENSE("GPL");