iwlwifi: unify iwl_setup_rxon_timing
[safe/jmp/linux-2.6] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/mac80211.h>
44
45 #include <asm/div64.h>
46
47 #define DRV_NAME        "iwlagn"
48
49 #include "iwl-eeprom.h"
50 #include "iwl-dev.h"
51 #include "iwl-core.h"
52 #include "iwl-io.h"
53 #include "iwl-helpers.h"
54 #include "iwl-sta.h"
55 #include "iwl-calib.h"
56
57
58 /******************************************************************************
59  *
60  * module boiler plate
61  *
62  ******************************************************************************/
63
64 /*
65  * module name, copyright, version, etc.
66  */
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define DRV_VERSION     IWLWIFI_VERSION VD VS
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 /*************** STATION TABLE MANAGEMENT ****
91  * mac80211 should be examined to determine if sta_info is duplicating
92  * the functionality provided here
93  */
94
95 /**************************************************************/
96
97 /**
98  * iwl_commit_rxon - commit staging_rxon to hardware
99  *
100  * The RXON command in staging_rxon is committed to the hardware and
101  * the active_rxon structure is updated with the new data.  This
102  * function correctly transitions out of the RXON_ASSOC_MSK state if
103  * a HW tune is required based on the RXON structure changes.
104  */
105 int iwl_commit_rxon(struct iwl_priv *priv)
106 {
107         /* cast away the const for active_rxon in this function */
108         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
109         int ret;
110         bool new_assoc =
111                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
112
113         if (!iwl_is_alive(priv))
114                 return -EBUSY;
115
116         /* always get timestamp with Rx frame */
117         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
118         /* allow CTS-to-self if possible. this is relevant only for
119          * 5000, but will not damage 4965 */
120         priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
121
122         ret = iwl_check_rxon_cmd(priv);
123         if (ret) {
124                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
125                 return -EINVAL;
126         }
127
128         /* If we don't need to send a full RXON, we can use
129          * iwl_rxon_assoc_cmd which is used to reconfigure filter
130          * and other flags for the current radio configuration. */
131         if (!iwl_full_rxon_required(priv)) {
132                 ret = iwl_send_rxon_assoc(priv);
133                 if (ret) {
134                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
135                         return ret;
136                 }
137
138                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
139                 return 0;
140         }
141
142         /* station table will be cleared */
143         priv->assoc_station_added = 0;
144
145         /* If we are currently associated and the new config requires
146          * an RXON_ASSOC and the new config wants the associated mask enabled,
147          * we must clear the associated from the active configuration
148          * before we apply the new config */
149         if (iwl_is_associated(priv) && new_assoc) {
150                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
151                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
152
153                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
154                                       sizeof(struct iwl_rxon_cmd),
155                                       &priv->active_rxon);
156
157                 /* If the mask clearing failed then we set
158                  * active_rxon back to what it was previously */
159                 if (ret) {
160                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
161                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
162                         return ret;
163                 }
164         }
165
166         IWL_DEBUG_INFO(priv, "Sending RXON\n"
167                        "* with%s RXON_FILTER_ASSOC_MSK\n"
168                        "* channel = %d\n"
169                        "* bssid = %pM\n",
170                        (new_assoc ? "" : "out"),
171                        le16_to_cpu(priv->staging_rxon.channel),
172                        priv->staging_rxon.bssid_addr);
173
174         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
175
176         /* Apply the new configuration
177          * RXON unassoc clears the station table in uCode, send it before
178          * we add the bcast station. If assoc bit is set, we will send RXON
179          * after having added the bcast and bssid station.
180          */
181         if (!new_assoc) {
182                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
183                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
184                 if (ret) {
185                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
186                         return ret;
187                 }
188                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
189         }
190
191         iwl_clear_stations_table(priv);
192
193         priv->start_calib = 0;
194
195         /* Add the broadcast address so we can send broadcast frames */
196         if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
197                                                 IWL_INVALID_STATION) {
198                 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
199                 return -EIO;
200         }
201
202         /* If we have set the ASSOC_MSK and we are in BSS mode then
203          * add the IWL_AP_ID to the station rate table */
204         if (new_assoc) {
205                 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
206                         ret = iwl_rxon_add_station(priv,
207                                            priv->active_rxon.bssid_addr, 1);
208                         if (ret == IWL_INVALID_STATION) {
209                                 IWL_ERR(priv,
210                                         "Error adding AP address for TX.\n");
211                                 return -EIO;
212                         }
213                         priv->assoc_station_added = 1;
214                         if (priv->default_wep_key &&
215                             iwl_send_static_wepkey_cmd(priv, 0))
216                                 IWL_ERR(priv,
217                                         "Could not send WEP static key.\n");
218                 }
219
220                 /* Apply the new configuration
221                  * RXON assoc doesn't clear the station table in uCode,
222                  */
223                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
224                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
225                 if (ret) {
226                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
227                         return ret;
228                 }
229                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
230         }
231
232         iwl_init_sensitivity(priv);
233
234         /* If we issue a new RXON command which required a tune then we must
235          * send a new TXPOWER command or we won't be able to Tx any frames */
236         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
237         if (ret) {
238                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
239                 return ret;
240         }
241
242         return 0;
243 }
244
245 void iwl_update_chain_flags(struct iwl_priv *priv)
246 {
247
248         if (priv->cfg->ops->hcmd->set_rxon_chain)
249                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
250         iwlcore_commit_rxon(priv);
251 }
252
253 static void iwl_clear_free_frames(struct iwl_priv *priv)
254 {
255         struct list_head *element;
256
257         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
258                        priv->frames_count);
259
260         while (!list_empty(&priv->free_frames)) {
261                 element = priv->free_frames.next;
262                 list_del(element);
263                 kfree(list_entry(element, struct iwl_frame, list));
264                 priv->frames_count--;
265         }
266
267         if (priv->frames_count) {
268                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
269                             priv->frames_count);
270                 priv->frames_count = 0;
271         }
272 }
273
274 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
275 {
276         struct iwl_frame *frame;
277         struct list_head *element;
278         if (list_empty(&priv->free_frames)) {
279                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
280                 if (!frame) {
281                         IWL_ERR(priv, "Could not allocate frame!\n");
282                         return NULL;
283                 }
284
285                 priv->frames_count++;
286                 return frame;
287         }
288
289         element = priv->free_frames.next;
290         list_del(element);
291         return list_entry(element, struct iwl_frame, list);
292 }
293
294 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
295 {
296         memset(frame, 0, sizeof(*frame));
297         list_add(&frame->list, &priv->free_frames);
298 }
299
300 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
301                                           struct ieee80211_hdr *hdr,
302                                           int left)
303 {
304         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
305             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
306              (priv->iw_mode != NL80211_IFTYPE_AP)))
307                 return 0;
308
309         if (priv->ibss_beacon->len > left)
310                 return 0;
311
312         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
313
314         return priv->ibss_beacon->len;
315 }
316
317 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
318                                        struct iwl_frame *frame, u8 rate)
319 {
320         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
321         unsigned int frame_size;
322
323         tx_beacon_cmd = &frame->u.beacon;
324         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
325
326         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
327         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
328
329         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
330                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
331
332         BUG_ON(frame_size > MAX_MPDU_SIZE);
333         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
334
335         if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
336                 tx_beacon_cmd->tx.rate_n_flags =
337                         iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
338         else
339                 tx_beacon_cmd->tx.rate_n_flags =
340                         iwl_hw_set_rate_n_flags(rate, 0);
341
342         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
343                                      TX_CMD_FLG_TSF_MSK |
344                                      TX_CMD_FLG_STA_RATE_MSK;
345
346         return sizeof(*tx_beacon_cmd) + frame_size;
347 }
348 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
349 {
350         struct iwl_frame *frame;
351         unsigned int frame_size;
352         int rc;
353         u8 rate;
354
355         frame = iwl_get_free_frame(priv);
356
357         if (!frame) {
358                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
359                           "command.\n");
360                 return -ENOMEM;
361         }
362
363         rate = iwl_rate_get_lowest_plcp(priv);
364
365         frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
366
367         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
368                               &frame->u.cmd[0]);
369
370         iwl_free_frame(priv, frame);
371
372         return rc;
373 }
374
375 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
376 {
377         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
378
379         dma_addr_t addr = get_unaligned_le32(&tb->lo);
380         if (sizeof(dma_addr_t) > sizeof(u32))
381                 addr |=
382                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
383
384         return addr;
385 }
386
387 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
388 {
389         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
390
391         return le16_to_cpu(tb->hi_n_len) >> 4;
392 }
393
394 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
395                                   dma_addr_t addr, u16 len)
396 {
397         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
398         u16 hi_n_len = len << 4;
399
400         put_unaligned_le32(addr, &tb->lo);
401         if (sizeof(dma_addr_t) > sizeof(u32))
402                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
403
404         tb->hi_n_len = cpu_to_le16(hi_n_len);
405
406         tfd->num_tbs = idx + 1;
407 }
408
409 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
410 {
411         return tfd->num_tbs & 0x1f;
412 }
413
414 /**
415  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
416  * @priv - driver private data
417  * @txq - tx queue
418  *
419  * Does NOT advance any TFD circular buffer read/write indexes
420  * Does NOT free the TFD itself (which is within circular buffer)
421  */
422 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
423 {
424         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
425         struct iwl_tfd *tfd;
426         struct pci_dev *dev = priv->pci_dev;
427         int index = txq->q.read_ptr;
428         int i;
429         int num_tbs;
430
431         tfd = &tfd_tmp[index];
432
433         /* Sanity check on number of chunks */
434         num_tbs = iwl_tfd_get_num_tbs(tfd);
435
436         if (num_tbs >= IWL_NUM_OF_TBS) {
437                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
438                 /* @todo issue fatal error, it is quite serious situation */
439                 return;
440         }
441
442         /* Unmap tx_cmd */
443         if (num_tbs)
444                 pci_unmap_single(dev,
445                                 pci_unmap_addr(&txq->cmd[index]->meta, mapping),
446                                 pci_unmap_len(&txq->cmd[index]->meta, len),
447                                 PCI_DMA_BIDIRECTIONAL);
448
449         /* Unmap chunks, if any. */
450         for (i = 1; i < num_tbs; i++) {
451                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
452                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
453
454                 if (txq->txb) {
455                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
456                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
457                 }
458         }
459 }
460
461 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
462                                  struct iwl_tx_queue *txq,
463                                  dma_addr_t addr, u16 len,
464                                  u8 reset, u8 pad)
465 {
466         struct iwl_queue *q;
467         struct iwl_tfd *tfd, *tfd_tmp;
468         u32 num_tbs;
469
470         q = &txq->q;
471         tfd_tmp = (struct iwl_tfd *)txq->tfds;
472         tfd = &tfd_tmp[q->write_ptr];
473
474         if (reset)
475                 memset(tfd, 0, sizeof(*tfd));
476
477         num_tbs = iwl_tfd_get_num_tbs(tfd);
478
479         /* Each TFD can point to a maximum 20 Tx buffers */
480         if (num_tbs >= IWL_NUM_OF_TBS) {
481                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
482                           IWL_NUM_OF_TBS);
483                 return -EINVAL;
484         }
485
486         BUG_ON(addr & ~DMA_BIT_MASK(36));
487         if (unlikely(addr & ~IWL_TX_DMA_MASK))
488                 IWL_ERR(priv, "Unaligned address = %llx\n",
489                           (unsigned long long)addr);
490
491         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
492
493         return 0;
494 }
495
496 /*
497  * Tell nic where to find circular buffer of Tx Frame Descriptors for
498  * given Tx queue, and enable the DMA channel used for that queue.
499  *
500  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
501  * channels supported in hardware.
502  */
503 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
504                          struct iwl_tx_queue *txq)
505 {
506         int txq_id = txq->q.id;
507
508         /* Circular buffer (TFD queue in DRAM) physical base address */
509         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
510                              txq->q.dma_addr >> 8);
511
512         return 0;
513 }
514
515 /******************************************************************************
516  *
517  * Generic RX handler implementations
518  *
519  ******************************************************************************/
520 static void iwl_rx_reply_alive(struct iwl_priv *priv,
521                                 struct iwl_rx_mem_buffer *rxb)
522 {
523         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
524         struct iwl_alive_resp *palive;
525         struct delayed_work *pwork;
526
527         palive = &pkt->u.alive_frame;
528
529         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
530                        "0x%01X 0x%01X\n",
531                        palive->is_valid, palive->ver_type,
532                        palive->ver_subtype);
533
534         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
535                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
536                 memcpy(&priv->card_alive_init,
537                        &pkt->u.alive_frame,
538                        sizeof(struct iwl_init_alive_resp));
539                 pwork = &priv->init_alive_start;
540         } else {
541                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
542                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
543                        sizeof(struct iwl_alive_resp));
544                 pwork = &priv->alive_start;
545         }
546
547         /* We delay the ALIVE response by 5ms to
548          * give the HW RF Kill time to activate... */
549         if (palive->is_valid == UCODE_VALID_OK)
550                 queue_delayed_work(priv->workqueue, pwork,
551                                    msecs_to_jiffies(5));
552         else
553                 IWL_WARN(priv, "uCode did not respond OK.\n");
554 }
555
556 static void iwl_bg_beacon_update(struct work_struct *work)
557 {
558         struct iwl_priv *priv =
559                 container_of(work, struct iwl_priv, beacon_update);
560         struct sk_buff *beacon;
561
562         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
563         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
564
565         if (!beacon) {
566                 IWL_ERR(priv, "update beacon failed\n");
567                 return;
568         }
569
570         mutex_lock(&priv->mutex);
571         /* new beacon skb is allocated every time; dispose previous.*/
572         if (priv->ibss_beacon)
573                 dev_kfree_skb(priv->ibss_beacon);
574
575         priv->ibss_beacon = beacon;
576         mutex_unlock(&priv->mutex);
577
578         iwl_send_beacon_cmd(priv);
579 }
580
581 /**
582  * iwl_bg_statistics_periodic - Timer callback to queue statistics
583  *
584  * This callback is provided in order to send a statistics request.
585  *
586  * This timer function is continually reset to execute within
587  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
588  * was received.  We need to ensure we receive the statistics in order
589  * to update the temperature used for calibrating the TXPOWER.
590  */
591 static void iwl_bg_statistics_periodic(unsigned long data)
592 {
593         struct iwl_priv *priv = (struct iwl_priv *)data;
594
595         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
596                 return;
597
598         /* dont send host command if rf-kill is on */
599         if (!iwl_is_ready_rf(priv))
600                 return;
601
602         iwl_send_statistics_request(priv, CMD_ASYNC);
603 }
604
605 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
606                                 struct iwl_rx_mem_buffer *rxb)
607 {
608 #ifdef CONFIG_IWLWIFI_DEBUG
609         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
610         struct iwl4965_beacon_notif *beacon =
611                 (struct iwl4965_beacon_notif *)pkt->u.raw;
612         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
613
614         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
615                 "tsf %d %d rate %d\n",
616                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
617                 beacon->beacon_notify_hdr.failure_frame,
618                 le32_to_cpu(beacon->ibss_mgr_status),
619                 le32_to_cpu(beacon->high_tsf),
620                 le32_to_cpu(beacon->low_tsf), rate);
621 #endif
622
623         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
624             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
625                 queue_work(priv->workqueue, &priv->beacon_update);
626 }
627
628 /* Handle notification from uCode that card's power state is changing
629  * due to software, hardware, or critical temperature RFKILL */
630 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
631                                     struct iwl_rx_mem_buffer *rxb)
632 {
633         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
634         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
635         unsigned long status = priv->status;
636         unsigned long reg_flags;
637
638         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
639                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
640                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
641
642         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
643                      RF_CARD_DISABLED)) {
644
645                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
646                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
647
648                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
649                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
650
651                 if (!(flags & RXON_CARD_DISABLED)) {
652                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
653                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
654                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
655                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
656
657                 }
658
659                 if (flags & RF_CARD_DISABLED) {
660                         iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
661                                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
662                         iwl_read32(priv, CSR_UCODE_DRV_GP1);
663                         spin_lock_irqsave(&priv->reg_lock, reg_flags);
664                         if (!iwl_grab_nic_access(priv))
665                                 iwl_release_nic_access(priv);
666                         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
667                 }
668         }
669
670         if (flags & HW_CARD_DISABLED)
671                 set_bit(STATUS_RF_KILL_HW, &priv->status);
672         else
673                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
674
675
676         if (!(flags & RXON_CARD_DISABLED))
677                 iwl_scan_cancel(priv);
678
679         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
680              test_bit(STATUS_RF_KILL_HW, &priv->status)))
681                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
682                         test_bit(STATUS_RF_KILL_HW, &priv->status));
683         else
684                 wake_up_interruptible(&priv->wait_command_queue);
685 }
686
687 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
688 {
689         if (src == IWL_PWR_SRC_VAUX) {
690                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
691                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
692                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
693                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
694         } else {
695                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
696                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
697                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
698         }
699
700         return 0;
701 }
702
703 /**
704  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
705  *
706  * Setup the RX handlers for each of the reply types sent from the uCode
707  * to the host.
708  *
709  * This function chains into the hardware specific files for them to setup
710  * any hardware specific handlers as well.
711  */
712 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
713 {
714         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
715         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
716         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
717         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
718         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
719             iwl_rx_pm_debug_statistics_notif;
720         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
721
722         /*
723          * The same handler is used for both the REPLY to a discrete
724          * statistics request from the host as well as for the periodic
725          * statistics notifications (after received beacons) from the uCode.
726          */
727         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
728         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
729
730         iwl_setup_spectrum_handlers(priv);
731         iwl_setup_rx_scan_handlers(priv);
732
733         /* status change handler */
734         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
735
736         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
737             iwl_rx_missed_beacon_notif;
738         /* Rx handlers */
739         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
740         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
741         /* block ack */
742         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
743         /* Set up hardware specific Rx handlers */
744         priv->cfg->ops->lib->rx_handler_setup(priv);
745 }
746
747 /**
748  * iwl_rx_handle - Main entry function for receiving responses from uCode
749  *
750  * Uses the priv->rx_handlers callback function array to invoke
751  * the appropriate handlers, including command responses,
752  * frame-received notifications, and other notifications.
753  */
754 void iwl_rx_handle(struct iwl_priv *priv)
755 {
756         struct iwl_rx_mem_buffer *rxb;
757         struct iwl_rx_packet *pkt;
758         struct iwl_rx_queue *rxq = &priv->rxq;
759         u32 r, i;
760         int reclaim;
761         unsigned long flags;
762         u8 fill_rx = 0;
763         u32 count = 8;
764         int total_empty;
765
766         /* uCode's read index (stored in shared DRAM) indicates the last Rx
767          * buffer that the driver may process (last buffer filled by ucode). */
768         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
769         i = rxq->read;
770
771         /* Rx interrupt, but nothing sent from uCode */
772         if (i == r)
773                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
774
775         /* calculate total frames need to be restock after handling RX */
776         total_empty = r - priv->rxq.write_actual;
777         if (total_empty < 0)
778                 total_empty += RX_QUEUE_SIZE;
779
780         if (total_empty > (RX_QUEUE_SIZE / 2))
781                 fill_rx = 1;
782
783         while (i != r) {
784                 rxb = rxq->queue[i];
785
786                 /* If an RXB doesn't have a Rx queue slot associated with it,
787                  * then a bug has been introduced in the queue refilling
788                  * routines -- catch it here */
789                 BUG_ON(rxb == NULL);
790
791                 rxq->queue[i] = NULL;
792
793                 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
794                                  priv->hw_params.rx_buf_size + 256,
795                                  PCI_DMA_FROMDEVICE);
796                 pkt = (struct iwl_rx_packet *)rxb->skb->data;
797
798                 /* Reclaim a command buffer only if this packet is a response
799                  *   to a (driver-originated) command.
800                  * If the packet (e.g. Rx frame) originated from uCode,
801                  *   there is no command buffer to reclaim.
802                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
803                  *   but apparently a few don't get set; catch them here. */
804                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
805                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
806                         (pkt->hdr.cmd != REPLY_RX) &&
807                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
808                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
809                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
810                         (pkt->hdr.cmd != REPLY_TX);
811
812                 /* Based on type of command response or notification,
813                  *   handle those that need handling via function in
814                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
815                 if (priv->rx_handlers[pkt->hdr.cmd]) {
816                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
817                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
818                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
819                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
820                 } else {
821                         /* No handling needed */
822                         IWL_DEBUG_RX(priv,
823                                 "r %d i %d No handler needed for %s, 0x%02x\n",
824                                 r, i, get_cmd_string(pkt->hdr.cmd),
825                                 pkt->hdr.cmd);
826                 }
827
828                 if (reclaim) {
829                         /* Invoke any callbacks, transfer the skb to caller, and
830                          * fire off the (possibly) blocking iwl_send_cmd()
831                          * as we reclaim the driver command queue */
832                         if (rxb && rxb->skb)
833                                 iwl_tx_cmd_complete(priv, rxb);
834                         else
835                                 IWL_WARN(priv, "Claim null rxb?\n");
836                 }
837
838                 /* For now we just don't re-use anything.  We can tweak this
839                  * later to try and re-use notification packets and SKBs that
840                  * fail to Rx correctly */
841                 if (rxb->skb != NULL) {
842                         priv->alloc_rxb_skb--;
843                         dev_kfree_skb_any(rxb->skb);
844                         rxb->skb = NULL;
845                 }
846
847                 spin_lock_irqsave(&rxq->lock, flags);
848                 list_add_tail(&rxb->list, &priv->rxq.rx_used);
849                 spin_unlock_irqrestore(&rxq->lock, flags);
850                 i = (i + 1) & RX_QUEUE_MASK;
851                 /* If there are a lot of unused frames,
852                  * restock the Rx queue so ucode wont assert. */
853                 if (fill_rx) {
854                         count++;
855                         if (count >= 8) {
856                                 priv->rxq.read = i;
857                                 iwl_rx_replenish_now(priv);
858                                 count = 0;
859                         }
860                 }
861         }
862
863         /* Backtrack one entry */
864         priv->rxq.read = i;
865         if (fill_rx)
866                 iwl_rx_replenish_now(priv);
867         else
868                 iwl_rx_queue_restock(priv);
869 }
870
871 /* call this function to flush any scheduled tasklet */
872 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
873 {
874         /* wait to make sure we flush pending tasklet*/
875         synchronize_irq(priv->pci_dev->irq);
876         tasklet_kill(&priv->irq_tasklet);
877 }
878
879 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
880 {
881         u32 inta, handled = 0;
882         u32 inta_fh;
883         unsigned long flags;
884 #ifdef CONFIG_IWLWIFI_DEBUG
885         u32 inta_mask;
886 #endif
887
888         spin_lock_irqsave(&priv->lock, flags);
889
890         /* Ack/clear/reset pending uCode interrupts.
891          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
892          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
893         inta = iwl_read32(priv, CSR_INT);
894         iwl_write32(priv, CSR_INT, inta);
895
896         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
897          * Any new interrupts that happen after this, either while we're
898          * in this tasklet, or later, will show up in next ISR/tasklet. */
899         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
900         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
901
902 #ifdef CONFIG_IWLWIFI_DEBUG
903         if (priv->debug_level & IWL_DL_ISR) {
904                 /* just for debug */
905                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
906                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
907                               inta, inta_mask, inta_fh);
908         }
909 #endif
910
911         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
912          * atomic, make sure that inta covers all the interrupts that
913          * we've discovered, even if FH interrupt came in just after
914          * reading CSR_INT. */
915         if (inta_fh & CSR49_FH_INT_RX_MASK)
916                 inta |= CSR_INT_BIT_FH_RX;
917         if (inta_fh & CSR49_FH_INT_TX_MASK)
918                 inta |= CSR_INT_BIT_FH_TX;
919
920         /* Now service all interrupt bits discovered above. */
921         if (inta & CSR_INT_BIT_HW_ERR) {
922                 IWL_ERR(priv, "Microcode HW error detected.  Restarting.\n");
923
924                 /* Tell the device to stop sending interrupts */
925                 iwl_disable_interrupts(priv);
926
927                 priv->isr_stats.hw++;
928                 iwl_irq_handle_error(priv);
929
930                 handled |= CSR_INT_BIT_HW_ERR;
931
932                 spin_unlock_irqrestore(&priv->lock, flags);
933
934                 return;
935         }
936
937 #ifdef CONFIG_IWLWIFI_DEBUG
938         if (priv->debug_level & (IWL_DL_ISR)) {
939                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
940                 if (inta & CSR_INT_BIT_SCD) {
941                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
942                                       "the frame/frames.\n");
943                         priv->isr_stats.sch++;
944                 }
945
946                 /* Alive notification via Rx interrupt will do the real work */
947                 if (inta & CSR_INT_BIT_ALIVE) {
948                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
949                         priv->isr_stats.alive++;
950                 }
951         }
952 #endif
953         /* Safely ignore these bits for debug checks below */
954         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
955
956         /* HW RF KILL switch toggled */
957         if (inta & CSR_INT_BIT_RF_KILL) {
958                 int hw_rf_kill = 0;
959                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
960                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
961                         hw_rf_kill = 1;
962
963                 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
964                                 hw_rf_kill ? "disable radio" : "enable radio");
965
966                 priv->isr_stats.rfkill++;
967
968                 /* driver only loads ucode once setting the interface up.
969                  * the driver allows loading the ucode even if the radio
970                  * is killed. Hence update the killswitch state here. The
971                  * rfkill handler will care about restarting if needed.
972                  */
973                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
974                         if (hw_rf_kill)
975                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
976                         else
977                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
978                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
979                 }
980
981                 handled |= CSR_INT_BIT_RF_KILL;
982         }
983
984         /* Chip got too hot and stopped itself */
985         if (inta & CSR_INT_BIT_CT_KILL) {
986                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
987                 priv->isr_stats.ctkill++;
988                 handled |= CSR_INT_BIT_CT_KILL;
989         }
990
991         /* Error detected by uCode */
992         if (inta & CSR_INT_BIT_SW_ERR) {
993                 IWL_ERR(priv, "Microcode SW error detected. "
994                         " Restarting 0x%X.\n", inta);
995                 priv->isr_stats.sw++;
996                 priv->isr_stats.sw_err = inta;
997                 iwl_irq_handle_error(priv);
998                 handled |= CSR_INT_BIT_SW_ERR;
999         }
1000
1001         /* uCode wakes up after power-down sleep */
1002         if (inta & CSR_INT_BIT_WAKEUP) {
1003                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1004                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1005                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1006                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1007                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1008                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1009                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1010                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1011
1012                 priv->isr_stats.wakeup++;
1013
1014                 handled |= CSR_INT_BIT_WAKEUP;
1015         }
1016
1017         /* All uCode command responses, including Tx command responses,
1018          * Rx "responses" (frame-received notification), and other
1019          * notifications from uCode come through here*/
1020         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1021                 iwl_rx_handle(priv);
1022                 priv->isr_stats.rx++;
1023                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1024         }
1025
1026         if (inta & CSR_INT_BIT_FH_TX) {
1027                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1028                 priv->isr_stats.tx++;
1029                 handled |= CSR_INT_BIT_FH_TX;
1030                 /* FH finished to write, send event */
1031                 priv->ucode_write_complete = 1;
1032                 wake_up_interruptible(&priv->wait_command_queue);
1033         }
1034
1035         if (inta & ~handled) {
1036                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1037                 priv->isr_stats.unhandled++;
1038         }
1039
1040         if (inta & ~(priv->inta_mask)) {
1041                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1042                          inta & ~priv->inta_mask);
1043                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1044         }
1045
1046         /* Re-enable all interrupts */
1047         /* only Re-enable if diabled by irq */
1048         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1049                 iwl_enable_interrupts(priv);
1050
1051 #ifdef CONFIG_IWLWIFI_DEBUG
1052         if (priv->debug_level & (IWL_DL_ISR)) {
1053                 inta = iwl_read32(priv, CSR_INT);
1054                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1055                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1056                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1057                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1058         }
1059 #endif
1060         spin_unlock_irqrestore(&priv->lock, flags);
1061 }
1062
1063 /* tasklet for iwlagn interrupt */
1064 static void iwl_irq_tasklet(struct iwl_priv *priv)
1065 {
1066         u32 inta = 0;
1067         u32 handled = 0;
1068         unsigned long flags;
1069 #ifdef CONFIG_IWLWIFI_DEBUG
1070         u32 inta_mask;
1071 #endif
1072
1073         spin_lock_irqsave(&priv->lock, flags);
1074
1075         /* Ack/clear/reset pending uCode interrupts.
1076          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1077          */
1078         iwl_write32(priv, CSR_INT, priv->inta);
1079
1080         inta = priv->inta;
1081
1082 #ifdef CONFIG_IWLWIFI_DEBUG
1083         if (priv->debug_level & IWL_DL_ISR) {
1084                 /* just for debug */
1085                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1086                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1087                                 inta, inta_mask);
1088         }
1089 #endif
1090         /* saved interrupt in inta variable now we can reset priv->inta */
1091         priv->inta = 0;
1092
1093         /* Now service all interrupt bits discovered above. */
1094         if (inta & CSR_INT_BIT_HW_ERR) {
1095                 IWL_ERR(priv, "Microcode HW error detected.  Restarting.\n");
1096
1097                 /* Tell the device to stop sending interrupts */
1098                 iwl_disable_interrupts(priv);
1099
1100                 priv->isr_stats.hw++;
1101                 iwl_irq_handle_error(priv);
1102
1103                 handled |= CSR_INT_BIT_HW_ERR;
1104
1105                 spin_unlock_irqrestore(&priv->lock, flags);
1106
1107                 return;
1108         }
1109
1110 #ifdef CONFIG_IWLWIFI_DEBUG
1111         if (priv->debug_level & (IWL_DL_ISR)) {
1112                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1113                 if (inta & CSR_INT_BIT_SCD) {
1114                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1115                                       "the frame/frames.\n");
1116                         priv->isr_stats.sch++;
1117                 }
1118
1119                 /* Alive notification via Rx interrupt will do the real work */
1120                 if (inta & CSR_INT_BIT_ALIVE) {
1121                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1122                         priv->isr_stats.alive++;
1123                 }
1124         }
1125 #endif
1126         /* Safely ignore these bits for debug checks below */
1127         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1128
1129         /* HW RF KILL switch toggled */
1130         if (inta & CSR_INT_BIT_RF_KILL) {
1131                 int hw_rf_kill = 0;
1132                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1133                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1134                         hw_rf_kill = 1;
1135
1136                 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
1137                                 hw_rf_kill ? "disable radio" : "enable radio");
1138
1139                 priv->isr_stats.rfkill++;
1140
1141                 /* driver only loads ucode once setting the interface up.
1142                  * the driver allows loading the ucode even if the radio
1143                  * is killed. Hence update the killswitch state here. The
1144                  * rfkill handler will care about restarting if needed.
1145                  */
1146                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1147                         if (hw_rf_kill)
1148                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1149                         else
1150                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1151                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1152                 }
1153
1154                 handled |= CSR_INT_BIT_RF_KILL;
1155         }
1156
1157         /* Chip got too hot and stopped itself */
1158         if (inta & CSR_INT_BIT_CT_KILL) {
1159                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1160                 priv->isr_stats.ctkill++;
1161                 handled |= CSR_INT_BIT_CT_KILL;
1162         }
1163
1164         /* Error detected by uCode */
1165         if (inta & CSR_INT_BIT_SW_ERR) {
1166                 IWL_ERR(priv, "Microcode SW error detected. "
1167                         " Restarting 0x%X.\n", inta);
1168                 priv->isr_stats.sw++;
1169                 priv->isr_stats.sw_err = inta;
1170                 iwl_irq_handle_error(priv);
1171                 handled |= CSR_INT_BIT_SW_ERR;
1172         }
1173
1174         /* uCode wakes up after power-down sleep */
1175         if (inta & CSR_INT_BIT_WAKEUP) {
1176                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1177                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1178                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1179                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1180                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1181                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1182                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1183                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1184
1185                 priv->isr_stats.wakeup++;
1186
1187                 handled |= CSR_INT_BIT_WAKEUP;
1188         }
1189
1190         /* All uCode command responses, including Tx command responses,
1191          * Rx "responses" (frame-received notification), and other
1192          * notifications from uCode come through here*/
1193         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1194                         CSR_INT_BIT_RX_PERIODIC)) {
1195                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1196                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1197                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1198                         iwl_write32(priv, CSR_FH_INT_STATUS,
1199                                         CSR49_FH_INT_RX_MASK);
1200                 }
1201                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1202                         handled |= CSR_INT_BIT_RX_PERIODIC;
1203                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1204                 }
1205                 /* Sending RX interrupt require many steps to be done in the
1206                  * the device:
1207                  * 1- write interrupt to current index in ICT table.
1208                  * 2- dma RX frame.
1209                  * 3- update RX shared data to indicate last write index.
1210                  * 4- send interrupt.
1211                  * This could lead to RX race, driver could receive RX interrupt
1212                  * but the shared data changes does not reflect this.
1213                  * this could lead to RX race, RX periodic will solve this race
1214                  */
1215                 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1216                             CSR_INT_PERIODIC_DIS);
1217                 iwl_rx_handle(priv);
1218                 /* Only set RX periodic if real RX is received. */
1219                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1220                         iwl_write32(priv, CSR_INT_PERIODIC_REG,
1221                                     CSR_INT_PERIODIC_ENA);
1222
1223                 priv->isr_stats.rx++;
1224         }
1225
1226         if (inta & CSR_INT_BIT_FH_TX) {
1227                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1228                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1229                 priv->isr_stats.tx++;
1230                 handled |= CSR_INT_BIT_FH_TX;
1231                 /* FH finished to write, send event */
1232                 priv->ucode_write_complete = 1;
1233                 wake_up_interruptible(&priv->wait_command_queue);
1234         }
1235
1236         if (inta & ~handled) {
1237                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1238                 priv->isr_stats.unhandled++;
1239         }
1240
1241         if (inta & ~(priv->inta_mask)) {
1242                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1243                          inta & ~priv->inta_mask);
1244         }
1245
1246
1247         /* Re-enable all interrupts */
1248         /* only Re-enable if diabled by irq */
1249         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1250                 iwl_enable_interrupts(priv);
1251
1252         spin_unlock_irqrestore(&priv->lock, flags);
1253
1254 }
1255
1256
1257 /******************************************************************************
1258  *
1259  * uCode download functions
1260  *
1261  ******************************************************************************/
1262
1263 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1264 {
1265         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1266         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1267         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1268         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1269         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1270         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1271 }
1272
1273 static void iwl_nic_start(struct iwl_priv *priv)
1274 {
1275         /* Remove all resets to allow NIC to operate */
1276         iwl_write32(priv, CSR_RESET, 0);
1277 }
1278
1279
1280 /**
1281  * iwl_read_ucode - Read uCode images from disk file.
1282  *
1283  * Copy into buffers for card to fetch via bus-mastering
1284  */
1285 static int iwl_read_ucode(struct iwl_priv *priv)
1286 {
1287         struct iwl_ucode *ucode;
1288         int ret = -EINVAL, index;
1289         const struct firmware *ucode_raw;
1290         const char *name_pre = priv->cfg->fw_name_pre;
1291         const unsigned int api_max = priv->cfg->ucode_api_max;
1292         const unsigned int api_min = priv->cfg->ucode_api_min;
1293         char buf[25];
1294         u8 *src;
1295         size_t len;
1296         u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1297
1298         /* Ask kernel firmware_class module to get the boot firmware off disk.
1299          * request_firmware() is synchronous, file is in memory on return. */
1300         for (index = api_max; index >= api_min; index--) {
1301                 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1302                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1303                 if (ret < 0) {
1304                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
1305                                   buf, ret);
1306                         if (ret == -ENOENT)
1307                                 continue;
1308                         else
1309                                 goto error;
1310                 } else {
1311                         if (index < api_max)
1312                                 IWL_ERR(priv, "Loaded firmware %s, "
1313                                         "which is deprecated. "
1314                                         "Please use API v%u instead.\n",
1315                                           buf, api_max);
1316
1317                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1318                                        buf, ucode_raw->size);
1319                         break;
1320                 }
1321         }
1322
1323         if (ret < 0)
1324                 goto error;
1325
1326         /* Make sure that we got at least our header! */
1327         if (ucode_raw->size < sizeof(*ucode)) {
1328                 IWL_ERR(priv, "File size way too small!\n");
1329                 ret = -EINVAL;
1330                 goto err_release;
1331         }
1332
1333         /* Data from ucode file:  header followed by uCode images */
1334         ucode = (void *)ucode_raw->data;
1335
1336         priv->ucode_ver = le32_to_cpu(ucode->ver);
1337         api_ver = IWL_UCODE_API(priv->ucode_ver);
1338         inst_size = le32_to_cpu(ucode->inst_size);
1339         data_size = le32_to_cpu(ucode->data_size);
1340         init_size = le32_to_cpu(ucode->init_size);
1341         init_data_size = le32_to_cpu(ucode->init_data_size);
1342         boot_size = le32_to_cpu(ucode->boot_size);
1343
1344         /* api_ver should match the api version forming part of the
1345          * firmware filename ... but we don't check for that and only rely
1346          * on the API version read from firmware header from here on forward */
1347
1348         if (api_ver < api_min || api_ver > api_max) {
1349                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1350                           "Driver supports v%u, firmware is v%u.\n",
1351                           api_max, api_ver);
1352                 priv->ucode_ver = 0;
1353                 ret = -EINVAL;
1354                 goto err_release;
1355         }
1356         if (api_ver != api_max)
1357                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1358                           "got v%u. New firmware can be obtained "
1359                           "from http://www.intellinuxwireless.org.\n",
1360                           api_max, api_ver);
1361
1362         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1363                IWL_UCODE_MAJOR(priv->ucode_ver),
1364                IWL_UCODE_MINOR(priv->ucode_ver),
1365                IWL_UCODE_API(priv->ucode_ver),
1366                IWL_UCODE_SERIAL(priv->ucode_ver));
1367
1368         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1369                        priv->ucode_ver);
1370         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1371                        inst_size);
1372         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1373                        data_size);
1374         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1375                        init_size);
1376         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1377                        init_data_size);
1378         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1379                        boot_size);
1380
1381         /* Verify size of file vs. image size info in file's header */
1382         if (ucode_raw->size < sizeof(*ucode) +
1383                 inst_size + data_size + init_size +
1384                 init_data_size + boot_size) {
1385
1386                 IWL_DEBUG_INFO(priv, "uCode file size %d too small\n",
1387                                (int)ucode_raw->size);
1388                 ret = -EINVAL;
1389                 goto err_release;
1390         }
1391
1392         /* Verify that uCode images will fit in card's SRAM */
1393         if (inst_size > priv->hw_params.max_inst_size) {
1394                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1395                                inst_size);
1396                 ret = -EINVAL;
1397                 goto err_release;
1398         }
1399
1400         if (data_size > priv->hw_params.max_data_size) {
1401                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1402                                 data_size);
1403                 ret = -EINVAL;
1404                 goto err_release;
1405         }
1406         if (init_size > priv->hw_params.max_inst_size) {
1407                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1408                         init_size);
1409                 ret = -EINVAL;
1410                 goto err_release;
1411         }
1412         if (init_data_size > priv->hw_params.max_data_size) {
1413                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1414                       init_data_size);
1415                 ret = -EINVAL;
1416                 goto err_release;
1417         }
1418         if (boot_size > priv->hw_params.max_bsm_size) {
1419                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1420                         boot_size);
1421                 ret = -EINVAL;
1422                 goto err_release;
1423         }
1424
1425         /* Allocate ucode buffers for card's bus-master loading ... */
1426
1427         /* Runtime instructions and 2 copies of data:
1428          * 1) unmodified from disk
1429          * 2) backup cache for save/restore during power-downs */
1430         priv->ucode_code.len = inst_size;
1431         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1432
1433         priv->ucode_data.len = data_size;
1434         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1435
1436         priv->ucode_data_backup.len = data_size;
1437         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1438
1439         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1440             !priv->ucode_data_backup.v_addr)
1441                 goto err_pci_alloc;
1442
1443         /* Initialization instructions and data */
1444         if (init_size && init_data_size) {
1445                 priv->ucode_init.len = init_size;
1446                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1447
1448                 priv->ucode_init_data.len = init_data_size;
1449                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1450
1451                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1452                         goto err_pci_alloc;
1453         }
1454
1455         /* Bootstrap (instructions only, no data) */
1456         if (boot_size) {
1457                 priv->ucode_boot.len = boot_size;
1458                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1459
1460                 if (!priv->ucode_boot.v_addr)
1461                         goto err_pci_alloc;
1462         }
1463
1464         /* Copy images into buffers for card's bus-master reads ... */
1465
1466         /* Runtime instructions (first block of data in file) */
1467         src = &ucode->data[0];
1468         len = priv->ucode_code.len;
1469         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1470         memcpy(priv->ucode_code.v_addr, src, len);
1471         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1472                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1473
1474         /* Runtime data (2nd block)
1475          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1476         src = &ucode->data[inst_size];
1477         len = priv->ucode_data.len;
1478         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1479         memcpy(priv->ucode_data.v_addr, src, len);
1480         memcpy(priv->ucode_data_backup.v_addr, src, len);
1481
1482         /* Initialization instructions (3rd block) */
1483         if (init_size) {
1484                 src = &ucode->data[inst_size + data_size];
1485                 len = priv->ucode_init.len;
1486                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1487                                 len);
1488                 memcpy(priv->ucode_init.v_addr, src, len);
1489         }
1490
1491         /* Initialization data (4th block) */
1492         if (init_data_size) {
1493                 src = &ucode->data[inst_size + data_size + init_size];
1494                 len = priv->ucode_init_data.len;
1495                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1496                                len);
1497                 memcpy(priv->ucode_init_data.v_addr, src, len);
1498         }
1499
1500         /* Bootstrap instructions (5th block) */
1501         src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1502         len = priv->ucode_boot.len;
1503         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1504         memcpy(priv->ucode_boot.v_addr, src, len);
1505
1506         /* We have our copies now, allow OS release its copies */
1507         release_firmware(ucode_raw);
1508         return 0;
1509
1510  err_pci_alloc:
1511         IWL_ERR(priv, "failed to allocate pci memory\n");
1512         ret = -ENOMEM;
1513         iwl_dealloc_ucode_pci(priv);
1514
1515  err_release:
1516         release_firmware(ucode_raw);
1517
1518  error:
1519         return ret;
1520 }
1521
1522 /**
1523  * iwl_alive_start - called after REPLY_ALIVE notification received
1524  *                   from protocol/runtime uCode (initialization uCode's
1525  *                   Alive gets handled by iwl_init_alive_start()).
1526  */
1527 static void iwl_alive_start(struct iwl_priv *priv)
1528 {
1529         int ret = 0;
1530
1531         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1532
1533         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1534                 /* We had an error bringing up the hardware, so take it
1535                  * all the way back down so we can try again */
1536                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1537                 goto restart;
1538         }
1539
1540         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1541          * This is a paranoid check, because we would not have gotten the
1542          * "runtime" alive if code weren't properly loaded.  */
1543         if (iwl_verify_ucode(priv)) {
1544                 /* Runtime instruction load was bad;
1545                  * take it all the way back down so we can try again */
1546                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1547                 goto restart;
1548         }
1549
1550         iwl_clear_stations_table(priv);
1551         ret = priv->cfg->ops->lib->alive_notify(priv);
1552         if (ret) {
1553                 IWL_WARN(priv,
1554                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
1555                 goto restart;
1556         }
1557
1558         /* After the ALIVE response, we can send host commands to the uCode */
1559         set_bit(STATUS_ALIVE, &priv->status);
1560
1561         if (iwl_is_rfkill(priv))
1562                 return;
1563
1564         ieee80211_wake_queues(priv->hw);
1565
1566         priv->active_rate = priv->rates_mask;
1567         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1568
1569         if (iwl_is_associated(priv)) {
1570                 struct iwl_rxon_cmd *active_rxon =
1571                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
1572                 /* apply any changes in staging */
1573                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1574                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1575         } else {
1576                 /* Initialize our rx_config data */
1577                 iwl_connection_init_rx_config(priv, priv->iw_mode);
1578
1579                 if (priv->cfg->ops->hcmd->set_rxon_chain)
1580                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
1581
1582                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1583         }
1584
1585         /* Configure Bluetooth device coexistence support */
1586         iwl_send_bt_config(priv);
1587
1588         iwl_reset_run_time_calib(priv);
1589
1590         /* Configure the adapter for unassociated operation */
1591         iwlcore_commit_rxon(priv);
1592
1593         /* At this point, the NIC is initialized and operational */
1594         iwl_rf_kill_ct_config(priv);
1595
1596         iwl_leds_register(priv);
1597
1598         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1599         set_bit(STATUS_READY, &priv->status);
1600         wake_up_interruptible(&priv->wait_command_queue);
1601
1602         iwl_power_update_mode(priv, 1);
1603
1604         /* reassociate for ADHOC mode */
1605         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1606                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1607                                                                 priv->vif);
1608                 if (beacon)
1609                         iwl_mac_beacon_update(priv->hw, beacon);
1610         }
1611
1612
1613         if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1614                 iwl_set_mode(priv, priv->iw_mode);
1615
1616         return;
1617
1618  restart:
1619         queue_work(priv->workqueue, &priv->restart);
1620 }
1621
1622 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1623
1624 static void __iwl_down(struct iwl_priv *priv)
1625 {
1626         unsigned long flags;
1627         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1628
1629         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1630
1631         if (!exit_pending)
1632                 set_bit(STATUS_EXIT_PENDING, &priv->status);
1633
1634         iwl_leds_unregister(priv);
1635
1636         iwl_clear_stations_table(priv);
1637
1638         /* Unblock any waiting calls */
1639         wake_up_interruptible_all(&priv->wait_command_queue);
1640
1641         /* Wipe out the EXIT_PENDING status bit if we are not actually
1642          * exiting the module */
1643         if (!exit_pending)
1644                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1645
1646         /* stop and reset the on-board processor */
1647         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1648
1649         /* tell the device to stop sending interrupts */
1650         spin_lock_irqsave(&priv->lock, flags);
1651         iwl_disable_interrupts(priv);
1652         spin_unlock_irqrestore(&priv->lock, flags);
1653         iwl_synchronize_irq(priv);
1654
1655         if (priv->mac80211_registered)
1656                 ieee80211_stop_queues(priv->hw);
1657
1658         /* If we have not previously called iwl_init() then
1659          * clear all bits but the RF Kill bit and return */
1660         if (!iwl_is_init(priv)) {
1661                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1662                                         STATUS_RF_KILL_HW |
1663                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1664                                         STATUS_GEO_CONFIGURED |
1665                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1666                                         STATUS_EXIT_PENDING;
1667                 goto exit;
1668         }
1669
1670         /* ...otherwise clear out all the status bits but the RF Kill
1671          * bit and continue taking the NIC down. */
1672         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1673                                 STATUS_RF_KILL_HW |
1674                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1675                                 STATUS_GEO_CONFIGURED |
1676                         test_bit(STATUS_FW_ERROR, &priv->status) <<
1677                                 STATUS_FW_ERROR |
1678                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1679                                 STATUS_EXIT_PENDING;
1680
1681         /* device going down, Stop using ICT table */
1682         iwl_disable_ict(priv);
1683         spin_lock_irqsave(&priv->lock, flags);
1684         iwl_clear_bit(priv, CSR_GP_CNTRL,
1685                          CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1686         spin_unlock_irqrestore(&priv->lock, flags);
1687
1688         iwl_txq_ctx_stop(priv);
1689         iwl_rxq_stop(priv);
1690
1691         iwl_write_prph(priv, APMG_CLK_DIS_REG,
1692                                 APMG_CLK_VAL_DMA_CLK_RQT);
1693
1694         udelay(5);
1695
1696         /* FIXME: apm_ops.suspend(priv) */
1697         if (exit_pending)
1698                 priv->cfg->ops->lib->apm_ops.stop(priv);
1699         else
1700                 priv->cfg->ops->lib->apm_ops.reset(priv);
1701  exit:
1702         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1703
1704         if (priv->ibss_beacon)
1705                 dev_kfree_skb(priv->ibss_beacon);
1706         priv->ibss_beacon = NULL;
1707
1708         /* clear out any free frames */
1709         iwl_clear_free_frames(priv);
1710 }
1711
1712 static void iwl_down(struct iwl_priv *priv)
1713 {
1714         mutex_lock(&priv->mutex);
1715         __iwl_down(priv);
1716         mutex_unlock(&priv->mutex);
1717
1718         iwl_cancel_deferred_work(priv);
1719 }
1720
1721 #define HW_READY_TIMEOUT (50)
1722
1723 static int iwl_set_hw_ready(struct iwl_priv *priv)
1724 {
1725         int ret = 0;
1726
1727         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1728                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1729
1730         /* See if we got it */
1731         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1732                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1733                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1734                                 HW_READY_TIMEOUT);
1735         if (ret != -ETIMEDOUT)
1736                 priv->hw_ready = true;
1737         else
1738                 priv->hw_ready = false;
1739
1740         IWL_DEBUG_INFO(priv, "hardware %s\n",
1741                       (priv->hw_ready == 1) ? "ready" : "not ready");
1742         return ret;
1743 }
1744
1745 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1746 {
1747         int ret = 0;
1748
1749         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1750
1751         ret = iwl_set_hw_ready(priv);
1752         if (priv->hw_ready)
1753                 return ret;
1754
1755         /* If HW is not ready, prepare the conditions to check again */
1756         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1757                         CSR_HW_IF_CONFIG_REG_PREPARE);
1758
1759         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1760                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1761                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1762
1763         /* HW should be ready by now, check again. */
1764         if (ret != -ETIMEDOUT)
1765                 iwl_set_hw_ready(priv);
1766
1767         return ret;
1768 }
1769
1770 #define MAX_HW_RESTARTS 5
1771
1772 static int __iwl_up(struct iwl_priv *priv)
1773 {
1774         int i;
1775         int ret;
1776
1777         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1778                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1779                 return -EIO;
1780         }
1781
1782         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1783                 IWL_ERR(priv, "ucode not available for device bringup\n");
1784                 return -EIO;
1785         }
1786
1787         iwl_prepare_card_hw(priv);
1788
1789         if (!priv->hw_ready) {
1790                 IWL_WARN(priv, "Exit HW not ready\n");
1791                 return -EIO;
1792         }
1793
1794         /* If platform's RF_KILL switch is NOT set to KILL */
1795         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1796                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1797         else
1798                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1799
1800         if (iwl_is_rfkill(priv)) {
1801                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
1802
1803                 iwl_enable_interrupts(priv);
1804                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
1805                 return 0;
1806         }
1807
1808         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1809
1810         ret = iwl_hw_nic_init(priv);
1811         if (ret) {
1812                 IWL_ERR(priv, "Unable to init nic\n");
1813                 return ret;
1814         }
1815
1816         /* make sure rfkill handshake bits are cleared */
1817         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1818         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1819                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1820
1821         /* clear (again), then enable host interrupts */
1822         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1823         iwl_enable_interrupts(priv);
1824
1825         /* really make sure rfkill handshake bits are cleared */
1826         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1827         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1828
1829         /* Copy original ucode data image from disk into backup cache.
1830          * This will be used to initialize the on-board processor's
1831          * data SRAM for a clean start when the runtime program first loads. */
1832         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
1833                priv->ucode_data.len);
1834
1835         for (i = 0; i < MAX_HW_RESTARTS; i++) {
1836
1837                 iwl_clear_stations_table(priv);
1838
1839                 /* load bootstrap state machine,
1840                  * load bootstrap program into processor's memory,
1841                  * prepare to load the "initialize" uCode */
1842                 ret = priv->cfg->ops->lib->load_ucode(priv);
1843
1844                 if (ret) {
1845                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
1846                                 ret);
1847                         continue;
1848                 }
1849
1850                 /* start card; "initialize" will load runtime ucode */
1851                 iwl_nic_start(priv);
1852
1853                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
1854
1855                 return 0;
1856         }
1857
1858         set_bit(STATUS_EXIT_PENDING, &priv->status);
1859         __iwl_down(priv);
1860         clear_bit(STATUS_EXIT_PENDING, &priv->status);
1861
1862         /* tried to restart and config the device for as long as our
1863          * patience could withstand */
1864         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
1865         return -EIO;
1866 }
1867
1868
1869 /*****************************************************************************
1870  *
1871  * Workqueue callbacks
1872  *
1873  *****************************************************************************/
1874
1875 static void iwl_bg_init_alive_start(struct work_struct *data)
1876 {
1877         struct iwl_priv *priv =
1878             container_of(data, struct iwl_priv, init_alive_start.work);
1879
1880         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1881                 return;
1882
1883         mutex_lock(&priv->mutex);
1884         priv->cfg->ops->lib->init_alive_start(priv);
1885         mutex_unlock(&priv->mutex);
1886 }
1887
1888 static void iwl_bg_alive_start(struct work_struct *data)
1889 {
1890         struct iwl_priv *priv =
1891             container_of(data, struct iwl_priv, alive_start.work);
1892
1893         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1894                 return;
1895
1896         /* enable dram interrupt */
1897         iwl_reset_ict(priv);
1898
1899         mutex_lock(&priv->mutex);
1900         iwl_alive_start(priv);
1901         mutex_unlock(&priv->mutex);
1902 }
1903
1904 static void iwl_bg_run_time_calib_work(struct work_struct *work)
1905 {
1906         struct iwl_priv *priv = container_of(work, struct iwl_priv,
1907                         run_time_calib_work);
1908
1909         mutex_lock(&priv->mutex);
1910
1911         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1912             test_bit(STATUS_SCANNING, &priv->status)) {
1913                 mutex_unlock(&priv->mutex);
1914                 return;
1915         }
1916
1917         if (priv->start_calib) {
1918                 iwl_chain_noise_calibration(priv, &priv->statistics);
1919
1920                 iwl_sensitivity_calibration(priv, &priv->statistics);
1921         }
1922
1923         mutex_unlock(&priv->mutex);
1924         return;
1925 }
1926
1927 static void iwl_bg_up(struct work_struct *data)
1928 {
1929         struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
1930
1931         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1932                 return;
1933
1934         mutex_lock(&priv->mutex);
1935         __iwl_up(priv);
1936         mutex_unlock(&priv->mutex);
1937 }
1938
1939 static void iwl_bg_restart(struct work_struct *data)
1940 {
1941         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
1942
1943         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1944                 return;
1945
1946         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
1947                 mutex_lock(&priv->mutex);
1948                 priv->vif = NULL;
1949                 priv->is_open = 0;
1950                 mutex_unlock(&priv->mutex);
1951                 iwl_down(priv);
1952                 ieee80211_restart_hw(priv->hw);
1953         } else {
1954                 iwl_down(priv);
1955                 queue_work(priv->workqueue, &priv->up);
1956         }
1957 }
1958
1959 static void iwl_bg_rx_replenish(struct work_struct *data)
1960 {
1961         struct iwl_priv *priv =
1962             container_of(data, struct iwl_priv, rx_replenish);
1963
1964         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1965                 return;
1966
1967         mutex_lock(&priv->mutex);
1968         iwl_rx_replenish(priv);
1969         mutex_unlock(&priv->mutex);
1970 }
1971
1972 #define IWL_DELAY_NEXT_SCAN (HZ*2)
1973
1974 void iwl_post_associate(struct iwl_priv *priv)
1975 {
1976         struct ieee80211_conf *conf = NULL;
1977         int ret = 0;
1978         unsigned long flags;
1979
1980         if (priv->iw_mode == NL80211_IFTYPE_AP) {
1981                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
1982                 return;
1983         }
1984
1985         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
1986                         priv->assoc_id, priv->active_rxon.bssid_addr);
1987
1988
1989         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1990                 return;
1991
1992
1993         if (!priv->vif || !priv->is_open)
1994                 return;
1995
1996         iwl_scan_cancel_timeout(priv, 200);
1997
1998         conf = ieee80211_get_hw_conf(priv->hw);
1999
2000         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2001         iwlcore_commit_rxon(priv);
2002
2003         iwl_setup_rxon_timing(priv);
2004         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2005                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2006         if (ret)
2007                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2008                             "Attempting to continue.\n");
2009
2010         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2011
2012         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2013
2014         if (priv->cfg->ops->hcmd->set_rxon_chain)
2015                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2016
2017         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2018
2019         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2020                         priv->assoc_id, priv->beacon_int);
2021
2022         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2023                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2024         else
2025                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2026
2027         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2028                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2029                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2030                 else
2031                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2032
2033                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2034                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2035
2036         }
2037
2038         iwlcore_commit_rxon(priv);
2039
2040         switch (priv->iw_mode) {
2041         case NL80211_IFTYPE_STATION:
2042                 break;
2043
2044         case NL80211_IFTYPE_ADHOC:
2045
2046                 /* assume default assoc id */
2047                 priv->assoc_id = 1;
2048
2049                 iwl_rxon_add_station(priv, priv->bssid, 0);
2050                 iwl_send_beacon_cmd(priv);
2051
2052                 break;
2053
2054         default:
2055                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2056                           __func__, priv->iw_mode);
2057                 break;
2058         }
2059
2060         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2061                 priv->assoc_station_added = 1;
2062
2063         spin_lock_irqsave(&priv->lock, flags);
2064         iwl_activate_qos(priv, 0);
2065         spin_unlock_irqrestore(&priv->lock, flags);
2066
2067         /* the chain noise calibration will enabled PM upon completion
2068          * If chain noise has already been run, then we need to enable
2069          * power management here */
2070         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2071                 iwl_power_update_mode(priv, 0);
2072
2073         /* Enable Rx differential gain and sensitivity calibrations */
2074         iwl_chain_noise_reset(priv);
2075         priv->start_calib = 1;
2076
2077 }
2078
2079 /*****************************************************************************
2080  *
2081  * mac80211 entry point functions
2082  *
2083  *****************************************************************************/
2084
2085 #define UCODE_READY_TIMEOUT     (4 * HZ)
2086
2087 static int iwl_mac_start(struct ieee80211_hw *hw)
2088 {
2089         struct iwl_priv *priv = hw->priv;
2090         int ret;
2091
2092         IWL_DEBUG_MAC80211(priv, "enter\n");
2093
2094         /* we should be verifying the device is ready to be opened */
2095         mutex_lock(&priv->mutex);
2096
2097         /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2098          * ucode filename and max sizes are card-specific. */
2099
2100         if (!priv->ucode_code.len) {
2101                 ret = iwl_read_ucode(priv);
2102                 if (ret) {
2103                         IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2104                         mutex_unlock(&priv->mutex);
2105                         return ret;
2106                 }
2107         }
2108
2109         ret = __iwl_up(priv);
2110
2111         mutex_unlock(&priv->mutex);
2112
2113         if (ret)
2114                 return ret;
2115
2116         if (iwl_is_rfkill(priv))
2117                 goto out;
2118
2119         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2120
2121         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2122          * mac80211 will not be run successfully. */
2123         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2124                         test_bit(STATUS_READY, &priv->status),
2125                         UCODE_READY_TIMEOUT);
2126         if (!ret) {
2127                 if (!test_bit(STATUS_READY, &priv->status)) {
2128                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2129                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2130                         return -ETIMEDOUT;
2131                 }
2132         }
2133
2134 out:
2135         priv->is_open = 1;
2136         IWL_DEBUG_MAC80211(priv, "leave\n");
2137         return 0;
2138 }
2139
2140 static void iwl_mac_stop(struct ieee80211_hw *hw)
2141 {
2142         struct iwl_priv *priv = hw->priv;
2143
2144         IWL_DEBUG_MAC80211(priv, "enter\n");
2145
2146         if (!priv->is_open)
2147                 return;
2148
2149         priv->is_open = 0;
2150
2151         if (iwl_is_ready_rf(priv)) {
2152                 /* stop mac, cancel any scan request and clear
2153                  * RXON_FILTER_ASSOC_MSK BIT
2154                  */
2155                 mutex_lock(&priv->mutex);
2156                 iwl_scan_cancel_timeout(priv, 100);
2157                 mutex_unlock(&priv->mutex);
2158         }
2159
2160         iwl_down(priv);
2161
2162         flush_workqueue(priv->workqueue);
2163
2164         /* enable interrupts again in order to receive rfkill changes */
2165         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2166         iwl_enable_interrupts(priv);
2167
2168         IWL_DEBUG_MAC80211(priv, "leave\n");
2169 }
2170
2171 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2172 {
2173         struct iwl_priv *priv = hw->priv;
2174
2175         IWL_DEBUG_MACDUMP(priv, "enter\n");
2176
2177         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2178                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2179
2180         if (iwl_tx_skb(priv, skb))
2181                 dev_kfree_skb_any(skb);
2182
2183         IWL_DEBUG_MACDUMP(priv, "leave\n");
2184         return NETDEV_TX_OK;
2185 }
2186
2187 void iwl_config_ap(struct iwl_priv *priv)
2188 {
2189         int ret = 0;
2190         unsigned long flags;
2191
2192         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2193                 return;
2194
2195         /* The following should be done only at AP bring up */
2196         if (!iwl_is_associated(priv)) {
2197
2198                 /* RXON - unassoc (to set timing command) */
2199                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2200                 iwlcore_commit_rxon(priv);
2201
2202                 /* RXON Timing */
2203                 iwl_setup_rxon_timing(priv);
2204                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2205                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2206                 if (ret)
2207                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2208                                         "Attempting to continue.\n");
2209
2210                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2211                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2212
2213                 /* FIXME: what should be the assoc_id for AP? */
2214                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2215                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2216                         priv->staging_rxon.flags |=
2217                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2218                 else
2219                         priv->staging_rxon.flags &=
2220                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2221
2222                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2223                         if (priv->assoc_capability &
2224                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2225                                 priv->staging_rxon.flags |=
2226                                         RXON_FLG_SHORT_SLOT_MSK;
2227                         else
2228                                 priv->staging_rxon.flags &=
2229                                         ~RXON_FLG_SHORT_SLOT_MSK;
2230
2231                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2232                                 priv->staging_rxon.flags &=
2233                                         ~RXON_FLG_SHORT_SLOT_MSK;
2234                 }
2235                 /* restore RXON assoc */
2236                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2237                 iwlcore_commit_rxon(priv);
2238                 spin_lock_irqsave(&priv->lock, flags);
2239                 iwl_activate_qos(priv, 1);
2240                 spin_unlock_irqrestore(&priv->lock, flags);
2241                 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2242         }
2243         iwl_send_beacon_cmd(priv);
2244
2245         /* FIXME - we need to add code here to detect a totally new
2246          * configuration, reset the AP, unassoc, rxon timing, assoc,
2247          * clear sta table, add BCAST sta... */
2248 }
2249
2250 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2251                         struct ieee80211_key_conf *keyconf, const u8 *addr,
2252                         u32 iv32, u16 *phase1key)
2253 {
2254
2255         struct iwl_priv *priv = hw->priv;
2256         IWL_DEBUG_MAC80211(priv, "enter\n");
2257
2258         iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2259
2260         IWL_DEBUG_MAC80211(priv, "leave\n");
2261 }
2262
2263 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2264                            struct ieee80211_vif *vif,
2265                            struct ieee80211_sta *sta,
2266                            struct ieee80211_key_conf *key)
2267 {
2268         struct iwl_priv *priv = hw->priv;
2269         const u8 *addr;
2270         int ret;
2271         u8 sta_id;
2272         bool is_default_wep_key = false;
2273
2274         IWL_DEBUG_MAC80211(priv, "enter\n");
2275
2276         if (priv->cfg->mod_params->sw_crypto) {
2277                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2278                 return -EOPNOTSUPP;
2279         }
2280         addr = sta ? sta->addr : iwl_bcast_addr;
2281         sta_id = iwl_find_station(priv, addr);
2282         if (sta_id == IWL_INVALID_STATION) {
2283                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2284                                    addr);
2285                 return -EINVAL;
2286
2287         }
2288
2289         mutex_lock(&priv->mutex);
2290         iwl_scan_cancel_timeout(priv, 100);
2291         mutex_unlock(&priv->mutex);
2292
2293         /* If we are getting WEP group key and we didn't receive any key mapping
2294          * so far, we are in legacy wep mode (group key only), otherwise we are
2295          * in 1X mode.
2296          * In legacy wep mode, we use another host command to the uCode */
2297         if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2298                 priv->iw_mode != NL80211_IFTYPE_AP) {
2299                 if (cmd == SET_KEY)
2300                         is_default_wep_key = !priv->key_mapping_key;
2301                 else
2302                         is_default_wep_key =
2303                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2304         }
2305
2306         switch (cmd) {
2307         case SET_KEY:
2308                 if (is_default_wep_key)
2309                         ret = iwl_set_default_wep_key(priv, key);
2310                 else
2311                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2312
2313                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2314                 break;
2315         case DISABLE_KEY:
2316                 if (is_default_wep_key)
2317                         ret = iwl_remove_default_wep_key(priv, key);
2318                 else
2319                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2320
2321                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2322                 break;
2323         default:
2324                 ret = -EINVAL;
2325         }
2326
2327         IWL_DEBUG_MAC80211(priv, "leave\n");
2328
2329         return ret;
2330 }
2331
2332 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2333                              enum ieee80211_ampdu_mlme_action action,
2334                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2335 {
2336         struct iwl_priv *priv = hw->priv;
2337         int ret;
2338
2339         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2340                      sta->addr, tid);
2341
2342         if (!(priv->cfg->sku & IWL_SKU_N))
2343                 return -EACCES;
2344
2345         switch (action) {
2346         case IEEE80211_AMPDU_RX_START:
2347                 IWL_DEBUG_HT(priv, "start Rx\n");
2348                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2349         case IEEE80211_AMPDU_RX_STOP:
2350                 IWL_DEBUG_HT(priv, "stop Rx\n");
2351                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2352                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2353                         return 0;
2354                 else
2355                         return ret;
2356         case IEEE80211_AMPDU_TX_START:
2357                 IWL_DEBUG_HT(priv, "start Tx\n");
2358                 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2359         case IEEE80211_AMPDU_TX_STOP:
2360                 IWL_DEBUG_HT(priv, "stop Tx\n");
2361                 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2362                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2363                         return 0;
2364                 else
2365                         return ret;
2366         default:
2367                 IWL_DEBUG_HT(priv, "unknown\n");
2368                 return -EINVAL;
2369                 break;
2370         }
2371         return 0;
2372 }
2373
2374 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2375                              struct ieee80211_low_level_stats *stats)
2376 {
2377         struct iwl_priv *priv = hw->priv;
2378
2379         priv = hw->priv;
2380         IWL_DEBUG_MAC80211(priv, "enter\n");
2381         IWL_DEBUG_MAC80211(priv, "leave\n");
2382
2383         return 0;
2384 }
2385
2386 /*****************************************************************************
2387  *
2388  * sysfs attributes
2389  *
2390  *****************************************************************************/
2391
2392 #ifdef CONFIG_IWLWIFI_DEBUG
2393
2394 /*
2395  * The following adds a new attribute to the sysfs representation
2396  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2397  * used for controlling the debug level.
2398  *
2399  * See the level definitions in iwl for details.
2400  */
2401
2402 static ssize_t show_debug_level(struct device *d,
2403                                 struct device_attribute *attr, char *buf)
2404 {
2405         struct iwl_priv *priv = dev_get_drvdata(d);
2406
2407         return sprintf(buf, "0x%08X\n", priv->debug_level);
2408 }
2409 static ssize_t store_debug_level(struct device *d,
2410                                 struct device_attribute *attr,
2411                                  const char *buf, size_t count)
2412 {
2413         struct iwl_priv *priv = dev_get_drvdata(d);
2414         unsigned long val;
2415         int ret;
2416
2417         ret = strict_strtoul(buf, 0, &val);
2418         if (ret)
2419                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2420         else
2421                 priv->debug_level = val;
2422
2423         return strnlen(buf, count);
2424 }
2425
2426 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2427                         show_debug_level, store_debug_level);
2428
2429
2430 #endif /* CONFIG_IWLWIFI_DEBUG */
2431
2432
2433 static ssize_t show_version(struct device *d,
2434                                 struct device_attribute *attr, char *buf)
2435 {
2436         struct iwl_priv *priv = dev_get_drvdata(d);
2437         struct iwl_alive_resp *palive = &priv->card_alive;
2438         ssize_t pos = 0;
2439         u16 eeprom_ver;
2440
2441         if (palive->is_valid)
2442                 pos += sprintf(buf + pos,
2443                                 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
2444                                 "fw type: 0x%01X 0x%01X\n",
2445                                 palive->ucode_major, palive->ucode_minor,
2446                                 palive->sw_rev[0], palive->sw_rev[1],
2447                                 palive->ver_type, palive->ver_subtype);
2448         else
2449                 pos += sprintf(buf + pos, "fw not loaded\n");
2450
2451         if (priv->eeprom) {
2452                 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
2453                 pos += sprintf(buf + pos, "NVM Type: %s, version: 0x%x\n",
2454                                (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
2455                                ? "OTP" : "EEPROM", eeprom_ver);
2456
2457         } else {
2458                 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
2459         }
2460
2461         return pos;
2462 }
2463
2464 static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
2465
2466 static ssize_t show_temperature(struct device *d,
2467                                 struct device_attribute *attr, char *buf)
2468 {
2469         struct iwl_priv *priv = dev_get_drvdata(d);
2470
2471         if (!iwl_is_alive(priv))
2472                 return -EAGAIN;
2473
2474         return sprintf(buf, "%d\n", priv->temperature);
2475 }
2476
2477 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2478
2479 static ssize_t show_tx_power(struct device *d,
2480                              struct device_attribute *attr, char *buf)
2481 {
2482         struct iwl_priv *priv = dev_get_drvdata(d);
2483
2484         if (!iwl_is_ready_rf(priv))
2485                 return sprintf(buf, "off\n");
2486         else
2487                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2488 }
2489
2490 static ssize_t store_tx_power(struct device *d,
2491                               struct device_attribute *attr,
2492                               const char *buf, size_t count)
2493 {
2494         struct iwl_priv *priv = dev_get_drvdata(d);
2495         unsigned long val;
2496         int ret;
2497
2498         ret = strict_strtoul(buf, 10, &val);
2499         if (ret)
2500                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2501         else
2502                 iwl_set_tx_power(priv, val, false);
2503
2504         return count;
2505 }
2506
2507 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2508
2509 static ssize_t show_flags(struct device *d,
2510                           struct device_attribute *attr, char *buf)
2511 {
2512         struct iwl_priv *priv = dev_get_drvdata(d);
2513
2514         return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2515 }
2516
2517 static ssize_t store_flags(struct device *d,
2518                            struct device_attribute *attr,
2519                            const char *buf, size_t count)
2520 {
2521         struct iwl_priv *priv = dev_get_drvdata(d);
2522         unsigned long val;
2523         u32 flags;
2524         int ret = strict_strtoul(buf, 0, &val);
2525         if (ret)
2526                 return ret;
2527         flags = (u32)val;
2528
2529         mutex_lock(&priv->mutex);
2530         if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2531                 /* Cancel any currently running scans... */
2532                 if (iwl_scan_cancel_timeout(priv, 100))
2533                         IWL_WARN(priv, "Could not cancel scan.\n");
2534                 else {
2535                         IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2536                         priv->staging_rxon.flags = cpu_to_le32(flags);
2537                         iwlcore_commit_rxon(priv);
2538                 }
2539         }
2540         mutex_unlock(&priv->mutex);
2541
2542         return count;
2543 }
2544
2545 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2546
2547 static ssize_t show_filter_flags(struct device *d,
2548                                  struct device_attribute *attr, char *buf)
2549 {
2550         struct iwl_priv *priv = dev_get_drvdata(d);
2551
2552         return sprintf(buf, "0x%04X\n",
2553                 le32_to_cpu(priv->active_rxon.filter_flags));
2554 }
2555
2556 static ssize_t store_filter_flags(struct device *d,
2557                                   struct device_attribute *attr,
2558                                   const char *buf, size_t count)
2559 {
2560         struct iwl_priv *priv = dev_get_drvdata(d);
2561         unsigned long val;
2562         u32 filter_flags;
2563         int ret = strict_strtoul(buf, 0, &val);
2564         if (ret)
2565                 return ret;
2566         filter_flags = (u32)val;
2567
2568         mutex_lock(&priv->mutex);
2569         if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2570                 /* Cancel any currently running scans... */
2571                 if (iwl_scan_cancel_timeout(priv, 100))
2572                         IWL_WARN(priv, "Could not cancel scan.\n");
2573                 else {
2574                         IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2575                                        "0x%04X\n", filter_flags);
2576                         priv->staging_rxon.filter_flags =
2577                                 cpu_to_le32(filter_flags);
2578                         iwlcore_commit_rxon(priv);
2579                 }
2580         }
2581         mutex_unlock(&priv->mutex);
2582
2583         return count;
2584 }
2585
2586 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2587                    store_filter_flags);
2588
2589 static ssize_t store_power_level(struct device *d,
2590                                  struct device_attribute *attr,
2591                                  const char *buf, size_t count)
2592 {
2593         struct iwl_priv *priv = dev_get_drvdata(d);
2594         int ret;
2595         unsigned long mode;
2596
2597
2598         mutex_lock(&priv->mutex);
2599
2600         ret = strict_strtoul(buf, 10, &mode);
2601         if (ret)
2602                 goto out;
2603
2604         ret = iwl_power_set_user_mode(priv, mode);
2605         if (ret) {
2606                 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
2607                 goto out;
2608         }
2609         ret = count;
2610
2611  out:
2612         mutex_unlock(&priv->mutex);
2613         return ret;
2614 }
2615
2616 static ssize_t show_power_level(struct device *d,
2617                                 struct device_attribute *attr, char *buf)
2618 {
2619         struct iwl_priv *priv = dev_get_drvdata(d);
2620         int mode = priv->power_data.user_power_setting;
2621         int level = priv->power_data.power_mode;
2622         char *p = buf;
2623
2624         p += sprintf(p, "INDEX:%d\t", level);
2625         p += sprintf(p, "USER:%d\n", mode);
2626         return p - buf + 1;
2627 }
2628
2629 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
2630                    store_power_level);
2631
2632 static ssize_t show_qos(struct device *d,
2633                                 struct device_attribute *attr, char *buf)
2634 {
2635         struct iwl_priv *priv = dev_get_drvdata(d);
2636         char *p = buf;
2637         int   q;
2638
2639         for (q = 0; q < AC_NUM; q++) {
2640                 p += sprintf(p, "\tcw_min\tcw_max\taifsn\ttxop\n");
2641                 p += sprintf(p, "AC[%d]\t%u\t%u\t%u\t%u\n", q,
2642                              priv->qos_data.def_qos_parm.ac[q].cw_min,
2643                              priv->qos_data.def_qos_parm.ac[q].cw_max,
2644                              priv->qos_data.def_qos_parm.ac[q].aifsn,
2645                              priv->qos_data.def_qos_parm.ac[q].edca_txop);
2646         }
2647
2648         return p - buf + 1;
2649 }
2650
2651 static DEVICE_ATTR(qos, S_IRUGO, show_qos, NULL);
2652
2653 static ssize_t show_statistics(struct device *d,
2654                                struct device_attribute *attr, char *buf)
2655 {
2656         struct iwl_priv *priv = dev_get_drvdata(d);
2657         u32 size = sizeof(struct iwl_notif_statistics);
2658         u32 len = 0, ofs = 0;
2659         u8 *data = (u8 *)&priv->statistics;
2660         int rc = 0;
2661
2662         if (!iwl_is_alive(priv))
2663                 return -EAGAIN;
2664
2665         mutex_lock(&priv->mutex);
2666         rc = iwl_send_statistics_request(priv, 0);
2667         mutex_unlock(&priv->mutex);
2668
2669         if (rc) {
2670                 len = sprintf(buf,
2671                               "Error sending statistics request: 0x%08X\n", rc);
2672                 return len;
2673         }
2674
2675         while (size && (PAGE_SIZE - len)) {
2676                 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2677                                    PAGE_SIZE - len, 1);
2678                 len = strlen(buf);
2679                 if (PAGE_SIZE - len)
2680                         buf[len++] = '\n';
2681
2682                 ofs += 16;
2683                 size -= min(size, 16U);
2684         }
2685
2686         return len;
2687 }
2688
2689 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2690
2691
2692 /*****************************************************************************
2693  *
2694  * driver setup and teardown
2695  *
2696  *****************************************************************************/
2697
2698 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2699 {
2700         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2701
2702         init_waitqueue_head(&priv->wait_command_queue);
2703
2704         INIT_WORK(&priv->up, iwl_bg_up);
2705         INIT_WORK(&priv->restart, iwl_bg_restart);
2706         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2707         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2708         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2709         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2710         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2711
2712         iwl_setup_scan_deferred_work(priv);
2713
2714         if (priv->cfg->ops->lib->setup_deferred_work)
2715                 priv->cfg->ops->lib->setup_deferred_work(priv);
2716
2717         init_timer(&priv->statistics_periodic);
2718         priv->statistics_periodic.data = (unsigned long)priv;
2719         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2720
2721         if (!priv->cfg->use_isr_legacy)
2722                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2723                         iwl_irq_tasklet, (unsigned long)priv);
2724         else
2725                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2726                         iwl_irq_tasklet_legacy, (unsigned long)priv);
2727 }
2728
2729 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2730 {
2731         if (priv->cfg->ops->lib->cancel_deferred_work)
2732                 priv->cfg->ops->lib->cancel_deferred_work(priv);
2733
2734         cancel_delayed_work_sync(&priv->init_alive_start);
2735         cancel_delayed_work(&priv->scan_check);
2736         cancel_delayed_work(&priv->alive_start);
2737         cancel_work_sync(&priv->beacon_update);
2738         del_timer_sync(&priv->statistics_periodic);
2739 }
2740
2741 static struct attribute *iwl_sysfs_entries[] = {
2742         &dev_attr_flags.attr,
2743         &dev_attr_filter_flags.attr,
2744         &dev_attr_power_level.attr,
2745         &dev_attr_statistics.attr,
2746         &dev_attr_temperature.attr,
2747         &dev_attr_tx_power.attr,
2748 #ifdef CONFIG_IWLWIFI_DEBUG
2749         &dev_attr_debug_level.attr,
2750 #endif
2751         &dev_attr_version.attr,
2752         &dev_attr_qos.attr,
2753         NULL
2754 };
2755
2756 static struct attribute_group iwl_attribute_group = {
2757         .name = NULL,           /* put in device directory */
2758         .attrs = iwl_sysfs_entries,
2759 };
2760
2761 static struct ieee80211_ops iwl_hw_ops = {
2762         .tx = iwl_mac_tx,
2763         .start = iwl_mac_start,
2764         .stop = iwl_mac_stop,
2765         .add_interface = iwl_mac_add_interface,
2766         .remove_interface = iwl_mac_remove_interface,
2767         .config = iwl_mac_config,
2768         .configure_filter = iwl_configure_filter,
2769         .set_key = iwl_mac_set_key,
2770         .update_tkip_key = iwl_mac_update_tkip_key,
2771         .get_stats = iwl_mac_get_stats,
2772         .get_tx_stats = iwl_mac_get_tx_stats,
2773         .conf_tx = iwl_mac_conf_tx,
2774         .reset_tsf = iwl_mac_reset_tsf,
2775         .bss_info_changed = iwl_bss_info_changed,
2776         .ampdu_action = iwl_mac_ampdu_action,
2777         .hw_scan = iwl_mac_hw_scan
2778 };
2779
2780 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2781 {
2782         int err = 0;
2783         struct iwl_priv *priv;
2784         struct ieee80211_hw *hw;
2785         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2786         unsigned long flags;
2787         u16 pci_cmd;
2788
2789         /************************
2790          * 1. Allocating HW data
2791          ************************/
2792
2793         /* Disabling hardware scan means that mac80211 will perform scans
2794          * "the hard way", rather than using device's scan. */
2795         if (cfg->mod_params->disable_hw_scan) {
2796                 if (cfg->mod_params->debug & IWL_DL_INFO)
2797                         dev_printk(KERN_DEBUG, &(pdev->dev),
2798                                    "Disabling hw_scan\n");
2799                 iwl_hw_ops.hw_scan = NULL;
2800         }
2801
2802         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2803         if (!hw) {
2804                 err = -ENOMEM;
2805                 goto out;
2806         }
2807         priv = hw->priv;
2808         /* At this point both hw and priv are allocated. */
2809
2810         SET_IEEE80211_DEV(hw, &pdev->dev);
2811
2812         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2813         priv->cfg = cfg;
2814         priv->pci_dev = pdev;
2815         priv->inta_mask = CSR_INI_SET_MASK;
2816
2817 #ifdef CONFIG_IWLWIFI_DEBUG
2818         priv->debug_level = priv->cfg->mod_params->debug;
2819         atomic_set(&priv->restrict_refcnt, 0);
2820 #endif
2821
2822         /**************************
2823          * 2. Initializing PCI bus
2824          **************************/
2825         if (pci_enable_device(pdev)) {
2826                 err = -ENODEV;
2827                 goto out_ieee80211_free_hw;
2828         }
2829
2830         pci_set_master(pdev);
2831
2832         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2833         if (!err)
2834                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2835         if (err) {
2836                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2837                 if (!err)
2838                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2839                 /* both attempts failed: */
2840                 if (err) {
2841                         IWL_WARN(priv, "No suitable DMA available.\n");
2842                         goto out_pci_disable_device;
2843                 }
2844         }
2845
2846         err = pci_request_regions(pdev, DRV_NAME);
2847         if (err)
2848                 goto out_pci_disable_device;
2849
2850         pci_set_drvdata(pdev, priv);
2851
2852
2853         /***********************
2854          * 3. Read REV register
2855          ***********************/
2856         priv->hw_base = pci_iomap(pdev, 0, 0);
2857         if (!priv->hw_base) {
2858                 err = -ENODEV;
2859                 goto out_pci_release_regions;
2860         }
2861
2862         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
2863                 (unsigned long long) pci_resource_len(pdev, 0));
2864         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
2865
2866         /* this spin lock will be used in apm_ops.init and EEPROM access
2867          * we should init now
2868          */
2869         spin_lock_init(&priv->reg_lock);
2870         iwl_hw_detect(priv);
2871         IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
2872                 priv->cfg->name, priv->hw_rev);
2873
2874         /* We disable the RETRY_TIMEOUT register (0x41) to keep
2875          * PCI Tx retries from interfering with C3 CPU state */
2876         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2877
2878         iwl_prepare_card_hw(priv);
2879         if (!priv->hw_ready) {
2880                 IWL_WARN(priv, "Failed, HW not ready\n");
2881                 goto out_iounmap;
2882         }
2883
2884         /* amp init */
2885         err = priv->cfg->ops->lib->apm_ops.init(priv);
2886         if (err < 0) {
2887                 IWL_ERR(priv, "Failed to init APMG\n");
2888                 goto out_iounmap;
2889         }
2890         /*****************
2891          * 4. Read EEPROM
2892          *****************/
2893         /* Read the EEPROM */
2894         err = iwl_eeprom_init(priv);
2895         if (err) {
2896                 IWL_ERR(priv, "Unable to init EEPROM\n");
2897                 goto out_iounmap;
2898         }
2899         err = iwl_eeprom_check_version(priv);
2900         if (err)
2901                 goto out_free_eeprom;
2902
2903         /* extract MAC Address */
2904         iwl_eeprom_get_mac(priv, priv->mac_addr);
2905         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
2906         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
2907
2908         /************************
2909          * 5. Setup HW constants
2910          ************************/
2911         if (iwl_set_hw_params(priv)) {
2912                 IWL_ERR(priv, "failed to set hw parameters\n");
2913                 goto out_free_eeprom;
2914         }
2915
2916         /*******************
2917          * 6. Setup priv
2918          *******************/
2919
2920         err = iwl_init_drv(priv);
2921         if (err)
2922                 goto out_free_eeprom;
2923         /* At this point both hw and priv are initialized. */
2924
2925         /********************
2926          * 7. Setup services
2927          ********************/
2928         spin_lock_irqsave(&priv->lock, flags);
2929         iwl_disable_interrupts(priv);
2930         spin_unlock_irqrestore(&priv->lock, flags);
2931
2932         pci_enable_msi(priv->pci_dev);
2933
2934         iwl_alloc_isr_ict(priv);
2935         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
2936                           IRQF_SHARED, DRV_NAME, priv);
2937         if (err) {
2938                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
2939                 goto out_disable_msi;
2940         }
2941         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
2942         if (err) {
2943                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2944                 goto out_free_irq;
2945         }
2946
2947         iwl_setup_deferred_work(priv);
2948         iwl_setup_rx_handlers(priv);
2949
2950         /**********************************
2951          * 8. Setup and register mac80211
2952          **********************************/
2953
2954         /* enable interrupts if needed: hw bug w/a */
2955         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
2956         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
2957                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
2958                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
2959         }
2960
2961         iwl_enable_interrupts(priv);
2962
2963         err = iwl_setup_mac(priv);
2964         if (err)
2965                 goto out_remove_sysfs;
2966
2967         err = iwl_dbgfs_register(priv, DRV_NAME);
2968         if (err)
2969                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2970
2971         /* If platform's RF_KILL switch is NOT set to KILL */
2972         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2973                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2974         else
2975                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2976
2977         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
2978                 test_bit(STATUS_RF_KILL_HW, &priv->status));
2979
2980         iwl_power_initialize(priv);
2981         return 0;
2982
2983  out_remove_sysfs:
2984         destroy_workqueue(priv->workqueue);
2985         priv->workqueue = NULL;
2986         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
2987  out_free_irq:
2988         free_irq(priv->pci_dev->irq, priv);
2989         iwl_free_isr_ict(priv);
2990  out_disable_msi:
2991         pci_disable_msi(priv->pci_dev);
2992         iwl_uninit_drv(priv);
2993  out_free_eeprom:
2994         iwl_eeprom_free(priv);
2995  out_iounmap:
2996         pci_iounmap(pdev, priv->hw_base);
2997  out_pci_release_regions:
2998         pci_set_drvdata(pdev, NULL);
2999         pci_release_regions(pdev);
3000  out_pci_disable_device:
3001         pci_disable_device(pdev);
3002  out_ieee80211_free_hw:
3003         ieee80211_free_hw(priv->hw);
3004  out:
3005         return err;
3006 }
3007
3008 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3009 {
3010         struct iwl_priv *priv = pci_get_drvdata(pdev);
3011         unsigned long flags;
3012
3013         if (!priv)
3014                 return;
3015
3016         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3017
3018         iwl_dbgfs_unregister(priv);
3019         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3020
3021         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3022          * to be called and iwl_down since we are removing the device
3023          * we need to set STATUS_EXIT_PENDING bit.
3024          */
3025         set_bit(STATUS_EXIT_PENDING, &priv->status);
3026         if (priv->mac80211_registered) {
3027                 ieee80211_unregister_hw(priv->hw);
3028                 priv->mac80211_registered = 0;
3029         } else {
3030                 iwl_down(priv);
3031         }
3032
3033         /* make sure we flush any pending irq or
3034          * tasklet for the driver
3035          */
3036         spin_lock_irqsave(&priv->lock, flags);
3037         iwl_disable_interrupts(priv);
3038         spin_unlock_irqrestore(&priv->lock, flags);
3039
3040         iwl_synchronize_irq(priv);
3041
3042         iwl_dealloc_ucode_pci(priv);
3043
3044         if (priv->rxq.bd)
3045                 iwl_rx_queue_free(priv, &priv->rxq);
3046         iwl_hw_txq_ctx_free(priv);
3047
3048         iwl_clear_stations_table(priv);
3049         iwl_eeprom_free(priv);
3050
3051
3052         /*netif_stop_queue(dev); */
3053         flush_workqueue(priv->workqueue);
3054
3055         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3056          * priv->workqueue... so we can't take down the workqueue
3057          * until now... */
3058         destroy_workqueue(priv->workqueue);
3059         priv->workqueue = NULL;
3060
3061         free_irq(priv->pci_dev->irq, priv);
3062         pci_disable_msi(priv->pci_dev);
3063         pci_iounmap(pdev, priv->hw_base);
3064         pci_release_regions(pdev);
3065         pci_disable_device(pdev);
3066         pci_set_drvdata(pdev, NULL);
3067
3068         iwl_uninit_drv(priv);
3069
3070         iwl_free_isr_ict(priv);
3071
3072         if (priv->ibss_beacon)
3073                 dev_kfree_skb(priv->ibss_beacon);
3074
3075         ieee80211_free_hw(priv->hw);
3076 }
3077
3078
3079 /*****************************************************************************
3080  *
3081  * driver and module entry point
3082  *
3083  *****************************************************************************/
3084
3085 /* Hardware specific file defines the PCI IDs table for that hardware module */
3086 static struct pci_device_id iwl_hw_card_ids[] = {
3087 #ifdef CONFIG_IWL4965
3088         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3089         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3090 #endif /* CONFIG_IWL4965 */
3091 #ifdef CONFIG_IWL5000
3092         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3093         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3094         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3095         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3096         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3097         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3098         {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3099         {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3100         {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3101         {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3102 /* 5350 WiFi/WiMax */
3103         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3104         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3105         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3106 /* 5150 Wifi/WiMax */
3107         {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3108         {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3109 /* 6000/6050 Series */
3110         {IWL_PCI_DEVICE(0x0082, 0x1102, iwl6000_2ag_cfg)},
3111         {IWL_PCI_DEVICE(0x0085, 0x1112, iwl6000_2ag_cfg)},
3112         {IWL_PCI_DEVICE(0x0082, 0x1122, iwl6000_2ag_cfg)},
3113         {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
3114         {IWL_PCI_DEVICE(0x422C, PCI_ANY_ID, iwl6000_2agn_cfg)},
3115         {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
3116         {IWL_PCI_DEVICE(0x4239, PCI_ANY_ID, iwl6000_2agn_cfg)},
3117         {IWL_PCI_DEVICE(0x0082, PCI_ANY_ID, iwl6000_2agn_cfg)},
3118         {IWL_PCI_DEVICE(0x0085, PCI_ANY_ID, iwl6000_3agn_cfg)},
3119         {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
3120         {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
3121         {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
3122         {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
3123 /* 1000 Series WiFi */
3124         {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl1000_bgn_cfg)},
3125         {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl1000_bgn_cfg)},
3126 #endif /* CONFIG_IWL5000 */
3127
3128         {0}
3129 };
3130 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3131
3132 static struct pci_driver iwl_driver = {
3133         .name = DRV_NAME,
3134         .id_table = iwl_hw_card_ids,
3135         .probe = iwl_pci_probe,
3136         .remove = __devexit_p(iwl_pci_remove),
3137 #ifdef CONFIG_PM
3138         .suspend = iwl_pci_suspend,
3139         .resume = iwl_pci_resume,
3140 #endif
3141 };
3142
3143 static int __init iwl_init(void)
3144 {
3145
3146         int ret;
3147         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3148         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3149
3150         ret = iwlagn_rate_control_register();
3151         if (ret) {
3152                 printk(KERN_ERR DRV_NAME
3153                        "Unable to register rate control algorithm: %d\n", ret);
3154                 return ret;
3155         }
3156
3157         ret = pci_register_driver(&iwl_driver);
3158         if (ret) {
3159                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3160                 goto error_register;
3161         }
3162
3163         return ret;
3164
3165 error_register:
3166         iwlagn_rate_control_unregister();
3167         return ret;
3168 }
3169
3170 static void __exit iwl_exit(void)
3171 {
3172         pci_unregister_driver(&iwl_driver);
3173         iwlagn_rate_control_unregister();
3174 }
3175
3176 module_exit(iwl_exit);
3177 module_init(iwl_init);