SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/delay.h>
  36 #include <linux/sched.h>
  37 #include <linux/skbuff.h>
  38 #include <linux/netdevice.h>
  39 #include <linux/wireless.h>
  40 #include <linux/firmware.h>
  41 #include <linux/etherdevice.h>
  42 #include <linux/if_arp.h>
  43
  44 #include <net/mac80211.h>
  45
  46 #include <asm/div64.h>
  47
  48 #define DRV_NAME        "iwlagn"
  49
  50 #include "iwl-eeprom.h"
  51 #include "iwl-dev.h"
  52 #include "iwl-core.h"
  53 #include "iwl-io.h"
  54 #include "iwl-helpers.h"
  55 #include "iwl-sta.h"
  56 #include "iwl-calib.h"
  57
  58
  59 /******************************************************************************
  60  *
  61  * module boiler plate
  62  *
  63  ******************************************************************************/
  64
  65 /*
  66  * module name, copyright, version, etc.
  67  */
  68 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  69
  70 #ifdef CONFIG_IWLWIFI_DEBUG
  71 #define VD "d"
  72 #else
  73 #define VD
  74 #endif
  75
  76 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  77 #define VS "s"
  78 #else
  79 #define VS
  80 #endif
  81
  82 #define DRV_VERSION     IWLWIFI_VERSION VD VS
  83
  84
  85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  86 MODULE_VERSION(DRV_VERSION);
  87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  88 MODULE_LICENSE("GPL");
  89 MODULE_ALIAS("iwl4965");
  90
  91 /*************** STATION TABLE MANAGEMENT ****
  92  * mac80211 should be examined to determine if sta_info is duplicating
  93  * the functionality provided here
  94  */
  95
  96 /**************************************************************/
  97
  98 /**
  99  * iwl_commit_rxon - commit staging_rxon to hardware
 100  *
 101  * The RXON command in staging_rxon is committed to the hardware and
 102  * the active_rxon structure is updated with the new data.  This
 103  * function correctly transitions out of the RXON_ASSOC_MSK state if
 104  * a HW tune is required based on the RXON structure changes.
 105  */
 106 int iwl_commit_rxon(struct iwl_priv *priv)
 107 {
 108         /* cast away the const for active_rxon in this function */
 109         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
 110         int ret;
 111         bool new_assoc =
 112                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 113
 114         if (!iwl_is_alive(priv))
 115                 return -EBUSY;
 116
 117         /* always get timestamp with Rx frame */
 118         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 119         /* allow CTS-to-self if possible. this is relevant only for
 120          * 5000, but will not damage 4965 */
 121         priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 122
 123         ret = iwl_check_rxon_cmd(priv);
 124         if (ret) {
 125                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 126                 return -EINVAL;
 127         }
 128
 129         /* If we don't need to send a full RXON, we can use
 130          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 131          * and other flags for the current radio configuration. */
 132         if (!iwl_full_rxon_required(priv)) {
 133                 ret = iwl_send_rxon_assoc(priv);
 134                 if (ret) {
 135                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 136                         return ret;
 137                 }
 138
 139                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 140                 return 0;
 141         }
 142
 143         /* station table will be cleared */
 144         priv->assoc_station_added = 0;
 145
 146         /* If we are currently associated and the new config requires
 147          * an RXON_ASSOC and the new config wants the associated mask enabled,
 148          * we must clear the associated from the active configuration
 149          * before we apply the new config */
 150         if (iwl_is_associated(priv) && new_assoc) {
 151                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 152                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 153
 154                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 155                                       sizeof(struct iwl_rxon_cmd),
 156                                       &priv->active_rxon);
 157
 158                 /* If the mask clearing failed then we set
 159                  * active_rxon back to what it was previously */
 160                 if (ret) {
 161                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 162                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 163                         return ret;
 164                 }
 165         }
 166
 167         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 168                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 169                        "* channel = %d\n"
 170                        "* bssid = %pM\n",
 171                        (new_assoc ? "" : "out"),
 172                        le16_to_cpu(priv->staging_rxon.channel),
 173                        priv->staging_rxon.bssid_addr);
 174
 175         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 176
 177         /* Apply the new configuration
 178          * RXON unassoc clears the station table in uCode, send it before
 179          * we add the bcast station. If assoc bit is set, we will send RXON
 180          * after having added the bcast and bssid station.
 181          */
 182         if (!new_assoc) {
 183                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 184                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 185                 if (ret) {
 186                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 187                         return ret;
 188                 }
 189                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 190         }
 191
 192         iwl_clear_stations_table(priv);
 193
 194         priv->start_calib = 0;
 195
 196         /* Add the broadcast address so we can send broadcast frames */
 197         if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
 198                                                 IWL_INVALID_STATION) {
 199                 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
 200                 return -EIO;
 201         }
 202
 203         /* If we have set the ASSOC_MSK and we are in BSS mode then
 204          * add the IWL_AP_ID to the station rate table */
 205         if (new_assoc) {
 206                 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
 207                         ret = iwl_rxon_add_station(priv,
 208                                            priv->active_rxon.bssid_addr, 1);
 209                         if (ret == IWL_INVALID_STATION) {
 210                                 IWL_ERR(priv,
 211                                         "Error adding AP address for TX.\n");
 212                                 return -EIO;
 213                         }
 214                         priv->assoc_station_added = 1;
 215                         if (priv->default_wep_key &&
 216                             iwl_send_static_wepkey_cmd(priv, 0))
 217                                 IWL_ERR(priv,
 218                                         "Could not send WEP static key.\n");
 219                 }
 220
 221                 /* Apply the new configuration
 222                  * RXON assoc doesn't clear the station table in uCode,
 223                  */
 224                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 225                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 226                 if (ret) {
 227                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 228                         return ret;
 229                 }
 230                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 231         }
 232
 233         iwl_init_sensitivity(priv);
 234
 235         /* If we issue a new RXON command which required a tune then we must
 236          * send a new TXPOWER command or we won't be able to Tx any frames */
 237         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 238         if (ret) {
 239                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 240                 return ret;
 241         }
 242
 243         return 0;
 244 }
 245
 246 void iwl_update_chain_flags(struct iwl_priv *priv)
 247 {
 248
 249         if (priv->cfg->ops->hcmd->set_rxon_chain)
 250                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 251         iwlcore_commit_rxon(priv);
 252 }
 253
 254 static void iwl_clear_free_frames(struct iwl_priv *priv)
 255 {
 256         struct list_head *element;
 257
 258         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 259                        priv->frames_count);
 260
 261         while (!list_empty(&priv->free_frames)) {
 262                 element = priv->free_frames.next;
 263                 list_del(element);
 264                 kfree(list_entry(element, struct iwl_frame, list));
 265                 priv->frames_count--;
 266         }
 267
 268         if (priv->frames_count) {
 269                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 270                             priv->frames_count);
 271                 priv->frames_count = 0;
 272         }
 273 }
 274
 275 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 276 {
 277         struct iwl_frame *frame;
 278         struct list_head *element;
 279         if (list_empty(&priv->free_frames)) {
 280                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 281                 if (!frame) {
 282                         IWL_ERR(priv, "Could not allocate frame!\n");
 283                         return NULL;
 284                 }
 285
 286                 priv->frames_count++;
 287                 return frame;
 288         }
 289
 290         element = priv->free_frames.next;
 291         list_del(element);
 292         return list_entry(element, struct iwl_frame, list);
 293 }
 294
 295 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 296 {
 297         memset(frame, 0, sizeof(*frame));
 298         list_add(&frame->list, &priv->free_frames);
 299 }
 300
 301 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
 302                                           struct ieee80211_hdr *hdr,
 303                                           int left)
 304 {
 305         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 306             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 307              (priv->iw_mode != NL80211_IFTYPE_AP)))
 308                 return 0;
 309
 310         if (priv->ibss_beacon->len > left)
 311                 return 0;
 312
 313         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 314
 315         return priv->ibss_beacon->len;
 316 }
 317
 318 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 319                                        struct iwl_frame *frame, u8 rate)
 320 {
 321         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 322         unsigned int frame_size;
 323
 324         tx_beacon_cmd = &frame->u.beacon;
 325         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 326
 327         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 328         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 329
 330         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 331                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 332
 333         BUG_ON(frame_size > MAX_MPDU_SIZE);
 334         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 335
 336         if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
 337                 tx_beacon_cmd->tx.rate_n_flags =
 338                         iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
 339         else
 340                 tx_beacon_cmd->tx.rate_n_flags =
 341                         iwl_hw_set_rate_n_flags(rate, 0);
 342
 343         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 344                                      TX_CMD_FLG_TSF_MSK |
 345                                      TX_CMD_FLG_STA_RATE_MSK;
 346
 347         return sizeof(*tx_beacon_cmd) + frame_size;
 348 }
 349 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 350 {
 351         struct iwl_frame *frame;
 352         unsigned int frame_size;
 353         int rc;
 354         u8 rate;
 355
 356         frame = iwl_get_free_frame(priv);
 357
 358         if (!frame) {
 359                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 360                           "command.\n");
 361                 return -ENOMEM;
 362         }
 363
 364         rate = iwl_rate_get_lowest_plcp(priv);
 365
 366         frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
 367
 368         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 369                               &frame->u.cmd[0]);
 370
 371         iwl_free_frame(priv, frame);
 372
 373         return rc;
 374 }
 375
 376 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 377 {
 378         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 379
 380         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 381         if (sizeof(dma_addr_t) > sizeof(u32))
 382                 addr |=
 383                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 384
 385         return addr;
 386 }
 387
 388 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 389 {
 390         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 391
 392         return le16_to_cpu(tb->hi_n_len) >> 4;
 393 }
 394
 395 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 396                                   dma_addr_t addr, u16 len)
 397 {
 398         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 399         u16 hi_n_len = len << 4;
 400
 401         put_unaligned_le32(addr, &tb->lo);
 402         if (sizeof(dma_addr_t) > sizeof(u32))
 403                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 404
 405         tb->hi_n_len = cpu_to_le16(hi_n_len);
 406
 407         tfd->num_tbs = idx + 1;
 408 }
 409
 410 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 411 {
 412         return tfd->num_tbs & 0x1f;
 413 }
 414
 415 /**
 416  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 417  * @priv - driver private data
 418  * @txq - tx queue
 419  *
 420  * Does NOT advance any TFD circular buffer read/write indexes
 421  * Does NOT free the TFD itself (which is within circular buffer)
 422  */
 423 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 424 {
 425         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 426         struct iwl_tfd *tfd;
 427         struct pci_dev *dev = priv->pci_dev;
 428         int index = txq->q.read_ptr;
 429         int i;
 430         int num_tbs;
 431
 432         tfd = &tfd_tmp[index];
 433
 434         /* Sanity check on number of chunks */
 435         num_tbs = iwl_tfd_get_num_tbs(tfd);
 436
 437         if (num_tbs >= IWL_NUM_OF_TBS) {
 438                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 439                 /* @todo issue fatal error, it is quite serious situation */
 440                 return;
 441         }
 442
 443         /* Unmap tx_cmd */
 444         if (num_tbs)
 445                 pci_unmap_single(dev,
 446                                 pci_unmap_addr(&txq->meta[index], mapping),
 447                                 pci_unmap_len(&txq->meta[index], len),
 448                                 PCI_DMA_BIDIRECTIONAL);
 449
 450         /* Unmap chunks, if any. */
 451         for (i = 1; i < num_tbs; i++) {
 452                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 453                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 454
 455                 if (txq->txb) {
 456                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
 457                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
 458                 }
 459         }
 460 }
 461
 462 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 463                                  struct iwl_tx_queue *txq,
 464                                  dma_addr_t addr, u16 len,
 465                                  u8 reset, u8 pad)
 466 {
 467         struct iwl_queue *q;
 468         struct iwl_tfd *tfd, *tfd_tmp;
 469         u32 num_tbs;
 470
 471         q = &txq->q;
 472         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 473         tfd = &tfd_tmp[q->write_ptr];
 474
 475         if (reset)
 476                 memset(tfd, 0, sizeof(*tfd));
 477
 478         num_tbs = iwl_tfd_get_num_tbs(tfd);
 479
 480         /* Each TFD can point to a maximum 20 Tx buffers */
 481         if (num_tbs >= IWL_NUM_OF_TBS) {
 482                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 483                           IWL_NUM_OF_TBS);
 484                 return -EINVAL;
 485         }
 486
 487         BUG_ON(addr & ~DMA_BIT_MASK(36));
 488         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 489                 IWL_ERR(priv, "Unaligned address = %llx\n",
 490                           (unsigned long long)addr);
 491
 492         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 493
 494         return 0;
 495 }
 496
 497 /*
 498  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 499  * given Tx queue, and enable the DMA channel used for that queue.
 500  *
 501  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 502  * channels supported in hardware.
 503  */
 504 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 505                          struct iwl_tx_queue *txq)
 506 {
 507         int txq_id = txq->q.id;
 508
 509         /* Circular buffer (TFD queue in DRAM) physical base address */
 510         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 511                              txq->q.dma_addr >> 8);
 512
 513         return 0;
 514 }
 515
 516 /******************************************************************************
 517  *
 518  * Generic RX handler implementations
 519  *
 520  ******************************************************************************/
 521 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 522                                 struct iwl_rx_mem_buffer *rxb)
 523 {
 524         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 525         struct iwl_alive_resp *palive;
 526         struct delayed_work *pwork;
 527
 528         palive = &pkt->u.alive_frame;
 529
 530         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 531                        "0x%01X 0x%01X\n",
 532                        palive->is_valid, palive->ver_type,
 533                        palive->ver_subtype);
 534
 535         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 536                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 537                 memcpy(&priv->card_alive_init,
 538                        &pkt->u.alive_frame,
 539                        sizeof(struct iwl_init_alive_resp));
 540                 pwork = &priv->init_alive_start;
 541         } else {
 542                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 543                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 544                        sizeof(struct iwl_alive_resp));
 545                 pwork = &priv->alive_start;
 546         }
 547
 548         /* We delay the ALIVE response by 5ms to
 549          * give the HW RF Kill time to activate... */
 550         if (palive->is_valid == UCODE_VALID_OK)
 551                 queue_delayed_work(priv->workqueue, pwork,
 552                                    msecs_to_jiffies(5));
 553         else
 554                 IWL_WARN(priv, "uCode did not respond OK.\n");
 555 }
 556
 557 static void iwl_bg_beacon_update(struct work_struct *work)
 558 {
 559         struct iwl_priv *priv =
 560                 container_of(work, struct iwl_priv, beacon_update);
 561         struct sk_buff *beacon;
 562
 563         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 564         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 565
 566         if (!beacon) {
 567                 IWL_ERR(priv, "update beacon failed\n");
 568                 return;
 569         }
 570
 571         mutex_lock(&priv->mutex);
 572         /* new beacon skb is allocated every time; dispose previous.*/
 573         if (priv->ibss_beacon)
 574                 dev_kfree_skb(priv->ibss_beacon);
 575
 576         priv->ibss_beacon = beacon;
 577         mutex_unlock(&priv->mutex);
 578
 579         iwl_send_beacon_cmd(priv);
 580 }
 581
 582 /**
 583  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 584  *
 585  * This callback is provided in order to send a statistics request.
 586  *
 587  * This timer function is continually reset to execute within
 588  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 589  * was received.  We need to ensure we receive the statistics in order
 590  * to update the temperature used for calibrating the TXPOWER.
 591  */
 592 static void iwl_bg_statistics_periodic(unsigned long data)
 593 {
 594         struct iwl_priv *priv = (struct iwl_priv *)data;
 595
 596         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 597                 return;
 598
 599         /* dont send host command if rf-kill is on */
 600         if (!iwl_is_ready_rf(priv))
 601                 return;
 602
 603         iwl_send_statistics_request(priv, CMD_ASYNC);
 604 }
 605
 606 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 607                                 struct iwl_rx_mem_buffer *rxb)
 608 {
 609 #ifdef CONFIG_IWLWIFI_DEBUG
 610         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 611         struct iwl4965_beacon_notif *beacon =
 612                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 613         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 614
 615         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 616                 "tsf %d %d rate %d\n",
 617                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 618                 beacon->beacon_notify_hdr.failure_frame,
 619                 le32_to_cpu(beacon->ibss_mgr_status),
 620                 le32_to_cpu(beacon->high_tsf),
 621                 le32_to_cpu(beacon->low_tsf), rate);
 622 #endif
 623
 624         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 625             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 626                 queue_work(priv->workqueue, &priv->beacon_update);
 627 }
 628
 629 /* Handle notification from uCode that card's power state is changing
 630  * due to software, hardware, or critical temperature RFKILL */
 631 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 632                                     struct iwl_rx_mem_buffer *rxb)
 633 {
 634         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 635         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 636         unsigned long status = priv->status;
 637
 638         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
 639                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 640                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
 641
 642         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 643                      RF_CARD_DISABLED)) {
 644
 645                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 646                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 647
 648                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 649                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 650
 651                 if (!(flags & RXON_CARD_DISABLED)) {
 652                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 653                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 654                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 655                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 656                 }
 657                 if (flags & RF_CARD_DISABLED)
 658                         iwl_tt_enter_ct_kill(priv);
 659         }
 660         if (!(flags & RF_CARD_DISABLED))
 661                 iwl_tt_exit_ct_kill(priv);
 662
 663         if (flags & HW_CARD_DISABLED)
 664                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 665         else
 666                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 667
 668
 669         if (!(flags & RXON_CARD_DISABLED))
 670                 iwl_scan_cancel(priv);
 671
 672         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 673              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 674                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 675                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 676         else
 677                 wake_up_interruptible(&priv->wait_command_queue);
 678 }
 679
 680 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 681 {
 682         if (src == IWL_PWR_SRC_VAUX) {
 683                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 684                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 685                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 686                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 687         } else {
 688                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 689                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 690                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 691         }
 692
 693         return 0;
 694 }
 695
 696 /**
 697  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 698  *
 699  * Setup the RX handlers for each of the reply types sent from the uCode
 700  * to the host.
 701  *
 702  * This function chains into the hardware specific files for them to setup
 703  * any hardware specific handlers as well.
 704  */
 705 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 706 {
 707         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 708         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 709         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 710         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 711         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 712             iwl_rx_pm_debug_statistics_notif;
 713         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 714
 715         /*
 716          * The same handler is used for both the REPLY to a discrete
 717          * statistics request from the host as well as for the periodic
 718          * statistics notifications (after received beacons) from the uCode.
 719          */
 720         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
 721         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 722
 723         iwl_setup_spectrum_handlers(priv);
 724         iwl_setup_rx_scan_handlers(priv);
 725
 726         /* status change handler */
 727         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 728
 729         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 730             iwl_rx_missed_beacon_notif;
 731         /* Rx handlers */
 732         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
 733         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
 734         /* block ack */
 735         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
 736         /* Set up hardware specific Rx handlers */
 737         priv->cfg->ops->lib->rx_handler_setup(priv);
 738 }
 739
 740 /**
 741  * iwl_rx_handle - Main entry function for receiving responses from uCode
 742  *
 743  * Uses the priv->rx_handlers callback function array to invoke
 744  * the appropriate handlers, including command responses,
 745  * frame-received notifications, and other notifications.
 746  */
 747 void iwl_rx_handle(struct iwl_priv *priv)
 748 {
 749         struct iwl_rx_mem_buffer *rxb;
 750         struct iwl_rx_packet *pkt;
 751         struct iwl_rx_queue *rxq = &priv->rxq;
 752         u32 r, i;
 753         int reclaim;
 754         unsigned long flags;
 755         u8 fill_rx = 0;
 756         u32 count = 8;
 757         int total_empty;
 758
 759         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 760          * buffer that the driver may process (last buffer filled by ucode). */
 761         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 762         i = rxq->read;
 763
 764         /* Rx interrupt, but nothing sent from uCode */
 765         if (i == r)
 766                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 767
 768         /* calculate total frames need to be restock after handling RX */
 769         total_empty = r - priv->rxq.write_actual;
 770         if (total_empty < 0)
 771                 total_empty += RX_QUEUE_SIZE;
 772
 773         if (total_empty > (RX_QUEUE_SIZE / 2))
 774                 fill_rx = 1;
 775
 776         while (i != r) {
 777                 rxb = rxq->queue[i];
 778
 779                 /* If an RXB doesn't have a Rx queue slot associated with it,
 780                  * then a bug has been introduced in the queue refilling
 781                  * routines -- catch it here */
 782                 BUG_ON(rxb == NULL);
 783
 784                 rxq->queue[i] = NULL;
 785
 786                 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
 787                                  priv->hw_params.rx_buf_size + 256,
 788                                  PCI_DMA_FROMDEVICE);
 789                 pkt = (struct iwl_rx_packet *)rxb->skb->data;
 790
 791                 /* Reclaim a command buffer only if this packet is a response
 792                  *   to a (driver-originated) command.
 793                  * If the packet (e.g. Rx frame) originated from uCode,
 794                  *   there is no command buffer to reclaim.
 795                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 796                  *   but apparently a few don't get set; catch them here. */
 797                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 798                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 799                         (pkt->hdr.cmd != REPLY_RX) &&
 800                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 801                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 802                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 803                         (pkt->hdr.cmd != REPLY_TX);
 804
 805                 /* Based on type of command response or notification,
 806                  *   handle those that need handling via function in
 807                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 808                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 809                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 810                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 811                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 812                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 813                 } else {
 814                         /* No handling needed */
 815                         IWL_DEBUG_RX(priv,
 816                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 817                                 r, i, get_cmd_string(pkt->hdr.cmd),
 818                                 pkt->hdr.cmd);
 819                 }
 820
 821                 if (reclaim) {
 822                         /* Invoke any callbacks, transfer the skb to caller, and
 823                          * fire off the (possibly) blocking iwl_send_cmd()
 824                          * as we reclaim the driver command queue */
 825                         if (rxb && rxb->skb)
 826                                 iwl_tx_cmd_complete(priv, rxb);
 827                         else
 828                                 IWL_WARN(priv, "Claim null rxb?\n");
 829                 }
 830
 831                 /* For now we just don't re-use anything.  We can tweak this
 832                  * later to try and re-use notification packets and SKBs that
 833                  * fail to Rx correctly */
 834                 if (rxb->skb != NULL) {
 835                         priv->alloc_rxb_skb--;
 836                         dev_kfree_skb_any(rxb->skb);
 837                         rxb->skb = NULL;
 838                 }
 839
 840                 spin_lock_irqsave(&rxq->lock, flags);
 841                 list_add_tail(&rxb->list, &priv->rxq.rx_used);
 842                 spin_unlock_irqrestore(&rxq->lock, flags);
 843                 i = (i + 1) & RX_QUEUE_MASK;
 844                 /* If there are a lot of unused frames,
 845                  * restock the Rx queue so ucode wont assert. */
 846                 if (fill_rx) {
 847                         count++;
 848                         if (count >= 8) {
 849                                 priv->rxq.read = i;
 850                                 iwl_rx_replenish_now(priv);
 851                                 count = 0;
 852                         }
 853                 }
 854         }
 855
 856         /* Backtrack one entry */
 857         priv->rxq.read = i;
 858         if (fill_rx)
 859                 iwl_rx_replenish_now(priv);
 860         else
 861                 iwl_rx_queue_restock(priv);
 862 }
 863
 864 /* call this function to flush any scheduled tasklet */
 865 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
 866 {
 867         /* wait to make sure we flush pending tasklet*/
 868         synchronize_irq(priv->pci_dev->irq);
 869         tasklet_kill(&priv->irq_tasklet);
 870 }
 871
 872 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
 873 {
 874         u32 inta, handled = 0;
 875         u32 inta_fh;
 876         unsigned long flags;
 877 #ifdef CONFIG_IWLWIFI_DEBUG
 878         u32 inta_mask;
 879 #endif
 880
 881         spin_lock_irqsave(&priv->lock, flags);
 882
 883         /* Ack/clear/reset pending uCode interrupts.
 884          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
 885          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
 886         inta = iwl_read32(priv, CSR_INT);
 887         iwl_write32(priv, CSR_INT, inta);
 888
 889         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
 890          * Any new interrupts that happen after this, either while we're
 891          * in this tasklet, or later, will show up in next ISR/tasklet. */
 892         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
 893         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
 894
 895 #ifdef CONFIG_IWLWIFI_DEBUG
 896         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
 897                 /* just for debug */
 898                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
 899                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
 900                               inta, inta_mask, inta_fh);
 901         }
 902 #endif
 903
 904         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
 905          * atomic, make sure that inta covers all the interrupts that
 906          * we've discovered, even if FH interrupt came in just after
 907          * reading CSR_INT. */
 908         if (inta_fh & CSR49_FH_INT_RX_MASK)
 909                 inta |= CSR_INT_BIT_FH_RX;
 910         if (inta_fh & CSR49_FH_INT_TX_MASK)
 911                 inta |= CSR_INT_BIT_FH_TX;
 912
 913         /* Now service all interrupt bits discovered above. */
 914         if (inta & CSR_INT_BIT_HW_ERR) {
 915                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
 916
 917                 /* Tell the device to stop sending interrupts */
 918                 iwl_disable_interrupts(priv);
 919
 920                 priv->isr_stats.hw++;
 921                 iwl_irq_handle_error(priv);
 922
 923                 handled |= CSR_INT_BIT_HW_ERR;
 924
 925                 spin_unlock_irqrestore(&priv->lock, flags);
 926
 927                 return;
 928         }
 929
 930 #ifdef CONFIG_IWLWIFI_DEBUG
 931         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
 932                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
 933                 if (inta & CSR_INT_BIT_SCD) {
 934                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
 935                                       "the frame/frames.\n");
 936                         priv->isr_stats.sch++;
 937                 }
 938
 939                 /* Alive notification via Rx interrupt will do the real work */
 940                 if (inta & CSR_INT_BIT_ALIVE) {
 941                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
 942                         priv->isr_stats.alive++;
 943                 }
 944         }
 945 #endif
 946         /* Safely ignore these bits for debug checks below */
 947         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
 948
 949         /* HW RF KILL switch toggled */
 950         if (inta & CSR_INT_BIT_RF_KILL) {
 951                 int hw_rf_kill = 0;
 952                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
 953                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
 954                         hw_rf_kill = 1;
 955
 956                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
 957                                 hw_rf_kill ? "disable radio" : "enable radio");
 958
 959                 priv->isr_stats.rfkill++;
 960
 961                 /* driver only loads ucode once setting the interface up.
 962                  * the driver allows loading the ucode even if the radio
 963                  * is killed. Hence update the killswitch state here. The
 964                  * rfkill handler will care about restarting if needed.
 965                  */
 966                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
 967                         if (hw_rf_kill)
 968                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 969                         else
 970                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 971                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
 972                 }
 973
 974                 handled |= CSR_INT_BIT_RF_KILL;
 975         }
 976
 977         /* Chip got too hot and stopped itself */
 978         if (inta & CSR_INT_BIT_CT_KILL) {
 979                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
 980                 priv->isr_stats.ctkill++;
 981                 handled |= CSR_INT_BIT_CT_KILL;
 982         }
 983
 984         /* Error detected by uCode */
 985         if (inta & CSR_INT_BIT_SW_ERR) {
 986                 IWL_ERR(priv, "Microcode SW error detected. "
 987                         " Restarting 0x%X.\n", inta);
 988                 priv->isr_stats.sw++;
 989                 priv->isr_stats.sw_err = inta;
 990                 iwl_irq_handle_error(priv);
 991                 handled |= CSR_INT_BIT_SW_ERR;
 992         }
 993
 994         /* uCode wakes up after power-down sleep */
 995         if (inta & CSR_INT_BIT_WAKEUP) {
 996                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
 997                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
 998                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
 999                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1000                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1001                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1002                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1003                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1004
1005                 priv->isr_stats.wakeup++;
1006
1007                 handled |= CSR_INT_BIT_WAKEUP;
1008         }
1009
1010         /* All uCode command responses, including Tx command responses,
1011          * Rx "responses" (frame-received notification), and other
1012          * notifications from uCode come through here*/
1013         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1014                 iwl_rx_handle(priv);
1015                 priv->isr_stats.rx++;
1016                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1017         }
1018
1019         if (inta & CSR_INT_BIT_FH_TX) {
1020                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1021                 priv->isr_stats.tx++;
1022                 handled |= CSR_INT_BIT_FH_TX;
1023                 /* FH finished to write, send event */
1024                 priv->ucode_write_complete = 1;
1025                 wake_up_interruptible(&priv->wait_command_queue);
1026         }
1027
1028         if (inta & ~handled) {
1029                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1030                 priv->isr_stats.unhandled++;
1031         }
1032
1033         if (inta & ~(priv->inta_mask)) {
1034                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1035                          inta & ~priv->inta_mask);
1036                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1037         }
1038
1039         /* Re-enable all interrupts */
1040         /* only Re-enable if diabled by irq */
1041         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1042                 iwl_enable_interrupts(priv);
1043
1044 #ifdef CONFIG_IWLWIFI_DEBUG
1045         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1046                 inta = iwl_read32(priv, CSR_INT);
1047                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1048                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1049                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1050                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1051         }
1052 #endif
1053         spin_unlock_irqrestore(&priv->lock, flags);
1054 }
1055
1056 /* tasklet for iwlagn interrupt */
1057 static void iwl_irq_tasklet(struct iwl_priv *priv)
1058 {
1059         u32 inta = 0;
1060         u32 handled = 0;
1061         unsigned long flags;
1062 #ifdef CONFIG_IWLWIFI_DEBUG
1063         u32 inta_mask;
1064 #endif
1065
1066         spin_lock_irqsave(&priv->lock, flags);
1067
1068         /* Ack/clear/reset pending uCode interrupts.
1069          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1070          */
1071         iwl_write32(priv, CSR_INT, priv->inta);
1072
1073         inta = priv->inta;
1074
1075 #ifdef CONFIG_IWLWIFI_DEBUG
1076         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1077                 /* just for debug */
1078                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1079                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1080                                 inta, inta_mask);
1081         }
1082 #endif
1083         /* saved interrupt in inta variable now we can reset priv->inta */
1084         priv->inta = 0;
1085
1086         /* Now service all interrupt bits discovered above. */
1087         if (inta & CSR_INT_BIT_HW_ERR) {
1088                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1089
1090                 /* Tell the device to stop sending interrupts */
1091                 iwl_disable_interrupts(priv);
1092
1093                 priv->isr_stats.hw++;
1094                 iwl_irq_handle_error(priv);
1095
1096                 handled |= CSR_INT_BIT_HW_ERR;
1097
1098                 spin_unlock_irqrestore(&priv->lock, flags);
1099
1100                 return;
1101         }
1102
1103 #ifdef CONFIG_IWLWIFI_DEBUG
1104         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1105                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1106                 if (inta & CSR_INT_BIT_SCD) {
1107                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1108                                       "the frame/frames.\n");
1109                         priv->isr_stats.sch++;
1110                 }
1111
1112                 /* Alive notification via Rx interrupt will do the real work */
1113                 if (inta & CSR_INT_BIT_ALIVE) {
1114                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1115                         priv->isr_stats.alive++;
1116                 }
1117         }
1118 #endif
1119         /* Safely ignore these bits for debug checks below */
1120         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1121
1122         /* HW RF KILL switch toggled */
1123         if (inta & CSR_INT_BIT_RF_KILL) {
1124                 int hw_rf_kill = 0;
1125                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1126                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1127                         hw_rf_kill = 1;
1128
1129                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1130                                 hw_rf_kill ? "disable radio" : "enable radio");
1131
1132                 priv->isr_stats.rfkill++;
1133
1134                 /* driver only loads ucode once setting the interface up.
1135                  * the driver allows loading the ucode even if the radio
1136                  * is killed. Hence update the killswitch state here. The
1137                  * rfkill handler will care about restarting if needed.
1138                  */
1139                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1140                         if (hw_rf_kill)
1141                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1142                         else
1143                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1144                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1145                 }
1146
1147                 handled |= CSR_INT_BIT_RF_KILL;
1148         }
1149
1150         /* Chip got too hot and stopped itself */
1151         if (inta & CSR_INT_BIT_CT_KILL) {
1152                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1153                 priv->isr_stats.ctkill++;
1154                 handled |= CSR_INT_BIT_CT_KILL;
1155         }
1156
1157         /* Error detected by uCode */
1158         if (inta & CSR_INT_BIT_SW_ERR) {
1159                 IWL_ERR(priv, "Microcode SW error detected. "
1160                         " Restarting 0x%X.\n", inta);
1161                 priv->isr_stats.sw++;
1162                 priv->isr_stats.sw_err = inta;
1163                 iwl_irq_handle_error(priv);
1164                 handled |= CSR_INT_BIT_SW_ERR;
1165         }
1166
1167         /* uCode wakes up after power-down sleep */
1168         if (inta & CSR_INT_BIT_WAKEUP) {
1169                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1170                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1171                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1172                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1173                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1174                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1175                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1176                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1177
1178                 priv->isr_stats.wakeup++;
1179
1180                 handled |= CSR_INT_BIT_WAKEUP;
1181         }
1182
1183         /* All uCode command responses, including Tx command responses,
1184          * Rx "responses" (frame-received notification), and other
1185          * notifications from uCode come through here*/
1186         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1187                         CSR_INT_BIT_RX_PERIODIC)) {
1188                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1189                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1190                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1191                         iwl_write32(priv, CSR_FH_INT_STATUS,
1192                                         CSR49_FH_INT_RX_MASK);
1193                 }
1194                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1195                         handled |= CSR_INT_BIT_RX_PERIODIC;
1196                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1197                 }
1198                 /* Sending RX interrupt require many steps to be done in the
1199                  * the device:
1200                  * 1- write interrupt to current index in ICT table.
1201                  * 2- dma RX frame.
1202                  * 3- update RX shared data to indicate last write index.
1203                  * 4- send interrupt.
1204                  * This could lead to RX race, driver could receive RX interrupt
1205                  * but the shared data changes does not reflect this.
1206                  * this could lead to RX race, RX periodic will solve this race
1207                  */
1208                 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1209                             CSR_INT_PERIODIC_DIS);
1210                 iwl_rx_handle(priv);
1211                 /* Only set RX periodic if real RX is received. */
1212                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1213                         iwl_write32(priv, CSR_INT_PERIODIC_REG,
1214                                     CSR_INT_PERIODIC_ENA);
1215
1216                 priv->isr_stats.rx++;
1217         }
1218
1219         if (inta & CSR_INT_BIT_FH_TX) {
1220                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1221                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1222                 priv->isr_stats.tx++;
1223                 handled |= CSR_INT_BIT_FH_TX;
1224                 /* FH finished to write, send event */
1225                 priv->ucode_write_complete = 1;
1226                 wake_up_interruptible(&priv->wait_command_queue);
1227         }
1228
1229         if (inta & ~handled) {
1230                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1231                 priv->isr_stats.unhandled++;
1232         }
1233
1234         if (inta & ~(priv->inta_mask)) {
1235                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1236                          inta & ~priv->inta_mask);
1237         }
1238
1239
1240         /* Re-enable all interrupts */
1241         /* only Re-enable if diabled by irq */
1242         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1243                 iwl_enable_interrupts(priv);
1244
1245         spin_unlock_irqrestore(&priv->lock, flags);
1246
1247 }
1248
1249
1250 /******************************************************************************
1251  *
1252  * uCode download functions
1253  *
1254  ******************************************************************************/
1255
1256 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1257 {
1258         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1259         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1260         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1261         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1262         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1263         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1264 }
1265
1266 static void iwl_nic_start(struct iwl_priv *priv)
1267 {
1268         /* Remove all resets to allow NIC to operate */
1269         iwl_write32(priv, CSR_RESET, 0);
1270 }
1271
1272
1273 /**
1274  * iwl_read_ucode - Read uCode images from disk file.
1275  *
1276  * Copy into buffers for card to fetch via bus-mastering
1277  */
1278 static int iwl_read_ucode(struct iwl_priv *priv)
1279 {
1280         struct iwl_ucode_header *ucode;
1281         int ret = -EINVAL, index;
1282         const struct firmware *ucode_raw;
1283         const char *name_pre = priv->cfg->fw_name_pre;
1284         const unsigned int api_max = priv->cfg->ucode_api_max;
1285         const unsigned int api_min = priv->cfg->ucode_api_min;
1286         char buf[25];
1287         u8 *src;
1288         size_t len;
1289         u32 api_ver, build;
1290         u32 inst_size, data_size, init_size, init_data_size, boot_size;
1291         u16 eeprom_ver;
1292
1293         /* Ask kernel firmware_class module to get the boot firmware off disk.
1294          * request_firmware() is synchronous, file is in memory on return. */
1295         for (index = api_max; index >= api_min; index--) {
1296                 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1297                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1298                 if (ret < 0) {
1299                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
1300                                   buf, ret);
1301                         if (ret == -ENOENT)
1302                                 continue;
1303                         else
1304                                 goto error;
1305                 } else {
1306                         if (index < api_max)
1307                                 IWL_ERR(priv, "Loaded firmware %s, "
1308                                         "which is deprecated. "
1309                                         "Please use API v%u instead.\n",
1310                                           buf, api_max);
1311
1312                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1313                                        buf, ucode_raw->size);
1314                         break;
1315                 }
1316         }
1317
1318         if (ret < 0)
1319                 goto error;
1320
1321         /* Make sure that we got at least the v1 header! */
1322         if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1323                 IWL_ERR(priv, "File size way too small!\n");
1324                 ret = -EINVAL;
1325                 goto err_release;
1326         }
1327
1328         /* Data from ucode file:  header followed by uCode images */
1329         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1330
1331         priv->ucode_ver = le32_to_cpu(ucode->ver);
1332         api_ver = IWL_UCODE_API(priv->ucode_ver);
1333         build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1334         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1335         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1336         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1337         init_data_size =
1338                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1339         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1340         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1341
1342         /* api_ver should match the api version forming part of the
1343          * firmware filename ... but we don't check for that and only rely
1344          * on the API version read from firmware header from here on forward */
1345
1346         if (api_ver < api_min || api_ver > api_max) {
1347                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1348                           "Driver supports v%u, firmware is v%u.\n",
1349                           api_max, api_ver);
1350                 priv->ucode_ver = 0;
1351                 ret = -EINVAL;
1352                 goto err_release;
1353         }
1354         if (api_ver != api_max)
1355                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1356                           "got v%u. New firmware can be obtained "
1357                           "from http://www.intellinuxwireless.org.\n",
1358                           api_max, api_ver);
1359
1360         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1361                IWL_UCODE_MAJOR(priv->ucode_ver),
1362                IWL_UCODE_MINOR(priv->ucode_ver),
1363                IWL_UCODE_API(priv->ucode_ver),
1364                IWL_UCODE_SERIAL(priv->ucode_ver));
1365
1366         if (build)
1367                 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1368
1369         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1370         IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1371                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1372                        ? "OTP" : "EEPROM", eeprom_ver);
1373
1374         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1375                        priv->ucode_ver);
1376         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1377                        inst_size);
1378         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1379                        data_size);
1380         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1381                        init_size);
1382         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1383                        init_data_size);
1384         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1385                        boot_size);
1386
1387         /* Verify size of file vs. image size info in file's header */
1388         if (ucode_raw->size !=
1389                 priv->cfg->ops->ucode->get_header_size(api_ver) +
1390                 inst_size + data_size + init_size +
1391                 init_data_size + boot_size) {
1392
1393                 IWL_DEBUG_INFO(priv,
1394                         "uCode file size %d does not match expected size\n",
1395                         (int)ucode_raw->size);
1396                 ret = -EINVAL;
1397                 goto err_release;
1398         }
1399
1400         /* Verify that uCode images will fit in card's SRAM */
1401         if (inst_size > priv->hw_params.max_inst_size) {
1402                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1403                                inst_size);
1404                 ret = -EINVAL;
1405                 goto err_release;
1406         }
1407
1408         if (data_size > priv->hw_params.max_data_size) {
1409                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1410                                 data_size);
1411                 ret = -EINVAL;
1412                 goto err_release;
1413         }
1414         if (init_size > priv->hw_params.max_inst_size) {
1415                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1416                         init_size);
1417                 ret = -EINVAL;
1418                 goto err_release;
1419         }
1420         if (init_data_size > priv->hw_params.max_data_size) {
1421                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1422                       init_data_size);
1423                 ret = -EINVAL;
1424                 goto err_release;
1425         }
1426         if (boot_size > priv->hw_params.max_bsm_size) {
1427                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1428                         boot_size);
1429                 ret = -EINVAL;
1430                 goto err_release;
1431         }
1432
1433         /* Allocate ucode buffers for card's bus-master loading ... */
1434
1435         /* Runtime instructions and 2 copies of data:
1436          * 1) unmodified from disk
1437          * 2) backup cache for save/restore during power-downs */
1438         priv->ucode_code.len = inst_size;
1439         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1440
1441         priv->ucode_data.len = data_size;
1442         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1443
1444         priv->ucode_data_backup.len = data_size;
1445         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1446
1447         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1448             !priv->ucode_data_backup.v_addr)
1449                 goto err_pci_alloc;
1450
1451         /* Initialization instructions and data */
1452         if (init_size && init_data_size) {
1453                 priv->ucode_init.len = init_size;
1454                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1455
1456                 priv->ucode_init_data.len = init_data_size;
1457                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1458
1459                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1460                         goto err_pci_alloc;
1461         }
1462
1463         /* Bootstrap (instructions only, no data) */
1464         if (boot_size) {
1465                 priv->ucode_boot.len = boot_size;
1466                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1467
1468                 if (!priv->ucode_boot.v_addr)
1469                         goto err_pci_alloc;
1470         }
1471
1472         /* Copy images into buffers for card's bus-master reads ... */
1473
1474         /* Runtime instructions (first block of data in file) */
1475         len = inst_size;
1476         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1477         memcpy(priv->ucode_code.v_addr, src, len);
1478         src += len;
1479
1480         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1481                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1482
1483         /* Runtime data (2nd block)
1484          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1485         len = data_size;
1486         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1487         memcpy(priv->ucode_data.v_addr, src, len);
1488         memcpy(priv->ucode_data_backup.v_addr, src, len);
1489         src += len;
1490
1491         /* Initialization instructions (3rd block) */
1492         if (init_size) {
1493                 len = init_size;
1494                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1495                                 len);
1496                 memcpy(priv->ucode_init.v_addr, src, len);
1497                 src += len;
1498         }
1499
1500         /* Initialization data (4th block) */
1501         if (init_data_size) {
1502                 len = init_data_size;
1503                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1504                                len);
1505                 memcpy(priv->ucode_init_data.v_addr, src, len);
1506                 src += len;
1507         }
1508
1509         /* Bootstrap instructions (5th block) */
1510         len = boot_size;
1511         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1512         memcpy(priv->ucode_boot.v_addr, src, len);
1513
1514         /* We have our copies now, allow OS release its copies */
1515         release_firmware(ucode_raw);
1516         return 0;
1517
1518  err_pci_alloc:
1519         IWL_ERR(priv, "failed to allocate pci memory\n");
1520         ret = -ENOMEM;
1521         iwl_dealloc_ucode_pci(priv);
1522
1523  err_release:
1524         release_firmware(ucode_raw);
1525
1526  error:
1527         return ret;
1528 }
1529
1530 #ifdef CONFIG_IWLWIFI_DEBUG
1531 static const char *desc_lookup_text[] = {
1532         "OK",
1533         "FAIL",
1534         "BAD_PARAM",
1535         "BAD_CHECKSUM",
1536         "NMI_INTERRUPT_WDG",
1537         "SYSASSERT",
1538         "FATAL_ERROR",
1539         "BAD_COMMAND",
1540         "HW_ERROR_TUNE_LOCK",
1541         "HW_ERROR_TEMPERATURE",
1542         "ILLEGAL_CHAN_FREQ",
1543         "VCC_NOT_STABLE",
1544         "FH_ERROR",
1545         "NMI_INTERRUPT_HOST",
1546         "NMI_INTERRUPT_ACTION_PT",
1547         "NMI_INTERRUPT_UNKNOWN",
1548         "UCODE_VERSION_MISMATCH",
1549         "HW_ERROR_ABS_LOCK",
1550         "HW_ERROR_CAL_LOCK_FAIL",
1551         "NMI_INTERRUPT_INST_ACTION_PT",
1552         "NMI_INTERRUPT_DATA_ACTION_PT",
1553         "NMI_TRM_HW_ER",
1554         "NMI_INTERRUPT_TRM",
1555         "NMI_INTERRUPT_BREAK_POINT"
1556         "DEBUG_0",
1557         "DEBUG_1",
1558         "DEBUG_2",
1559         "DEBUG_3",
1560         "UNKNOWN"
1561 };
1562
1563 static const char *desc_lookup(int i)
1564 {
1565         int max = ARRAY_SIZE(desc_lookup_text) - 1;
1566
1567         if (i < 0 || i > max)
1568                 i = max;
1569
1570         return desc_lookup_text[i];
1571 }
1572
1573 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1574 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1575
1576 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1577 {
1578         u32 data2, line;
1579         u32 desc, time, count, base, data1;
1580         u32 blink1, blink2, ilink1, ilink2;
1581
1582         if (priv->ucode_type == UCODE_INIT)
1583                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1584         else
1585                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1586
1587         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1588                 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1589                 return;
1590         }
1591
1592         count = iwl_read_targ_mem(priv, base);
1593
1594         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1595                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1596                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1597                         priv->status, count);
1598         }
1599
1600         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1601         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1602         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1603         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1604         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1605         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1606         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1607         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1608         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1609
1610         IWL_ERR(priv, "Desc                               Time       "
1611                 "data1      data2      line\n");
1612         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1613                 desc_lookup(desc), desc, time, data1, data2, line);
1614         IWL_ERR(priv, "blink1  blink2  ilink1  ilink2\n");
1615         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1616                 ilink1, ilink2);
1617
1618 }
1619
1620 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1621
1622 /**
1623  * iwl_print_event_log - Dump error event log to syslog
1624  *
1625  */
1626 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1627                                 u32 num_events, u32 mode)
1628 {
1629         u32 i;
1630         u32 base;       /* SRAM byte address of event log header */
1631         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1632         u32 ptr;        /* SRAM byte address of log data */
1633         u32 ev, time, data; /* event log data */
1634
1635         if (num_events == 0)
1636                 return;
1637         if (priv->ucode_type == UCODE_INIT)
1638                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1639         else
1640                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1641
1642         if (mode == 0)
1643                 event_size = 2 * sizeof(u32);
1644         else
1645                 event_size = 3 * sizeof(u32);
1646
1647         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1648
1649         /* "time" is actually "data" for mode 0 (no timestamp).
1650         * place event id # at far right for easier visual parsing. */
1651         for (i = 0; i < num_events; i++) {
1652                 ev = iwl_read_targ_mem(priv, ptr);
1653                 ptr += sizeof(u32);
1654                 time = iwl_read_targ_mem(priv, ptr);
1655                 ptr += sizeof(u32);
1656                 if (mode == 0) {
1657                         /* data, ev */
1658                         IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1659                 } else {
1660                         data = iwl_read_targ_mem(priv, ptr);
1661                         ptr += sizeof(u32);
1662                         IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1663                                         time, data, ev);
1664                 }
1665         }
1666 }
1667
1668 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1669 {
1670         u32 base;       /* SRAM byte address of event log header */
1671         u32 capacity;   /* event log capacity in # entries */
1672         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1673         u32 num_wraps;  /* # times uCode wrapped to top of log */
1674         u32 next_entry; /* index of next entry to be written by uCode */
1675         u32 size;       /* # entries that we'll print */
1676
1677         if (priv->ucode_type == UCODE_INIT)
1678                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1679         else
1680                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1681
1682         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1683                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1684                 return;
1685         }
1686
1687         /* event log header */
1688         capacity = iwl_read_targ_mem(priv, base);
1689         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1690         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1691         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1692
1693         size = num_wraps ? capacity : next_entry;
1694
1695         /* bail out if nothing in log */
1696         if (size == 0) {
1697                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1698                 return;
1699         }
1700
1701         IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1702                         size, num_wraps);
1703
1704         /* if uCode has wrapped back to top of log, start at the oldest entry,
1705          * i.e the next one that uCode would fill. */
1706         if (num_wraps)
1707                 iwl_print_event_log(priv, next_entry,
1708                                         capacity - next_entry, mode);
1709         /* (then/else) start at top of log */
1710         iwl_print_event_log(priv, 0, next_entry, mode);
1711
1712 }
1713 #endif
1714
1715 /**
1716  * iwl_alive_start - called after REPLY_ALIVE notification received
1717  *                   from protocol/runtime uCode (initialization uCode's
1718  *                   Alive gets handled by iwl_init_alive_start()).
1719  */
1720 static void iwl_alive_start(struct iwl_priv *priv)
1721 {
1722         int ret = 0;
1723
1724         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1725
1726         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1727                 /* We had an error bringing up the hardware, so take it
1728                  * all the way back down so we can try again */
1729                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1730                 goto restart;
1731         }
1732
1733         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1734          * This is a paranoid check, because we would not have gotten the
1735          * "runtime" alive if code weren't properly loaded.  */
1736         if (iwl_verify_ucode(priv)) {
1737                 /* Runtime instruction load was bad;
1738                  * take it all the way back down so we can try again */
1739                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1740                 goto restart;
1741         }
1742
1743         iwl_clear_stations_table(priv);
1744         ret = priv->cfg->ops->lib->alive_notify(priv);
1745         if (ret) {
1746                 IWL_WARN(priv,
1747                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
1748                 goto restart;
1749         }
1750
1751         /* After the ALIVE response, we can send host commands to the uCode */
1752         set_bit(STATUS_ALIVE, &priv->status);
1753
1754         if (iwl_is_rfkill(priv))
1755                 return;
1756
1757         ieee80211_wake_queues(priv->hw);
1758
1759         priv->active_rate = priv->rates_mask;
1760         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1761
1762         if (iwl_is_associated(priv)) {
1763                 struct iwl_rxon_cmd *active_rxon =
1764                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
1765                 /* apply any changes in staging */
1766                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1767                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1768         } else {
1769                 /* Initialize our rx_config data */
1770                 iwl_connection_init_rx_config(priv, priv->iw_mode);
1771
1772                 if (priv->cfg->ops->hcmd->set_rxon_chain)
1773                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
1774
1775                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1776         }
1777
1778         /* Configure Bluetooth device coexistence support */
1779         iwl_send_bt_config(priv);
1780
1781         iwl_reset_run_time_calib(priv);
1782
1783         /* Configure the adapter for unassociated operation */
1784         iwlcore_commit_rxon(priv);
1785
1786         /* At this point, the NIC is initialized and operational */
1787         iwl_rf_kill_ct_config(priv);
1788
1789         iwl_leds_register(priv);
1790
1791         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1792         set_bit(STATUS_READY, &priv->status);
1793         wake_up_interruptible(&priv->wait_command_queue);
1794
1795         iwl_power_update_mode(priv, true);
1796
1797         /* reassociate for ADHOC mode */
1798         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1799                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1800                                                                 priv->vif);
1801                 if (beacon)
1802                         iwl_mac_beacon_update(priv->hw, beacon);
1803         }
1804
1805
1806         if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1807                 iwl_set_mode(priv, priv->iw_mode);
1808
1809         return;
1810
1811  restart:
1812         queue_work(priv->workqueue, &priv->restart);
1813 }
1814
1815 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1816
1817 static void __iwl_down(struct iwl_priv *priv)
1818 {
1819         unsigned long flags;
1820         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1821
1822         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1823
1824         if (!exit_pending)
1825                 set_bit(STATUS_EXIT_PENDING, &priv->status);
1826
1827         iwl_leds_unregister(priv);
1828
1829         iwl_clear_stations_table(priv);
1830
1831         /* Unblock any waiting calls */
1832         wake_up_interruptible_all(&priv->wait_command_queue);
1833
1834         /* Wipe out the EXIT_PENDING status bit if we are not actually
1835          * exiting the module */
1836         if (!exit_pending)
1837                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1838
1839         /* stop and reset the on-board processor */
1840         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1841
1842         /* tell the device to stop sending interrupts */
1843         spin_lock_irqsave(&priv->lock, flags);
1844         iwl_disable_interrupts(priv);
1845         spin_unlock_irqrestore(&priv->lock, flags);
1846         iwl_synchronize_irq(priv);
1847
1848         if (priv->mac80211_registered)
1849                 ieee80211_stop_queues(priv->hw);
1850
1851         /* If we have not previously called iwl_init() then
1852          * clear all bits but the RF Kill bit and return */
1853         if (!iwl_is_init(priv)) {
1854                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1855                                         STATUS_RF_KILL_HW |
1856                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1857                                         STATUS_GEO_CONFIGURED |
1858                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1859                                         STATUS_EXIT_PENDING;
1860                 goto exit;
1861         }
1862
1863         /* ...otherwise clear out all the status bits but the RF Kill
1864          * bit and continue taking the NIC down. */
1865         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1866                                 STATUS_RF_KILL_HW |
1867                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1868                                 STATUS_GEO_CONFIGURED |
1869                         test_bit(STATUS_FW_ERROR, &priv->status) <<
1870                                 STATUS_FW_ERROR |
1871                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1872                                 STATUS_EXIT_PENDING;
1873
1874         /* device going down, Stop using ICT table */
1875         iwl_disable_ict(priv);
1876         spin_lock_irqsave(&priv->lock, flags);
1877         iwl_clear_bit(priv, CSR_GP_CNTRL,
1878                          CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1879         spin_unlock_irqrestore(&priv->lock, flags);
1880
1881         iwl_txq_ctx_stop(priv);
1882         iwl_rxq_stop(priv);
1883
1884         iwl_write_prph(priv, APMG_CLK_DIS_REG,
1885                                 APMG_CLK_VAL_DMA_CLK_RQT);
1886
1887         udelay(5);
1888
1889         /* FIXME: apm_ops.suspend(priv) */
1890         if (exit_pending)
1891                 priv->cfg->ops->lib->apm_ops.stop(priv);
1892         else
1893                 priv->cfg->ops->lib->apm_ops.reset(priv);
1894  exit:
1895         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1896
1897         if (priv->ibss_beacon)
1898                 dev_kfree_skb(priv->ibss_beacon);
1899         priv->ibss_beacon = NULL;
1900
1901         /* clear out any free frames */
1902         iwl_clear_free_frames(priv);
1903 }
1904
1905 static void iwl_down(struct iwl_priv *priv)
1906 {
1907         mutex_lock(&priv->mutex);
1908         __iwl_down(priv);
1909         mutex_unlock(&priv->mutex);
1910
1911         iwl_cancel_deferred_work(priv);
1912 }
1913
1914 #define HW_READY_TIMEOUT (50)
1915
1916 static int iwl_set_hw_ready(struct iwl_priv *priv)
1917 {
1918         int ret = 0;
1919
1920         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1921                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1922
1923         /* See if we got it */
1924         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1925                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1926                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1927                                 HW_READY_TIMEOUT);
1928         if (ret != -ETIMEDOUT)
1929                 priv->hw_ready = true;
1930         else
1931                 priv->hw_ready = false;
1932
1933         IWL_DEBUG_INFO(priv, "hardware %s\n",
1934                       (priv->hw_ready == 1) ? "ready" : "not ready");
1935         return ret;
1936 }
1937
1938 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1939 {
1940         int ret = 0;
1941
1942         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1943
1944         ret = iwl_set_hw_ready(priv);
1945         if (priv->hw_ready)
1946                 return ret;
1947
1948         /* If HW is not ready, prepare the conditions to check again */
1949         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1950                         CSR_HW_IF_CONFIG_REG_PREPARE);
1951
1952         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1953                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1954                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1955
1956         /* HW should be ready by now, check again. */
1957         if (ret != -ETIMEDOUT)
1958                 iwl_set_hw_ready(priv);
1959
1960         return ret;
1961 }
1962
1963 #define MAX_HW_RESTARTS 5
1964
1965 static int __iwl_up(struct iwl_priv *priv)
1966 {
1967         int i;
1968         int ret;
1969
1970         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1971                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1972                 return -EIO;
1973         }
1974
1975         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1976                 IWL_ERR(priv, "ucode not available for device bringup\n");
1977                 return -EIO;
1978         }
1979
1980         iwl_prepare_card_hw(priv);
1981
1982         if (!priv->hw_ready) {
1983                 IWL_WARN(priv, "Exit HW not ready\n");
1984                 return -EIO;
1985         }
1986
1987         /* If platform's RF_KILL switch is NOT set to KILL */
1988         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1989                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1990         else
1991                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1992
1993         if (iwl_is_rfkill(priv)) {
1994                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
1995
1996                 iwl_enable_interrupts(priv);
1997                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
1998                 return 0;
1999         }
2000
2001         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2002
2003         ret = iwl_hw_nic_init(priv);
2004         if (ret) {
2005                 IWL_ERR(priv, "Unable to init nic\n");
2006                 return ret;
2007         }
2008
2009         /* make sure rfkill handshake bits are cleared */
2010         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2011         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2012                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2013
2014         /* clear (again), then enable host interrupts */
2015         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2016         iwl_enable_interrupts(priv);
2017
2018         /* really make sure rfkill handshake bits are cleared */
2019         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2020         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2021
2022         /* Copy original ucode data image from disk into backup cache.
2023          * This will be used to initialize the on-board processor's
2024          * data SRAM for a clean start when the runtime program first loads. */
2025         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2026                priv->ucode_data.len);
2027
2028         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2029
2030                 iwl_clear_stations_table(priv);
2031
2032                 /* load bootstrap state machine,
2033                  * load bootstrap program into processor's memory,
2034                  * prepare to load the "initialize" uCode */
2035                 ret = priv->cfg->ops->lib->load_ucode(priv);
2036
2037                 if (ret) {
2038                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2039                                 ret);
2040                         continue;
2041                 }
2042
2043                 /* start card; "initialize" will load runtime ucode */
2044                 iwl_nic_start(priv);
2045
2046                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2047
2048                 return 0;
2049         }
2050
2051         set_bit(STATUS_EXIT_PENDING, &priv->status);
2052         __iwl_down(priv);
2053         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2054
2055         /* tried to restart and config the device for as long as our
2056          * patience could withstand */
2057         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2058         return -EIO;
2059 }
2060
2061
2062 /*****************************************************************************
2063  *
2064  * Workqueue callbacks
2065  *
2066  *****************************************************************************/
2067
2068 static void iwl_bg_init_alive_start(struct work_struct *data)
2069 {
2070         struct iwl_priv *priv =
2071             container_of(data, struct iwl_priv, init_alive_start.work);
2072
2073         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2074                 return;
2075
2076         mutex_lock(&priv->mutex);
2077         priv->cfg->ops->lib->init_alive_start(priv);
2078         mutex_unlock(&priv->mutex);
2079 }
2080
2081 static void iwl_bg_alive_start(struct work_struct *data)
2082 {
2083         struct iwl_priv *priv =
2084             container_of(data, struct iwl_priv, alive_start.work);
2085
2086         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2087                 return;
2088
2089         /* enable dram interrupt */
2090         iwl_reset_ict(priv);
2091
2092         mutex_lock(&priv->mutex);
2093         iwl_alive_start(priv);
2094         mutex_unlock(&priv->mutex);
2095 }
2096
2097 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2098 {
2099         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2100                         run_time_calib_work);
2101
2102         mutex_lock(&priv->mutex);
2103
2104         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2105             test_bit(STATUS_SCANNING, &priv->status)) {
2106                 mutex_unlock(&priv->mutex);
2107                 return;
2108         }
2109
2110         if (priv->start_calib) {
2111                 iwl_chain_noise_calibration(priv, &priv->statistics);
2112
2113                 iwl_sensitivity_calibration(priv, &priv->statistics);
2114         }
2115
2116         mutex_unlock(&priv->mutex);
2117         return;
2118 }
2119
2120 static void iwl_bg_up(struct work_struct *data)
2121 {
2122         struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2123
2124         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2125                 return;
2126
2127         mutex_lock(&priv->mutex);
2128         __iwl_up(priv);
2129         mutex_unlock(&priv->mutex);
2130 }
2131
2132 static void iwl_bg_restart(struct work_struct *data)
2133 {
2134         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2135
2136         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2137                 return;
2138
2139         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2140                 mutex_lock(&priv->mutex);
2141                 priv->vif = NULL;
2142                 priv->is_open = 0;
2143                 mutex_unlock(&priv->mutex);
2144                 iwl_down(priv);
2145                 ieee80211_restart_hw(priv->hw);
2146         } else {
2147                 iwl_down(priv);
2148                 queue_work(priv->workqueue, &priv->up);
2149         }
2150 }
2151
2152 static void iwl_bg_rx_replenish(struct work_struct *data)
2153 {
2154         struct iwl_priv *priv =
2155             container_of(data, struct iwl_priv, rx_replenish);
2156
2157         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2158                 return;
2159
2160         mutex_lock(&priv->mutex);
2161         iwl_rx_replenish(priv);
2162         mutex_unlock(&priv->mutex);
2163 }
2164
2165 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2166
2167 void iwl_post_associate(struct iwl_priv *priv)
2168 {
2169         struct ieee80211_conf *conf = NULL;
2170         int ret = 0;
2171         unsigned long flags;
2172
2173         if (priv->iw_mode == NL80211_IFTYPE_AP) {
2174                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2175                 return;
2176         }
2177
2178         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2179                         priv->assoc_id, priv->active_rxon.bssid_addr);
2180
2181
2182         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2183                 return;
2184
2185
2186         if (!priv->vif || !priv->is_open)
2187                 return;
2188
2189         iwl_scan_cancel_timeout(priv, 200);
2190
2191         conf = ieee80211_get_hw_conf(priv->hw);
2192
2193         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2194         iwlcore_commit_rxon(priv);
2195
2196         iwl_setup_rxon_timing(priv);
2197         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2198                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2199         if (ret)
2200                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2201                             "Attempting to continue.\n");
2202
2203         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2204
2205         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2206
2207         if (priv->cfg->ops->hcmd->set_rxon_chain)
2208                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2209
2210         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2211
2212         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2213                         priv->assoc_id, priv->beacon_int);
2214
2215         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2216                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2217         else
2218                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2219
2220         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2221                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2222                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2223                 else
2224                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2225
2226                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2227                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2228
2229         }
2230
2231         iwlcore_commit_rxon(priv);
2232
2233         switch (priv->iw_mode) {
2234         case NL80211_IFTYPE_STATION:
2235                 break;
2236
2237         case NL80211_IFTYPE_ADHOC:
2238
2239                 /* assume default assoc id */
2240                 priv->assoc_id = 1;
2241
2242                 iwl_rxon_add_station(priv, priv->bssid, 0);
2243                 iwl_send_beacon_cmd(priv);
2244
2245                 break;
2246
2247         default:
2248                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2249                           __func__, priv->iw_mode);
2250                 break;
2251         }
2252
2253         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2254                 priv->assoc_station_added = 1;
2255
2256         spin_lock_irqsave(&priv->lock, flags);
2257         iwl_activate_qos(priv, 0);
2258         spin_unlock_irqrestore(&priv->lock, flags);
2259
2260         /* the chain noise calibration will enabled PM upon completion
2261          * If chain noise has already been run, then we need to enable
2262          * power management here */
2263         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2264                 iwl_power_update_mode(priv, false);
2265
2266         /* Enable Rx differential gain and sensitivity calibrations */
2267         iwl_chain_noise_reset(priv);
2268         priv->start_calib = 1;
2269
2270 }
2271
2272 /*****************************************************************************
2273  *
2274  * mac80211 entry point functions
2275  *
2276  *****************************************************************************/
2277
2278 #define UCODE_READY_TIMEOUT     (4 * HZ)
2279
2280 static int iwl_mac_start(struct ieee80211_hw *hw)
2281 {
2282         struct iwl_priv *priv = hw->priv;
2283         int ret;
2284
2285         IWL_DEBUG_MAC80211(priv, "enter\n");
2286
2287         /* we should be verifying the device is ready to be opened */
2288         mutex_lock(&priv->mutex);
2289
2290         /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2291          * ucode filename and max sizes are card-specific. */
2292
2293         if (!priv->ucode_code.len) {
2294                 ret = iwl_read_ucode(priv);
2295                 if (ret) {
2296                         IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2297                         mutex_unlock(&priv->mutex);
2298                         return ret;
2299                 }
2300         }
2301
2302         ret = __iwl_up(priv);
2303
2304         mutex_unlock(&priv->mutex);
2305
2306         if (ret)
2307                 return ret;
2308
2309         if (iwl_is_rfkill(priv))
2310                 goto out;
2311
2312         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2313
2314         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2315          * mac80211 will not be run successfully. */
2316         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2317                         test_bit(STATUS_READY, &priv->status),
2318                         UCODE_READY_TIMEOUT);
2319         if (!ret) {
2320                 if (!test_bit(STATUS_READY, &priv->status)) {
2321                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2322                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2323                         return -ETIMEDOUT;
2324                 }
2325         }
2326
2327 out:
2328         priv->is_open = 1;
2329         IWL_DEBUG_MAC80211(priv, "leave\n");
2330         return 0;
2331 }
2332
2333 static void iwl_mac_stop(struct ieee80211_hw *hw)
2334 {
2335         struct iwl_priv *priv = hw->priv;
2336
2337         IWL_DEBUG_MAC80211(priv, "enter\n");
2338
2339         if (!priv->is_open)
2340                 return;
2341
2342         priv->is_open = 0;
2343
2344         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2345                 /* stop mac, cancel any scan request and clear
2346                  * RXON_FILTER_ASSOC_MSK BIT
2347                  */
2348                 mutex_lock(&priv->mutex);
2349                 iwl_scan_cancel_timeout(priv, 100);
2350                 mutex_unlock(&priv->mutex);
2351         }
2352
2353         iwl_down(priv);
2354
2355         flush_workqueue(priv->workqueue);
2356
2357         /* enable interrupts again in order to receive rfkill changes */
2358         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2359         iwl_enable_interrupts(priv);
2360
2361         IWL_DEBUG_MAC80211(priv, "leave\n");
2362 }
2363
2364 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2365 {
2366         struct iwl_priv *priv = hw->priv;
2367
2368         IWL_DEBUG_MACDUMP(priv, "enter\n");
2369
2370         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2371                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2372
2373         if (iwl_tx_skb(priv, skb))
2374                 dev_kfree_skb_any(skb);
2375
2376         IWL_DEBUG_MACDUMP(priv, "leave\n");
2377         return NETDEV_TX_OK;
2378 }
2379
2380 void iwl_config_ap(struct iwl_priv *priv)
2381 {
2382         int ret = 0;
2383         unsigned long flags;
2384
2385         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2386                 return;
2387
2388         /* The following should be done only at AP bring up */
2389         if (!iwl_is_associated(priv)) {
2390
2391                 /* RXON - unassoc (to set timing command) */
2392                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2393                 iwlcore_commit_rxon(priv);
2394
2395                 /* RXON Timing */
2396                 iwl_setup_rxon_timing(priv);
2397                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2398                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2399                 if (ret)
2400                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2401                                         "Attempting to continue.\n");
2402
2403                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2404                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2405
2406                 /* FIXME: what should be the assoc_id for AP? */
2407                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2408                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2409                         priv->staging_rxon.flags |=
2410                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2411                 else
2412                         priv->staging_rxon.flags &=
2413                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2414
2415                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2416                         if (priv->assoc_capability &
2417                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2418                                 priv->staging_rxon.flags |=
2419                                         RXON_FLG_SHORT_SLOT_MSK;
2420                         else
2421                                 priv->staging_rxon.flags &=
2422                                         ~RXON_FLG_SHORT_SLOT_MSK;
2423
2424                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2425                                 priv->staging_rxon.flags &=
2426                                         ~RXON_FLG_SHORT_SLOT_MSK;
2427                 }
2428                 /* restore RXON assoc */
2429                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2430                 iwlcore_commit_rxon(priv);
2431                 spin_lock_irqsave(&priv->lock, flags);
2432                 iwl_activate_qos(priv, 1);
2433                 spin_unlock_irqrestore(&priv->lock, flags);
2434                 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2435         }
2436         iwl_send_beacon_cmd(priv);
2437
2438         /* FIXME - we need to add code here to detect a totally new
2439          * configuration, reset the AP, unassoc, rxon timing, assoc,
2440          * clear sta table, add BCAST sta... */
2441 }
2442
2443 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2444                         struct ieee80211_key_conf *keyconf, const u8 *addr,
2445                         u32 iv32, u16 *phase1key)
2446 {
2447
2448         struct iwl_priv *priv = hw->priv;
2449         IWL_DEBUG_MAC80211(priv, "enter\n");
2450
2451         iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2452
2453         IWL_DEBUG_MAC80211(priv, "leave\n");
2454 }
2455
2456 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2457                            struct ieee80211_vif *vif,
2458                            struct ieee80211_sta *sta,
2459                            struct ieee80211_key_conf *key)
2460 {
2461         struct iwl_priv *priv = hw->priv;
2462         const u8 *addr;
2463         int ret;
2464         u8 sta_id;
2465         bool is_default_wep_key = false;
2466
2467         IWL_DEBUG_MAC80211(priv, "enter\n");
2468
2469         if (priv->cfg->mod_params->sw_crypto) {
2470                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2471                 return -EOPNOTSUPP;
2472         }
2473         addr = sta ? sta->addr : iwl_bcast_addr;
2474         sta_id = iwl_find_station(priv, addr);
2475         if (sta_id == IWL_INVALID_STATION) {
2476                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2477                                    addr);
2478                 return -EINVAL;
2479
2480         }
2481
2482         mutex_lock(&priv->mutex);
2483         iwl_scan_cancel_timeout(priv, 100);
2484         mutex_unlock(&priv->mutex);
2485
2486         /* If we are getting WEP group key and we didn't receive any key mapping
2487          * so far, we are in legacy wep mode (group key only), otherwise we are
2488          * in 1X mode.
2489          * In legacy wep mode, we use another host command to the uCode */
2490         if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2491                 priv->iw_mode != NL80211_IFTYPE_AP) {
2492                 if (cmd == SET_KEY)
2493                         is_default_wep_key = !priv->key_mapping_key;
2494                 else
2495                         is_default_wep_key =
2496                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2497         }
2498
2499         switch (cmd) {
2500         case SET_KEY:
2501                 if (is_default_wep_key)
2502                         ret = iwl_set_default_wep_key(priv, key);
2503                 else
2504                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2505
2506                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2507                 break;
2508         case DISABLE_KEY:
2509                 if (is_default_wep_key)
2510                         ret = iwl_remove_default_wep_key(priv, key);
2511                 else
2512                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2513
2514                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2515                 break;
2516         default:
2517                 ret = -EINVAL;
2518         }
2519
2520         IWL_DEBUG_MAC80211(priv, "leave\n");
2521
2522         return ret;
2523 }
2524
2525 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2526                              enum ieee80211_ampdu_mlme_action action,
2527                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2528 {
2529         struct iwl_priv *priv = hw->priv;
2530         int ret;
2531
2532         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2533                      sta->addr, tid);
2534
2535         if (!(priv->cfg->sku & IWL_SKU_N))
2536                 return -EACCES;
2537
2538         switch (action) {
2539         case IEEE80211_AMPDU_RX_START:
2540                 IWL_DEBUG_HT(priv, "start Rx\n");
2541                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2542         case IEEE80211_AMPDU_RX_STOP:
2543                 IWL_DEBUG_HT(priv, "stop Rx\n");
2544                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2545                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2546                         return 0;
2547                 else
2548                         return ret;
2549         case IEEE80211_AMPDU_TX_START:
2550                 IWL_DEBUG_HT(priv, "start Tx\n");
2551                 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2552         case IEEE80211_AMPDU_TX_STOP:
2553                 IWL_DEBUG_HT(priv, "stop Tx\n");
2554                 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2555                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2556                         return 0;
2557                 else
2558                         return ret;
2559         default:
2560                 IWL_DEBUG_HT(priv, "unknown\n");
2561                 return -EINVAL;
2562                 break;
2563         }
2564         return 0;
2565 }
2566
2567 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2568                              struct ieee80211_low_level_stats *stats)
2569 {
2570         struct iwl_priv *priv = hw->priv;
2571
2572         priv = hw->priv;
2573         IWL_DEBUG_MAC80211(priv, "enter\n");
2574         IWL_DEBUG_MAC80211(priv, "leave\n");
2575
2576         return 0;
2577 }
2578
2579 /*****************************************************************************
2580  *
2581  * sysfs attributes
2582  *
2583  *****************************************************************************/
2584
2585 #ifdef CONFIG_IWLWIFI_DEBUG
2586
2587 /*
2588  * The following adds a new attribute to the sysfs representation
2589  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2590  * used for controlling the debug level.
2591  *
2592  * See the level definitions in iwl for details.
2593  *
2594  * The debug_level being managed using sysfs below is a per device debug
2595  * level that is used instead of the global debug level if it (the per
2596  * device debug level) is set.
2597  */
2598 static ssize_t show_debug_level(struct device *d,
2599                                 struct device_attribute *attr, char *buf)
2600 {
2601         struct iwl_priv *priv = dev_get_drvdata(d);
2602         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2603 }
2604 static ssize_t store_debug_level(struct device *d,
2605                                 struct device_attribute *attr,
2606                                  const char *buf, size_t count)
2607 {
2608         struct iwl_priv *priv = dev_get_drvdata(d);
2609         unsigned long val;
2610         int ret;
2611
2612         ret = strict_strtoul(buf, 0, &val);
2613         if (ret)
2614                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2615         else {
2616                 priv->debug_level = val;
2617                 if (iwl_alloc_traffic_mem(priv))
2618                         IWL_ERR(priv,
2619                                 "Not enough memory to generate traffic log\n");
2620         }
2621         return strnlen(buf, count);
2622 }
2623
2624 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2625                         show_debug_level, store_debug_level);
2626
2627
2628 #endif /* CONFIG_IWLWIFI_DEBUG */
2629
2630
2631 static ssize_t show_temperature(struct device *d,
2632                                 struct device_attribute *attr, char *buf)
2633 {
2634         struct iwl_priv *priv = dev_get_drvdata(d);
2635
2636         if (!iwl_is_alive(priv))
2637                 return -EAGAIN;
2638
2639         return sprintf(buf, "%d\n", priv->temperature);
2640 }
2641
2642 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2643
2644 static ssize_t show_tx_power(struct device *d,
2645                              struct device_attribute *attr, char *buf)
2646 {
2647         struct iwl_priv *priv = dev_get_drvdata(d);
2648
2649         if (!iwl_is_ready_rf(priv))
2650                 return sprintf(buf, "off\n");
2651         else
2652                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2653 }
2654
2655 static ssize_t store_tx_power(struct device *d,
2656                               struct device_attribute *attr,
2657                               const char *buf, size_t count)
2658 {
2659         struct iwl_priv *priv = dev_get_drvdata(d);
2660         unsigned long val;
2661         int ret;
2662
2663         ret = strict_strtoul(buf, 10, &val);
2664         if (ret)
2665                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2666         else {
2667                 ret = iwl_set_tx_power(priv, val, false);
2668                 if (ret)
2669                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2670                                 ret);
2671                 else
2672                         ret = count;
2673         }
2674         return ret;
2675 }
2676
2677 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2678
2679 static ssize_t show_flags(struct device *d,
2680                           struct device_attribute *attr, char *buf)
2681 {
2682         struct iwl_priv *priv = dev_get_drvdata(d);
2683
2684         return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2685 }
2686
2687 static ssize_t store_flags(struct device *d,
2688                            struct device_attribute *attr,
2689                            const char *buf, size_t count)
2690 {
2691         struct iwl_priv *priv = dev_get_drvdata(d);
2692         unsigned long val;
2693         u32 flags;
2694         int ret = strict_strtoul(buf, 0, &val);
2695         if (ret)
2696                 return ret;
2697         flags = (u32)val;
2698
2699         mutex_lock(&priv->mutex);
2700         if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2701                 /* Cancel any currently running scans... */
2702                 if (iwl_scan_cancel_timeout(priv, 100))
2703                         IWL_WARN(priv, "Could not cancel scan.\n");
2704                 else {
2705                         IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2706                         priv->staging_rxon.flags = cpu_to_le32(flags);
2707                         iwlcore_commit_rxon(priv);
2708                 }
2709         }
2710         mutex_unlock(&priv->mutex);
2711
2712         return count;
2713 }
2714
2715 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2716
2717 static ssize_t show_filter_flags(struct device *d,
2718                                  struct device_attribute *attr, char *buf)
2719 {
2720         struct iwl_priv *priv = dev_get_drvdata(d);
2721
2722         return sprintf(buf, "0x%04X\n",
2723                 le32_to_cpu(priv->active_rxon.filter_flags));
2724 }
2725
2726 static ssize_t store_filter_flags(struct device *d,
2727                                   struct device_attribute *attr,
2728                                   const char *buf, size_t count)
2729 {
2730         struct iwl_priv *priv = dev_get_drvdata(d);
2731         unsigned long val;
2732         u32 filter_flags;
2733         int ret = strict_strtoul(buf, 0, &val);
2734         if (ret)
2735                 return ret;
2736         filter_flags = (u32)val;
2737
2738         mutex_lock(&priv->mutex);
2739         if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2740                 /* Cancel any currently running scans... */
2741                 if (iwl_scan_cancel_timeout(priv, 100))
2742                         IWL_WARN(priv, "Could not cancel scan.\n");
2743                 else {
2744                         IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2745                                        "0x%04X\n", filter_flags);
2746                         priv->staging_rxon.filter_flags =
2747                                 cpu_to_le32(filter_flags);
2748                         iwlcore_commit_rxon(priv);
2749                 }
2750         }
2751         mutex_unlock(&priv->mutex);
2752
2753         return count;
2754 }
2755
2756 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2757                    store_filter_flags);
2758
2759
2760 static ssize_t show_statistics(struct device *d,
2761                                struct device_attribute *attr, char *buf)
2762 {
2763         struct iwl_priv *priv = dev_get_drvdata(d);
2764         u32 size = sizeof(struct iwl_notif_statistics);
2765         u32 len = 0, ofs = 0;
2766         u8 *data = (u8 *)&priv->statistics;
2767         int rc = 0;
2768
2769         if (!iwl_is_alive(priv))
2770                 return -EAGAIN;
2771
2772         mutex_lock(&priv->mutex);
2773         rc = iwl_send_statistics_request(priv, 0);
2774         mutex_unlock(&priv->mutex);
2775
2776         if (rc) {
2777                 len = sprintf(buf,
2778                               "Error sending statistics request: 0x%08X\n", rc);
2779                 return len;
2780         }
2781
2782         while (size && (PAGE_SIZE - len)) {
2783                 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2784                                    PAGE_SIZE - len, 1);
2785                 len = strlen(buf);
2786                 if (PAGE_SIZE - len)
2787                         buf[len++] = '\n';
2788
2789                 ofs += 16;
2790                 size -= min(size, 16U);
2791         }
2792
2793         return len;
2794 }
2795
2796 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2797
2798
2799 /*****************************************************************************
2800  *
2801  * driver setup and teardown
2802  *
2803  *****************************************************************************/
2804
2805 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2806 {
2807         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2808
2809         init_waitqueue_head(&priv->wait_command_queue);
2810
2811         INIT_WORK(&priv->up, iwl_bg_up);
2812         INIT_WORK(&priv->restart, iwl_bg_restart);
2813         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2814         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2815         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2816         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2817         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2818
2819         iwl_setup_scan_deferred_work(priv);
2820
2821         if (priv->cfg->ops->lib->setup_deferred_work)
2822                 priv->cfg->ops->lib->setup_deferred_work(priv);
2823
2824         init_timer(&priv->statistics_periodic);
2825         priv->statistics_periodic.data = (unsigned long)priv;
2826         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2827
2828         if (!priv->cfg->use_isr_legacy)
2829                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2830                         iwl_irq_tasklet, (unsigned long)priv);
2831         else
2832                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2833                         iwl_irq_tasklet_legacy, (unsigned long)priv);
2834 }
2835
2836 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2837 {
2838         if (priv->cfg->ops->lib->cancel_deferred_work)
2839                 priv->cfg->ops->lib->cancel_deferred_work(priv);
2840
2841         cancel_delayed_work_sync(&priv->init_alive_start);
2842         cancel_delayed_work(&priv->scan_check);
2843         cancel_delayed_work(&priv->alive_start);
2844         cancel_work_sync(&priv->beacon_update);
2845         del_timer_sync(&priv->statistics_periodic);
2846 }
2847
2848 static struct attribute *iwl_sysfs_entries[] = {
2849         &dev_attr_flags.attr,
2850         &dev_attr_filter_flags.attr,
2851         &dev_attr_statistics.attr,
2852         &dev_attr_temperature.attr,
2853         &dev_attr_tx_power.attr,
2854 #ifdef CONFIG_IWLWIFI_DEBUG
2855         &dev_attr_debug_level.attr,
2856 #endif
2857         NULL
2858 };
2859
2860 static struct attribute_group iwl_attribute_group = {
2861         .name = NULL,           /* put in device directory */
2862         .attrs = iwl_sysfs_entries,
2863 };
2864
2865 static struct ieee80211_ops iwl_hw_ops = {
2866         .tx = iwl_mac_tx,
2867         .start = iwl_mac_start,
2868         .stop = iwl_mac_stop,
2869         .add_interface = iwl_mac_add_interface,
2870         .remove_interface = iwl_mac_remove_interface,
2871         .config = iwl_mac_config,
2872         .configure_filter = iwl_configure_filter,
2873         .set_key = iwl_mac_set_key,
2874         .update_tkip_key = iwl_mac_update_tkip_key,
2875         .get_stats = iwl_mac_get_stats,
2876         .get_tx_stats = iwl_mac_get_tx_stats,
2877         .conf_tx = iwl_mac_conf_tx,
2878         .reset_tsf = iwl_mac_reset_tsf,
2879         .bss_info_changed = iwl_bss_info_changed,
2880         .ampdu_action = iwl_mac_ampdu_action,
2881         .hw_scan = iwl_mac_hw_scan
2882 };
2883
2884 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2885 {
2886         int err = 0;
2887         struct iwl_priv *priv;
2888         struct ieee80211_hw *hw;
2889         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2890         unsigned long flags;
2891         u16 pci_cmd;
2892
2893         /************************
2894          * 1. Allocating HW data
2895          ************************/
2896
2897         /* Disabling hardware scan means that mac80211 will perform scans
2898          * "the hard way", rather than using device's scan. */
2899         if (cfg->mod_params->disable_hw_scan) {
2900                 if (iwl_debug_level & IWL_DL_INFO)
2901                         dev_printk(KERN_DEBUG, &(pdev->dev),
2902                                    "Disabling hw_scan\n");
2903                 iwl_hw_ops.hw_scan = NULL;
2904         }
2905
2906         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2907         if (!hw) {
2908                 err = -ENOMEM;
2909                 goto out;
2910         }
2911         priv = hw->priv;
2912         /* At this point both hw and priv are allocated. */
2913
2914         SET_IEEE80211_DEV(hw, &pdev->dev);
2915
2916         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2917         priv->cfg = cfg;
2918         priv->pci_dev = pdev;
2919         priv->inta_mask = CSR_INI_SET_MASK;
2920
2921 #ifdef CONFIG_IWLWIFI_DEBUG
2922         atomic_set(&priv->restrict_refcnt, 0);
2923 #endif
2924         if (iwl_alloc_traffic_mem(priv))
2925                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
2926
2927         /**************************
2928          * 2. Initializing PCI bus
2929          **************************/
2930         if (pci_enable_device(pdev)) {
2931                 err = -ENODEV;
2932                 goto out_ieee80211_free_hw;
2933         }
2934
2935         pci_set_master(pdev);
2936
2937         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2938         if (!err)
2939                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2940         if (err) {
2941                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2942                 if (!err)
2943                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2944                 /* both attempts failed: */
2945                 if (err) {
2946                         IWL_WARN(priv, "No suitable DMA available.\n");
2947                         goto out_pci_disable_device;
2948                 }
2949         }
2950
2951         err = pci_request_regions(pdev, DRV_NAME);
2952         if (err)
2953                 goto out_pci_disable_device;
2954
2955         pci_set_drvdata(pdev, priv);
2956
2957
2958         /***********************
2959          * 3. Read REV register
2960          ***********************/
2961         priv->hw_base = pci_iomap(pdev, 0, 0);
2962         if (!priv->hw_base) {
2963                 err = -ENODEV;
2964                 goto out_pci_release_regions;
2965         }
2966
2967         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
2968                 (unsigned long long) pci_resource_len(pdev, 0));
2969         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
2970
2971         /* this spin lock will be used in apm_ops.init and EEPROM access
2972          * we should init now
2973          */
2974         spin_lock_init(&priv->reg_lock);
2975         iwl_hw_detect(priv);
2976         IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
2977                 priv->cfg->name, priv->hw_rev);
2978
2979         /* We disable the RETRY_TIMEOUT register (0x41) to keep
2980          * PCI Tx retries from interfering with C3 CPU state */
2981         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2982
2983         iwl_prepare_card_hw(priv);
2984         if (!priv->hw_ready) {
2985                 IWL_WARN(priv, "Failed, HW not ready\n");
2986                 goto out_iounmap;
2987         }
2988
2989         /* amp init */
2990         err = priv->cfg->ops->lib->apm_ops.init(priv);
2991         if (err < 0) {
2992                 IWL_ERR(priv, "Failed to init APMG\n");
2993                 goto out_iounmap;
2994         }
2995         /*****************
2996          * 4. Read EEPROM
2997          *****************/
2998         /* Read the EEPROM */
2999         err = iwl_eeprom_init(priv);
3000         if (err) {
3001                 IWL_ERR(priv, "Unable to init EEPROM\n");
3002                 goto out_iounmap;
3003         }
3004         err = iwl_eeprom_check_version(priv);
3005         if (err)
3006                 goto out_free_eeprom;
3007
3008         /* extract MAC Address */
3009         iwl_eeprom_get_mac(priv, priv->mac_addr);
3010         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3011         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3012
3013         /************************
3014          * 5. Setup HW constants
3015          ************************/
3016         if (iwl_set_hw_params(priv)) {
3017                 IWL_ERR(priv, "failed to set hw parameters\n");
3018                 goto out_free_eeprom;
3019         }
3020
3021         /*******************
3022          * 6. Setup priv
3023          *******************/
3024
3025         err = iwl_init_drv(priv);
3026         if (err)
3027                 goto out_free_eeprom;
3028         /* At this point both hw and priv are initialized. */
3029
3030         /********************
3031          * 7. Setup services
3032          ********************/
3033         spin_lock_irqsave(&priv->lock, flags);
3034         iwl_disable_interrupts(priv);
3035         spin_unlock_irqrestore(&priv->lock, flags);
3036
3037         pci_enable_msi(priv->pci_dev);
3038
3039         iwl_alloc_isr_ict(priv);
3040         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3041                           IRQF_SHARED, DRV_NAME, priv);
3042         if (err) {
3043                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3044                 goto out_disable_msi;
3045         }
3046         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3047         if (err) {
3048                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3049                 goto out_free_irq;
3050         }
3051
3052         iwl_setup_deferred_work(priv);
3053         iwl_setup_rx_handlers(priv);
3054
3055         /**********************************
3056          * 8. Setup and register mac80211
3057          **********************************/
3058
3059         /* enable interrupts if needed: hw bug w/a */
3060         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3061         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3062                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3063                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3064         }
3065
3066         iwl_enable_interrupts(priv);
3067
3068         err = iwl_setup_mac(priv);
3069         if (err)
3070                 goto out_remove_sysfs;
3071
3072         err = iwl_dbgfs_register(priv, DRV_NAME);
3073         if (err)
3074                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3075
3076         /* If platform's RF_KILL switch is NOT set to KILL */
3077         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3078                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3079         else
3080                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3081
3082         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3083                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3084
3085         iwl_power_initialize(priv);
3086         iwl_tt_initialize(priv);
3087         return 0;
3088
3089  out_remove_sysfs:
3090         destroy_workqueue(priv->workqueue);
3091         priv->workqueue = NULL;
3092         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3093  out_free_irq:
3094         free_irq(priv->pci_dev->irq, priv);
3095         iwl_free_isr_ict(priv);
3096  out_disable_msi:
3097         pci_disable_msi(priv->pci_dev);
3098         iwl_uninit_drv(priv);
3099  out_free_eeprom:
3100         iwl_eeprom_free(priv);
3101  out_iounmap:
3102         pci_iounmap(pdev, priv->hw_base);
3103  out_pci_release_regions:
3104         pci_set_drvdata(pdev, NULL);
3105         pci_release_regions(pdev);
3106  out_pci_disable_device:
3107         pci_disable_device(pdev);
3108  out_ieee80211_free_hw:
3109         iwl_free_traffic_mem(priv);
3110         ieee80211_free_hw(priv->hw);
3111  out:
3112         return err;
3113 }
3114
3115 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3116 {
3117         struct iwl_priv *priv = pci_get_drvdata(pdev);
3118         unsigned long flags;
3119
3120         if (!priv)
3121                 return;
3122
3123         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3124
3125         iwl_dbgfs_unregister(priv);
3126         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3127
3128         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3129          * to be called and iwl_down since we are removing the device
3130          * we need to set STATUS_EXIT_PENDING bit.
3131          */
3132         set_bit(STATUS_EXIT_PENDING, &priv->status);
3133         if (priv->mac80211_registered) {
3134                 ieee80211_unregister_hw(priv->hw);
3135                 priv->mac80211_registered = 0;
3136         } else {
3137                 iwl_down(priv);
3138         }
3139
3140         iwl_tt_exit(priv);
3141
3142         /* make sure we flush any pending irq or
3143          * tasklet for the driver
3144          */
3145         spin_lock_irqsave(&priv->lock, flags);
3146         iwl_disable_interrupts(priv);
3147         spin_unlock_irqrestore(&priv->lock, flags);
3148
3149         iwl_synchronize_irq(priv);
3150
3151         iwl_dealloc_ucode_pci(priv);
3152
3153         if (priv->rxq.bd)
3154                 iwl_rx_queue_free(priv, &priv->rxq);
3155         iwl_hw_txq_ctx_free(priv);
3156
3157         iwl_clear_stations_table(priv);
3158         iwl_eeprom_free(priv);
3159
3160
3161         /*netif_stop_queue(dev); */
3162         flush_workqueue(priv->workqueue);
3163
3164         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3165          * priv->workqueue... so we can't take down the workqueue
3166          * until now... */
3167         destroy_workqueue(priv->workqueue);
3168         priv->workqueue = NULL;
3169         iwl_free_traffic_mem(priv);
3170
3171         free_irq(priv->pci_dev->irq, priv);
3172         pci_disable_msi(priv->pci_dev);
3173         pci_iounmap(pdev, priv->hw_base);
3174         pci_release_regions(pdev);
3175         pci_disable_device(pdev);
3176         pci_set_drvdata(pdev, NULL);
3177
3178         iwl_uninit_drv(priv);
3179
3180         iwl_free_isr_ict(priv);
3181
3182         if (priv->ibss_beacon)
3183                 dev_kfree_skb(priv->ibss_beacon);
3184
3185         ieee80211_free_hw(priv->hw);
3186 }
3187
3188
3189 /*****************************************************************************
3190  *
3191  * driver and module entry point
3192  *
3193  *****************************************************************************/
3194
3195 /* Hardware specific file defines the PCI IDs table for that hardware module */
3196 static struct pci_device_id iwl_hw_card_ids[] = {
3197 #ifdef CONFIG_IWL4965
3198         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3199         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3200 #endif /* CONFIG_IWL4965 */
3201 #ifdef CONFIG_IWL5000
3202         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3203         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3204         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3205         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3206         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3207         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3208         {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3209         {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3210         {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3211         {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3212 /* 5350 WiFi/WiMax */
3213         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3214         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3215         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3216 /* 5150 Wifi/WiMax */
3217         {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3218         {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3219 /* 6000/6050 Series */
3220         {IWL_PCI_DEVICE(0x008D, PCI_ANY_ID, iwl6000h_2agn_cfg)},
3221         {IWL_PCI_DEVICE(0x008E, PCI_ANY_ID, iwl6000h_2agn_cfg)},
3222         {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
3223         {IWL_PCI_DEVICE(0x422C, PCI_ANY_ID, iwl6000i_2agn_cfg)},
3224         {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
3225         {IWL_PCI_DEVICE(0x4239, PCI_ANY_ID, iwl6000i_2agn_cfg)},
3226         {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
3227         {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
3228         {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
3229         {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
3230 /* 1000 Series WiFi */
3231         {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl1000_bgn_cfg)},
3232         {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl1000_bgn_cfg)},
3233 #endif /* CONFIG_IWL5000 */
3234
3235         {0}
3236 };
3237 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3238
3239 static struct pci_driver iwl_driver = {
3240         .name = DRV_NAME,
3241         .id_table = iwl_hw_card_ids,
3242         .probe = iwl_pci_probe,
3243         .remove = __devexit_p(iwl_pci_remove),
3244 #ifdef CONFIG_PM
3245         .suspend = iwl_pci_suspend,
3246         .resume = iwl_pci_resume,
3247 #endif
3248 };
3249
3250 static int __init iwl_init(void)
3251 {
3252
3253         int ret;
3254         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3255         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3256
3257         ret = iwlagn_rate_control_register();
3258         if (ret) {
3259                 printk(KERN_ERR DRV_NAME
3260                        "Unable to register rate control algorithm: %d\n", ret);
3261                 return ret;
3262         }
3263
3264         ret = pci_register_driver(&iwl_driver);
3265         if (ret) {
3266                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3267                 goto error_register;
3268         }
3269
3270         return ret;
3271
3272 error_register:
3273         iwlagn_rate_control_unregister();
3274         return ret;
3275 }
3276
3277 static void __exit iwl_exit(void)
3278 {
3279         pci_unregister_driver(&iwl_driver);
3280         iwlagn_rate_control_unregister();
3281 }
3282
3283 module_exit(iwl_exit);
3284 module_init(iwl_init);
3285
3286 #ifdef CONFIG_IWLWIFI_DEBUG
3287 module_param_named(debug50, iwl_debug_level, uint, 0444);
3288 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3289 module_param_named(debug, iwl_debug_level, uint, 0644);
3290 MODULE_PARM_DESC(debug, "debug output mask");
3291 #endif
3292