1 /******************************************************************************
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
44 #include <net/mac80211.h>
46 #include <asm/div64.h>
48 #define DRV_NAME "iwlagn"
50 #include "iwl-eeprom.h"
54 #include "iwl-helpers.h"
56 #include "iwl-calib.h"
59 /******************************************************************************
63 ******************************************************************************/
66 * module name, copyright, version, etc.
68 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
70 #ifdef CONFIG_IWLWIFI_DEBUG
76 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
82 #define DRV_VERSION IWLWIFI_VERSION VD VS
85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
86 MODULE_VERSION(DRV_VERSION);
87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
88 MODULE_LICENSE("GPL");
89 MODULE_ALIAS("iwl4965");
91 /*************** STATION TABLE MANAGEMENT ****
92 * mac80211 should be examined to determine if sta_info is duplicating
93 * the functionality provided here
96 /**************************************************************/
99 * iwl_commit_rxon - commit staging_rxon to hardware
101 * The RXON command in staging_rxon is committed to the hardware and
102 * the active_rxon structure is updated with the new data. This
103 * function correctly transitions out of the RXON_ASSOC_MSK state if
104 * a HW tune is required based on the RXON structure changes.
106 int iwl_commit_rxon(struct iwl_priv *priv)
108 /* cast away the const for active_rxon in this function */
109 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
112 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
114 if (!iwl_is_alive(priv))
117 /* always get timestamp with Rx frame */
118 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
120 ret = iwl_check_rxon_cmd(priv);
122 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
127 * receive commit_rxon request
128 * abort any previous channel switch if still in process
130 if (priv->switch_rxon.switch_in_progress &&
131 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
132 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
133 le16_to_cpu(priv->switch_rxon.channel));
134 priv->switch_rxon.switch_in_progress = false;
137 /* If we don't need to send a full RXON, we can use
138 * iwl_rxon_assoc_cmd which is used to reconfigure filter
139 * and other flags for the current radio configuration. */
140 if (!iwl_full_rxon_required(priv)) {
141 ret = iwl_send_rxon_assoc(priv);
143 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
147 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
148 iwl_print_rx_config_cmd(priv);
152 /* station table will be cleared */
153 priv->assoc_station_added = 0;
155 /* If we are currently associated and the new config requires
156 * an RXON_ASSOC and the new config wants the associated mask enabled,
157 * we must clear the associated from the active configuration
158 * before we apply the new config */
159 if (iwl_is_associated(priv) && new_assoc) {
160 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
161 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
163 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
164 sizeof(struct iwl_rxon_cmd),
167 /* If the mask clearing failed then we set
168 * active_rxon back to what it was previously */
170 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
171 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
176 IWL_DEBUG_INFO(priv, "Sending RXON\n"
177 "* with%s RXON_FILTER_ASSOC_MSK\n"
180 (new_assoc ? "" : "out"),
181 le16_to_cpu(priv->staging_rxon.channel),
182 priv->staging_rxon.bssid_addr);
184 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
186 /* Apply the new configuration
187 * RXON unassoc clears the station table in uCode, send it before
188 * we add the bcast station. If assoc bit is set, we will send RXON
189 * after having added the bcast and bssid station.
192 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
193 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
195 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
198 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
201 iwl_clear_stations_table(priv);
203 priv->start_calib = 0;
205 /* Add the broadcast address so we can send broadcast frames */
206 priv->cfg->ops->lib->add_bcast_station(priv);
209 /* If we have set the ASSOC_MSK and we are in BSS mode then
210 * add the IWL_AP_ID to the station rate table */
212 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
213 ret = iwl_rxon_add_station(priv,
214 priv->active_rxon.bssid_addr, 1);
215 if (ret == IWL_INVALID_STATION) {
217 "Error adding AP address for TX.\n");
220 priv->assoc_station_added = 1;
221 if (priv->default_wep_key &&
222 iwl_send_static_wepkey_cmd(priv, 0))
224 "Could not send WEP static key.\n");
228 * allow CTS-to-self if possible for new association.
229 * this is relevant only for 5000 series and up,
230 * but will not damage 4965
232 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
234 /* Apply the new configuration
235 * RXON assoc doesn't clear the station table in uCode,
237 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
238 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
240 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
243 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
245 iwl_print_rx_config_cmd(priv);
247 iwl_init_sensitivity(priv);
249 /* If we issue a new RXON command which required a tune then we must
250 * send a new TXPOWER command or we won't be able to Tx any frames */
251 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
253 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
260 void iwl_update_chain_flags(struct iwl_priv *priv)
263 if (priv->cfg->ops->hcmd->set_rxon_chain)
264 priv->cfg->ops->hcmd->set_rxon_chain(priv);
265 iwlcore_commit_rxon(priv);
268 static void iwl_clear_free_frames(struct iwl_priv *priv)
270 struct list_head *element;
272 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
275 while (!list_empty(&priv->free_frames)) {
276 element = priv->free_frames.next;
278 kfree(list_entry(element, struct iwl_frame, list));
279 priv->frames_count--;
282 if (priv->frames_count) {
283 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
285 priv->frames_count = 0;
289 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
291 struct iwl_frame *frame;
292 struct list_head *element;
293 if (list_empty(&priv->free_frames)) {
294 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
296 IWL_ERR(priv, "Could not allocate frame!\n");
300 priv->frames_count++;
304 element = priv->free_frames.next;
306 return list_entry(element, struct iwl_frame, list);
309 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
311 memset(frame, 0, sizeof(*frame));
312 list_add(&frame->list, &priv->free_frames);
315 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
316 struct ieee80211_hdr *hdr,
319 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
320 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
321 (priv->iw_mode != NL80211_IFTYPE_AP)))
324 if (priv->ibss_beacon->len > left)
327 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
329 return priv->ibss_beacon->len;
332 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
333 static void iwl_set_beacon_tim(struct iwl_priv *priv,
334 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
335 u8 *beacon, u32 frame_size)
338 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
341 * The index is relative to frame start but we start looking at the
342 * variable-length part of the beacon.
344 tim_idx = mgmt->u.beacon.variable - beacon;
346 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
347 while ((tim_idx < (frame_size - 2)) &&
348 (beacon[tim_idx] != WLAN_EID_TIM))
349 tim_idx += beacon[tim_idx+1] + 2;
351 /* If TIM field was found, set variables */
352 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
353 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
354 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
356 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
359 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
360 struct iwl_frame *frame)
362 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
367 * We have to set up the TX command, the TX Beacon command, and the
371 /* Initialize memory */
372 tx_beacon_cmd = &frame->u.beacon;
373 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
375 /* Set up TX beacon contents */
376 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
377 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
378 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
381 /* Set up TX command fields */
382 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
383 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
384 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
385 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
386 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
388 /* Set up TX beacon command fields */
389 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
392 /* Set up packet rate and flags */
393 rate = iwl_rate_get_lowest_plcp(priv);
394 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
395 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
396 if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
397 rate_flags |= RATE_MCS_CCK_MSK;
398 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
401 return sizeof(*tx_beacon_cmd) + frame_size;
403 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
405 struct iwl_frame *frame;
406 unsigned int frame_size;
409 frame = iwl_get_free_frame(priv);
411 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
416 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
418 IWL_ERR(priv, "Error configuring the beacon command\n");
419 iwl_free_frame(priv, frame);
423 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
426 iwl_free_frame(priv, frame);
431 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
433 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
435 dma_addr_t addr = get_unaligned_le32(&tb->lo);
436 if (sizeof(dma_addr_t) > sizeof(u32))
438 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
443 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
445 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
447 return le16_to_cpu(tb->hi_n_len) >> 4;
450 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
451 dma_addr_t addr, u16 len)
453 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
454 u16 hi_n_len = len << 4;
456 put_unaligned_le32(addr, &tb->lo);
457 if (sizeof(dma_addr_t) > sizeof(u32))
458 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
460 tb->hi_n_len = cpu_to_le16(hi_n_len);
462 tfd->num_tbs = idx + 1;
465 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
467 return tfd->num_tbs & 0x1f;
471 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
472 * @priv - driver private data
475 * Does NOT advance any TFD circular buffer read/write indexes
476 * Does NOT free the TFD itself (which is within circular buffer)
478 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
480 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
482 struct pci_dev *dev = priv->pci_dev;
483 int index = txq->q.read_ptr;
487 tfd = &tfd_tmp[index];
489 /* Sanity check on number of chunks */
490 num_tbs = iwl_tfd_get_num_tbs(tfd);
492 if (num_tbs >= IWL_NUM_OF_TBS) {
493 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
494 /* @todo issue fatal error, it is quite serious situation */
500 pci_unmap_single(dev,
501 pci_unmap_addr(&txq->meta[index], mapping),
502 pci_unmap_len(&txq->meta[index], len),
503 PCI_DMA_BIDIRECTIONAL);
505 /* Unmap chunks, if any. */
506 for (i = 1; i < num_tbs; i++) {
507 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
508 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
511 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
512 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
517 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
518 struct iwl_tx_queue *txq,
519 dma_addr_t addr, u16 len,
523 struct iwl_tfd *tfd, *tfd_tmp;
527 tfd_tmp = (struct iwl_tfd *)txq->tfds;
528 tfd = &tfd_tmp[q->write_ptr];
531 memset(tfd, 0, sizeof(*tfd));
533 num_tbs = iwl_tfd_get_num_tbs(tfd);
535 /* Each TFD can point to a maximum 20 Tx buffers */
536 if (num_tbs >= IWL_NUM_OF_TBS) {
537 IWL_ERR(priv, "Error can not send more than %d chunks\n",
542 BUG_ON(addr & ~DMA_BIT_MASK(36));
543 if (unlikely(addr & ~IWL_TX_DMA_MASK))
544 IWL_ERR(priv, "Unaligned address = %llx\n",
545 (unsigned long long)addr);
547 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
553 * Tell nic where to find circular buffer of Tx Frame Descriptors for
554 * given Tx queue, and enable the DMA channel used for that queue.
556 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
557 * channels supported in hardware.
559 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
560 struct iwl_tx_queue *txq)
562 int txq_id = txq->q.id;
564 /* Circular buffer (TFD queue in DRAM) physical base address */
565 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
566 txq->q.dma_addr >> 8);
571 /******************************************************************************
573 * Generic RX handler implementations
575 ******************************************************************************/
576 static void iwl_rx_reply_alive(struct iwl_priv *priv,
577 struct iwl_rx_mem_buffer *rxb)
579 struct iwl_rx_packet *pkt = rxb_addr(rxb);
580 struct iwl_alive_resp *palive;
581 struct delayed_work *pwork;
583 palive = &pkt->u.alive_frame;
585 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
587 palive->is_valid, palive->ver_type,
588 palive->ver_subtype);
590 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
591 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
592 memcpy(&priv->card_alive_init,
594 sizeof(struct iwl_init_alive_resp));
595 pwork = &priv->init_alive_start;
597 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
598 memcpy(&priv->card_alive, &pkt->u.alive_frame,
599 sizeof(struct iwl_alive_resp));
600 pwork = &priv->alive_start;
603 /* We delay the ALIVE response by 5ms to
604 * give the HW RF Kill time to activate... */
605 if (palive->is_valid == UCODE_VALID_OK)
606 queue_delayed_work(priv->workqueue, pwork,
607 msecs_to_jiffies(5));
609 IWL_WARN(priv, "uCode did not respond OK.\n");
612 static void iwl_bg_beacon_update(struct work_struct *work)
614 struct iwl_priv *priv =
615 container_of(work, struct iwl_priv, beacon_update);
616 struct sk_buff *beacon;
618 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
619 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
622 IWL_ERR(priv, "update beacon failed\n");
626 mutex_lock(&priv->mutex);
627 /* new beacon skb is allocated every time; dispose previous.*/
628 if (priv->ibss_beacon)
629 dev_kfree_skb(priv->ibss_beacon);
631 priv->ibss_beacon = beacon;
632 mutex_unlock(&priv->mutex);
634 iwl_send_beacon_cmd(priv);
638 * iwl_bg_statistics_periodic - Timer callback to queue statistics
640 * This callback is provided in order to send a statistics request.
642 * This timer function is continually reset to execute within
643 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
644 * was received. We need to ensure we receive the statistics in order
645 * to update the temperature used for calibrating the TXPOWER.
647 static void iwl_bg_statistics_periodic(unsigned long data)
649 struct iwl_priv *priv = (struct iwl_priv *)data;
651 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
654 /* dont send host command if rf-kill is on */
655 if (!iwl_is_ready_rf(priv))
658 iwl_send_statistics_request(priv, CMD_ASYNC, false);
662 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
663 u32 start_idx, u32 num_events,
667 u32 ptr; /* SRAM byte address of log data */
668 u32 ev, time, data; /* event log data */
669 unsigned long reg_flags;
672 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
674 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
676 /* Make sure device is powered up for SRAM reads */
677 spin_lock_irqsave(&priv->reg_lock, reg_flags);
678 if (iwl_grab_nic_access(priv)) {
679 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
683 /* Set starting address; reads will auto-increment */
684 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
688 * "time" is actually "data" for mode 0 (no timestamp).
689 * place event id # at far right for easier visual parsing.
691 for (i = 0; i < num_events; i++) {
692 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
693 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
695 trace_iwlwifi_dev_ucode_cont_event(priv,
698 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
699 trace_iwlwifi_dev_ucode_cont_event(priv,
703 /* Allow device to power down */
704 iwl_release_nic_access(priv);
705 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
708 static void iwl_continuous_event_trace(struct iwl_priv *priv)
710 u32 capacity; /* event log capacity in # entries */
711 u32 base; /* SRAM byte address of event log header */
712 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
713 u32 num_wraps; /* # times uCode wrapped to top of log */
714 u32 next_entry; /* index of next entry to be written by uCode */
716 if (priv->ucode_type == UCODE_INIT)
717 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
719 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
720 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
721 capacity = iwl_read_targ_mem(priv, base);
722 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
723 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
724 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
728 if (num_wraps == priv->event_log.num_wraps) {
729 iwl_print_cont_event_trace(priv,
730 base, priv->event_log.next_entry,
731 next_entry - priv->event_log.next_entry,
733 priv->event_log.non_wraps_count++;
735 if ((num_wraps - priv->event_log.num_wraps) > 1)
736 priv->event_log.wraps_more_count++;
738 priv->event_log.wraps_once_count++;
739 trace_iwlwifi_dev_ucode_wrap_event(priv,
740 num_wraps - priv->event_log.num_wraps,
741 next_entry, priv->event_log.next_entry);
742 if (next_entry < priv->event_log.next_entry) {
743 iwl_print_cont_event_trace(priv, base,
744 priv->event_log.next_entry,
745 capacity - priv->event_log.next_entry,
748 iwl_print_cont_event_trace(priv, base, 0,
751 iwl_print_cont_event_trace(priv, base,
752 next_entry, capacity - next_entry,
755 iwl_print_cont_event_trace(priv, base, 0,
759 priv->event_log.num_wraps = num_wraps;
760 priv->event_log.next_entry = next_entry;
764 * iwl_bg_ucode_trace - Timer callback to log ucode event
766 * The timer is continually set to execute every
767 * UCODE_TRACE_PERIOD milliseconds after the last timer expired
768 * this function is to perform continuous uCode event logging operation
771 static void iwl_bg_ucode_trace(unsigned long data)
773 struct iwl_priv *priv = (struct iwl_priv *)data;
775 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
778 if (priv->event_log.ucode_trace) {
779 iwl_continuous_event_trace(priv);
780 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
781 mod_timer(&priv->ucode_trace,
782 jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
786 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
787 struct iwl_rx_mem_buffer *rxb)
789 #ifdef CONFIG_IWLWIFI_DEBUG
790 struct iwl_rx_packet *pkt = rxb_addr(rxb);
791 struct iwl4965_beacon_notif *beacon =
792 (struct iwl4965_beacon_notif *)pkt->u.raw;
793 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
795 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
796 "tsf %d %d rate %d\n",
797 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
798 beacon->beacon_notify_hdr.failure_frame,
799 le32_to_cpu(beacon->ibss_mgr_status),
800 le32_to_cpu(beacon->high_tsf),
801 le32_to_cpu(beacon->low_tsf), rate);
804 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
805 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
806 queue_work(priv->workqueue, &priv->beacon_update);
809 /* Handle notification from uCode that card's power state is changing
810 * due to software, hardware, or critical temperature RFKILL */
811 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
812 struct iwl_rx_mem_buffer *rxb)
814 struct iwl_rx_packet *pkt = rxb_addr(rxb);
815 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
816 unsigned long status = priv->status;
818 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
819 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
820 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
821 (flags & CT_CARD_DISABLED) ?
822 "Reached" : "Not reached");
824 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
827 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
828 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
830 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
831 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
833 if (!(flags & RXON_CARD_DISABLED)) {
834 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
835 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
836 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
837 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
839 if (flags & CT_CARD_DISABLED)
840 iwl_tt_enter_ct_kill(priv);
842 if (!(flags & CT_CARD_DISABLED))
843 iwl_tt_exit_ct_kill(priv);
845 if (flags & HW_CARD_DISABLED)
846 set_bit(STATUS_RF_KILL_HW, &priv->status);
848 clear_bit(STATUS_RF_KILL_HW, &priv->status);
851 if (!(flags & RXON_CARD_DISABLED))
852 iwl_scan_cancel(priv);
854 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
855 test_bit(STATUS_RF_KILL_HW, &priv->status)))
856 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
857 test_bit(STATUS_RF_KILL_HW, &priv->status));
859 wake_up_interruptible(&priv->wait_command_queue);
862 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
864 if (src == IWL_PWR_SRC_VAUX) {
865 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
866 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
867 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
868 ~APMG_PS_CTRL_MSK_PWR_SRC);
870 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
871 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
872 ~APMG_PS_CTRL_MSK_PWR_SRC);
879 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
881 * Setup the RX handlers for each of the reply types sent from the uCode
884 * This function chains into the hardware specific files for them to setup
885 * any hardware specific handlers as well.
887 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
889 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
890 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
891 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
892 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
893 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
894 iwl_rx_pm_debug_statistics_notif;
895 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
898 * The same handler is used for both the REPLY to a discrete
899 * statistics request from the host as well as for the periodic
900 * statistics notifications (after received beacons) from the uCode.
902 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
903 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
905 iwl_setup_spectrum_handlers(priv);
906 iwl_setup_rx_scan_handlers(priv);
908 /* status change handler */
909 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
911 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
912 iwl_rx_missed_beacon_notif;
914 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
915 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
917 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
918 /* Set up hardware specific Rx handlers */
919 priv->cfg->ops->lib->rx_handler_setup(priv);
923 * iwl_rx_handle - Main entry function for receiving responses from uCode
925 * Uses the priv->rx_handlers callback function array to invoke
926 * the appropriate handlers, including command responses,
927 * frame-received notifications, and other notifications.
929 void iwl_rx_handle(struct iwl_priv *priv)
931 struct iwl_rx_mem_buffer *rxb;
932 struct iwl_rx_packet *pkt;
933 struct iwl_rx_queue *rxq = &priv->rxq;
941 /* uCode's read index (stored in shared DRAM) indicates the last Rx
942 * buffer that the driver may process (last buffer filled by ucode). */
943 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
946 /* Rx interrupt, but nothing sent from uCode */
948 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
950 /* calculate total frames need to be restock after handling RX */
951 total_empty = r - rxq->write_actual;
953 total_empty += RX_QUEUE_SIZE;
955 if (total_empty > (RX_QUEUE_SIZE / 2))
961 /* If an RXB doesn't have a Rx queue slot associated with it,
962 * then a bug has been introduced in the queue refilling
963 * routines -- catch it here */
966 rxq->queue[i] = NULL;
968 pci_unmap_page(priv->pci_dev, rxb->page_dma,
969 PAGE_SIZE << priv->hw_params.rx_page_order,
973 trace_iwlwifi_dev_rx(priv, pkt,
974 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
976 /* Reclaim a command buffer only if this packet is a response
977 * to a (driver-originated) command.
978 * If the packet (e.g. Rx frame) originated from uCode,
979 * there is no command buffer to reclaim.
980 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
981 * but apparently a few don't get set; catch them here. */
982 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
983 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
984 (pkt->hdr.cmd != REPLY_RX) &&
985 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
986 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
987 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
988 (pkt->hdr.cmd != REPLY_TX);
990 /* Based on type of command response or notification,
991 * handle those that need handling via function in
992 * rx_handlers table. See iwl_setup_rx_handlers() */
993 if (priv->rx_handlers[pkt->hdr.cmd]) {
994 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
995 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
996 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
997 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
999 /* No handling needed */
1001 "r %d i %d No handler needed for %s, 0x%02x\n",
1002 r, i, get_cmd_string(pkt->hdr.cmd),
1007 * XXX: After here, we should always check rxb->page
1008 * against NULL before touching it or its virtual
1009 * memory (pkt). Because some rx_handler might have
1010 * already taken or freed the pages.
1014 /* Invoke any callbacks, transfer the buffer to caller,
1015 * and fire off the (possibly) blocking iwl_send_cmd()
1016 * as we reclaim the driver command queue */
1018 iwl_tx_cmd_complete(priv, rxb);
1020 IWL_WARN(priv, "Claim null rxb?\n");
1023 /* Reuse the page if possible. For notification packets and
1024 * SKBs that fail to Rx correctly, add them back into the
1025 * rx_free list for reuse later. */
1026 spin_lock_irqsave(&rxq->lock, flags);
1027 if (rxb->page != NULL) {
1028 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1029 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1030 PCI_DMA_FROMDEVICE);
1031 list_add_tail(&rxb->list, &rxq->rx_free);
1034 list_add_tail(&rxb->list, &rxq->rx_used);
1036 spin_unlock_irqrestore(&rxq->lock, flags);
1038 i = (i + 1) & RX_QUEUE_MASK;
1039 /* If there are a lot of unused frames,
1040 * restock the Rx queue so ucode wont assert. */
1045 iwl_rx_replenish_now(priv);
1051 /* Backtrack one entry */
1054 iwl_rx_replenish_now(priv);
1056 iwl_rx_queue_restock(priv);
1059 /* call this function to flush any scheduled tasklet */
1060 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1062 /* wait to make sure we flush pending tasklet*/
1063 synchronize_irq(priv->pci_dev->irq);
1064 tasklet_kill(&priv->irq_tasklet);
1067 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1069 u32 inta, handled = 0;
1071 unsigned long flags;
1073 #ifdef CONFIG_IWLWIFI_DEBUG
1077 spin_lock_irqsave(&priv->lock, flags);
1079 /* Ack/clear/reset pending uCode interrupts.
1080 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1081 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1082 inta = iwl_read32(priv, CSR_INT);
1083 iwl_write32(priv, CSR_INT, inta);
1085 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1086 * Any new interrupts that happen after this, either while we're
1087 * in this tasklet, or later, will show up in next ISR/tasklet. */
1088 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1089 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1091 #ifdef CONFIG_IWLWIFI_DEBUG
1092 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1093 /* just for debug */
1094 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1095 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1096 inta, inta_mask, inta_fh);
1100 spin_unlock_irqrestore(&priv->lock, flags);
1102 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1103 * atomic, make sure that inta covers all the interrupts that
1104 * we've discovered, even if FH interrupt came in just after
1105 * reading CSR_INT. */
1106 if (inta_fh & CSR49_FH_INT_RX_MASK)
1107 inta |= CSR_INT_BIT_FH_RX;
1108 if (inta_fh & CSR49_FH_INT_TX_MASK)
1109 inta |= CSR_INT_BIT_FH_TX;
1111 /* Now service all interrupt bits discovered above. */
1112 if (inta & CSR_INT_BIT_HW_ERR) {
1113 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1115 /* Tell the device to stop sending interrupts */
1116 iwl_disable_interrupts(priv);
1118 priv->isr_stats.hw++;
1119 iwl_irq_handle_error(priv);
1121 handled |= CSR_INT_BIT_HW_ERR;
1126 #ifdef CONFIG_IWLWIFI_DEBUG
1127 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1128 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1129 if (inta & CSR_INT_BIT_SCD) {
1130 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1131 "the frame/frames.\n");
1132 priv->isr_stats.sch++;
1135 /* Alive notification via Rx interrupt will do the real work */
1136 if (inta & CSR_INT_BIT_ALIVE) {
1137 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1138 priv->isr_stats.alive++;
1142 /* Safely ignore these bits for debug checks below */
1143 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1145 /* HW RF KILL switch toggled */
1146 if (inta & CSR_INT_BIT_RF_KILL) {
1148 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1149 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1152 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1153 hw_rf_kill ? "disable radio" : "enable radio");
1155 priv->isr_stats.rfkill++;
1157 /* driver only loads ucode once setting the interface up.
1158 * the driver allows loading the ucode even if the radio
1159 * is killed. Hence update the killswitch state here. The
1160 * rfkill handler will care about restarting if needed.
1162 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1164 set_bit(STATUS_RF_KILL_HW, &priv->status);
1166 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1167 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1170 handled |= CSR_INT_BIT_RF_KILL;
1173 /* Chip got too hot and stopped itself */
1174 if (inta & CSR_INT_BIT_CT_KILL) {
1175 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1176 priv->isr_stats.ctkill++;
1177 handled |= CSR_INT_BIT_CT_KILL;
1180 /* Error detected by uCode */
1181 if (inta & CSR_INT_BIT_SW_ERR) {
1182 IWL_ERR(priv, "Microcode SW error detected. "
1183 " Restarting 0x%X.\n", inta);
1184 priv->isr_stats.sw++;
1185 priv->isr_stats.sw_err = inta;
1186 iwl_irq_handle_error(priv);
1187 handled |= CSR_INT_BIT_SW_ERR;
1191 * uCode wakes up after power-down sleep.
1192 * Tell device about any new tx or host commands enqueued,
1193 * and about any Rx buffers made available while asleep.
1195 if (inta & CSR_INT_BIT_WAKEUP) {
1196 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1197 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1198 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1199 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1200 priv->isr_stats.wakeup++;
1201 handled |= CSR_INT_BIT_WAKEUP;
1204 /* All uCode command responses, including Tx command responses,
1205 * Rx "responses" (frame-received notification), and other
1206 * notifications from uCode come through here*/
1207 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1208 iwl_rx_handle(priv);
1209 priv->isr_stats.rx++;
1210 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1213 /* This "Tx" DMA channel is used only for loading uCode */
1214 if (inta & CSR_INT_BIT_FH_TX) {
1215 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1216 priv->isr_stats.tx++;
1217 handled |= CSR_INT_BIT_FH_TX;
1218 /* Wake up uCode load routine, now that load is complete */
1219 priv->ucode_write_complete = 1;
1220 wake_up_interruptible(&priv->wait_command_queue);
1223 if (inta & ~handled) {
1224 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1225 priv->isr_stats.unhandled++;
1228 if (inta & ~(priv->inta_mask)) {
1229 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1230 inta & ~priv->inta_mask);
1231 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1234 /* Re-enable all interrupts */
1235 /* only Re-enable if diabled by irq */
1236 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1237 iwl_enable_interrupts(priv);
1239 #ifdef CONFIG_IWLWIFI_DEBUG
1240 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1241 inta = iwl_read32(priv, CSR_INT);
1242 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1243 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1244 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1245 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1250 /* tasklet for iwlagn interrupt */
1251 static void iwl_irq_tasklet(struct iwl_priv *priv)
1255 unsigned long flags;
1257 #ifdef CONFIG_IWLWIFI_DEBUG
1261 spin_lock_irqsave(&priv->lock, flags);
1263 /* Ack/clear/reset pending uCode interrupts.
1264 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1266 iwl_write32(priv, CSR_INT, priv->inta);
1270 #ifdef CONFIG_IWLWIFI_DEBUG
1271 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1272 /* just for debug */
1273 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1274 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1279 spin_unlock_irqrestore(&priv->lock, flags);
1281 /* saved interrupt in inta variable now we can reset priv->inta */
1284 /* Now service all interrupt bits discovered above. */
1285 if (inta & CSR_INT_BIT_HW_ERR) {
1286 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1288 /* Tell the device to stop sending interrupts */
1289 iwl_disable_interrupts(priv);
1291 priv->isr_stats.hw++;
1292 iwl_irq_handle_error(priv);
1294 handled |= CSR_INT_BIT_HW_ERR;
1299 #ifdef CONFIG_IWLWIFI_DEBUG
1300 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1301 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1302 if (inta & CSR_INT_BIT_SCD) {
1303 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1304 "the frame/frames.\n");
1305 priv->isr_stats.sch++;
1308 /* Alive notification via Rx interrupt will do the real work */
1309 if (inta & CSR_INT_BIT_ALIVE) {
1310 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1311 priv->isr_stats.alive++;
1315 /* Safely ignore these bits for debug checks below */
1316 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1318 /* HW RF KILL switch toggled */
1319 if (inta & CSR_INT_BIT_RF_KILL) {
1321 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1322 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1325 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1326 hw_rf_kill ? "disable radio" : "enable radio");
1328 priv->isr_stats.rfkill++;
1330 /* driver only loads ucode once setting the interface up.
1331 * the driver allows loading the ucode even if the radio
1332 * is killed. Hence update the killswitch state here. The
1333 * rfkill handler will care about restarting if needed.
1335 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1337 set_bit(STATUS_RF_KILL_HW, &priv->status);
1339 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1340 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1343 handled |= CSR_INT_BIT_RF_KILL;
1346 /* Chip got too hot and stopped itself */
1347 if (inta & CSR_INT_BIT_CT_KILL) {
1348 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1349 priv->isr_stats.ctkill++;
1350 handled |= CSR_INT_BIT_CT_KILL;
1353 /* Error detected by uCode */
1354 if (inta & CSR_INT_BIT_SW_ERR) {
1355 IWL_ERR(priv, "Microcode SW error detected. "
1356 " Restarting 0x%X.\n", inta);
1357 priv->isr_stats.sw++;
1358 priv->isr_stats.sw_err = inta;
1359 iwl_irq_handle_error(priv);
1360 handled |= CSR_INT_BIT_SW_ERR;
1363 /* uCode wakes up after power-down sleep */
1364 if (inta & CSR_INT_BIT_WAKEUP) {
1365 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1366 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1367 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1368 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1370 priv->isr_stats.wakeup++;
1372 handled |= CSR_INT_BIT_WAKEUP;
1375 /* All uCode command responses, including Tx command responses,
1376 * Rx "responses" (frame-received notification), and other
1377 * notifications from uCode come through here*/
1378 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1379 CSR_INT_BIT_RX_PERIODIC)) {
1380 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1381 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1382 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1383 iwl_write32(priv, CSR_FH_INT_STATUS,
1384 CSR49_FH_INT_RX_MASK);
1386 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1387 handled |= CSR_INT_BIT_RX_PERIODIC;
1388 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1390 /* Sending RX interrupt require many steps to be done in the
1392 * 1- write interrupt to current index in ICT table.
1394 * 3- update RX shared data to indicate last write index.
1395 * 4- send interrupt.
1396 * This could lead to RX race, driver could receive RX interrupt
1397 * but the shared data changes does not reflect this;
1398 * periodic interrupt will detect any dangling Rx activity.
1401 /* Disable periodic interrupt; we use it as just a one-shot. */
1402 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1403 CSR_INT_PERIODIC_DIS);
1404 iwl_rx_handle(priv);
1407 * Enable periodic interrupt in 8 msec only if we received
1408 * real RX interrupt (instead of just periodic int), to catch
1409 * any dangling Rx interrupt. If it was just the periodic
1410 * interrupt, there was no dangling Rx activity, and no need
1411 * to extend the periodic interrupt; one-shot is enough.
1413 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1414 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1415 CSR_INT_PERIODIC_ENA);
1417 priv->isr_stats.rx++;
1420 /* This "Tx" DMA channel is used only for loading uCode */
1421 if (inta & CSR_INT_BIT_FH_TX) {
1422 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1423 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1424 priv->isr_stats.tx++;
1425 handled |= CSR_INT_BIT_FH_TX;
1426 /* Wake up uCode load routine, now that load is complete */
1427 priv->ucode_write_complete = 1;
1428 wake_up_interruptible(&priv->wait_command_queue);
1431 if (inta & ~handled) {
1432 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1433 priv->isr_stats.unhandled++;
1436 if (inta & ~(priv->inta_mask)) {
1437 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1438 inta & ~priv->inta_mask);
1441 /* Re-enable all interrupts */
1442 /* only Re-enable if diabled by irq */
1443 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1444 iwl_enable_interrupts(priv);
1448 /******************************************************************************
1450 * uCode download functions
1452 ******************************************************************************/
1454 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1456 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1457 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1458 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1459 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1460 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1461 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1464 static void iwl_nic_start(struct iwl_priv *priv)
1466 /* Remove all resets to allow NIC to operate */
1467 iwl_write32(priv, CSR_RESET, 0);
1472 * iwl_read_ucode - Read uCode images from disk file.
1474 * Copy into buffers for card to fetch via bus-mastering
1476 static int iwl_read_ucode(struct iwl_priv *priv)
1478 struct iwl_ucode_header *ucode;
1479 int ret = -EINVAL, index;
1480 const struct firmware *ucode_raw;
1481 const char *name_pre = priv->cfg->fw_name_pre;
1482 const unsigned int api_max = priv->cfg->ucode_api_max;
1483 const unsigned int api_min = priv->cfg->ucode_api_min;
1488 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1491 /* Ask kernel firmware_class module to get the boot firmware off disk.
1492 * request_firmware() is synchronous, file is in memory on return. */
1493 for (index = api_max; index >= api_min; index--) {
1494 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1495 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1497 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1504 if (index < api_max)
1505 IWL_ERR(priv, "Loaded firmware %s, "
1506 "which is deprecated. "
1507 "Please use API v%u instead.\n",
1510 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1511 buf, ucode_raw->size);
1519 /* Make sure that we got at least the v1 header! */
1520 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1521 IWL_ERR(priv, "File size way too small!\n");
1526 /* Data from ucode file: header followed by uCode images */
1527 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1529 priv->ucode_ver = le32_to_cpu(ucode->ver);
1530 api_ver = IWL_UCODE_API(priv->ucode_ver);
1531 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1532 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1533 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1534 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1536 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1537 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1538 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1540 /* api_ver should match the api version forming part of the
1541 * firmware filename ... but we don't check for that and only rely
1542 * on the API version read from firmware header from here on forward */
1544 if (api_ver < api_min || api_ver > api_max) {
1545 IWL_ERR(priv, "Driver unable to support your firmware API. "
1546 "Driver supports v%u, firmware is v%u.\n",
1548 priv->ucode_ver = 0;
1552 if (api_ver != api_max)
1553 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1554 "got v%u. New firmware can be obtained "
1555 "from http://www.intellinuxwireless.org.\n",
1558 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1559 IWL_UCODE_MAJOR(priv->ucode_ver),
1560 IWL_UCODE_MINOR(priv->ucode_ver),
1561 IWL_UCODE_API(priv->ucode_ver),
1562 IWL_UCODE_SERIAL(priv->ucode_ver));
1564 snprintf(priv->hw->wiphy->fw_version,
1565 sizeof(priv->hw->wiphy->fw_version),
1567 IWL_UCODE_MAJOR(priv->ucode_ver),
1568 IWL_UCODE_MINOR(priv->ucode_ver),
1569 IWL_UCODE_API(priv->ucode_ver),
1570 IWL_UCODE_SERIAL(priv->ucode_ver));
1573 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1575 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1576 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1577 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1578 ? "OTP" : "EEPROM", eeprom_ver);
1580 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1582 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1584 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1586 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1588 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1590 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1593 /* Verify size of file vs. image size info in file's header */
1594 if (ucode_raw->size !=
1595 priv->cfg->ops->ucode->get_header_size(api_ver) +
1596 inst_size + data_size + init_size +
1597 init_data_size + boot_size) {
1599 IWL_DEBUG_INFO(priv,
1600 "uCode file size %d does not match expected size\n",
1601 (int)ucode_raw->size);
1606 /* Verify that uCode images will fit in card's SRAM */
1607 if (inst_size > priv->hw_params.max_inst_size) {
1608 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1614 if (data_size > priv->hw_params.max_data_size) {
1615 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1620 if (init_size > priv->hw_params.max_inst_size) {
1621 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1626 if (init_data_size > priv->hw_params.max_data_size) {
1627 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1632 if (boot_size > priv->hw_params.max_bsm_size) {
1633 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1639 /* Allocate ucode buffers for card's bus-master loading ... */
1641 /* Runtime instructions and 2 copies of data:
1642 * 1) unmodified from disk
1643 * 2) backup cache for save/restore during power-downs */
1644 priv->ucode_code.len = inst_size;
1645 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1647 priv->ucode_data.len = data_size;
1648 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1650 priv->ucode_data_backup.len = data_size;
1651 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1653 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1654 !priv->ucode_data_backup.v_addr)
1657 /* Initialization instructions and data */
1658 if (init_size && init_data_size) {
1659 priv->ucode_init.len = init_size;
1660 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1662 priv->ucode_init_data.len = init_data_size;
1663 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1665 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1669 /* Bootstrap (instructions only, no data) */
1671 priv->ucode_boot.len = boot_size;
1672 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1674 if (!priv->ucode_boot.v_addr)
1678 /* Copy images into buffers for card's bus-master reads ... */
1680 /* Runtime instructions (first block of data in file) */
1682 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1683 memcpy(priv->ucode_code.v_addr, src, len);
1686 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1687 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1689 /* Runtime data (2nd block)
1690 * NOTE: Copy into backup buffer will be done in iwl_up() */
1692 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1693 memcpy(priv->ucode_data.v_addr, src, len);
1694 memcpy(priv->ucode_data_backup.v_addr, src, len);
1697 /* Initialization instructions (3rd block) */
1700 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1702 memcpy(priv->ucode_init.v_addr, src, len);
1706 /* Initialization data (4th block) */
1707 if (init_data_size) {
1708 len = init_data_size;
1709 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1711 memcpy(priv->ucode_init_data.v_addr, src, len);
1715 /* Bootstrap instructions (5th block) */
1717 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1718 memcpy(priv->ucode_boot.v_addr, src, len);
1720 /* We have our copies now, allow OS release its copies */
1721 release_firmware(ucode_raw);
1725 IWL_ERR(priv, "failed to allocate pci memory\n");
1727 iwl_dealloc_ucode_pci(priv);
1730 release_firmware(ucode_raw);
1736 static const char *desc_lookup_text[] = {
1741 "NMI_INTERRUPT_WDG",
1745 "HW_ERROR_TUNE_LOCK",
1746 "HW_ERROR_TEMPERATURE",
1747 "ILLEGAL_CHAN_FREQ",
1750 "NMI_INTERRUPT_HOST",
1751 "NMI_INTERRUPT_ACTION_PT",
1752 "NMI_INTERRUPT_UNKNOWN",
1753 "UCODE_VERSION_MISMATCH",
1754 "HW_ERROR_ABS_LOCK",
1755 "HW_ERROR_CAL_LOCK_FAIL",
1756 "NMI_INTERRUPT_INST_ACTION_PT",
1757 "NMI_INTERRUPT_DATA_ACTION_PT",
1759 "NMI_INTERRUPT_TRM",
1760 "NMI_INTERRUPT_BREAK_POINT"
1768 static const char *desc_lookup(int i)
1770 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1772 if (i < 0 || i > max)
1775 return desc_lookup_text[i];
1778 #define ERROR_START_OFFSET (1 * sizeof(u32))
1779 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1781 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1784 u32 desc, time, count, base, data1;
1785 u32 blink1, blink2, ilink1, ilink2;
1787 if (priv->ucode_type == UCODE_INIT)
1788 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1790 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1792 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1794 "Not valid error log pointer 0x%08X for %s uCode\n",
1795 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1799 count = iwl_read_targ_mem(priv, base);
1801 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1802 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1803 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1804 priv->status, count);
1807 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1808 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1809 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1810 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1811 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1812 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1813 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1814 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1815 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1817 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1818 blink1, blink2, ilink1, ilink2);
1820 IWL_ERR(priv, "Desc Time "
1821 "data1 data2 line\n");
1822 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1823 desc_lookup(desc), desc, time, data1, data2, line);
1824 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1825 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1830 #define EVENT_START_OFFSET (4 * sizeof(u32))
1833 * iwl_print_event_log - Dump error event log to syslog
1836 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1837 u32 num_events, u32 mode,
1838 int pos, char **buf, size_t bufsz)
1841 u32 base; /* SRAM byte address of event log header */
1842 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1843 u32 ptr; /* SRAM byte address of log data */
1844 u32 ev, time, data; /* event log data */
1845 unsigned long reg_flags;
1847 if (num_events == 0)
1849 if (priv->ucode_type == UCODE_INIT)
1850 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1852 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1855 event_size = 2 * sizeof(u32);
1857 event_size = 3 * sizeof(u32);
1859 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1861 /* Make sure device is powered up for SRAM reads */
1862 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1863 iwl_grab_nic_access(priv);
1865 /* Set starting address; reads will auto-increment */
1866 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1869 /* "time" is actually "data" for mode 0 (no timestamp).
1870 * place event id # at far right for easier visual parsing. */
1871 for (i = 0; i < num_events; i++) {
1872 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1873 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1877 pos += scnprintf(*buf + pos, bufsz - pos,
1878 "EVT_LOG:0x%08x:%04u\n",
1881 trace_iwlwifi_dev_ucode_event(priv, 0,
1883 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1887 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1889 pos += scnprintf(*buf + pos, bufsz - pos,
1890 "EVT_LOGT:%010u:0x%08x:%04u\n",
1893 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1895 trace_iwlwifi_dev_ucode_event(priv, time,
1901 /* Allow device to power down */
1902 iwl_release_nic_access(priv);
1903 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1908 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1910 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1911 u32 num_wraps, u32 next_entry,
1913 int pos, char **buf, size_t bufsz)
1916 * display the newest DEFAULT_LOG_ENTRIES entries
1917 * i.e the entries just before the next ont that uCode would fill.
1920 if (next_entry < size) {
1921 pos = iwl_print_event_log(priv,
1922 capacity - (size - next_entry),
1923 size - next_entry, mode,
1925 pos = iwl_print_event_log(priv, 0,
1929 pos = iwl_print_event_log(priv, next_entry - size,
1930 size, mode, pos, buf, bufsz);
1932 if (next_entry < size) {
1933 pos = iwl_print_event_log(priv, 0, next_entry,
1934 mode, pos, buf, bufsz);
1936 pos = iwl_print_event_log(priv, next_entry - size,
1937 size, mode, pos, buf, bufsz);
1943 /* For sanity check only. Actual size is determined by uCode, typ. 512 */
1944 #define MAX_EVENT_LOG_SIZE (512)
1946 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1948 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1949 char **buf, bool display)
1951 u32 base; /* SRAM byte address of event log header */
1952 u32 capacity; /* event log capacity in # entries */
1953 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1954 u32 num_wraps; /* # times uCode wrapped to top of log */
1955 u32 next_entry; /* index of next entry to be written by uCode */
1956 u32 size; /* # entries that we'll print */
1960 if (priv->ucode_type == UCODE_INIT)
1961 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1963 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1965 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1967 "Invalid event log pointer 0x%08X for %s uCode\n",
1968 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1972 /* event log header */
1973 capacity = iwl_read_targ_mem(priv, base);
1974 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1975 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1976 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1978 if (capacity > MAX_EVENT_LOG_SIZE) {
1979 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1980 capacity, MAX_EVENT_LOG_SIZE);
1981 capacity = MAX_EVENT_LOG_SIZE;
1984 if (next_entry > MAX_EVENT_LOG_SIZE) {
1985 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1986 next_entry, MAX_EVENT_LOG_SIZE);
1987 next_entry = MAX_EVENT_LOG_SIZE;
1990 size = num_wraps ? capacity : next_entry;
1992 /* bail out if nothing in log */
1994 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1998 #ifdef CONFIG_IWLWIFI_DEBUG
1999 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2000 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2001 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2003 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2004 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2006 IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2009 #ifdef CONFIG_IWLWIFI_DEBUG
2012 bufsz = capacity * 48;
2015 *buf = kmalloc(bufsz, GFP_KERNEL);
2019 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2021 * if uCode has wrapped back to top of log,
2022 * start at the oldest entry,
2023 * i.e the next one that uCode would fill.
2026 pos = iwl_print_event_log(priv, next_entry,
2027 capacity - next_entry, mode,
2029 /* (then/else) start at top of log */
2030 pos = iwl_print_event_log(priv, 0,
2031 next_entry, mode, pos, buf, bufsz);
2033 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2034 next_entry, size, mode,
2037 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2038 next_entry, size, mode,
2045 * iwl_alive_start - called after REPLY_ALIVE notification received
2046 * from protocol/runtime uCode (initialization uCode's
2047 * Alive gets handled by iwl_init_alive_start()).
2049 static void iwl_alive_start(struct iwl_priv *priv)
2053 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2055 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2056 /* We had an error bringing up the hardware, so take it
2057 * all the way back down so we can try again */
2058 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2062 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2063 * This is a paranoid check, because we would not have gotten the
2064 * "runtime" alive if code weren't properly loaded. */
2065 if (iwl_verify_ucode(priv)) {
2066 /* Runtime instruction load was bad;
2067 * take it all the way back down so we can try again */
2068 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2072 iwl_clear_stations_table(priv);
2073 ret = priv->cfg->ops->lib->alive_notify(priv);
2076 "Could not complete ALIVE transition [ntf]: %d\n", ret);
2080 /* After the ALIVE response, we can send host commands to the uCode */
2081 set_bit(STATUS_ALIVE, &priv->status);
2083 if (iwl_is_rfkill(priv))
2086 ieee80211_wake_queues(priv->hw);
2088 priv->active_rate = priv->rates_mask;
2089 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2091 /* Configure Tx antenna selection based on H/W config */
2092 if (priv->cfg->ops->hcmd->set_tx_ant)
2093 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2095 if (iwl_is_associated(priv)) {
2096 struct iwl_rxon_cmd *active_rxon =
2097 (struct iwl_rxon_cmd *)&priv->active_rxon;
2098 /* apply any changes in staging */
2099 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2100 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2102 /* Initialize our rx_config data */
2103 iwl_connection_init_rx_config(priv, priv->iw_mode);
2105 if (priv->cfg->ops->hcmd->set_rxon_chain)
2106 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2108 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2111 /* Configure Bluetooth device coexistence support */
2112 iwl_send_bt_config(priv);
2114 iwl_reset_run_time_calib(priv);
2116 /* Configure the adapter for unassociated operation */
2117 iwlcore_commit_rxon(priv);
2119 /* At this point, the NIC is initialized and operational */
2120 iwl_rf_kill_ct_config(priv);
2122 iwl_leds_init(priv);
2124 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2125 set_bit(STATUS_READY, &priv->status);
2126 wake_up_interruptible(&priv->wait_command_queue);
2128 iwl_power_update_mode(priv, true);
2130 /* reassociate for ADHOC mode */
2131 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2132 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2135 iwl_mac_beacon_update(priv->hw, beacon);
2139 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2140 iwl_set_mode(priv, priv->iw_mode);
2145 queue_work(priv->workqueue, &priv->restart);
2148 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2150 static void __iwl_down(struct iwl_priv *priv)
2152 unsigned long flags;
2153 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2155 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2158 set_bit(STATUS_EXIT_PENDING, &priv->status);
2160 iwl_clear_stations_table(priv);
2162 /* Unblock any waiting calls */
2163 wake_up_interruptible_all(&priv->wait_command_queue);
2165 /* Wipe out the EXIT_PENDING status bit if we are not actually
2166 * exiting the module */
2168 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2170 /* stop and reset the on-board processor */
2171 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2173 /* tell the device to stop sending interrupts */
2174 spin_lock_irqsave(&priv->lock, flags);
2175 iwl_disable_interrupts(priv);
2176 spin_unlock_irqrestore(&priv->lock, flags);
2177 iwl_synchronize_irq(priv);
2179 if (priv->mac80211_registered)
2180 ieee80211_stop_queues(priv->hw);
2182 /* If we have not previously called iwl_init() then
2183 * clear all bits but the RF Kill bit and return */
2184 if (!iwl_is_init(priv)) {
2185 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2187 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2188 STATUS_GEO_CONFIGURED |
2189 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2190 STATUS_EXIT_PENDING;
2194 /* ...otherwise clear out all the status bits but the RF Kill
2195 * bit and continue taking the NIC down. */
2196 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2198 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2199 STATUS_GEO_CONFIGURED |
2200 test_bit(STATUS_FW_ERROR, &priv->status) <<
2202 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2203 STATUS_EXIT_PENDING;
2205 /* device going down, Stop using ICT table */
2206 iwl_disable_ict(priv);
2208 iwl_txq_ctx_stop(priv);
2211 /* Power-down device's busmaster DMA clocks */
2212 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2215 /* Make sure (redundant) we've released our request to stay awake */
2216 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2218 /* Stop the device, and put it in low power state */
2219 priv->cfg->ops->lib->apm_ops.stop(priv);
2222 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2224 if (priv->ibss_beacon)
2225 dev_kfree_skb(priv->ibss_beacon);
2226 priv->ibss_beacon = NULL;
2228 /* clear out any free frames */
2229 iwl_clear_free_frames(priv);
2232 static void iwl_down(struct iwl_priv *priv)
2234 mutex_lock(&priv->mutex);
2236 mutex_unlock(&priv->mutex);
2238 iwl_cancel_deferred_work(priv);
2241 #define HW_READY_TIMEOUT (50)
2243 static int iwl_set_hw_ready(struct iwl_priv *priv)
2247 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2248 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2250 /* See if we got it */
2251 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2252 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2253 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2255 if (ret != -ETIMEDOUT)
2256 priv->hw_ready = true;
2258 priv->hw_ready = false;
2260 IWL_DEBUG_INFO(priv, "hardware %s\n",
2261 (priv->hw_ready == 1) ? "ready" : "not ready");
2265 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2269 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2271 ret = iwl_set_hw_ready(priv);
2275 /* If HW is not ready, prepare the conditions to check again */
2276 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2277 CSR_HW_IF_CONFIG_REG_PREPARE);
2279 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2280 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2281 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2283 /* HW should be ready by now, check again. */
2284 if (ret != -ETIMEDOUT)
2285 iwl_set_hw_ready(priv);
2290 #define MAX_HW_RESTARTS 5
2292 static int __iwl_up(struct iwl_priv *priv)
2297 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2298 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2302 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2303 IWL_ERR(priv, "ucode not available for device bringup\n");
2307 iwl_prepare_card_hw(priv);
2309 if (!priv->hw_ready) {
2310 IWL_WARN(priv, "Exit HW not ready\n");
2314 /* If platform's RF_KILL switch is NOT set to KILL */
2315 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2316 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2318 set_bit(STATUS_RF_KILL_HW, &priv->status);
2320 if (iwl_is_rfkill(priv)) {
2321 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2323 iwl_enable_interrupts(priv);
2324 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2328 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2330 ret = iwl_hw_nic_init(priv);
2332 IWL_ERR(priv, "Unable to init nic\n");
2336 /* make sure rfkill handshake bits are cleared */
2337 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2338 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2339 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2341 /* clear (again), then enable host interrupts */
2342 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2343 iwl_enable_interrupts(priv);
2345 /* really make sure rfkill handshake bits are cleared */
2346 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2347 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2349 /* Copy original ucode data image from disk into backup cache.
2350 * This will be used to initialize the on-board processor's
2351 * data SRAM for a clean start when the runtime program first loads. */
2352 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2353 priv->ucode_data.len);
2355 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2357 iwl_clear_stations_table(priv);
2359 /* load bootstrap state machine,
2360 * load bootstrap program into processor's memory,
2361 * prepare to load the "initialize" uCode */
2362 ret = priv->cfg->ops->lib->load_ucode(priv);
2365 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2370 /* start card; "initialize" will load runtime ucode */
2371 iwl_nic_start(priv);
2373 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2378 set_bit(STATUS_EXIT_PENDING, &priv->status);
2380 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2382 /* tried to restart and config the device for as long as our
2383 * patience could withstand */
2384 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2389 /*****************************************************************************
2391 * Workqueue callbacks
2393 *****************************************************************************/
2395 static void iwl_bg_init_alive_start(struct work_struct *data)
2397 struct iwl_priv *priv =
2398 container_of(data, struct iwl_priv, init_alive_start.work);
2400 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2403 mutex_lock(&priv->mutex);
2404 priv->cfg->ops->lib->init_alive_start(priv);
2405 mutex_unlock(&priv->mutex);
2408 static void iwl_bg_alive_start(struct work_struct *data)
2410 struct iwl_priv *priv =
2411 container_of(data, struct iwl_priv, alive_start.work);
2413 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2416 /* enable dram interrupt */
2417 iwl_reset_ict(priv);
2419 mutex_lock(&priv->mutex);
2420 iwl_alive_start(priv);
2421 mutex_unlock(&priv->mutex);
2424 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2426 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2427 run_time_calib_work);
2429 mutex_lock(&priv->mutex);
2431 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2432 test_bit(STATUS_SCANNING, &priv->status)) {
2433 mutex_unlock(&priv->mutex);
2437 if (priv->start_calib) {
2438 iwl_chain_noise_calibration(priv, &priv->statistics);
2440 iwl_sensitivity_calibration(priv, &priv->statistics);
2443 mutex_unlock(&priv->mutex);
2447 static void iwl_bg_up(struct work_struct *data)
2449 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2451 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2454 mutex_lock(&priv->mutex);
2456 mutex_unlock(&priv->mutex);
2459 static void iwl_bg_restart(struct work_struct *data)
2461 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2463 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2466 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2467 mutex_lock(&priv->mutex);
2470 mutex_unlock(&priv->mutex);
2472 ieee80211_restart_hw(priv->hw);
2475 queue_work(priv->workqueue, &priv->up);
2479 static void iwl_bg_rx_replenish(struct work_struct *data)
2481 struct iwl_priv *priv =
2482 container_of(data, struct iwl_priv, rx_replenish);
2484 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2487 mutex_lock(&priv->mutex);
2488 iwl_rx_replenish(priv);
2489 mutex_unlock(&priv->mutex);
2492 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2494 void iwl_post_associate(struct iwl_priv *priv)
2496 struct ieee80211_conf *conf = NULL;
2498 unsigned long flags;
2500 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2501 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2505 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2506 priv->assoc_id, priv->active_rxon.bssid_addr);
2509 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2513 if (!priv->vif || !priv->is_open)
2516 iwl_scan_cancel_timeout(priv, 200);
2518 conf = ieee80211_get_hw_conf(priv->hw);
2520 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2521 iwlcore_commit_rxon(priv);
2523 iwl_setup_rxon_timing(priv);
2524 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2525 sizeof(priv->rxon_timing), &priv->rxon_timing);
2527 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2528 "Attempting to continue.\n");
2530 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2532 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2534 if (priv->cfg->ops->hcmd->set_rxon_chain)
2535 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2537 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2539 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2540 priv->assoc_id, priv->beacon_int);
2542 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2543 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2545 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2547 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2548 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2549 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2551 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2553 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2554 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2558 iwlcore_commit_rxon(priv);
2560 switch (priv->iw_mode) {
2561 case NL80211_IFTYPE_STATION:
2564 case NL80211_IFTYPE_ADHOC:
2566 /* assume default assoc id */
2569 iwl_rxon_add_station(priv, priv->bssid, 0);
2570 iwl_send_beacon_cmd(priv);
2575 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2576 __func__, priv->iw_mode);
2580 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2581 priv->assoc_station_added = 1;
2583 spin_lock_irqsave(&priv->lock, flags);
2584 iwl_activate_qos(priv, 0);
2585 spin_unlock_irqrestore(&priv->lock, flags);
2587 /* the chain noise calibration will enabled PM upon completion
2588 * If chain noise has already been run, then we need to enable
2589 * power management here */
2590 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2591 iwl_power_update_mode(priv, false);
2593 /* Enable Rx differential gain and sensitivity calibrations */
2594 iwl_chain_noise_reset(priv);
2595 priv->start_calib = 1;
2599 /*****************************************************************************
2601 * mac80211 entry point functions
2603 *****************************************************************************/
2605 #define UCODE_READY_TIMEOUT (4 * HZ)
2608 * Not a mac80211 entry point function, but it fits in with all the
2609 * other mac80211 functions grouped here.
2611 static int iwl_mac_setup_register(struct iwl_priv *priv)
2614 struct ieee80211_hw *hw = priv->hw;
2615 hw->rate_control_algorithm = "iwl-agn-rs";
2617 /* Tell mac80211 our characteristics */
2618 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2619 IEEE80211_HW_NOISE_DBM |
2620 IEEE80211_HW_AMPDU_AGGREGATION |
2621 IEEE80211_HW_SPECTRUM_MGMT;
2623 if (!priv->cfg->broken_powersave)
2624 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2625 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2627 if (priv->cfg->sku & IWL_SKU_N)
2628 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2629 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2631 hw->sta_data_size = sizeof(struct iwl_station_priv);
2632 hw->wiphy->interface_modes =
2633 BIT(NL80211_IFTYPE_STATION) |
2634 BIT(NL80211_IFTYPE_ADHOC);
2636 hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY |
2637 WIPHY_FLAG_DISABLE_BEACON_HINTS;
2640 * For now, disable PS by default because it affects
2641 * RX performance significantly.
2643 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2645 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2646 /* we create the 802.11 header and a zero-length SSID element */
2647 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2649 /* Default value; 4 EDCA QOS priorities */
2652 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2654 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2655 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2656 &priv->bands[IEEE80211_BAND_2GHZ];
2657 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2658 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2659 &priv->bands[IEEE80211_BAND_5GHZ];
2661 ret = ieee80211_register_hw(priv->hw);
2663 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2666 priv->mac80211_registered = 1;
2672 static int iwl_mac_start(struct ieee80211_hw *hw)
2674 struct iwl_priv *priv = hw->priv;
2677 IWL_DEBUG_MAC80211(priv, "enter\n");
2679 /* we should be verifying the device is ready to be opened */
2680 mutex_lock(&priv->mutex);
2682 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2683 * ucode filename and max sizes are card-specific. */
2685 if (!priv->ucode_code.len) {
2686 ret = iwl_read_ucode(priv);
2688 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2689 mutex_unlock(&priv->mutex);
2694 ret = __iwl_up(priv);
2696 mutex_unlock(&priv->mutex);
2701 if (iwl_is_rfkill(priv))
2704 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2706 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2707 * mac80211 will not be run successfully. */
2708 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2709 test_bit(STATUS_READY, &priv->status),
2710 UCODE_READY_TIMEOUT);
2712 if (!test_bit(STATUS_READY, &priv->status)) {
2713 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2714 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2719 iwl_led_start(priv);
2723 IWL_DEBUG_MAC80211(priv, "leave\n");
2727 static void iwl_mac_stop(struct ieee80211_hw *hw)
2729 struct iwl_priv *priv = hw->priv;
2731 IWL_DEBUG_MAC80211(priv, "enter\n");
2738 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2739 /* stop mac, cancel any scan request and clear
2740 * RXON_FILTER_ASSOC_MSK BIT
2742 mutex_lock(&priv->mutex);
2743 iwl_scan_cancel_timeout(priv, 100);
2744 mutex_unlock(&priv->mutex);
2749 flush_workqueue(priv->workqueue);
2751 /* enable interrupts again in order to receive rfkill changes */
2752 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2753 iwl_enable_interrupts(priv);
2755 IWL_DEBUG_MAC80211(priv, "leave\n");
2758 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2760 struct iwl_priv *priv = hw->priv;
2762 IWL_DEBUG_MACDUMP(priv, "enter\n");
2764 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2765 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2767 if (iwl_tx_skb(priv, skb))
2768 dev_kfree_skb_any(skb);
2770 IWL_DEBUG_MACDUMP(priv, "leave\n");
2771 return NETDEV_TX_OK;
2774 void iwl_config_ap(struct iwl_priv *priv)
2777 unsigned long flags;
2779 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2782 /* The following should be done only at AP bring up */
2783 if (!iwl_is_associated(priv)) {
2785 /* RXON - unassoc (to set timing command) */
2786 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2787 iwlcore_commit_rxon(priv);
2790 iwl_setup_rxon_timing(priv);
2791 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2792 sizeof(priv->rxon_timing), &priv->rxon_timing);
2794 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2795 "Attempting to continue.\n");
2797 /* AP has all antennas */
2798 priv->chain_noise_data.active_chains =
2799 priv->hw_params.valid_rx_ant;
2800 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2801 if (priv->cfg->ops->hcmd->set_rxon_chain)
2802 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2804 /* FIXME: what should be the assoc_id for AP? */
2805 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2806 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2807 priv->staging_rxon.flags |=
2808 RXON_FLG_SHORT_PREAMBLE_MSK;
2810 priv->staging_rxon.flags &=
2811 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2813 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2814 if (priv->assoc_capability &
2815 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2816 priv->staging_rxon.flags |=
2817 RXON_FLG_SHORT_SLOT_MSK;
2819 priv->staging_rxon.flags &=
2820 ~RXON_FLG_SHORT_SLOT_MSK;
2822 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2823 priv->staging_rxon.flags &=
2824 ~RXON_FLG_SHORT_SLOT_MSK;
2826 /* restore RXON assoc */
2827 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2828 iwlcore_commit_rxon(priv);
2829 iwl_reset_qos(priv);
2830 spin_lock_irqsave(&priv->lock, flags);
2831 iwl_activate_qos(priv, 1);
2832 spin_unlock_irqrestore(&priv->lock, flags);
2833 iwl_add_bcast_station(priv);
2835 iwl_send_beacon_cmd(priv);
2837 /* FIXME - we need to add code here to detect a totally new
2838 * configuration, reset the AP, unassoc, rxon timing, assoc,
2839 * clear sta table, add BCAST sta... */
2842 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2843 struct ieee80211_vif *vif,
2844 struct ieee80211_key_conf *keyconf,
2845 struct ieee80211_sta *sta,
2846 u32 iv32, u16 *phase1key)
2849 struct iwl_priv *priv = hw->priv;
2850 IWL_DEBUG_MAC80211(priv, "enter\n");
2852 iwl_update_tkip_key(priv, keyconf,
2853 sta ? sta->addr : iwl_bcast_addr,
2856 IWL_DEBUG_MAC80211(priv, "leave\n");
2859 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2860 struct ieee80211_vif *vif,
2861 struct ieee80211_sta *sta,
2862 struct ieee80211_key_conf *key)
2864 struct iwl_priv *priv = hw->priv;
2868 bool is_default_wep_key = false;
2870 IWL_DEBUG_MAC80211(priv, "enter\n");
2872 if (priv->cfg->mod_params->sw_crypto) {
2873 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2876 addr = sta ? sta->addr : iwl_bcast_addr;
2877 sta_id = iwl_find_station(priv, addr);
2878 if (sta_id == IWL_INVALID_STATION) {
2879 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2885 mutex_lock(&priv->mutex);
2886 iwl_scan_cancel_timeout(priv, 100);
2887 mutex_unlock(&priv->mutex);
2889 /* If we are getting WEP group key and we didn't receive any key mapping
2890 * so far, we are in legacy wep mode (group key only), otherwise we are
2892 * In legacy wep mode, we use another host command to the uCode */
2893 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2894 priv->iw_mode != NL80211_IFTYPE_AP) {
2896 is_default_wep_key = !priv->key_mapping_key;
2898 is_default_wep_key =
2899 (key->hw_key_idx == HW_KEY_DEFAULT);
2904 if (is_default_wep_key)
2905 ret = iwl_set_default_wep_key(priv, key);
2907 ret = iwl_set_dynamic_key(priv, key, sta_id);
2909 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2912 if (is_default_wep_key)
2913 ret = iwl_remove_default_wep_key(priv, key);
2915 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2917 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2923 IWL_DEBUG_MAC80211(priv, "leave\n");
2928 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2929 struct ieee80211_vif *vif,
2930 enum ieee80211_ampdu_mlme_action action,
2931 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2933 struct iwl_priv *priv = hw->priv;
2936 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2939 if (!(priv->cfg->sku & IWL_SKU_N))
2943 case IEEE80211_AMPDU_RX_START:
2944 IWL_DEBUG_HT(priv, "start Rx\n");
2945 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2946 case IEEE80211_AMPDU_RX_STOP:
2947 IWL_DEBUG_HT(priv, "stop Rx\n");
2948 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2949 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2953 case IEEE80211_AMPDU_TX_START:
2954 IWL_DEBUG_HT(priv, "start Tx\n");
2955 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2956 case IEEE80211_AMPDU_TX_STOP:
2957 IWL_DEBUG_HT(priv, "stop Tx\n");
2958 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2959 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2963 case IEEE80211_AMPDU_TX_OPERATIONAL:
2967 IWL_DEBUG_HT(priv, "unknown\n");
2974 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2975 struct ieee80211_low_level_stats *stats)
2977 struct iwl_priv *priv = hw->priv;
2980 IWL_DEBUG_MAC80211(priv, "enter\n");
2981 IWL_DEBUG_MAC80211(priv, "leave\n");
2986 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
2987 struct ieee80211_vif *vif,
2988 enum sta_notify_cmd cmd,
2989 struct ieee80211_sta *sta)
2991 struct iwl_priv *priv = hw->priv;
2992 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2996 * TODO: We really should use this callback to
2997 * actually maintain the station table in
3002 case STA_NOTIFY_ADD:
3003 atomic_set(&sta_priv->pending_frames, 0);
3004 if (vif->type == NL80211_IFTYPE_AP)
3005 sta_priv->client = true;
3007 case STA_NOTIFY_SLEEP:
3008 WARN_ON(!sta_priv->client);
3009 sta_priv->asleep = true;
3010 if (atomic_read(&sta_priv->pending_frames) > 0)
3011 ieee80211_sta_block_awake(hw, sta, true);
3013 case STA_NOTIFY_AWAKE:
3014 WARN_ON(!sta_priv->client);
3015 sta_priv->asleep = false;
3016 sta_id = iwl_find_station(priv, sta->addr);
3017 if (sta_id != IWL_INVALID_STATION)
3018 iwl_sta_modify_ps_wake(priv, sta_id);
3025 /*****************************************************************************
3029 *****************************************************************************/
3031 #ifdef CONFIG_IWLWIFI_DEBUG
3034 * The following adds a new attribute to the sysfs representation
3035 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3036 * used for controlling the debug level.
3038 * See the level definitions in iwl for details.
3040 * The debug_level being managed using sysfs below is a per device debug
3041 * level that is used instead of the global debug level if it (the per
3042 * device debug level) is set.
3044 static ssize_t show_debug_level(struct device *d,
3045 struct device_attribute *attr, char *buf)
3047 struct iwl_priv *priv = dev_get_drvdata(d);
3048 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3050 static ssize_t store_debug_level(struct device *d,
3051 struct device_attribute *attr,
3052 const char *buf, size_t count)
3054 struct iwl_priv *priv = dev_get_drvdata(d);
3058 ret = strict_strtoul(buf, 0, &val);
3060 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3062 priv->debug_level = val;
3063 if (iwl_alloc_traffic_mem(priv))
3065 "Not enough memory to generate traffic log\n");
3067 return strnlen(buf, count);
3070 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3071 show_debug_level, store_debug_level);
3074 #endif /* CONFIG_IWLWIFI_DEBUG */
3077 static ssize_t show_temperature(struct device *d,
3078 struct device_attribute *attr, char *buf)
3080 struct iwl_priv *priv = dev_get_drvdata(d);
3082 if (!iwl_is_alive(priv))
3085 return sprintf(buf, "%d\n", priv->temperature);
3088 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3090 static ssize_t show_tx_power(struct device *d,
3091 struct device_attribute *attr, char *buf)
3093 struct iwl_priv *priv = dev_get_drvdata(d);
3095 if (!iwl_is_ready_rf(priv))
3096 return sprintf(buf, "off\n");
3098 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3101 static ssize_t store_tx_power(struct device *d,
3102 struct device_attribute *attr,
3103 const char *buf, size_t count)
3105 struct iwl_priv *priv = dev_get_drvdata(d);
3109 ret = strict_strtoul(buf, 10, &val);
3111 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3113 ret = iwl_set_tx_power(priv, val, false);
3115 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3123 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3125 static ssize_t show_flags(struct device *d,
3126 struct device_attribute *attr, char *buf)
3128 struct iwl_priv *priv = dev_get_drvdata(d);
3130 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3133 static ssize_t store_flags(struct device *d,
3134 struct device_attribute *attr,
3135 const char *buf, size_t count)
3137 struct iwl_priv *priv = dev_get_drvdata(d);
3140 int ret = strict_strtoul(buf, 0, &val);
3145 mutex_lock(&priv->mutex);
3146 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3147 /* Cancel any currently running scans... */
3148 if (iwl_scan_cancel_timeout(priv, 100))
3149 IWL_WARN(priv, "Could not cancel scan.\n");
3151 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
3152 priv->staging_rxon.flags = cpu_to_le32(flags);
3153 iwlcore_commit_rxon(priv);
3156 mutex_unlock(&priv->mutex);
3161 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3163 static ssize_t show_filter_flags(struct device *d,
3164 struct device_attribute *attr, char *buf)
3166 struct iwl_priv *priv = dev_get_drvdata(d);
3168 return sprintf(buf, "0x%04X\n",
3169 le32_to_cpu(priv->active_rxon.filter_flags));
3172 static ssize_t store_filter_flags(struct device *d,
3173 struct device_attribute *attr,
3174 const char *buf, size_t count)
3176 struct iwl_priv *priv = dev_get_drvdata(d);
3179 int ret = strict_strtoul(buf, 0, &val);
3182 filter_flags = (u32)val;
3184 mutex_lock(&priv->mutex);
3185 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3186 /* Cancel any currently running scans... */
3187 if (iwl_scan_cancel_timeout(priv, 100))
3188 IWL_WARN(priv, "Could not cancel scan.\n");
3190 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3191 "0x%04X\n", filter_flags);
3192 priv->staging_rxon.filter_flags =
3193 cpu_to_le32(filter_flags);
3194 iwlcore_commit_rxon(priv);
3197 mutex_unlock(&priv->mutex);
3202 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3203 store_filter_flags);
3206 static ssize_t show_statistics(struct device *d,
3207 struct device_attribute *attr, char *buf)
3209 struct iwl_priv *priv = dev_get_drvdata(d);
3210 u32 size = sizeof(struct iwl_notif_statistics);
3211 u32 len = 0, ofs = 0;
3212 u8 *data = (u8 *)&priv->statistics;
3215 if (!iwl_is_alive(priv))
3218 mutex_lock(&priv->mutex);
3219 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3220 mutex_unlock(&priv->mutex);
3224 "Error sending statistics request: 0x%08X\n", rc);
3228 while (size && (PAGE_SIZE - len)) {
3229 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3230 PAGE_SIZE - len, 1);
3232 if (PAGE_SIZE - len)
3236 size -= min(size, 16U);
3242 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3244 static ssize_t show_rts_ht_protection(struct device *d,
3245 struct device_attribute *attr, char *buf)
3247 struct iwl_priv *priv = dev_get_drvdata(d);
3249 return sprintf(buf, "%s\n",
3250 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3253 static ssize_t store_rts_ht_protection(struct device *d,
3254 struct device_attribute *attr,
3255 const char *buf, size_t count)
3257 struct iwl_priv *priv = dev_get_drvdata(d);
3261 ret = strict_strtoul(buf, 10, &val);
3263 IWL_INFO(priv, "Input is not in decimal form.\n");
3265 if (!iwl_is_associated(priv))
3266 priv->cfg->use_rts_for_ht = val ? true : false;
3268 IWL_ERR(priv, "Sta associated with AP - "
3269 "Change protection mechanism is not allowed\n");
3275 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3276 show_rts_ht_protection, store_rts_ht_protection);
3279 /*****************************************************************************
3281 * driver setup and teardown
3283 *****************************************************************************/
3285 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3287 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3289 init_waitqueue_head(&priv->wait_command_queue);
3291 INIT_WORK(&priv->up, iwl_bg_up);
3292 INIT_WORK(&priv->restart, iwl_bg_restart);
3293 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3294 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3295 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3296 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3297 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3299 iwl_setup_scan_deferred_work(priv);
3301 if (priv->cfg->ops->lib->setup_deferred_work)
3302 priv->cfg->ops->lib->setup_deferred_work(priv);
3304 init_timer(&priv->statistics_periodic);
3305 priv->statistics_periodic.data = (unsigned long)priv;
3306 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3308 init_timer(&priv->ucode_trace);
3309 priv->ucode_trace.data = (unsigned long)priv;
3310 priv->ucode_trace.function = iwl_bg_ucode_trace;
3312 if (!priv->cfg->use_isr_legacy)
3313 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3314 iwl_irq_tasklet, (unsigned long)priv);
3316 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3317 iwl_irq_tasklet_legacy, (unsigned long)priv);
3320 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3322 if (priv->cfg->ops->lib->cancel_deferred_work)
3323 priv->cfg->ops->lib->cancel_deferred_work(priv);
3325 cancel_delayed_work_sync(&priv->init_alive_start);
3326 cancel_delayed_work(&priv->scan_check);
3327 cancel_delayed_work(&priv->alive_start);
3328 cancel_work_sync(&priv->beacon_update);
3329 del_timer_sync(&priv->statistics_periodic);
3330 del_timer_sync(&priv->ucode_trace);
3333 static void iwl_init_hw_rates(struct iwl_priv *priv,
3334 struct ieee80211_rate *rates)
3338 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3339 rates[i].bitrate = iwl_rates[i].ieee * 5;
3340 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3341 rates[i].hw_value_short = i;
3343 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3345 * If CCK != 1M then set short preamble rate flag.
3348 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3349 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3354 static int iwl_init_drv(struct iwl_priv *priv)
3358 priv->ibss_beacon = NULL;
3360 spin_lock_init(&priv->sta_lock);
3361 spin_lock_init(&priv->hcmd_lock);
3363 INIT_LIST_HEAD(&priv->free_frames);
3365 mutex_init(&priv->mutex);
3367 /* Clear the driver's (not device's) station table */
3368 iwl_clear_stations_table(priv);
3370 priv->ieee_channels = NULL;
3371 priv->ieee_rates = NULL;
3372 priv->band = IEEE80211_BAND_2GHZ;
3374 priv->iw_mode = NL80211_IFTYPE_STATION;
3375 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3376 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3378 /* Choose which receivers/antennas to use */
3379 if (priv->cfg->ops->hcmd->set_rxon_chain)
3380 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3382 iwl_init_scan_params(priv);
3384 iwl_reset_qos(priv);
3386 priv->qos_data.qos_active = 0;
3387 priv->qos_data.qos_cap.val = 0;
3389 priv->rates_mask = IWL_RATES_MASK;
3390 /* Set the tx_power_user_lmt to the lowest power level
3391 * this value will get overwritten by channel max power avg
3393 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3395 ret = iwl_init_channel_map(priv);
3397 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3401 ret = iwlcore_init_geos(priv);
3403 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3404 goto err_free_channel_map;
3406 iwl_init_hw_rates(priv, priv->ieee_rates);
3410 err_free_channel_map:
3411 iwl_free_channel_map(priv);
3416 static void iwl_uninit_drv(struct iwl_priv *priv)
3418 iwl_calib_free_results(priv);
3419 iwlcore_free_geos(priv);
3420 iwl_free_channel_map(priv);
3424 static struct attribute *iwl_sysfs_entries[] = {
3425 &dev_attr_flags.attr,
3426 &dev_attr_filter_flags.attr,
3427 &dev_attr_statistics.attr,
3428 &dev_attr_temperature.attr,
3429 &dev_attr_tx_power.attr,
3430 &dev_attr_rts_ht_protection.attr,
3431 #ifdef CONFIG_IWLWIFI_DEBUG
3432 &dev_attr_debug_level.attr,
3437 static struct attribute_group iwl_attribute_group = {
3438 .name = NULL, /* put in device directory */
3439 .attrs = iwl_sysfs_entries,
3442 static struct ieee80211_ops iwl_hw_ops = {
3444 .start = iwl_mac_start,
3445 .stop = iwl_mac_stop,
3446 .add_interface = iwl_mac_add_interface,
3447 .remove_interface = iwl_mac_remove_interface,
3448 .config = iwl_mac_config,
3449 .configure_filter = iwl_configure_filter,
3450 .set_key = iwl_mac_set_key,
3451 .update_tkip_key = iwl_mac_update_tkip_key,
3452 .get_stats = iwl_mac_get_stats,
3453 .get_tx_stats = iwl_mac_get_tx_stats,
3454 .conf_tx = iwl_mac_conf_tx,
3455 .reset_tsf = iwl_mac_reset_tsf,
3456 .bss_info_changed = iwl_bss_info_changed,
3457 .ampdu_action = iwl_mac_ampdu_action,
3458 .hw_scan = iwl_mac_hw_scan,
3459 .sta_notify = iwl_mac_sta_notify,
3462 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3465 struct iwl_priv *priv;
3466 struct ieee80211_hw *hw;
3467 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3468 unsigned long flags;
3471 /************************
3472 * 1. Allocating HW data
3473 ************************/
3475 /* Disabling hardware scan means that mac80211 will perform scans
3476 * "the hard way", rather than using device's scan. */
3477 if (cfg->mod_params->disable_hw_scan) {
3478 if (iwl_debug_level & IWL_DL_INFO)
3479 dev_printk(KERN_DEBUG, &(pdev->dev),
3480 "Disabling hw_scan\n");
3481 iwl_hw_ops.hw_scan = NULL;
3484 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3490 /* At this point both hw and priv are allocated. */
3492 SET_IEEE80211_DEV(hw, &pdev->dev);
3494 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3496 priv->pci_dev = pdev;
3497 priv->inta_mask = CSR_INI_SET_MASK;
3499 #ifdef CONFIG_IWLWIFI_DEBUG
3500 atomic_set(&priv->restrict_refcnt, 0);
3502 if (iwl_alloc_traffic_mem(priv))
3503 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3505 /**************************
3506 * 2. Initializing PCI bus
3507 **************************/
3508 if (pci_enable_device(pdev)) {
3510 goto out_ieee80211_free_hw;
3513 pci_set_master(pdev);
3515 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3517 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3519 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3521 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3522 /* both attempts failed: */
3524 IWL_WARN(priv, "No suitable DMA available.\n");
3525 goto out_pci_disable_device;
3529 err = pci_request_regions(pdev, DRV_NAME);
3531 goto out_pci_disable_device;
3533 pci_set_drvdata(pdev, priv);
3536 /***********************
3537 * 3. Read REV register
3538 ***********************/
3539 priv->hw_base = pci_iomap(pdev, 0, 0);
3540 if (!priv->hw_base) {
3542 goto out_pci_release_regions;
3545 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3546 (unsigned long long) pci_resource_len(pdev, 0));
3547 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3549 /* these spin locks will be used in apm_ops.init and EEPROM access
3550 * we should init now
3552 spin_lock_init(&priv->reg_lock);
3553 spin_lock_init(&priv->lock);
3554 iwl_hw_detect(priv);
3555 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3556 priv->cfg->name, priv->hw_rev);
3558 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3559 * PCI Tx retries from interfering with C3 CPU state */
3560 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3562 iwl_prepare_card_hw(priv);
3563 if (!priv->hw_ready) {
3564 IWL_WARN(priv, "Failed, HW not ready\n");
3571 /* Read the EEPROM */
3572 err = iwl_eeprom_init(priv);
3574 IWL_ERR(priv, "Unable to init EEPROM\n");
3577 err = iwl_eeprom_check_version(priv);
3579 goto out_free_eeprom;
3581 /* extract MAC Address */
3582 iwl_eeprom_get_mac(priv, priv->mac_addr);
3583 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3584 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3586 /************************
3587 * 5. Setup HW constants
3588 ************************/
3589 if (iwl_set_hw_params(priv)) {
3590 IWL_ERR(priv, "failed to set hw parameters\n");
3591 goto out_free_eeprom;
3594 /*******************
3596 *******************/
3598 err = iwl_init_drv(priv);
3600 goto out_free_eeprom;
3601 /* At this point both hw and priv are initialized. */
3603 /********************
3605 ********************/
3606 spin_lock_irqsave(&priv->lock, flags);
3607 iwl_disable_interrupts(priv);
3608 spin_unlock_irqrestore(&priv->lock, flags);
3610 pci_enable_msi(priv->pci_dev);
3612 iwl_alloc_isr_ict(priv);
3613 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3614 IRQF_SHARED, DRV_NAME, priv);
3616 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3617 goto out_disable_msi;
3619 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3621 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3625 iwl_setup_deferred_work(priv);
3626 iwl_setup_rx_handlers(priv);
3628 /*********************************************
3629 * 8. Enable interrupts and read RFKILL state
3630 *********************************************/
3632 /* enable interrupts if needed: hw bug w/a */
3633 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3634 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3635 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3636 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3639 iwl_enable_interrupts(priv);
3641 /* If platform's RF_KILL switch is NOT set to KILL */
3642 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3643 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3645 set_bit(STATUS_RF_KILL_HW, &priv->status);
3647 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3648 test_bit(STATUS_RF_KILL_HW, &priv->status));
3650 iwl_power_initialize(priv);
3651 iwl_tt_initialize(priv);
3653 /**************************************************
3654 * 9. Setup and register with mac80211 and debugfs
3655 **************************************************/
3656 err = iwl_mac_setup_register(priv);
3658 goto out_remove_sysfs;
3660 err = iwl_dbgfs_register(priv, DRV_NAME);
3662 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3667 destroy_workqueue(priv->workqueue);
3668 priv->workqueue = NULL;
3669 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3671 free_irq(priv->pci_dev->irq, priv);
3672 iwl_free_isr_ict(priv);
3674 pci_disable_msi(priv->pci_dev);
3675 iwl_uninit_drv(priv);
3677 iwl_eeprom_free(priv);
3679 pci_iounmap(pdev, priv->hw_base);
3680 out_pci_release_regions:
3681 pci_set_drvdata(pdev, NULL);
3682 pci_release_regions(pdev);
3683 out_pci_disable_device:
3684 pci_disable_device(pdev);
3685 out_ieee80211_free_hw:
3686 iwl_free_traffic_mem(priv);
3687 ieee80211_free_hw(priv->hw);
3692 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3694 struct iwl_priv *priv = pci_get_drvdata(pdev);
3695 unsigned long flags;
3700 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3702 iwl_dbgfs_unregister(priv);
3703 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3705 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3706 * to be called and iwl_down since we are removing the device
3707 * we need to set STATUS_EXIT_PENDING bit.
3709 set_bit(STATUS_EXIT_PENDING, &priv->status);
3710 if (priv->mac80211_registered) {
3711 ieee80211_unregister_hw(priv->hw);
3712 priv->mac80211_registered = 0;
3718 * Make sure device is reset to low power before unloading driver.
3719 * This may be redundant with iwl_down(), but there are paths to
3720 * run iwl_down() without calling apm_ops.stop(), and there are
3721 * paths to avoid running iwl_down() at all before leaving driver.
3722 * This (inexpensive) call *makes sure* device is reset.
3724 priv->cfg->ops->lib->apm_ops.stop(priv);
3728 /* make sure we flush any pending irq or
3729 * tasklet for the driver
3731 spin_lock_irqsave(&priv->lock, flags);
3732 iwl_disable_interrupts(priv);
3733 spin_unlock_irqrestore(&priv->lock, flags);
3735 iwl_synchronize_irq(priv);
3737 iwl_dealloc_ucode_pci(priv);
3740 iwl_rx_queue_free(priv, &priv->rxq);
3741 iwl_hw_txq_ctx_free(priv);
3743 iwl_clear_stations_table(priv);
3744 iwl_eeprom_free(priv);
3747 /*netif_stop_queue(dev); */
3748 flush_workqueue(priv->workqueue);
3750 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3751 * priv->workqueue... so we can't take down the workqueue
3753 destroy_workqueue(priv->workqueue);
3754 priv->workqueue = NULL;
3755 iwl_free_traffic_mem(priv);
3757 free_irq(priv->pci_dev->irq, priv);
3758 pci_disable_msi(priv->pci_dev);
3759 pci_iounmap(pdev, priv->hw_base);
3760 pci_release_regions(pdev);
3761 pci_disable_device(pdev);
3762 pci_set_drvdata(pdev, NULL);
3764 iwl_uninit_drv(priv);
3766 iwl_free_isr_ict(priv);
3768 if (priv->ibss_beacon)
3769 dev_kfree_skb(priv->ibss_beacon);
3771 ieee80211_free_hw(priv->hw);
3775 /*****************************************************************************
3777 * driver and module entry point
3779 *****************************************************************************/
3781 /* Hardware specific file defines the PCI IDs table for that hardware module */
3782 static struct pci_device_id iwl_hw_card_ids[] = {
3783 #ifdef CONFIG_IWL4965
3784 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3785 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3786 #endif /* CONFIG_IWL4965 */
3787 #ifdef CONFIG_IWL5000
3788 /* 5100 Series WiFi */
3789 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3790 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3791 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3792 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3793 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3794 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3795 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3796 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3797 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3798 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3799 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3800 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3801 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3802 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3803 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3804 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3805 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3806 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3807 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3808 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3809 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3810 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3811 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3812 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3814 /* 5300 Series WiFi */
3815 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3816 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3817 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3818 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3819 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3820 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3821 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3822 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3823 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3824 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3825 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3826 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3828 /* 5350 Series WiFi/WiMax */
3829 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3830 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3831 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3833 /* 5150 Series Wifi/WiMax */
3834 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3835 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3836 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3837 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3838 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3839 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3841 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3842 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3843 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3844 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3847 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3848 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3849 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3850 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3851 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3852 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3853 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3854 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3855 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3856 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3858 /* 6x50 WiFi/WiMax Series */
3859 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3860 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3861 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3862 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3863 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3864 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3866 /* 1000 Series WiFi */
3867 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3868 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3869 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3870 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3871 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3872 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3873 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3874 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3875 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3876 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3877 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3878 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3879 #endif /* CONFIG_IWL5000 */
3883 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3885 static struct pci_driver iwl_driver = {
3887 .id_table = iwl_hw_card_ids,
3888 .probe = iwl_pci_probe,
3889 .remove = __devexit_p(iwl_pci_remove),
3891 .suspend = iwl_pci_suspend,
3892 .resume = iwl_pci_resume,
3896 static int __init iwl_init(void)
3900 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3901 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3903 ret = iwlagn_rate_control_register();
3905 printk(KERN_ERR DRV_NAME
3906 "Unable to register rate control algorithm: %d\n", ret);
3910 ret = pci_register_driver(&iwl_driver);
3912 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3913 goto error_register;
3919 iwlagn_rate_control_unregister();
3923 static void __exit iwl_exit(void)
3925 pci_unregister_driver(&iwl_driver);
3926 iwlagn_rate_control_unregister();
3929 module_exit(iwl_exit);
3930 module_init(iwl_init);
3932 #ifdef CONFIG_IWLWIFI_DEBUG
3933 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3934 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3935 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3936 MODULE_PARM_DESC(debug, "debug output mask");