SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/sched.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <net/mac80211.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40
  41 #include "iwl-eeprom.h"
  42 #include "iwl-dev.h"
  43 #include "iwl-core.h"
  44 #include "iwl-io.h"
  45 #include "iwl-helpers.h"
  46 #include "iwl-calib.h"
  47 #include "iwl-sta.h"
  48 #include "iwl-agn-led.h"
  49 #include "iwl-agn.h"
  50
  51 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  52 static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
  53
  54 /* Highest firmware API version supported */
  55 #define IWL4965_UCODE_API_MAX 2
  56
  57 /* Lowest firmware API version supported */
  58 #define IWL4965_UCODE_API_MIN 2
  59
  60 #define IWL4965_FW_PRE "iwlwifi-4965-"
  61 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
  62 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
  63
  64 /* check contents of special bootstrap uCode SRAM */
  65 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  66 {
  67         __le32 *image = priv->ucode_boot.v_addr;
  68         u32 len = priv->ucode_boot.len;
  69         u32 reg;
  70         u32 val;
  71
  72         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
  73
  74         /* verify BSM SRAM contents */
  75         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  76         for (reg = BSM_SRAM_LOWER_BOUND;
  77              reg < BSM_SRAM_LOWER_BOUND + len;
  78              reg += sizeof(u32), image++) {
  79                 val = iwl_read_prph(priv, reg);
  80                 if (val != le32_to_cpu(*image)) {
  81                         IWL_ERR(priv, "BSM uCode verification failed at "
  82                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  83                                   BSM_SRAM_LOWER_BOUND,
  84                                   reg - BSM_SRAM_LOWER_BOUND, len,
  85                                   val, le32_to_cpu(*image));
  86                         return -EIO;
  87                 }
  88         }
  89
  90         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
  91
  92         return 0;
  93 }
  94
  95 /**
  96  * iwl4965_load_bsm - Load bootstrap instructions
  97  *
  98  * BSM operation:
  99  *
 100  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 101  * in special SRAM that does not power down during RFKILL.  When powering back
 102  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 103  * the bootstrap program into the on-board processor, and starts it.
 104  *
 105  * The bootstrap program loads (via DMA) instructions and data for a new
 106  * program from host DRAM locations indicated by the host driver in the
 107  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 108  * automatically.
 109  *
 110  * When initializing the NIC, the host driver points the BSM to the
 111  * "initialize" uCode image.  This uCode sets up some internal data, then
 112  * notifies host via "initialize alive" that it is complete.
 113  *
 114  * The host then replaces the BSM_DRAM_* pointer values to point to the
 115  * normal runtime uCode instructions and a backup uCode data cache buffer
 116  * (filled initially with starting data values for the on-board processor),
 117  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 118  * which begins normal operation.
 119  *
 120  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 121  * the backup data cache in DRAM before SRAM is powered down.
 122  *
 123  * When powering back up, the BSM loads the bootstrap program.  This reloads
 124  * the runtime uCode instructions and the backup data cache into SRAM,
 125  * and re-launches the runtime uCode from where it left off.
 126  */
 127 static int iwl4965_load_bsm(struct iwl_priv *priv)
 128 {
 129         __le32 *image = priv->ucode_boot.v_addr;
 130         u32 len = priv->ucode_boot.len;
 131         dma_addr_t pinst;
 132         dma_addr_t pdata;
 133         u32 inst_len;
 134         u32 data_len;
 135         int i;
 136         u32 done;
 137         u32 reg_offset;
 138         int ret;
 139
 140         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
 141
 142         priv->ucode_type = UCODE_RT;
 143
 144         /* make sure bootstrap program is no larger than BSM's SRAM size */
 145         if (len > IWL49_MAX_BSM_SIZE)
 146                 return -EINVAL;
 147
 148         /* Tell bootstrap uCode where to find the "Initialize" uCode
 149          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 150          * NOTE:  iwl_init_alive_start() will replace these values,
 151          *        after the "initialize" uCode has run, to point to
 152          *        runtime/protocol instructions and backup data cache.
 153          */
 154         pinst = priv->ucode_init.p_addr >> 4;
 155         pdata = priv->ucode_init_data.p_addr >> 4;
 156         inst_len = priv->ucode_init.len;
 157         data_len = priv->ucode_init_data.len;
 158
 159         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 160         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 161         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 162         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 163
 164         /* Fill BSM memory with bootstrap instructions */
 165         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 166              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 167              reg_offset += sizeof(u32), image++)
 168                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 169
 170         ret = iwl4965_verify_bsm(priv);
 171         if (ret)
 172                 return ret;
 173
 174         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 175         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 176         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
 177         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 178
 179         /* Load bootstrap code into instruction SRAM now,
 180          *   to prepare to load "initialize" uCode */
 181         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 182
 183         /* Wait for load of bootstrap uCode to finish */
 184         for (i = 0; i < 100; i++) {
 185                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 186                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 187                         break;
 188                 udelay(10);
 189         }
 190         if (i < 100)
 191                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
 192         else {
 193                 IWL_ERR(priv, "BSM write did not complete!\n");
 194                 return -EIO;
 195         }
 196
 197         /* Enable future boot loads whenever power management unit triggers it
 198          *   (e.g. when powering back up after power-save shutdown) */
 199         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 200
 201
 202         return 0;
 203 }
 204
 205 /**
 206  * iwl4965_set_ucode_ptrs - Set uCode address location
 207  *
 208  * Tell initialization uCode where to find runtime uCode.
 209  *
 210  * BSM registers initially contain pointers to initialization uCode.
 211  * We need to replace them to load runtime uCode inst and data,
 212  * and to save runtime data when powering down.
 213  */
 214 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 215 {
 216         dma_addr_t pinst;
 217         dma_addr_t pdata;
 218         int ret = 0;
 219
 220         /* bits 35:4 for 4965 */
 221         pinst = priv->ucode_code.p_addr >> 4;
 222         pdata = priv->ucode_data_backup.p_addr >> 4;
 223
 224         /* Tell bootstrap uCode where to find image to load */
 225         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 226         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 227         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 228                                  priv->ucode_data.len);
 229
 230         /* Inst byte count must be last to set up, bit 31 signals uCode
 231          *   that all new ptr/size info is in place */
 232         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 233                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 234         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
 235
 236         return ret;
 237 }
 238
 239 /**
 240  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 241  *
 242  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 243  *
 244  * The 4965 "initialize" ALIVE reply contains calibration data for:
 245  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 246  *   (3945 does not contain this data).
 247  *
 248  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 249 */
 250 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 251 {
 252         /* Check alive response for "valid" sign from uCode */
 253         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 254                 /* We had an error bringing up the hardware, so take it
 255                  * all the way back down so we can try again */
 256                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
 257                 goto restart;
 258         }
 259
 260         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 261          * This is a paranoid check, because we would not have gotten the
 262          * "initialize" alive if code weren't properly loaded.  */
 263         if (iwl_verify_ucode(priv)) {
 264                 /* Runtime instruction load was bad;
 265                  * take it all the way back down so we can try again */
 266                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
 267                 goto restart;
 268         }
 269
 270         /* Calculate temperature */
 271         priv->temperature = iwl4965_hw_get_temperature(priv);
 272
 273         /* Send pointers to protocol/runtime uCode image ... init code will
 274          * load and launch runtime uCode, which will send us another "Alive"
 275          * notification. */
 276         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 277         if (iwl4965_set_ucode_ptrs(priv)) {
 278                 /* Runtime instruction load won't happen;
 279                  * take it all the way back down so we can try again */
 280                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
 281                 goto restart;
 282         }
 283         return;
 284
 285 restart:
 286         queue_work(priv->workqueue, &priv->restart);
 287 }
 288
 289 static bool is_ht40_channel(__le32 rxon_flags)
 290 {
 291         int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
 292                                     >> RXON_FLG_CHANNEL_MODE_POS;
 293         return ((chan_mod == CHANNEL_MODE_PURE_40) ||
 294                   (chan_mod == CHANNEL_MODE_MIXED));
 295 }
 296
 297 /*
 298  * EEPROM handlers
 299  */
 300 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
 301 {
 302         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 303 }
 304
 305 /*
 306  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
 307  * must be called under priv->lock and mac access
 308  */
 309 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 310 {
 311         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 312 }
 313
 314 static void iwl4965_nic_config(struct iwl_priv *priv)
 315 {
 316         unsigned long flags;
 317         u16 radio_cfg;
 318
 319         spin_lock_irqsave(&priv->lock, flags);
 320
 321         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 322
 323         /* write radio config values to register */
 324         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 325                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 326                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 327                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 328                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 329
 330         /* set CSR_HW_CONFIG_REG for uCode use */
 331         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 332                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 333                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 334
 335         priv->calib_info = (struct iwl_eeprom_calib_info *)
 336                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 337
 338         spin_unlock_irqrestore(&priv->lock, flags);
 339 }
 340
 341 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 342  * Called after every association, but this runs only once!
 343  *  ... once chain noise is calibrated the first time, it's good forever.  */
 344 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 345 {
 346         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 347
 348         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 349                 struct iwl_calib_diff_gain_cmd cmd;
 350
 351                 memset(&cmd, 0, sizeof(cmd));
 352                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 353                 cmd.diff_gain_a = 0;
 354                 cmd.diff_gain_b = 0;
 355                 cmd.diff_gain_c = 0;
 356                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 357                                  sizeof(cmd), &cmd))
 358                         IWL_ERR(priv,
 359                                 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
 360                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 361                 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
 362         }
 363 }
 364
 365 static void iwl4965_gain_computation(struct iwl_priv *priv,
 366                 u32 *average_noise,
 367                 u16 min_average_noise_antenna_i,
 368                 u32 min_average_noise,
 369                 u8 default_chain)
 370 {
 371         int i, ret;
 372         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 373
 374         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 375
 376         for (i = default_chain; i < NUM_RX_CHAINS; i++) {
 377                 s32 delta_g = 0;
 378
 379                 if (!(data->disconn_array[i]) &&
 380                     (data->delta_gain_code[i] ==
 381                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 382                         delta_g = average_noise[i] - min_average_noise;
 383                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 384                         data->delta_gain_code[i] =
 385                                 min(data->delta_gain_code[i],
 386                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 387
 388                         data->delta_gain_code[i] =
 389                                 (data->delta_gain_code[i] | (1 << 2));
 390                 } else {
 391                         data->delta_gain_code[i] = 0;
 392                 }
 393         }
 394         IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
 395                      data->delta_gain_code[0],
 396                      data->delta_gain_code[1],
 397                      data->delta_gain_code[2]);
 398
 399         /* Differential gain gets sent to uCode only once */
 400         if (!data->radio_write) {
 401                 struct iwl_calib_diff_gain_cmd cmd;
 402                 data->radio_write = 1;
 403
 404                 memset(&cmd, 0, sizeof(cmd));
 405                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 406                 cmd.diff_gain_a = data->delta_gain_code[0];
 407                 cmd.diff_gain_b = data->delta_gain_code[1];
 408                 cmd.diff_gain_c = data->delta_gain_code[2];
 409                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 410                                       sizeof(cmd), &cmd);
 411                 if (ret)
 412                         IWL_DEBUG_CALIB(priv, "fail sending cmd "
 413                                      "REPLY_PHY_CALIBRATION_CMD\n");
 414
 415                 /* TODO we might want recalculate
 416                  * rx_chain in rxon cmd */
 417
 418                 /* Mark so we run this algo only once! */
 419                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 420         }
 421         data->chain_noise_a = 0;
 422         data->chain_noise_b = 0;
 423         data->chain_noise_c = 0;
 424         data->chain_signal_a = 0;
 425         data->chain_signal_b = 0;
 426         data->chain_signal_c = 0;
 427         data->beacon_count = 0;
 428 }
 429
 430 static void iwl4965_bg_txpower_work(struct work_struct *work)
 431 {
 432         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 433                         txpower_work);
 434
 435         /* If a scan happened to start before we got here
 436          * then just return; the statistics notification will
 437          * kick off another scheduled work to compensate for
 438          * any temperature delta we missed here. */
 439         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 440             test_bit(STATUS_SCANNING, &priv->status))
 441                 return;
 442
 443         mutex_lock(&priv->mutex);
 444
 445         /* Regardless of if we are associated, we must reconfigure the
 446          * TX power since frames can be sent on non-radar channels while
 447          * not associated */
 448         iwl4965_send_tx_power(priv);
 449
 450         /* Update last_temperature to keep is_calib_needed from running
 451          * when it isn't needed... */
 452         priv->last_temperature = priv->temperature;
 453
 454         mutex_unlock(&priv->mutex);
 455 }
 456
 457 /*
 458  * Acquire priv->lock before calling this function !
 459  */
 460 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 461 {
 462         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 463                              (index & 0xff) | (txq_id << 8));
 464         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 465 }
 466
 467 /**
 468  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 469  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 470  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 471  *
 472  * NOTE:  Acquire priv->lock before calling this function !
 473  */
 474 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 475                                         struct iwl_tx_queue *txq,
 476                                         int tx_fifo_id, int scd_retry)
 477 {
 478         int txq_id = txq->q.id;
 479
 480         /* Find out whether to activate Tx queue */
 481         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
 482
 483         /* Set up and activate */
 484         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 485                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 486                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 487                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 488                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 489                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 490
 491         txq->sched_retry = scd_retry;
 492
 493         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
 494                        active ? "Activate" : "Deactivate",
 495                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 496 }
 497
 498 static const s8 default_queue_to_tx_fifo[] = {
 499         IWL_TX_FIFO_VO,
 500         IWL_TX_FIFO_VI,
 501         IWL_TX_FIFO_BE,
 502         IWL_TX_FIFO_BK,
 503         IWL49_CMD_FIFO_NUM,
 504         IWL_TX_FIFO_UNUSED,
 505         IWL_TX_FIFO_UNUSED,
 506 };
 507
 508 static int iwl4965_alive_notify(struct iwl_priv *priv)
 509 {
 510         u32 a;
 511         unsigned long flags;
 512         int i, chan;
 513         u32 reg_val;
 514
 515         spin_lock_irqsave(&priv->lock, flags);
 516
 517         /* Clear 4965's internal Tx Scheduler data base */
 518         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 519         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 520         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 521                 iwl_write_targ_mem(priv, a, 0);
 522         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 523                 iwl_write_targ_mem(priv, a, 0);
 524         for (; a < priv->scd_base_addr +
 525                IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
 526                 iwl_write_targ_mem(priv, a, 0);
 527
 528         /* Tel 4965 where to find Tx byte count tables */
 529         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 530                         priv->scd_bc_tbls.dma >> 10);
 531
 532         /* Enable DMA channel */
 533         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
 534                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
 535                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
 536                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
 537
 538         /* Update FH chicken bits */
 539         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
 540         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
 541                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
 542
 543         /* Disable chain mode for all queues */
 544         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 545
 546         /* Initialize each Tx queue (including the command queue) */
 547         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 548
 549                 /* TFD circular buffer read/write indexes */
 550                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 551                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 552
 553                 /* Max Tx Window size for Scheduler-ACK mode */
 554                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 555                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 556                                 (SCD_WIN_SIZE <<
 557                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 558                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 559
 560                 /* Frame limit */
 561                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 562                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 563                                 sizeof(u32),
 564                                 (SCD_FRAME_LIMIT <<
 565                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 566                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 567
 568         }
 569         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 570                                  (1 << priv->hw_params.max_txq_num) - 1);
 571
 572         /* Activate all Tx DMA/FIFO channels */
 573         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
 574
 575         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 576
 577         /* make sure all queue are not stopped */
 578         memset(&priv->queue_stopped[0], 0, sizeof(priv->queue_stopped));
 579         for (i = 0; i < 4; i++)
 580                 atomic_set(&priv->queue_stop_count[i], 0);
 581
 582         /* reset to 0 to enable all the queue first */
 583         priv->txq_ctx_active_msk = 0;
 584         /* Map each Tx/cmd queue to its corresponding fifo */
 585         BUILD_BUG_ON(ARRAY_SIZE(default_queue_to_tx_fifo) != 7);
 586         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 587                 int ac = default_queue_to_tx_fifo[i];
 588
 589                 iwl_txq_ctx_activate(priv, i);
 590
 591                 if (ac == IWL_TX_FIFO_UNUSED)
 592                         continue;
 593
 594                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 595         }
 596
 597         spin_unlock_irqrestore(&priv->lock, flags);
 598
 599         return 0;
 600 }
 601
 602 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 603         .min_nrg_cck = 97,
 604         .max_nrg_cck = 0, /* not used, set to 0 */
 605
 606         .auto_corr_min_ofdm = 85,
 607         .auto_corr_min_ofdm_mrc = 170,
 608         .auto_corr_min_ofdm_x1 = 105,
 609         .auto_corr_min_ofdm_mrc_x1 = 220,
 610
 611         .auto_corr_max_ofdm = 120,
 612         .auto_corr_max_ofdm_mrc = 210,
 613         .auto_corr_max_ofdm_x1 = 140,
 614         .auto_corr_max_ofdm_mrc_x1 = 270,
 615
 616         .auto_corr_min_cck = 125,
 617         .auto_corr_max_cck = 200,
 618         .auto_corr_min_cck_mrc = 200,
 619         .auto_corr_max_cck_mrc = 400,
 620
 621         .nrg_th_cck = 100,
 622         .nrg_th_ofdm = 100,
 623
 624         .barker_corr_th_min = 190,
 625         .barker_corr_th_min_mrc = 390,
 626         .nrg_th_cca = 62,
 627 };
 628
 629 static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
 630 {
 631         /* want Kelvin */
 632         priv->hw_params.ct_kill_threshold =
 633                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
 634 }
 635
 636 /**
 637  * iwl4965_hw_set_hw_params
 638  *
 639  * Called when initializing driver
 640  */
 641 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 642 {
 643         if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
 644             priv->cfg->mod_params->num_of_queues <= IWL49_NUM_QUEUES)
 645                 priv->cfg->num_of_queues =
 646                         priv->cfg->mod_params->num_of_queues;
 647
 648         priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
 649         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 650         priv->hw_params.scd_bc_tbls_size =
 651                         priv->cfg->num_of_queues *
 652                         sizeof(struct iwl4965_scd_bc_tbl);
 653         priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
 654         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 655         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 656         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 657         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 658         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 659         priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
 660
 661         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
 662
 663         priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
 664         priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
 665         priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
 666         priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
 667         if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
 668                 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
 669
 670         priv->hw_params.sens = &iwl4965_sensitivity;
 671
 672         return 0;
 673 }
 674
 675 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 676 {
 677         s32 sign = 1;
 678
 679         if (num < 0) {
 680                 sign = -sign;
 681                 num = -num;
 682         }
 683         if (denom < 0) {
 684                 sign = -sign;
 685                 denom = -denom;
 686         }
 687         *res = 1;
 688         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 689
 690         return 1;
 691 }
 692
 693 /**
 694  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 695  *
 696  * Determines power supply voltage compensation for txpower calculations.
 697  * Returns number of 1/2-dB steps to subtract from gain table index,
 698  * to compensate for difference between power supply voltage during
 699  * factory measurements, vs. current power supply voltage.
 700  *
 701  * Voltage indication is higher for lower voltage.
 702  * Lower voltage requires more gain (lower gain table index).
 703  */
 704 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 705                                             s32 current_voltage)
 706 {
 707         s32 comp = 0;
 708
 709         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 710             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 711                 return 0;
 712
 713         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 714                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 715
 716         if (current_voltage > eeprom_voltage)
 717                 comp *= 2;
 718         if ((comp < -2) || (comp > 2))
 719                 comp = 0;
 720
 721         return comp;
 722 }
 723
 724 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 725 {
 726         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 727             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 728                 return CALIB_CH_GROUP_5;
 729
 730         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 731             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 732                 return CALIB_CH_GROUP_1;
 733
 734         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 735             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 736                 return CALIB_CH_GROUP_2;
 737
 738         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 739             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 740                 return CALIB_CH_GROUP_3;
 741
 742         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 743             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 744                 return CALIB_CH_GROUP_4;
 745
 746         return -1;
 747 }
 748
 749 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 750 {
 751         s32 b = -1;
 752
 753         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 754                 if (priv->calib_info->band_info[b].ch_from == 0)
 755                         continue;
 756
 757                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 758                     && (channel <= priv->calib_info->band_info[b].ch_to))
 759                         break;
 760         }
 761
 762         return b;
 763 }
 764
 765 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 766 {
 767         s32 val;
 768
 769         if (x2 == x1)
 770                 return y1;
 771         else {
 772                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 773                 return val + y2;
 774         }
 775 }
 776
 777 /**
 778  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 779  *
 780  * Interpolates factory measurements from the two sample channels within a
 781  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 782  * differences in channel frequencies, which is proportional to differences
 783  * in channel number.
 784  */
 785 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 786                                     struct iwl_eeprom_calib_ch_info *chan_info)
 787 {
 788         s32 s = -1;
 789         u32 c;
 790         u32 m;
 791         const struct iwl_eeprom_calib_measure *m1;
 792         const struct iwl_eeprom_calib_measure *m2;
 793         struct iwl_eeprom_calib_measure *omeas;
 794         u32 ch_i1;
 795         u32 ch_i2;
 796
 797         s = iwl4965_get_sub_band(priv, channel);
 798         if (s >= EEPROM_TX_POWER_BANDS) {
 799                 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
 800                 return -1;
 801         }
 802
 803         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
 804         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
 805         chan_info->ch_num = (u8) channel;
 806
 807         IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
 808                           channel, s, ch_i1, ch_i2);
 809
 810         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 811                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 812                         m1 = &(priv->calib_info->band_info[s].ch1.
 813                                measurements[c][m]);
 814                         m2 = &(priv->calib_info->band_info[s].ch2.
 815                                measurements[c][m]);
 816                         omeas = &(chan_info->measurements[c][m]);
 817
 818                         omeas->actual_pow =
 819                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 820                                                            m1->actual_pow,
 821                                                            ch_i2,
 822                                                            m2->actual_pow);
 823                         omeas->gain_idx =
 824                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 825                                                            m1->gain_idx, ch_i2,
 826                                                            m2->gain_idx);
 827                         omeas->temperature =
 828                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 829                                                            m1->temperature,
 830                                                            ch_i2,
 831                                                            m2->temperature);
 832                         omeas->pa_det =
 833                             (s8) iwl4965_interpolate_value(channel, ch_i1,
 834                                                            m1->pa_det, ch_i2,
 835                                                            m2->pa_det);
 836
 837                         IWL_DEBUG_TXPOWER(priv,
 838                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
 839                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
 840                         IWL_DEBUG_TXPOWER(priv,
 841                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
 842                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
 843                         IWL_DEBUG_TXPOWER(priv,
 844                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
 845                                 m1->pa_det, m2->pa_det, omeas->pa_det);
 846                         IWL_DEBUG_TXPOWER(priv,
 847                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
 848                                 m1->temperature, m2->temperature,
 849                                 omeas->temperature);
 850                 }
 851         }
 852
 853         return 0;
 854 }
 855
 856 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
 857  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
 858 static s32 back_off_table[] = {
 859         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
 860         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
 861         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
 862         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
 863         10                      /* CCK */
 864 };
 865
 866 /* Thermal compensation values for txpower for various frequency ranges ...
 867  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
 868 static struct iwl4965_txpower_comp_entry {
 869         s32 degrees_per_05db_a;
 870         s32 degrees_per_05db_a_denom;
 871 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
 872         {9, 2},                 /* group 0 5.2, ch  34-43 */
 873         {4, 1},                 /* group 1 5.2, ch  44-70 */
 874         {4, 1},                 /* group 2 5.2, ch  71-124 */
 875         {4, 1},                 /* group 3 5.2, ch 125-200 */
 876         {3, 1}                  /* group 4 2.4, ch   all */
 877 };
 878
 879 static s32 get_min_power_index(s32 rate_power_index, u32 band)
 880 {
 881         if (!band) {
 882                 if ((rate_power_index & 7) <= 4)
 883                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
 884         }
 885         return MIN_TX_GAIN_INDEX;
 886 }
 887
 888 struct gain_entry {
 889         u8 dsp;
 890         u8 radio;
 891 };
 892
 893 static const struct gain_entry gain_table[2][108] = {
 894         /* 5.2GHz power gain index table */
 895         {
 896          {123, 0x3F},           /* highest txpower */
 897          {117, 0x3F},
 898          {110, 0x3F},
 899          {104, 0x3F},
 900          {98, 0x3F},
 901          {110, 0x3E},
 902          {104, 0x3E},
 903          {98, 0x3E},
 904          {110, 0x3D},
 905          {104, 0x3D},
 906          {98, 0x3D},
 907          {110, 0x3C},
 908          {104, 0x3C},
 909          {98, 0x3C},
 910          {110, 0x3B},
 911          {104, 0x3B},
 912          {98, 0x3B},
 913          {110, 0x3A},
 914          {104, 0x3A},
 915          {98, 0x3A},
 916          {110, 0x39},
 917          {104, 0x39},
 918          {98, 0x39},
 919          {110, 0x38},
 920          {104, 0x38},
 921          {98, 0x38},
 922          {110, 0x37},
 923          {104, 0x37},
 924          {98, 0x37},
 925          {110, 0x36},
 926          {104, 0x36},
 927          {98, 0x36},
 928          {110, 0x35},
 929          {104, 0x35},
 930          {98, 0x35},
 931          {110, 0x34},
 932          {104, 0x34},
 933          {98, 0x34},
 934          {110, 0x33},
 935          {104, 0x33},
 936          {98, 0x33},
 937          {110, 0x32},
 938          {104, 0x32},
 939          {98, 0x32},
 940          {110, 0x31},
 941          {104, 0x31},
 942          {98, 0x31},
 943          {110, 0x30},
 944          {104, 0x30},
 945          {98, 0x30},
 946          {110, 0x25},
 947          {104, 0x25},
 948          {98, 0x25},
 949          {110, 0x24},
 950          {104, 0x24},
 951          {98, 0x24},
 952          {110, 0x23},
 953          {104, 0x23},
 954          {98, 0x23},
 955          {110, 0x22},
 956          {104, 0x18},
 957          {98, 0x18},
 958          {110, 0x17},
 959          {104, 0x17},
 960          {98, 0x17},
 961          {110, 0x16},
 962          {104, 0x16},
 963          {98, 0x16},
 964          {110, 0x15},
 965          {104, 0x15},
 966          {98, 0x15},
 967          {110, 0x14},
 968          {104, 0x14},
 969          {98, 0x14},
 970          {110, 0x13},
 971          {104, 0x13},
 972          {98, 0x13},
 973          {110, 0x12},
 974          {104, 0x08},
 975          {98, 0x08},
 976          {110, 0x07},
 977          {104, 0x07},
 978          {98, 0x07},
 979          {110, 0x06},
 980          {104, 0x06},
 981          {98, 0x06},
 982          {110, 0x05},
 983          {104, 0x05},
 984          {98, 0x05},
 985          {110, 0x04},
 986          {104, 0x04},
 987          {98, 0x04},
 988          {110, 0x03},
 989          {104, 0x03},
 990          {98, 0x03},
 991          {110, 0x02},
 992          {104, 0x02},
 993          {98, 0x02},
 994          {110, 0x01},
 995          {104, 0x01},
 996          {98, 0x01},
 997          {110, 0x00},
 998          {104, 0x00},
 999          {98, 0x00},
1000          {93, 0x00},
1001          {88, 0x00},
1002          {83, 0x00},
1003          {78, 0x00},
1004          },
1005         /* 2.4GHz power gain index table */
1006         {
1007          {110, 0x3f},           /* highest txpower */
1008          {104, 0x3f},
1009          {98, 0x3f},
1010          {110, 0x3e},
1011          {104, 0x3e},
1012          {98, 0x3e},
1013          {110, 0x3d},
1014          {104, 0x3d},
1015          {98, 0x3d},
1016          {110, 0x3c},
1017          {104, 0x3c},
1018          {98, 0x3c},
1019          {110, 0x3b},
1020          {104, 0x3b},
1021          {98, 0x3b},
1022          {110, 0x3a},
1023          {104, 0x3a},
1024          {98, 0x3a},
1025          {110, 0x39},
1026          {104, 0x39},
1027          {98, 0x39},
1028          {110, 0x38},
1029          {104, 0x38},
1030          {98, 0x38},
1031          {110, 0x37},
1032          {104, 0x37},
1033          {98, 0x37},
1034          {110, 0x36},
1035          {104, 0x36},
1036          {98, 0x36},
1037          {110, 0x35},
1038          {104, 0x35},
1039          {98, 0x35},
1040          {110, 0x34},
1041          {104, 0x34},
1042          {98, 0x34},
1043          {110, 0x33},
1044          {104, 0x33},
1045          {98, 0x33},
1046          {110, 0x32},
1047          {104, 0x32},
1048          {98, 0x32},
1049          {110, 0x31},
1050          {104, 0x31},
1051          {98, 0x31},
1052          {110, 0x30},
1053          {104, 0x30},
1054          {98, 0x30},
1055          {110, 0x6},
1056          {104, 0x6},
1057          {98, 0x6},
1058          {110, 0x5},
1059          {104, 0x5},
1060          {98, 0x5},
1061          {110, 0x4},
1062          {104, 0x4},
1063          {98, 0x4},
1064          {110, 0x3},
1065          {104, 0x3},
1066          {98, 0x3},
1067          {110, 0x2},
1068          {104, 0x2},
1069          {98, 0x2},
1070          {110, 0x1},
1071          {104, 0x1},
1072          {98, 0x1},
1073          {110, 0x0},
1074          {104, 0x0},
1075          {98, 0x0},
1076          {97, 0},
1077          {96, 0},
1078          {95, 0},
1079          {94, 0},
1080          {93, 0},
1081          {92, 0},
1082          {91, 0},
1083          {90, 0},
1084          {89, 0},
1085          {88, 0},
1086          {87, 0},
1087          {86, 0},
1088          {85, 0},
1089          {84, 0},
1090          {83, 0},
1091          {82, 0},
1092          {81, 0},
1093          {80, 0},
1094          {79, 0},
1095          {78, 0},
1096          {77, 0},
1097          {76, 0},
1098          {75, 0},
1099          {74, 0},
1100          {73, 0},
1101          {72, 0},
1102          {71, 0},
1103          {70, 0},
1104          {69, 0},
1105          {68, 0},
1106          {67, 0},
1107          {66, 0},
1108          {65, 0},
1109          {64, 0},
1110          {63, 0},
1111          {62, 0},
1112          {61, 0},
1113          {60, 0},
1114          {59, 0},
1115          }
1116 };
1117
1118 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1119                                     u8 is_ht40, u8 ctrl_chan_high,
1120                                     struct iwl4965_tx_power_db *tx_power_tbl)
1121 {
1122         u8 saturation_power;
1123         s32 target_power;
1124         s32 user_target_power;
1125         s32 power_limit;
1126         s32 current_temp;
1127         s32 reg_limit;
1128         s32 current_regulatory;
1129         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1130         int i;
1131         int c;
1132         const struct iwl_channel_info *ch_info = NULL;
1133         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1134         const struct iwl_eeprom_calib_measure *measurement;
1135         s16 voltage;
1136         s32 init_voltage;
1137         s32 voltage_compensation;
1138         s32 degrees_per_05db_num;
1139         s32 degrees_per_05db_denom;
1140         s32 factory_temp;
1141         s32 temperature_comp[2];
1142         s32 factory_gain_index[2];
1143         s32 factory_actual_pwr[2];
1144         s32 power_index;
1145
1146         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1147          *   are used for indexing into txpower table) */
1148         user_target_power = 2 * priv->tx_power_user_lmt;
1149
1150         /* Get current (RXON) channel, band, width */
1151         IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
1152                           is_ht40);
1153
1154         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1155
1156         if (!is_channel_valid(ch_info))
1157                 return -EINVAL;
1158
1159         /* get txatten group, used to select 1) thermal txpower adjustment
1160          *   and 2) mimo txpower balance between Tx chains. */
1161         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1162         if (txatten_grp < 0) {
1163                 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1164                           channel);
1165                 return -EINVAL;
1166         }
1167
1168         IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1169                           channel, txatten_grp);
1170
1171         if (is_ht40) {
1172                 if (ctrl_chan_high)
1173                         channel -= 2;
1174                 else
1175                         channel += 2;
1176         }
1177
1178         /* hardware txpower limits ...
1179          * saturation (clipping distortion) txpowers are in half-dBm */
1180         if (band)
1181                 saturation_power = priv->calib_info->saturation_power24;
1182         else
1183                 saturation_power = priv->calib_info->saturation_power52;
1184
1185         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1186             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1187                 if (band)
1188                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1189                 else
1190                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1191         }
1192
1193         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1194          *   max_power_avg values are in dBm, convert * 2 */
1195         if (is_ht40)
1196                 reg_limit = ch_info->ht40_max_power_avg * 2;
1197         else
1198                 reg_limit = ch_info->max_power_avg * 2;
1199
1200         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1201             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1202                 if (band)
1203                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1204                 else
1205                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1206         }
1207
1208         /* Interpolate txpower calibration values for this channel,
1209          *   based on factory calibration tests on spaced channels. */
1210         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1211
1212         /* calculate tx gain adjustment based on power supply voltage */
1213         voltage = le16_to_cpu(priv->calib_info->voltage);
1214         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1215         voltage_compensation =
1216             iwl4965_get_voltage_compensation(voltage, init_voltage);
1217
1218         IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1219                           init_voltage,
1220                           voltage, voltage_compensation);
1221
1222         /* get current temperature (Celsius) */
1223         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1224         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1225         current_temp = KELVIN_TO_CELSIUS(current_temp);
1226
1227         /* select thermal txpower adjustment params, based on channel group
1228          *   (same frequency group used for mimo txatten adjustment) */
1229         degrees_per_05db_num =
1230             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1231         degrees_per_05db_denom =
1232             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1233
1234         /* get per-chain txpower values from factory measurements */
1235         for (c = 0; c < 2; c++) {
1236                 measurement = &ch_eeprom_info.measurements[c][1];
1237
1238                 /* txgain adjustment (in half-dB steps) based on difference
1239                  *   between factory and current temperature */
1240                 factory_temp = measurement->temperature;
1241                 iwl4965_math_div_round((current_temp - factory_temp) *
1242                                        degrees_per_05db_denom,
1243                                        degrees_per_05db_num,
1244                                        &temperature_comp[c]);
1245
1246                 factory_gain_index[c] = measurement->gain_idx;
1247                 factory_actual_pwr[c] = measurement->actual_pow;
1248
1249                 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1250                 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1251                                   "curr tmp %d, comp %d steps\n",
1252                                   factory_temp, current_temp,
1253                                   temperature_comp[c]);
1254
1255                 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1256                                   factory_gain_index[c],
1257                                   factory_actual_pwr[c]);
1258         }
1259
1260         /* for each of 33 bit-rates (including 1 for CCK) */
1261         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1262                 u8 is_mimo_rate;
1263                 union iwl4965_tx_power_dual_stream tx_power;
1264
1265                 /* for mimo, reduce each chain's txpower by half
1266                  * (3dB, 6 steps), so total output power is regulatory
1267                  * compliant. */
1268                 if (i & 0x8) {
1269                         current_regulatory = reg_limit -
1270                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1271                         is_mimo_rate = 1;
1272                 } else {
1273                         current_regulatory = reg_limit;
1274                         is_mimo_rate = 0;
1275                 }
1276
1277                 /* find txpower limit, either hardware or regulatory */
1278                 power_limit = saturation_power - back_off_table[i];
1279                 if (power_limit > current_regulatory)
1280                         power_limit = current_regulatory;
1281
1282                 /* reduce user's txpower request if necessary
1283                  * for this rate on this channel */
1284                 target_power = user_target_power;
1285                 if (target_power > power_limit)
1286                         target_power = power_limit;
1287
1288                 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1289                                   i, saturation_power - back_off_table[i],
1290                                   current_regulatory, user_target_power,
1291                                   target_power);
1292
1293                 /* for each of 2 Tx chains (radio transmitters) */
1294                 for (c = 0; c < 2; c++) {
1295                         s32 atten_value;
1296
1297                         if (is_mimo_rate)
1298                                 atten_value =
1299                                     (s32)le32_to_cpu(priv->card_alive_init.
1300                                     tx_atten[txatten_grp][c]);
1301                         else
1302                                 atten_value = 0;
1303
1304                         /* calculate index; higher index means lower txpower */
1305                         power_index = (u8) (factory_gain_index[c] -
1306                                             (target_power -
1307                                              factory_actual_pwr[c]) -
1308                                             temperature_comp[c] -
1309                                             voltage_compensation +
1310                                             atten_value);
1311
1312 /*                      IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1313                                                 power_index); */
1314
1315                         if (power_index < get_min_power_index(i, band))
1316                                 power_index = get_min_power_index(i, band);
1317
1318                         /* adjust 5 GHz index to support negative indexes */
1319                         if (!band)
1320                                 power_index += 9;
1321
1322                         /* CCK, rate 32, reduce txpower for CCK */
1323                         if (i == POWER_TABLE_CCK_ENTRY)
1324                                 power_index +=
1325                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1326
1327                         /* stay within the table! */
1328                         if (power_index > 107) {
1329                                 IWL_WARN(priv, "txpower index %d > 107\n",
1330                                             power_index);
1331                                 power_index = 107;
1332                         }
1333                         if (power_index < 0) {
1334                                 IWL_WARN(priv, "txpower index %d < 0\n",
1335                                             power_index);
1336                                 power_index = 0;
1337                         }
1338
1339                         /* fill txpower command for this rate/chain */
1340                         tx_power.s.radio_tx_gain[c] =
1341                                 gain_table[band][power_index].radio;
1342                         tx_power.s.dsp_predis_atten[c] =
1343                                 gain_table[band][power_index].dsp;
1344
1345                         IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1346                                           "gain 0x%02x dsp %d\n",
1347                                           c, atten_value, power_index,
1348                                         tx_power.s.radio_tx_gain[c],
1349                                         tx_power.s.dsp_predis_atten[c]);
1350                 } /* for each chain */
1351
1352                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1353
1354         } /* for each rate */
1355
1356         return 0;
1357 }
1358
1359 /**
1360  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1361  *
1362  * Uses the active RXON for channel, band, and characteristics (ht40, high)
1363  * The power limit is taken from priv->tx_power_user_lmt.
1364  */
1365 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1366 {
1367         struct iwl4965_txpowertable_cmd cmd = { 0 };
1368         int ret;
1369         u8 band = 0;
1370         bool is_ht40 = false;
1371         u8 ctrl_chan_high = 0;
1372
1373         if (test_bit(STATUS_SCANNING, &priv->status)) {
1374                 /* If this gets hit a lot, switch it to a BUG() and catch
1375                  * the stack trace to find out who is calling this during
1376                  * a scan. */
1377                 IWL_WARN(priv, "TX Power requested while scanning!\n");
1378                 return -EAGAIN;
1379         }
1380
1381         band = priv->band == IEEE80211_BAND_2GHZ;
1382
1383         is_ht40 =  is_ht40_channel(priv->active_rxon.flags);
1384
1385         if (is_ht40 &&
1386             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1387                 ctrl_chan_high = 1;
1388
1389         cmd.band = band;
1390         cmd.channel = priv->active_rxon.channel;
1391
1392         ret = iwl4965_fill_txpower_tbl(priv, band,
1393                                 le16_to_cpu(priv->active_rxon.channel),
1394                                 is_ht40, ctrl_chan_high, &cmd.tx_power);
1395         if (ret)
1396                 goto out;
1397
1398         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1399
1400 out:
1401         return ret;
1402 }
1403
1404 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1405 {
1406         int ret = 0;
1407         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1408         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1409         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1410
1411         if ((rxon1->flags == rxon2->flags) &&
1412             (rxon1->filter_flags == rxon2->filter_flags) &&
1413             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1414             (rxon1->ofdm_ht_single_stream_basic_rates ==
1415              rxon2->ofdm_ht_single_stream_basic_rates) &&
1416             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1417              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1418             (rxon1->rx_chain == rxon2->rx_chain) &&
1419             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1420                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1421                 return 0;
1422         }
1423
1424         rxon_assoc.flags = priv->staging_rxon.flags;
1425         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1426         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1427         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1428         rxon_assoc.reserved = 0;
1429         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1430             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1431         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1432             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1433         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1434
1435         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1436                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1437         if (ret)
1438                 return ret;
1439
1440         return ret;
1441 }
1442
1443 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1444 {
1445         int rc;
1446         u8 band = 0;
1447         bool is_ht40 = false;
1448         u8 ctrl_chan_high = 0;
1449         struct iwl4965_channel_switch_cmd cmd;
1450         const struct iwl_channel_info *ch_info;
1451
1452         band = priv->band == IEEE80211_BAND_2GHZ;
1453
1454         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1455
1456         is_ht40 = is_ht40_channel(priv->staging_rxon.flags);
1457
1458         if (is_ht40 &&
1459             (priv->staging_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1460                 ctrl_chan_high = 1;
1461
1462         cmd.band = band;
1463         cmd.expect_beacon = 0;
1464         cmd.channel = cpu_to_le16(channel);
1465         cmd.rxon_flags = priv->staging_rxon.flags;
1466         cmd.rxon_filter_flags = priv->staging_rxon.filter_flags;
1467         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1468         if (ch_info)
1469                 cmd.expect_beacon = is_channel_radar(ch_info);
1470         else {
1471                 IWL_ERR(priv, "invalid channel switch from %u to %u\n",
1472                         priv->active_rxon.channel, channel);
1473                 return -EFAULT;
1474         }
1475
1476         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40,
1477                                       ctrl_chan_high, &cmd.tx_power);
1478         if (rc) {
1479                 IWL_DEBUG_11H(priv, "error:%d  fill txpower_tbl\n", rc);
1480                 return rc;
1481         }
1482
1483         priv->switch_rxon.channel = cpu_to_le16(channel);
1484         priv->switch_rxon.switch_in_progress = true;
1485
1486         return iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1487 }
1488
1489 /**
1490  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1491  */
1492 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1493                                             struct iwl_tx_queue *txq,
1494                                             u16 byte_cnt)
1495 {
1496         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1497         int txq_id = txq->q.id;
1498         int write_ptr = txq->q.write_ptr;
1499         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1500         __le16 bc_ent;
1501
1502         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1503
1504         bc_ent = cpu_to_le16(len & 0xFFF);
1505         /* Set up byte count within first 256 entries */
1506         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1507
1508         /* If within first 64 entries, duplicate at end */
1509         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1510                 scd_bc_tbl[txq_id].
1511                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1512 }
1513
1514 /**
1515  * sign_extend - Sign extend a value using specified bit as sign-bit
1516  *
1517  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1518  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1519  *
1520  * @param oper value to sign extend
1521  * @param index 0 based bit index (0<=index<32) to sign bit
1522  */
1523 static s32 sign_extend(u32 oper, int index)
1524 {
1525         u8 shift = 31 - index;
1526
1527         return (s32)(oper << shift) >> shift;
1528 }
1529
1530 /**
1531  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1532  * @statistics: Provides the temperature reading from the uCode
1533  *
1534  * A return of <0 indicates bogus data in the statistics
1535  */
1536 static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1537 {
1538         s32 temperature;
1539         s32 vt;
1540         s32 R1, R2, R3;
1541         u32 R4;
1542
1543         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1544                 (priv->statistics.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
1545                 IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
1546                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1547                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1548                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1549                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1550         } else {
1551                 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1552                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1553                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1554                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1555                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1556         }
1557
1558         /*
1559          * Temperature is only 23 bits, so sign extend out to 32.
1560          *
1561          * NOTE If we haven't received a statistics notification yet
1562          * with an updated temperature, use R4 provided to us in the
1563          * "initialize" ALIVE response.
1564          */
1565         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1566                 vt = sign_extend(R4, 23);
1567         else
1568                 vt = sign_extend(
1569                         le32_to_cpu(priv->statistics.general.temperature), 23);
1570
1571         IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1572
1573         if (R3 == R1) {
1574                 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1575                 return -1;
1576         }
1577
1578         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1579          * Add offset to center the adjustment around 0 degrees Centigrade. */
1580         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1581         temperature /= (R3 - R1);
1582         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1583
1584         IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1585                         temperature, KELVIN_TO_CELSIUS(temperature));
1586
1587         return temperature;
1588 }
1589
1590 /* Adjust Txpower only if temperature variance is greater than threshold. */
1591 #define IWL_TEMPERATURE_THRESHOLD   3
1592
1593 /**
1594  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1595  *
1596  * If the temperature changed has changed sufficiently, then a recalibration
1597  * is needed.
1598  *
1599  * Assumes caller will replace priv->last_temperature once calibration
1600  * executed.
1601  */
1602 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1603 {
1604         int temp_diff;
1605
1606         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1607                 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1608                 return 0;
1609         }
1610
1611         temp_diff = priv->temperature - priv->last_temperature;
1612
1613         /* get absolute value */
1614         if (temp_diff < 0) {
1615                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d\n", temp_diff);
1616                 temp_diff = -temp_diff;
1617         } else if (temp_diff == 0)
1618                 IWL_DEBUG_POWER(priv, "Temperature unchanged\n");
1619         else
1620                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d\n", temp_diff);
1621
1622         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1623                 IWL_DEBUG_POWER(priv, " => thermal txpower calib not needed\n");
1624                 return 0;
1625         }
1626
1627         IWL_DEBUG_POWER(priv, " => thermal txpower calib needed\n");
1628
1629         return 1;
1630 }
1631
1632 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1633 {
1634         s32 temp;
1635
1636         temp = iwl4965_hw_get_temperature(priv);
1637         if (temp < 0)
1638                 return;
1639
1640         if (priv->temperature != temp) {
1641                 if (priv->temperature)
1642                         IWL_DEBUG_TEMP(priv, "Temperature changed "
1643                                        "from %dC to %dC\n",
1644                                        KELVIN_TO_CELSIUS(priv->temperature),
1645                                        KELVIN_TO_CELSIUS(temp));
1646                 else
1647                         IWL_DEBUG_TEMP(priv, "Temperature "
1648                                        "initialized to %dC\n",
1649                                        KELVIN_TO_CELSIUS(temp));
1650         }
1651
1652         priv->temperature = temp;
1653         iwl_tt_handler(priv);
1654         set_bit(STATUS_TEMPERATURE, &priv->status);
1655
1656         if (!priv->disable_tx_power_cal &&
1657              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1658              iwl4965_is_temp_calib_needed(priv))
1659                 queue_work(priv->workqueue, &priv->txpower_work);
1660 }
1661
1662 /**
1663  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1664  */
1665 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1666                                             u16 txq_id)
1667 {
1668         /* Simply stop the queue, but don't change any configuration;
1669          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1670         iwl_write_prph(priv,
1671                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1672                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1673                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1674 }
1675
1676 /**
1677  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1678  * priv->lock must be held by the caller
1679  */
1680 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1681                                    u16 ssn_idx, u8 tx_fifo)
1682 {
1683         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1684             (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1685              <= txq_id)) {
1686                 IWL_WARN(priv,
1687                         "queue number out of range: %d, must be %d to %d\n",
1688                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1689                         IWL49_FIRST_AMPDU_QUEUE +
1690                         priv->cfg->num_of_ampdu_queues - 1);
1691                 return -EINVAL;
1692         }
1693
1694         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1695
1696         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1697
1698         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1699         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1700         /* supposes that ssn_idx is valid (!= 0xFFF) */
1701         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1702
1703         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1704         iwl_txq_ctx_deactivate(priv, txq_id);
1705         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1706
1707         return 0;
1708 }
1709
1710 /**
1711  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1712  */
1713 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1714                                         u16 txq_id)
1715 {
1716         u32 tbl_dw_addr;
1717         u32 tbl_dw;
1718         u16 scd_q2ratid;
1719
1720         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1721
1722         tbl_dw_addr = priv->scd_base_addr +
1723                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1724
1725         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1726
1727         if (txq_id & 0x1)
1728                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1729         else
1730                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1731
1732         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1733
1734         return 0;
1735 }
1736
1737
1738 /**
1739  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1740  *
1741  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1742  *        i.e. it must be one of the higher queues used for aggregation
1743  */
1744 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1745                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1746 {
1747         unsigned long flags;
1748         u16 ra_tid;
1749
1750         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1751             (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1752              <= txq_id)) {
1753                 IWL_WARN(priv,
1754                         "queue number out of range: %d, must be %d to %d\n",
1755                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1756                         IWL49_FIRST_AMPDU_QUEUE +
1757                         priv->cfg->num_of_ampdu_queues - 1);
1758                 return -EINVAL;
1759         }
1760
1761         ra_tid = BUILD_RAxTID(sta_id, tid);
1762
1763         /* Modify device's station table to Tx this TID */
1764         iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1765
1766         spin_lock_irqsave(&priv->lock, flags);
1767
1768         /* Stop this Tx queue before configuring it */
1769         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1770
1771         /* Map receiver-address / traffic-ID to this queue */
1772         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1773
1774         /* Set this queue as a chain-building queue */
1775         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1776
1777         /* Place first TFD at index corresponding to start sequence number.
1778          * Assumes that ssn_idx is valid (!= 0xFFF) */
1779         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1780         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1781         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1782
1783         /* Set up Tx window size and frame limit for this queue */
1784         iwl_write_targ_mem(priv,
1785                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1786                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1787                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1788
1789         iwl_write_targ_mem(priv, priv->scd_base_addr +
1790                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1791                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1792                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1793
1794         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1795
1796         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1797         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1798
1799         spin_unlock_irqrestore(&priv->lock, flags);
1800
1801         return 0;
1802 }
1803
1804
1805 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1806 {
1807         switch (cmd_id) {
1808         case REPLY_RXON:
1809                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1810         default:
1811                 return len;
1812         }
1813 }
1814
1815 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1816 {
1817         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1818         addsta->mode = cmd->mode;
1819         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1820         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1821         addsta->station_flags = cmd->station_flags;
1822         addsta->station_flags_msk = cmd->station_flags_msk;
1823         addsta->tid_disable_tx = cmd->tid_disable_tx;
1824         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1825         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1826         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1827         addsta->sleep_tx_count = cmd->sleep_tx_count;
1828         addsta->reserved1 = cpu_to_le16(0);
1829         addsta->reserved2 = cpu_to_le16(0);
1830
1831         return (u16)sizeof(struct iwl4965_addsta_cmd);
1832 }
1833
1834 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1835 {
1836         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1837 }
1838
1839 /**
1840  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1841  */
1842 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1843                                       struct iwl_ht_agg *agg,
1844                                       struct iwl4965_tx_resp *tx_resp,
1845                                       int txq_id, u16 start_idx)
1846 {
1847         u16 status;
1848         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1849         struct ieee80211_tx_info *info = NULL;
1850         struct ieee80211_hdr *hdr = NULL;
1851         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1852         int i, sh, idx;
1853         u16 seq;
1854         if (agg->wait_for_ba)
1855                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
1856
1857         agg->frame_count = tx_resp->frame_count;
1858         agg->start_idx = start_idx;
1859         agg->rate_n_flags = rate_n_flags;
1860         agg->bitmap = 0;
1861
1862         /* num frames attempted by Tx command */
1863         if (agg->frame_count == 1) {
1864                 /* Only one frame was attempted; no block-ack will arrive */
1865                 status = le16_to_cpu(frame_status[0].status);
1866                 idx = start_idx;
1867
1868                 /* FIXME: code repetition */
1869                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
1870                                    agg->frame_count, agg->start_idx, idx);
1871
1872                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1873                 info->status.rates[0].count = tx_resp->failure_frame + 1;
1874                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1875                 info->flags |= iwl_tx_status_to_mac80211(status);
1876                 iwlagn_hwrate_to_tx_control(priv, rate_n_flags, info);
1877                 /* FIXME: code repetition end */
1878
1879                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
1880                                     status & 0xff, tx_resp->failure_frame);
1881                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
1882
1883                 agg->wait_for_ba = 0;
1884         } else {
1885                 /* Two or more frames were attempted; expect block-ack */
1886                 u64 bitmap = 0;
1887                 int start = agg->start_idx;
1888
1889                 /* Construct bit-map of pending frames within Tx window */
1890                 for (i = 0; i < agg->frame_count; i++) {
1891                         u16 sc;
1892                         status = le16_to_cpu(frame_status[i].status);
1893                         seq  = le16_to_cpu(frame_status[i].sequence);
1894                         idx = SEQ_TO_INDEX(seq);
1895                         txq_id = SEQ_TO_QUEUE(seq);
1896
1897                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1898                                       AGG_TX_STATE_ABORT_MSK))
1899                                 continue;
1900
1901                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
1902                                            agg->frame_count, txq_id, idx);
1903
1904                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
1905                         if (!hdr) {
1906                                 IWL_ERR(priv,
1907                                         "BUG_ON idx doesn't point to valid skb"
1908                                         " idx=%d, txq_id=%d\n", idx, txq_id);
1909                                 return -1;
1910                         }
1911
1912                         sc = le16_to_cpu(hdr->seq_ctrl);
1913                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
1914                                 IWL_ERR(priv,
1915                                         "BUG_ON idx doesn't match seq control"
1916                                         " idx=%d, seq_idx=%d, seq=%d\n",
1917                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
1918                                 return -1;
1919                         }
1920
1921                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
1922                                            i, idx, SEQ_TO_SN(sc));
1923
1924                         sh = idx - start;
1925                         if (sh > 64) {
1926                                 sh = (start - idx) + 0xff;
1927                                 bitmap = bitmap << sh;
1928                                 sh = 0;
1929                                 start = idx;
1930                         } else if (sh < -64)
1931                                 sh  = 0xff - (start - idx);
1932                         else if (sh < 0) {
1933                                 sh = start - idx;
1934                                 start = idx;
1935                                 bitmap = bitmap << sh;
1936                                 sh = 0;
1937                         }
1938                         bitmap |= 1ULL << sh;
1939                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
1940                                            start, (unsigned long long)bitmap);
1941                 }
1942
1943                 agg->bitmap = bitmap;
1944                 agg->start_idx = start;
1945                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
1946                                    agg->frame_count, agg->start_idx,
1947                                    (unsigned long long)agg->bitmap);
1948
1949                 if (bitmap)
1950                         agg->wait_for_ba = 1;
1951         }
1952         return 0;
1953 }
1954
1955 /**
1956  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
1957  */
1958 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
1959                                 struct iwl_rx_mem_buffer *rxb)
1960 {
1961         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1962         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
1963         int txq_id = SEQ_TO_QUEUE(sequence);
1964         int index = SEQ_TO_INDEX(sequence);
1965         struct iwl_tx_queue *txq = &priv->txq[txq_id];
1966         struct ieee80211_hdr *hdr;
1967         struct ieee80211_tx_info *info;
1968         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
1969         u32  status = le32_to_cpu(tx_resp->u.status);
1970         int uninitialized_var(tid);
1971         int sta_id;
1972         int freed;
1973         u8 *qc = NULL;
1974
1975         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
1976                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
1977                           "is out of range [0-%d] %d %d\n", txq_id,
1978                           index, txq->q.n_bd, txq->q.write_ptr,
1979                           txq->q.read_ptr);
1980                 return;
1981         }
1982
1983         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
1984         memset(&info->status, 0, sizeof(info->status));
1985
1986         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
1987         if (ieee80211_is_data_qos(hdr->frame_control)) {
1988                 qc = ieee80211_get_qos_ctl(hdr);
1989                 tid = qc[0] & 0xf;
1990         }
1991
1992         sta_id = iwl_get_ra_sta_id(priv, hdr);
1993         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
1994                 IWL_ERR(priv, "Station not known\n");
1995                 return;
1996         }
1997
1998         if (txq->sched_retry) {
1999                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2000                 struct iwl_ht_agg *agg = NULL;
2001
2002                 WARN_ON(!qc);
2003
2004                 agg = &priv->stations[sta_id].tid[tid].agg;
2005
2006                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2007
2008                 /* check if BAR is needed */
2009                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2010                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2011
2012                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2013                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2014                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2015                                            "%d index %d\n", scd_ssn , index);
2016                         freed = iwlagn_tx_queue_reclaim(priv, txq_id, index);
2017                         iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
2018
2019                         if (priv->mac80211_registered &&
2020                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2021                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2022                                 if (agg->state == IWL_AGG_OFF)
2023                                         iwl_wake_queue(priv, txq_id);
2024                                 else
2025                                         iwl_wake_queue(priv, txq->swq_id);
2026                         }
2027                 }
2028         } else {
2029                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2030                 info->flags |= iwl_tx_status_to_mac80211(status);
2031                 iwlagn_hwrate_to_tx_control(priv,
2032                                         le32_to_cpu(tx_resp->rate_n_flags),
2033                                         info);
2034
2035                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2036                                    "rate_n_flags 0x%x retries %d\n",
2037                                    txq_id,
2038                                    iwl_get_tx_fail_reason(status), status,
2039                                    le32_to_cpu(tx_resp->rate_n_flags),
2040                                    tx_resp->failure_frame);
2041
2042                 freed = iwlagn_tx_queue_reclaim(priv, txq_id, index);
2043                 iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
2044
2045                 if (priv->mac80211_registered &&
2046                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2047                         iwl_wake_queue(priv, txq_id);
2048         }
2049
2050         iwlagn_txq_check_empty(priv, sta_id, tid, txq_id);
2051
2052         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2053                 IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
2054 }
2055
2056 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2057                              struct iwl_rx_phy_res *rx_resp)
2058 {
2059         /* data from PHY/DSP regarding signal strength, etc.,
2060          *   contents are always there, not configurable by host.  */
2061         struct iwl4965_rx_non_cfg_phy *ncphy =
2062             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2063         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2064                         >> IWL49_AGC_DB_POS;
2065
2066         u32 valid_antennae =
2067             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2068                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2069         u8 max_rssi = 0;
2070         u32 i;
2071
2072         /* Find max rssi among 3 possible receivers.
2073          * These values are measured by the digital signal processor (DSP).
2074          * They should stay fairly constant even as the signal strength varies,
2075          *   if the radio's automatic gain control (AGC) is working right.
2076          * AGC value (see below) will provide the "interesting" info. */
2077         for (i = 0; i < 3; i++)
2078                 if (valid_antennae & (1 << i))
2079                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2080
2081         IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2082                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2083                 max_rssi, agc);
2084
2085         /* dBm = max_rssi dB - agc dB - constant.
2086          * Higher AGC (higher radio gain) means lower signal. */
2087         return max_rssi - agc - IWLAGN_RSSI_OFFSET;
2088 }
2089
2090
2091 /* Set up 4965-specific Rx frame reply handlers */
2092 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2093 {
2094         /* Legacy Rx frames */
2095         priv->rx_handlers[REPLY_RX] = iwlagn_rx_reply_rx;
2096         /* Tx response */
2097         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2098 }
2099
2100 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2101 {
2102         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2103 }
2104
2105 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2106 {
2107         cancel_work_sync(&priv->txpower_work);
2108 }
2109
2110 #define IWL4965_UCODE_GET(item)                                         \
2111 static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2112                                     u32 api_ver)                        \
2113 {                                                                       \
2114         return le32_to_cpu(ucode->u.v1.item);                           \
2115 }
2116
2117 static u32 iwl4965_ucode_get_header_size(u32 api_ver)
2118 {
2119         return UCODE_HEADER_SIZE(1);
2120 }
2121 static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode,
2122                                    u32 api_ver)
2123 {
2124         return 0;
2125 }
2126 static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode,
2127                                   u32 api_ver)
2128 {
2129         return (u8 *) ucode->u.v1.data;
2130 }
2131
2132 IWL4965_UCODE_GET(inst_size);
2133 IWL4965_UCODE_GET(data_size);
2134 IWL4965_UCODE_GET(init_size);
2135 IWL4965_UCODE_GET(init_data_size);
2136 IWL4965_UCODE_GET(boot_size);
2137
2138 static struct iwl_hcmd_ops iwl4965_hcmd = {
2139         .rxon_assoc = iwl4965_send_rxon_assoc,
2140         .commit_rxon = iwl_commit_rxon,
2141         .set_rxon_chain = iwl_set_rxon_chain,
2142 };
2143
2144 static struct iwl_ucode_ops iwl4965_ucode = {
2145         .get_header_size = iwl4965_ucode_get_header_size,
2146         .get_build = iwl4965_ucode_get_build,
2147         .get_inst_size = iwl4965_ucode_get_inst_size,
2148         .get_data_size = iwl4965_ucode_get_data_size,
2149         .get_init_size = iwl4965_ucode_get_init_size,
2150         .get_init_data_size = iwl4965_ucode_get_init_data_size,
2151         .get_boot_size = iwl4965_ucode_get_boot_size,
2152         .get_data = iwl4965_ucode_get_data,
2153 };
2154 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2155         .get_hcmd_size = iwl4965_get_hcmd_size,
2156         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2157         .chain_noise_reset = iwl4965_chain_noise_reset,
2158         .gain_computation = iwl4965_gain_computation,
2159         .rts_tx_cmd_flag = iwlcore_rts_tx_cmd_flag,
2160         .calc_rssi = iwl4965_calc_rssi,
2161 };
2162
2163 static struct iwl_lib_ops iwl4965_lib = {
2164         .set_hw_params = iwl4965_hw_set_hw_params,
2165         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2166         .txq_set_sched = iwl4965_txq_set_sched,
2167         .txq_agg_enable = iwl4965_txq_agg_enable,
2168         .txq_agg_disable = iwl4965_txq_agg_disable,
2169         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2170         .txq_free_tfd = iwl_hw_txq_free_tfd,
2171         .txq_init = iwl_hw_tx_queue_init,
2172         .rx_handler_setup = iwl4965_rx_handler_setup,
2173         .setup_deferred_work = iwl4965_setup_deferred_work,
2174         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2175         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2176         .alive_notify = iwl4965_alive_notify,
2177         .init_alive_start = iwl4965_init_alive_start,
2178         .load_ucode = iwl4965_load_bsm,
2179         .dump_nic_event_log = iwl_dump_nic_event_log,
2180         .dump_nic_error_log = iwl_dump_nic_error_log,
2181         .dump_fh = iwl_dump_fh,
2182         .set_channel_switch = iwl4965_hw_channel_switch,
2183         .apm_ops = {
2184                 .init = iwl_apm_init,
2185                 .stop = iwl_apm_stop,
2186                 .config = iwl4965_nic_config,
2187                 .set_pwr_src = iwl_set_pwr_src,
2188         },
2189         .eeprom_ops = {
2190                 .regulatory_bands = {
2191                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2192                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2193                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2194                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2195                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2196                         EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2197                         EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
2198                 },
2199                 .verify_signature  = iwlcore_eeprom_verify_signature,
2200                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2201                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2202                 .calib_version = iwl4965_eeprom_calib_version,
2203                 .query_addr = iwlcore_eeprom_query_addr,
2204         },
2205         .send_tx_power  = iwl4965_send_tx_power,
2206         .update_chain_flags = iwl_update_chain_flags,
2207         .post_associate = iwl_post_associate,
2208         .config_ap = iwl_config_ap,
2209         .isr = iwl_isr_legacy,
2210         .temp_ops = {
2211                 .temperature = iwl4965_temperature_calib,
2212                 .set_ct_kill = iwl4965_set_ct_threshold,
2213         },
2214         .add_bcast_station = iwl_add_bcast_station,
2215         .check_plcp_health = iwl_good_plcp_health,
2216 };
2217
2218 static const struct iwl_ops iwl4965_ops = {
2219         .ucode = &iwl4965_ucode,
2220         .lib = &iwl4965_lib,
2221         .hcmd = &iwl4965_hcmd,
2222         .utils = &iwl4965_hcmd_utils,
2223         .led = &iwlagn_led_ops,
2224 };
2225
2226 struct iwl_cfg iwl4965_agn_cfg = {
2227         .name = "Intel(R) Wireless WiFi Link 4965AGN",
2228         .fw_name_pre = IWL4965_FW_PRE,
2229         .ucode_api_max = IWL4965_UCODE_API_MAX,
2230         .ucode_api_min = IWL4965_UCODE_API_MIN,
2231         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2232         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2233         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2234         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2235         .ops = &iwl4965_ops,
2236         .num_of_queues = IWL49_NUM_QUEUES,
2237         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
2238         .mod_params = &iwlagn_mod_params,
2239         .valid_tx_ant = ANT_AB,
2240         .valid_rx_ant = ANT_ABC,
2241         .pll_cfg_val = 0,
2242         .set_l0s = true,
2243         .use_bsm = true,
2244         .use_isr_legacy = true,
2245         .ht_greenfield_support = false,
2246         .broken_powersave = true,
2247         .led_compensation = 61,
2248         .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
2249         .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
2250         .monitor_recover_period = IWL_MONITORING_PERIOD,
2251         .temperature_kelvin = true,
2252         .off_channel_workaround = true,
2253 };
2254
2255 /* Module firmware */
2256 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2257